CMO V420H1-LH6 Specification

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TFT LCD Approval Specification

MODEL NO.: V420H1 – LH6

Customer: _________________________________

Approved by:_______________________________

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Model No.: V420H1-LH6

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Note:

TV Head Division

Approved By

Chao-Chun Chung

Reviewed By

QA Dept. Product Development Div.

Hsin-Nan Chen WT Lin

Prepared By

LCD TV Marketing and Product Management Div.

CY Chang Sisley Wu

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CONTENTS

REVISION HISTORY ..................................................................................................................................................4

1. GENERAL DESCRIPTION......................................................................................................................................5

1.1 OVERVIEW....................................................................................................................................................5

1.2 FEATURES ....................................................................................................................................................5

1.3 APPLICATION................................................................................................................................................5

1.4 GENERAL SPECIFICATIONS ........................................................................................................................5

1.5 MECHANICAL SPECIFICATIONS..................................................................................................................6

2. ABSOLUTE MAXIMUM RATINGS...........................................................................................................................7

2.1 ABSOLUTE RATINGS OF ENVIRONMENT....................................................................................................7

2.2 PACKAGE STORAGE ....................................................................................................................................8

2.3 ELECTRICAL ABSOLUTE RATINGS..............................................................................................................8

2.3.1 TFT LCD MODULE...............................................................................................................................8

2.3.2 BACKLIGHT INVERTER UNIT .............................................................................................................8

3. ELECTRICAL CHARACTERISTICS ........................................................................................................................9

3.1 TFT LCD MODULE.........................................................................................................................................9

3.2 BACKLIGHT CONNECTOR PIN CONFIGURATION..................................................................................... 11

3.2.1 LAMP SPECIFICATION...................................................................................................................... 11

3.2.2 ELECTRICAL SPECIFICATION.......................................................................................................... 11

3.2.3 INVERTER INTERFACE CHARACTERISTICS...................................................................................13

4. BLOCK DIAGRAM OF INTERFACE ......................................................................................................................15

4.1 TFT LCD MODULE....................................................................................................................................... 15

5. INPUT TERMINAL PIN ASSIGNMENT..................................................................................................................16

5.1 TFT LCD Module Input .................................................................................................................................16

5.2 BACKLIGHT UNIT........................................................................................................................................19

5.3 INVERTER UNIT..........................................................................................................................................19

5.4 BLOCK DIAGRAM OF INTERFACE .............................................................................................................20

5.5 LVDS INTERFACE .......................................................................................................................................23

5.6 COLOR DATA INPUT ASSIGNMENT............................................................................................................ 24

6. INTERFACE TIMING.............................................................................................................................................25

6.1 INPUT SIGNAL TIMING SPECIFICATIONS..................................................................................................25

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6.2 POWER ON/OFF SEQUENCE.....................................................................................................................27

7. OPTICAL CHARACTERISTICS.............................................................................................................................29

7.1 TEST CONDITIONS.....................................................................................................................................29

7.2 OPTICAL SPECIFICATIONS ........................................................................................................................ 30

8. PRECAUTIONS ....................................................................................................................................................33

8.1 ASSEMBLY AND HANDLING PRECAUTIONS .............................................................................................33

8.2 SAFETY PRECAUTIONS.............................................................................................................................33

9. DEFINITION OF LABELS......................................................................................................................................34

9.1 CMO MODULE LABEL.................................................................................................................................34

10. PACKAGING....................................................................................................................................................... 35

10.1 PACKAGING SPECIFICATIONS.................................................................................................................35

10.2 PACKAGING METHOD ..............................................................................................................................35

11. MECHANICAL CHARACTERISTICS ...................................................................................................................37

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REVISION HISTORY

Version Date Page(New) Section Description
Ver. 1.0 Jan. 05, 2010 All All The Preliminary specification was first issued.

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Model No.: V420H1-LH6

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1. GENERAL DESCRIPTION

1.1 OVERVIEW

V420H1-LH6 is a 42” TFT Liquid Crystal Display module with 12-CCFL Backlight unit and 2ch-LVDS interface.

This module supports 1920 x 1080 Full HDTV format and can display 1.07G colors (10-bit/color). The inverter

module for backlight is built-in.

1.2 FEATURES

Ё High brightness (500 nits)

Ё High contrast ratio (4000:1)

Ё Fast response time (Gray to gray average 4.0 ms)

Ё High color saturation (NTSC 72%)

Ё Full HDTV (1920 x 1080 pixels) resolution, true HDTV format

Ё DE (Data Enable) only mode

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Ё LVDS (Low Voltage Differential Signaling) interface

Ё Optimized response time for 120 Hz frame rate with MEMC

Ё Ultra wide viewing angle : Super MVA technology

Ё RoHS compliance

1.3 APPLICATION

Ё Standard Living Room TVs.

Ё Public Display Application.

Ё Home Theater Application.

Ё MFM Application.

1.4 GENERAL SPECIFICATIONS

Item Specification Unit Note

Active Area 930.24(H) x 523.26 (V) (42.02” diagonal) mm

Bezel Opening Area 937.24 (H) x 530.26 (V) mm

Driver Element a-si TFT active matrix - -

Pixel Number 1920 x R.G.B. x 1080 pixel -

(1)

Pixel Pitch(Sub Pixel) 0.1615 (H) x 0.4845 (V) mm -

Pixel Arrangement RGB vertical stripe - -

Display Colors 1.07G color -

Display Operation Mode Transmissive mode / Normally black - -

Surface Treatment

Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and back outlines.

Note (2) The spec. of the surface treatment is temporarily for this phase. CMO reserves the rights to change this

feature.

Anti-Glare coating (Haze 11%)
Hard coating (3H)

- (2)

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1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal (H) - 983.0 - mm

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Vertical (V) - 576.0 - mm Module Size

Depth (D) - 50.8 - mm

Weight - 10400 - g -

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

Note (2) Module Depth is between bezel to T-CON cover.

(1), (2)

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2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature TST -20 +60 ºC (1)

Operating Ambient Temperature TOP 0 50 ºC (1), (2)

Shock (Non-Operating) SNOP - 50 G (3), (5)

Vibration (Non-Operating) VNOP - 1.0 G (4), (5)

Note (1) Temperature and relative humidity range is shown in the figure below.

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Value

Unit Note

Min. Max.

(a) 90 %RH Max. (Ta

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The maximum operating temperature is based on the test condition that the surface temperature of

display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.

Thermal management should be considered in final product design to prevent the surface temperature of

display area from being over 65 ºC. The range of operating temperature may degrade in case of

improper thermal management in final product design.

Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.

Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that

the module would not be twisted or bent by the fixture.

Љ 40 ºC).

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2.2 PACKAGE STORAGE

When storing modules as spares for a long time, the following precaution is necessary.

(a) Do not leave the module in high temperature, and high humidity for a long time, It is highly recommended to

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store the module with temperature from 0 to 35

(b) The module shall be stroed in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent

light.

к at normal humidity without condensation.

2.3 ELECTRICAL ABSOLUTE RATINGS

2.3.1 TFT LCD MODULE

Value

Item Symbol

Power Supply Voltage VCC -0.3 13.5 V

Logic Input Voltage VIN -0.3 3.6 V

2.3.2 BACKLIGHT INVERTER UNIT

Item Symbol

Lamp Voltage VW

Min. Max.

Value

Min. Max.

Ё

3000 VRMS

Unit Note

(1)

Unit Note

Power Supply Voltage VBL 0 30 V (1)

Control Signal Level

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

Note (2) No moisture condensation or freezing.

Note (3) The control signals include On/Off Control and Internal PWM Control.

Ё

-0.3 7 V (1), (3)

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3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE

(Ta = 25 ± 2 ºC)

Parameter Symbol

Power Supply Voltage VCC 10.8 12 13.2 V (1)

Power Supply Ripple Voltage VRP - - 350 mV

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Value

Unit Note

Min. Typ. Max.

Rush Current I

White Pattern - - 2.3 2.7 A

Power Supply Current

LVDS
interface

CMOS
interface

Note (1) The module should be always operated within the above ranges.

Note (2) Measurement condition:

Common Input Voltage V

Terminating Resistor R

Input High Threshold Voltage VIH 2.7 - 3.3 V

Input Low Threshold Voltage V

Vertical Stripe - - 2.0 - A

Black Pattern - - 2.0 - A

- - 5.0 A (2)

RUSH

1.125 1.25 1.375 V

LVC

- 100 - ohm

T

0 - 0.7 V

IL

(3)

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Vcc rising time is 470us

0.9Vcc

0.1Vcc

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Model No.: V420H1-LH6

Preliminary

Vcc

Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, f

whereas a power dissipation check pattern below is displayed.

a. White Pattern

GND

Active Area

470us

b. Black Pattern

Active Area

= 60 Hz,

v

c. Vertical Stripe Pattern

Active Area

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3.2 BACKLIGHT CONNECTOR PIN CONFIGURATION

3.2.1 LAMP SPECIFICATION

(Ta = 25 ± 2 ºC)

Parameter Symbol

Min. Typ. Max.

Lamp Input Voltage VL - 1090 - VRMS -

Lamp Current IL 9.7 10.2 10.7 mARMS (1)

- - 1910 VRMS Ta = 0 ºC

Lamp Turn On Voltage VS

- - 1560 VRMS Ta = 25 ºC

Operating Frequency FL 35 - 70 KHz

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Model No.: V420H1-LH6

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Value

Unit Note

Lamp Life Time LBL 50,000 - - Hrs (2)

3.2.2 ELECTRICAL SPECIFICATION

(Ta = 25 ± 2 ºC)

Value

Parameter Symbol

Min. Typ. Max.

- 130 - (5), IL = 10.2 mA

Power Consumption PBL

- 110 -

Power Supply Voltage VBL 22.8 24.0 25.2 VDC

- 5.4 -

Power Supply Current IBL

4.6

Input Ripple Noise - - - 912 mVP-P VBL=22.8V

Oscillating Frequency FW 39.5 42.5 45.5 kHz

Dimming Frequency FB 150 160 170 Hz

Unit Note

W

A Non Dimming

(5), IL = 8.7 mA

Minimum Duty Ratio D

Note (1) Lamp current is measured by utilizing AC current probe and its value is average by measuring master

and slave board. VIPWM : 3V is 100%,V

8.7mA.

Note (2) The lamp starting voltage V

Otherwise the lamp may not be turned on.

Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the display input

signals, and it may result in line flow on the display. In order to avoid interference, the lamp frequency

10 20 - % (6)

MIN

= HI : Lamp current is 10.2mA; V

ADIM

should be applied to the lamp for more than 1 second after startup.

S

= LO : Lamp current is

ADIM

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should be detached from the horizontal synchronous frequency and itó harmonics as far as possible.

Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and the

effective discharge length is longer than 80% of its original length (Effective discharge length is defined

as an area that has equal to or more than 70% brightness compared to the brightness at the center point

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of lamp.) as the time in which it continues to operate under the condition at Ta = 25 ±2

10.7 mArms.

Note (5) The measurement condition of Max. value is based on 42” backlight unit under input voltage 24V,

average lamp current 10.2 mA and 8.7 mA ,lighting 30 minutes later.

Note (6) 10% minimum duty ratio is only valid for electrical operation.

HV (White +)

1

A
A

A
A

A
A

A
A

HV(Pink -)

2

HV (White +)

1

HV(Pink -)

2

HV (White +)

1

HV(Pink -)

2

HV (White +)

1

HV(Pink -)

2

к and IL =9.7~

A
A

A
A

Inverter

HV(Pink -)

2

HV (White +)

1

HV(Pink -)

2

LCD Module

HV (White +)

1

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3.2.3 INVERTER INTERFACE CHARACTERISTICS

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Parameter Symbol

ON

On/Off Control Voltage

V

BLON

OFF

Internal PWM Control
Voltage

MAX

MIN

V

IPWM

HI

Status Signal

Status

LO

VBL Rising Time Tr1

VBL Falling Time Tf1

Control Signal Rising Time Tr

Control Signal Falling Time Tf

PWM Signal Rising Time T

PW MR

Condition

Te st

Value

Min. Typ. Max.

Ё

Ё

Ё

Ё Ё

Ё

Ё

Ё

Ё

Ё Ё Ё

Ё Ё Ё

Ё Ё Ё

2.0

0

3.15

3.0 3.3 3.6 V

0

30

30

Ё

Ё

Ё

0

Ё

Ё

Ё

Unit Note

5.0 V

0.8 V

5.0 V

Ё

V

0.8 V

50 ms

50 ms

100 ms

100 ms

50 us

Max. Duty Ratio

Min. Duty Ratio

Normal

Abnormal

See as below

PWM Signal Falling Time T

PW MF

Input Impedance RIN

PWM Delay Time

BLON Delay Time

BLON Off Time

T

PW M

T

T

on

on1

Ё Ё Ё

Ё

Ё

Ё

Ё

1

100

300

300

Ё Ё

Ё

Ё

Ё

50 us

MΩ

300 ms

500 ms

500 ms

Note (1) The dimming signal should be valid before backlight turns on by BLON signal. It is inhibited to change

the internal/external PWM signal during backlight turn on period.

Note (2) The power sequence and control signal timing are shown in the following figure.

Note (3) The power sequence and control signal timing must follow the figure below. For a certain reason, the

inverter has a possibility to be damaged with wrong power sequence and control signal timing.

Turn ON sequence: VBL

Turn OFF sequence: BLOFF

Ш PWM signal Ш BLON

Ш PWM signal Ш VBL

Note (4) When the Dynamic CR has been turned on, the skipped range of VIPWM, 2.85V ~ 3.15V, is suggested

to avoid the abnormal phenomenon.

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VBL

VBLON

VADIM

V

IPWM

9

Toff

%/

Tf1

9

%/

Tr1

9

%/

9

%/

2.0V

0.8V

Ton

T

PWM

Backlight on duration

Tr

Normal mode

Ton1

Tf

ECO mode

0

0

2.0V

0

0

V

W

0.8V

3.0V

100%

Minimun

Duty

100%

Minimun

Duty

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)

4. BLOCK DIAGRAM OF INTERFACE

4.1 TFT LCD MODULE

ODD_RIN0+/­ODD_RIN1+/­ODD_RIN2+/­ODD_RIN3+/­ODD_RIN4+/­ODD_CLK+/-

EVEN_RIN0+/­EVEN_RIN1+/­EVEN_RIN2+/­EVEN_RIN3+/­EVEN_RIN4+/­EVEN_CLK+/-

MEN
MCFG 0
MCFG 1
LVDS8b
GV_mode
SELLVDS
ODSEL

(FI-RE51S-HF (JAE)) or equivalent

INPUT CONNECTOR

FRAME

BUFFER

MEMC

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FRAME

BUFFER

TIMING

CONTROLLER

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SCAN DRIVER

TFT LCD PANEL

(1920x3x1080)

DATA DRIVER (RSDS

VIN
GND

VBL

GND

Status

E_PWM

I_PWM

BLON

INVERTER

CONNECTOR

CN127

130001WR-02E

(YEONHO) (Master)

DC/DC CONVERTER

& REFERENCE VOLTAGE

GENERATOR

CN103-CN105: 528521070 (Molex)

CN5-CN32: SM02 -BDAS-3-TB (JST)

or equivalent

BACKLIGHT

UNIT

CN101-CN102: 528521070 (Molex)

or equivalent

or equivalent

CN 3-CN4: Cl0114M1HR0-LF

or equivalent

INVERTER

CONNECTOR

CN227

130001WR-02E

(YEONHO) (Salve)

(Cvilux)

VBL

GND

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5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD Module Input

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CNF1 Connector Part No.: JAE Taiwan (

Pin Name Description Note

1 GND Ground ʳ

2 MEN MEMC function selection 4

3 MCFG0 MEMC function selection 4

4 MCFG1 MEMC function selection 4

5 LVDS8b 8bit/10bit LVDS input selection 5

6 GV_mode Graphic / Video mode selection 6

7 SELLVDS LVDS data format Selection 2
8 N.C. No Connection ʳ
9 N.C.. No Connection ʳ

10 ODSEL Overdrive Lookup Table Selection 3
11 GND Ground ʳ
12 ERX0- 2nd pixel Negative LVDS differential data input. Channel 0 ʳ
13 ERX0+ 2nd pixel Positive LVDS differential data input. Channel 0 ʳ
14 ERX1- 2nd pixel Negative LVDS differential data input. Channel 1 ʳ
15 ERX1+ 2nd pixel Positive LVDS differential data input. Channel 1 ʳ
16 ERX2- 2nd pixel Negative LVDS differential data input. Channel 2 ʳ
17 ERX2+ 2nd pixel Positive LVDS differential data input. Channel 2 ʳ
18 GND Ground ʳ
19 ECLK- 2nd pixel Negative LVDS differential clock input. ʳ
20 ECLK+ 2nd pixel Positive LVDS differential clock input. ʳ
21 GND Ground ʳ
22 ERX3- 2nd pixel Negative LVDS differential data input. Channel 3 ʳ
23 ERX3+ 2nd pixel Positive LVDS differential data input. Channel 3 ʳ
24 ERX4- 2nd pixel Negative LVDS differential data input. Channel 4 ʳ
25 ERX4+ 2nd pixel Positive LVDS differential data input. Channel 4 ʳ

26 N.C. No Connection 1

27 N.C. No Connection 1
28 ORX0- 1st pixel Negative LVDS differential data input. Channel 0 ʳ
29 ORX0+ 1st pixel Positive LVDS differential data input. Channel 0 ʳ
30 ORX1- 1st pixel Negative LVDS differential data input. Channel 1 ʳ
31 ORX1+ 1st pixel Positive LVDS differential data input. Channel 1 ʳ
32 ORX2- 1st pixel Negative LVDS differential data input. Channel 2 ʳ
33 ORX2+ 1st pixel Positive LVDS differential data input. Channel 2 ʳ
34 GND Ground ʳ
35 OCLK- 1st pixel Negative LVDS differential clock input. ʳ
36 OCLK+ 1st pixel Positive LVDS differential clock input. ʳ
37 GND Ground ʳ
38 ORX3- 1st pixel Negative LVDS differential data input. Channel 3 ʳ
39 ORX3+ 1st pixel Positive LVDS differential data input. Channel 3 ʳ
40 ORX4- 1st pixel Negative LVDS differential data input. Channel 4 ʳ

؀᨜౰ሽ՗) FI-RE51S-HF or equivalent.

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41 ORX4+ 1st pixel Positive LVDS differential data input. Channel 4 ʳ

42 N.C. No Connection 1

43 DEMO Demo window enable 7
44 GND Ground ʳ
45 GND Ground ʳ
46 GND Ground ʳ
47 N.C. No Connection ʳ
48 VCC +12V power supply ʳ
49 VCC +12V power supply ʳ
50 VCC +12V power supply ʳ
51 VCC +12V power supply ʳ

Note (1) Reserved for internal use. Please leave it open.

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Note (2)

SELLVDS Mode

L(default) VESA

H JEIDA

L: Connect to GND, H: Connect to +3.3V

Note (3) Overdrive lookup table selection. The overdrive lookup table should be selected in accordance with the

frame rate to optimize image quality.

ODSEL Description

L(default) Lookup table was optimized for 60 Hz frame rate input.

H Lookup table was optimized for 50 Hz frame rate input.

Note (4) Motion Engine (ME) Level & Demo Function Table

Motion engine level must be adjusted after video mode is selected (or entered).

Adjusting the motion engine level in graphic mode has no effect

MEN MCFG1 MCFG0 Notes

Blanking

Demo mode (d) 0 1 1 Demo Window

ME Level

L: Connect to GND, H: Connect to +3.3V

Blanking disable 0 0 0 (a)
Auto blanking 0 0 1 (b)
Blanking enable 0 1 0 (c)

Effect of ME  De blur De judder Halo

Strong 1 0 0 Enable Strong Strong
Medium(Default) 1 0 1 Enable Normal Normal
Weak 1 1 0 Enable × ×
OFF 1 1 1 × × ×
(e) (f) (g)

(a) Module re-starts processing video signals from Frontend scaler control board.

(b) During sync unstable period such as format change, 60Hz <-> 50Hz .

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MCFG0 can be used to insert blanking of 500ms. This signal is toggled.

(c) Module continues to insert blanking until blanking disable signal is received from frontend scaler board.

(d) Demo window mode: Demo Window appears to the left half of display area. Left side with frame is 120Hz

with MEMC, and right side is 120Hz w/o motion compensation.

(e) GPIO (General Purpose I/O) sequence of ME Level: (1) MEN; (2) MCFG1; (3) MCFG0.

GPIO sequence of Blanking Enable, Blanking Disable and Demo window: (1) MCFG1; (2) MCFG0; (3)

MEN.

(f) Each scaler command must be maintained the same voltage level at least 100ms.

(g) 0 : Connect to GND, 1 : +3.3V

Note (5) 8bit/10bit LVDS input selection

LVDS8b Bit depth

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H(default) 8bit

L 10bit

L : Connect to GND, H : Connect to +3.3V

Note (6) Graphic / Video mode selection

There is no prohibited time period for switching between Graphic mode and Video mode.

When this switching signal is input, LCD will be reset and will re-start selected mode.

GV_mode Mode select MEMC ON/OFF

H(default) Graphic mode MEMC OFF

L Video mode MEMC ON

L : Connect to GND, H : Connect to +3.3V

Note (7) Demo window enable

Demo Window

L(default) disable

H enable

L : Connect to GND, H : Connect to +3.3V

ʳ

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5.2 BACKLIGHT UNIT

The pin configuration for the housing and the leader wire is shown in the table below.

Pin Name Description Wire Color

1 HV High Voltage White

2 HV High Voltage Pink

1 HV(White)

2 HV(Pink)

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1 HV(White)

2 HV(Pink)

1 HV(White)

2 HV(Pink)

5.3 INVERTER UNIT

CN1: S14B-PH-SM4-TB(D)(LF)(JST) or equivalent

Pin № Symbol Feature

1
2
3
4
5
6
7
8
9

10

11 STATUS

12 A_DIM

13 I_PWM Internal PWM Control Signal
14 BLON BL ON/OFF

VBL +24V

GND GND

Normal (3.3V)
Abnormal(GND)
Amplitude Dimming Control

HI (2.0V ~ 5.0V)

LO(0~0.8V)

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CN2-CN7: SM02 -BDAS-3-TB(JST) or equivalent

Pin No. Symbol Description

1 CCFL HOT CCFL high voltage
2 CCFL HOT CCFL high voltage

CN8:

528520870 (Molex)

Pin No. Symbol Description

1 Board to Board
2 Board to Board

3 Board to Board

4 Board to Board

5 Board to Board

6 Board to Board
7 Board to Board
8

Note (1) Floating of any control signal is not allowed.

Control

Signal

or equivalent

Board to Board

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5.4 BLOCK DIAGRAM OF INTERFACE

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AR0~AR9: First pixel R data

AG0~AG9: First pixel G data

AB0~AB9: First pixel B data

BR0~BR9: Second pixel R data

BG0~BG9: Second pixel G data

BB0~BB9: Second pixel B data

DE: Data enable signal

DCLK: Data clock signal

Notes (1) The system must have the transmitter to drive the module.

Notes (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it

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is used differentially.

Notes (3) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and

the second pixel is even pixel.

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5.5 LVDS INTERFACE

VESA Format : SELLVDS = L or Open

JEIDA Format : SELLVDS = H

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AR0~AR9: First Pixel R Data (9; MSB, 0; LSB)

AG0~AG9: First Pixel G Data (9; MSB, 0; LSB)

AB0~AB9: First Pixel B Data (9; MSB, 0; LSB)

DE : Data enable signal

DCLK : Data clock signal

RSVD : Reserved

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5.6 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 10-bit gray scale data input for

the color. The higher the binary input, the brighter the color. The table below provides the assignment of the

color versus data input.

0
0
1
0
1
0
1
1
0
0
0

:

:
0
0
0
0
0
0

:

:
1
1
1
0
0
0

:

:
0
0
0

Data Signal

0

0

0

0

1

1

0

0

1

1

0

0

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1
0
1
0
1
1
0
0
0

:

:
0
0
0
0
0
0

:

:
1
1
1
0
0
0

:

:
0
0
0

1

0

0

0

1

1

1

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

1

1

0

0

0

1

1

1

1

0

0

1

1

1

0

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

;

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

1

0

0

:

:

:

:

:

:

0

1

0

1

0

0

1

1

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

1

0

0

1

0
0

0

1

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

0

0

0

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0
0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

1

1

1

1

1

1

1

1

1

Basic
Colors

Gray
Scale
Of
Red

Gray
Scale
Of
Green

Gray
Scale
Of
Blue

Color

Black
Red
Green
Blue
Cyan
Magenta
Yel lo w
White
Red (0) / Dark
Red (1)
Red (2)

:

:
Red (1021)
Red (1022)
Red (1023)
Green (0) / Dark
Green (1)
Green (2)

:

:
Green (1021)
Green (1022)
Green (1023)
Blue (0) / Dark
Blue (1)
Blue (2)

:

:
Blue (1021)
Blue (1022)
Blue (1023)

R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 G9 G8 G7 G6 G5 G4 G3 G2 G1 G0 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0

0

0

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

Red Green Blue

0

0

0

0

0

0

0

0

1

1

1

1

1

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

1

1

0

0

0

1

0

0

0

0

0

1

1

1

0

1

1

1

1

1

1

0

0

0

0

1

0

1

0

0

:

:

:

:

:

:

0

1

0

1

0

0

1

1

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

1

0

0

1

0

0

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

Note (1) 0: Low Level Voltage, 1: High Level Voltage

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

0

0

0

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

0

0

0

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

1

0

:

:

:

:

:

:

1

0

1

1

1

0

1

1

1

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6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

(Ta = 25 ± 2 ºC)

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

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LVDS Receiver
Clock

LVDS Receiver
Data

Vertical
Active Display
Term

Horizontal
Active Display
Term

Note : Since the module is operated in DE only mode, Hsync and Vsync input signals should be set to low logic

level. Otherwise, this module would operate abnormally.

Frequency 1/Tc 60 74.25 78 MHz -

Input cycle to
cycle jitter

Setup Time Tlvsu 600 - - ps -

Hold Time Tlvhd 600 - - ps -

Frame Rate 57 60 61 Hz

Total Tv 47 50 53 Th

Display Tvd 1115 1125 1135 Th -

Blank Tvb 1080 1080 1080 Th -

To ta l

Display

Blank

Trcl - - 200 ps -

Tv=Tvd+T vb

Th

Thd 1050 1100 1150

Thb 960 960 960

35 45 55 Tc

Tc -

Tc -

Th=Thd+Thb

Valid display data (960 clocks)

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LVDS INPUT INTERFACE TIMING DIAGRAM

RXCLK +

RXn +/-

Tlvsu Tlvhd

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Tc

1T
14

3T
14

5T
14

7T
14

9T
14

11T

14

13T

14

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6.2 POWER ON/OFF SEQUENCE

(Ta = 25 ± 2 ºC)

To prevent a latch-up or DC operation of LCD module, the power on/off sequence should follow the diagram

below.

0.5

ЉЉЉЉ

T

1

ЉЉЉЉ

0

ЉЉЉЉ

T

2

0

ЉЉЉЉ

T

3

500ms

ЉЉЉЉ
ЉЉЉЉ

LVDS Signals

10ms

50ms
50ms

ЉЉЉЉ

T4

0V

0V

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T

2

Power On

VALI D

3

T1

T

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0.1V

cc

T4

Power Off

0

ЉЉЉЉ

T

7

ЉЉЉЉ

T2

ЉЉЉЉ

T8

0

T7

8

T

Option Signals

(SELLVDS)

Backlight (Recommended)

ЉЉЉЉ

500ms

T5

50%

5

T

50%

T

6

Power ON/OFF Sequence

Signal Min. Typ. Max. Unit Note

T1 0.5 - 10 ms -

T2 0 - 50 ms -

T3 0 - 50 ms -

T4 500 - - ms -

T5 500 - - ms -

T6 100 - - ms -

T7 0 - - -

T8 0 - - - -

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Note.

(1) The supply voltage of the external system for the module input should follow the definition of Vcc.

(2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD

operation or the LCD turns off before the backlight turns off, the display may momentarily become abnormal

screen.

(3) In case of VCC is in off level, please keep the level of input signals on the low or high impedance. If T2<0,

that maybe cause electrical overstress failures.

(4) T4 should be measured after the module has been fully discharged between power off and on period.

(5) Interface signal shall not be kept at high impedance when the power is on.

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7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit

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Ambient Temperature Ta

Ambient Humidity Ha

Supply Voltage VCC 12 V

Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"

Lamp Current IL 8.7/10.2 mA

Oscillating Frequency (Inverter) FW 8.7/10.2 KHz

Vertical Frame Rate Fr 120 Hz

The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature change during

measuring. In order to stabilize the luminance, the measurement (CS-1000 or CA-210 calibrated by CS-1000)

should be executed after lighting backlight for 1 hour in a windless room.

LCD Module

LCD Panel

25±2

50±10

oC

%RH

Center of the Screen

Display Color Analyzer

(Minolta CA210)

Light Shield Room

(Ambient Luminance < 2 lux)

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7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should be

measured under the test conditions described in 7.1 and stable environment shown in 7.1.

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR 3000 4000 - - Note (2)

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Response Time

Noraml mode LC 400 500 - cd/m2Note (4)Center
Luminance of
White

White Variation

Cross Talk CT - - 4 % Note (5)

Color
Chromaticity

ECO mode LC 350 450 - cd/m

Red

Green

Blue

White

Gray to

gray

δW

Rx 0.649 -

Ry 0.334 -

Gx 0.267 -

Gy 0.610 -

Bx 0.149 -

By 0.060 -

Wx 0.280 -

Wy

θx=0°, θy =0°

Viewing angle

at normal direction

- 4.0 8.0 ms Note (3)

Note (4),

2

- - 1.3 - Note (6)

Typ.

-0.03

0.285

Typ.

+0.03

-

(7)

-

Color Gamut C.G

θx+

Horizontal

θx-

Viewing Angle

θY+

Vertical

θY-

Note (1) Definition of Viewing Angle (θx, θy):

Viewing angles are measured by Eldim EZ-Contrast 160R

CR≥20

30

- 72 - % NTSC

80 88 -

80 88 -

Deg. Note (1)

80 88 -

80 88 -

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Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) =

CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (6).

Note (3) Definition of Gray-to-Gray Switching Time:

pixels whiteall withLuminance Surface
pixels black all withLuminance Surface

The driving signal means the signal of gray level 0, 124, 252, 380, 508, 636, 764, 892 and 1023.

Gray to gray average time means the average switching time of gray level 0, 124, 252, 380, 508, 636,

764, 892, 1023 to each other.

, L

Note (4) Definition of Luminance of White (L

Measure the luminance of gray level 1023 at center point and 5 points

= L (5), where L (X) is corresponding to the luminance of the point X at the figure in Note (6).

L

C

):

C

AVE

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Note (5) Definition of Cross Talk (CT):

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CT = | YB – YA | / YA

Where:

YA = Luminance of measured location without gray level 0 pattern (cd/m2)

YB = Luminance of measured location with gray level 0 pattern (cd/m2)

Note (6) Definition of White Variation (

Measure the luminance of gray level 1023 at 5 points

×

100 (%)

δ

W):

δ

W = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

W

W

3W

Note (7) ECO mode:

Horizontal Line

D

D

4

D

2

1 2

4

5

3D

4

X

Test point :

X = 1 ~ 5

2

3 4

4

ECO mode was selected by inverter pin: A_DIM.

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8. PRECAUTIONS

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

[ 1 ] Do not apply rough force such as bending or twisting to the module during assembly.

[ 2 ] It is recommended to assemble or to install a module into the user’s system in clean working areas. The

dust and oil may cause electrical short or worsen the polarizer.

[ 3 ] Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.

[ 4 ] Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the

damage and latch-up of the CMOS LSI chips.

[ 5 ] Do not plug in or pull out the I/F connector while the module is in operation.

[ 6 ] Do not disassemble the module.

[ 7 ] Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and easily

scratched.

[ 8 ] Moisture can easily penetrate into LCD module and may cause the damage during operation.

[ 9 ] When storing modules as spares for a long time, the following precaution is necessary.

[ 9.1 ] Do not leave the module in high temperature, and high humidity for a long time. It is highly

к

recommended to store the module with temperature from 0 to 35

condensation.

[ 9.2 ] The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or

fluorescent light.

[ 10 ] When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the

response time will become slow, and the starting voltage of CCFL will be higher than that of room

temperature.

at normal humidity without

8.2 SAFETY PRECAUTIONS

[ 1 ] The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while

assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit.

[ 2 ] If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of

contact with hands, skin or clothes, it has to be washed away thoroughly with soap.

[ 3 ] After the module’s end of life, it is not harmful in case of normal operation and storage.

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9. DEFINITION OF LABELS

9.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

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Model Name: V420H1-LH6

Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.

Serial ID: X X X X X X X Y M D L N N N N

CHI MEI

OPTOELECTRONICS

CHI MEI

OPTOELECTRONICS

V420H1 -LH6 Rev. XX

X X X X X X X Y M D L N N N N

V420H1 -LH6 Rev. XX

X X X X X X X Y M D L N N N N

Serial No.

Product Line

E207943

MADE IN TAIWAN

GEMN

RoHS

E207943

MADE IN TAIW AN

MADE IN CHINA

LEOO(or CAPG or C ANO)

RoHS

Serial ID includes the information as below:

Manufactured Date:

Year: 2001=1,2002=2,2003=3,2004=4…2010=0,2011=1,2012=2…

Month: 1~9, A~C, for Jan. ~ Dec.

Day: 1~9, A~Y, for 1st to 31st, exclude I ,O, and U.

Revision Code: Cover all the change

Serial No.: Manufacturing sequence of product

Product Line: 1 -> Line1, 2 -> Line 2, …etc.

Year, Month, Date

CMO Internal Use

CMO Internal Use

Revision

CMO Internal Use

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10. PACKAGING

10.1 PACKAGING SPECIFICATIONS

(1) 4 LCD TV modules / 1 Box

(2) Box dimensions : 1100(L)x317(W)x670(H)mm

(3) Weight : Approx. 53.17Kg(4 modules per carton)

10.2 PACKAGING METHOD

Figures 10-1 and 10-2 are the packing method

LCD TV Module

www.panelook.com

Issue Date:Jan.05.2010

Model No.: V420H1-LH6

Preliminary

Cushion(Bottom)

Anti-Static Bag

Carton

Cushion(Top)

Carton Label

PP Belt

Figure.10-1 packing method

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Issue Date:Jan.05.2010

Model No.: V420H1-LH6

Preliminary

Sea / Land Transportation

(40ft HQ Container)

Air Transportation

&

Sea / Land Transportation

(40ft Container)

Figure.10-2 packing method

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11. MECHANICAL CHARACTERISTICS

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Issue Date:Jan.05.2010

Model No.: V420H1-LH6

Preliminary

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CHI MEI

37

Version 1.0

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

Issue Date:Jan.05.2010

Model No.: V420H1-LH6

Preliminary

࡛ભሽ՗ٝڶૻֆ׹

CHI MEI

38

Version 1.0

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

Issue Date:Jan.05.2010

Model No.: V420H1-LH6

Preliminary

࡛ભሽ՗ٝڶૻֆ׹

CHI MEI

39

Version 1.0

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com