CMO V420H1-L14 Specification

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TFT LCD Tentative Specification

MODEL NO.: V420H1 – L14

Customer: _________________________________

Approved by:_______________________________

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Issue Date:Oct.30.2008

Model No.: V420H1-L14

Tentative

Note:

TV Head Division

Approved By

LY Chen

Reviewed By

QA Dept. Product Development Div.

Kc_Ko WT Lin

Prepared By

LCD TV Marketing and Product Management Div.

Wang-Yang Li Trina Lee

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CONTENTS

REVISION HISTORY.........................................................................................................................................................4

1. GENERAL DESCRIPTION............................................................................................................................................ 5

1.1 OVERVIEW ..........................................................................................................................................................5

1.2 FEATURES...........................................................................................................................................................5

1.3 APPLICATION ......................................................................................................................................................5

1.4 GENERAL SPECIFICATIONS .............................................................................................................................5

1.5 MECHANICAL SPECIFICATIONS .......................................................................................................................6

2. ABSOLUTE MAXIMUM RATINGS ................................................................................................................................ 7

2.1 ABSOLUTE RATINGS OF ENVIRONMENT........................................................................................................7

2.2 PACKAGE STORAGE..........................................................................................................................................8

2.3 ELECTRICAL ABSOLUTE RATINGS ..................................................................................................................8

2.3.1 TFT LCD MODULE ....................................................................................................................................8

2.3.2 BACKLIGHT INVERTER UNIT ..................................................................................................................8

3. ELECTRICAL CHARACTERISTICS .............................................................................................................................9

3.1 TFT LCD MODULE .............................................................................................................................................. 9

3.2 BACKLIGHT CONNECTOR PIN CONFIGURATION......................................................................................... 11

3.2.1 LAMP SPECIFICATION ........................................................................................................................... 11

3.2.2 ELECTRICAL SPECIFICATION............................................................................................................... 11

3.2.3 INVERTER INTERFACE CHARACTERISTICS ......................................................................................13

4. BLOCK DIAGRAM OF INTERFACE ...........................................................................................................................15

4.1 TFT LCD MODULE ............................................................................................................................................15

5. INPUT TERMINAL PIN ASSIGNMENT .......................................................................................................................16

5.1 TFT LCD Module Input.......................................................................................................................................16

5.2 BACKLIGHT UNIT..............................................................................................................................................18

5.3 INVERTER UNIT................................................................................................................................................18

5.4 BLOCK DIAGRAM OF INTERFACE.................................................................................................................. 18

5.5 LVDS INTERFACE .............................................................................................................................................22

5.6 COLOR DATA INPUT ASSIGNMENT ................................................................................................................23

6. INTERFACE TIMING...................................................................................................................................................24

6.1 INPUT SIGNAL TIMING SPECIFICATIONS......................................................................................................24

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6.2 POWER ON/OFF SEQUENCE.......................................................................................................................... 26

7. OPTICAL CHARACTERISTICS ..................................................................................................................................27

7.1 TEST CONDITIONS...........................................................................................................................................27

7.2 OPTICAL SPECIFICATIONS .............................................................................................................................28

8. PRECAUTIONS...........................................................................................................................................................31

8.1 ASSEMBLY AND HANDLING PRECAUTIONS ................................................................................................. 31

8.2 SAFETY PRECAUTIONS .................................................................................................................................. 31

9. DEFINITION OF LABELS............................................................................................................................................32

9.1 CMO MODULE LABEL ......................................................................................................................................32

10. PACKAGING..............................................................................................................................................................33

10.1 PACKAGING SPECIFICATIONS .....................................................................................................................33

10.2 PACKAGING METHOD....................................................................................................................................33

11. MECHANICAL CHARACTERISTICS ........................................................................................................................35

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REVISION HISTORY

Version Date Page(New) Section Description Ver. 0.0 Oct. 30, 2008 All All The tentative specification was first issued.

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Model No.: V420H1-L14

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1. GENERAL DESCRIPTION

1.1 OVERVIEW

V420H1-L14 is a 42” TFT Liquid Crystal Display module with 12-CCFL Backlight unit and 2ch-LVDS interface.

This module supports 1920 x 1080 Full HDTV format and can display 1.07G colors (8-bit+FRC/color). The

inverter module for backlight is built-in.

1.2 FEATURES

Ё High brightness (500 nits)

Ё High contrast ratio (4000:1)

Ё Fast response time (Gray to gray average 6.5 ms)

Ё High color saturation (NTSC 72%)

Ё Full HDTV (1920 x 1080 pixels) resolution, true HDTV format

Ё DE (Data Enable) only mode

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Ё LVDS (Low Voltage Differential Signaling) interface

Ё Optimized response time for 60 Hz frame rate

Ё Ultra wide viewing angle : Super MVA technology

Ё RoHS compliance

1.3 APPLICATION

Ё Standard Living Room TVs.

Ё Public Display Application.

Ё Home Theater Application.

Ё MFM Application.

1.4 GENERAL SPECIFICATIONS

Item Specification Unit Note

Active Area 930.24(H) x 523.26 (V) (42.02” diagonal) mm

Bezel Opening Area 937.24 (H) x 530.26 (V) mm

Driver Element a-si TFT active matrix - -

Pixel Number 1920 x R.G.B. x 1080 pixel -

(1)

Pixel Pitch(Sub Pixel) 0.1615 (H) x 0.4845 (V) mm -

Pixel Arrangement RGB vertical stripe - -

Display Colors 1.07G color -

Display Operation Mode Transmissive mode / Normally black - -

Surface Treatment Anti-Glare coating (Haze 11%) - (2)

Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and back outlines.

Note (2) The spec. of the surface treatment is temporarily for this phase. CMO reserves the rights to change this

feature.

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1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal (H) - 983.0 - mm

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Module Size

Weight - (10400) - g -

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

Note (2) Module Depth is between bezel to T-CON cover.

Vertical (V) - 576.0 - mm

Depth (D) - 50.8 - mm

(1), (2)

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2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Min. Max.

Storage Temperature TST -20 +60 ºC (1)

Operating Ambient Temperature TOP 0 50 ºC (1), (2)

Shock (Non-Operating) SNOP - 50 G (3), (5)

Vibration (Non-Operating) VNOP - 1.0 G (4), (5)

Note (1) Temperature and relative humidity range is shown in the figure below.

(a) 90 %RH Max. (Ta Љ 40 ºC).

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Model No.: V420H1-L14

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Value

Unit Note

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The maximum operating temperature is based on the test condition that the surface temperature of

display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.

Thermal management should be considered in final product design to prevent the surface temperature of

display area from being over 65 ºC. The range of operating temperature may degrade in case of

improper thermal management in final product design.

Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.

Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that

the module would not be twisted or bent by the fixture.

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2.2 PACKAGE STORAGE

When storing modules as spares for a long time, the following precaution is necessary.

(a) Do not leave the module in high temperature, and high humidity for a long time, It is highly recommended to

store the module with temperature from 0 to 35 к at normal humidity without condensation.

(b) The module shall be stroed in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent

light.

2.3 ELECTRICAL ABSOLUTE RATINGS

2.3.1 TFT LCD MODULE

Item Symbol

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Model No.: V420H1-L14

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Value

Unit Note

Min. Max.

Power Supply Voltage VCC -0.3 13.5 V

Logic Input Voltage VIN -0.3 3.6 V

2.3.2 BACKLIGHT INVERTER UNIT

Value

Item Symbol

Min. Max.

Lamp Voltage VW

Power Supply Voltage VBL 0 30 V (1)

Control Signal Level

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

Note (2) No moisture condensation or freezing.

Note (3) The control signals include On/Off Control and Internal PWM Control.

Ё

-0.3 7 V (1), (3)

3000 VRMS

Unit Note

(1)

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3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE

(Ta = 25 ± 2 ºC)

Parameter Symbol

Power Supply Voltage VCC 10.8 12 13.2 V (1)

Power Supply Ripple Voltage VRP - - 350 mV

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Value

Unit Note

Min. Typ. Max.

Rush Current I

White Pattern

Power Supply Current

Vertical Stripe

Black Pattern

LVDS interface

CMOS interface

Common Input Voltage V

Terminating Resistor R

Input High Threshold Voltage VIH 2.7 - 3.3 V

Input Low Threshold Voltage V

- - 5.0 A (2)

RUSH

-

LVC

- 100 - ohm

T

0 - 0.7 V

IL

0.9 1.2 - A

0.8 - - A

0.5 - - A

1.125 1.25 1.375 V

Note (1) The module should be always operated within the above ranges.

Note (2) Measurement condition:

+12V

Q1 Si 4485DY

Fus e

R1

(3)

Vcc (LCD Module Input)

C3

1uF

1k

VR1

47k

(Low to H ig h)

Control Signal

SW

R2

Q2

2N7002

1k

C1

0.01uF

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Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, f

whereas a power dissipation check pattern below is displayed.

GND

a. White Pattern

Vcc rising time is 470us

Vcc

0.9Vcc

0.1Vcc

470us

b. Black Pattern

= 60 Hz,

v

Active Area

c. Vertical Stripe Pattern

Active Area

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3.2 BACKLIGHT CONNECTOR PIN CONFIGURATION

3.2.1 LAMP SPECIFICATION

(Ta = 25 ± 2 ºC)

Parameter Symbol

Min. Typ. Max.

Lamp Input Voltage VL - 1212 - VRMS -

Lamp Current IL 9.7 10.2 10.7 mARMS (1)

- - (1865) VRMS Ta = 0 ºC

Lamp Turn On Voltage VS

- - (1510) VRMS Ta = 25 ºC

Operating Frequency FL 35 - 70 KHz

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Model No.: V420H1-L14

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Value

Unit Note

Lamp Life Time LBL 50,000 60,000 - Hrs (2)

3.2.2 ELECTRICAL SPECIFICATION

(Ta = 25 ± 2 ºC)

Value

Parameter Symbol

Min. Typ. Max.

Power Consumption PBL - TBD - W (5), IL = TBD mA

Power Supply Voltage VBL 22.8 24.0 25.2 VDC

Power Supply Current IBL - TBD - A Non Dimming

Input Ripple Noise - - - 912 mVP-P VBL=22.8V

Oscillating Frequency FW 39.5 42.5 45.5 kHz

Dimming Frequency FB 150 160 170 Hz

Minimum Duty Ratio D

Note (1) Lamp current is measured by utilizing AC current probe and its value is average by measuring master

10 20 - % (6)

MIN

Unit Note

and slave board.

Note (2) The lamp starting voltage V

Otherwise the lamp may not be turned on.

Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the display input

signals, and it may result in line flow on the display. In order to avoid interference, the lamp frequency

should be detached from the horizontal synchronous frequency and itó harmonics as far as possible.

Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and the

effective discharge length is longer than 80% of its original length (Effective discharge length is defined

as an area that has equal to or more than 70% brightness compared to the brightness at the center point

should be applied to the lamp for more than 1 second after startup.

S

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of lamp.) as the time in which it continues to operate under the condition at Ta = 25 ±2к and IL =9.7~

10.7 mArms..

Note (5) The measurement condition of Max. value is based on 42” backlight unit under input voltage 24V,

average lamp current TBD mA and lighting 30 minutes later.

Note (6) 10% minimum duty ratio is only valid for electrical operation.

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HV (White +)

1

A A

HV(Pink -)

2

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A A

Inverter

HV (White +)

1

HV(Pink -)

2

HV (White +)

1

HV(Pink -)

2

HV (White +)

1

HV(Pink -)

2

HV (White +)

1

HV(Pink -)

2

HV (White +)

1

HV(Pink -)

2

LCD Module

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3.2.3 INVERTER INTERFACE CHARACTERISTICS

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Parameter Symbol

ON

On/Off Control Voltage

V

BLON

OFF

Internal PWM Control Voltage

MAX

MIN

V

IPWM

HI

Status Signal

Status

LO

VBL Rising Time Tr1

VBL Falling Time Tf1

Control Signal Rising Time Tr

Control Signal Falling Time Tf

PWM Signal Rising Time T

PWMR

Condition

Te st

Value

Min. Typ. Max.

Ё

2.0

0

2.85 3.0 3.15 V

Ё Ё

Ё

3.0 3.3 3.6 V

0

30

Ё Ё Ё

Ё

0

Ё

Unit Note

5.0 V

0.8 V

Ё

V

0.8 V

Ё

100 ms

50 us

ms

Max. Duty Ratio

Min. Duty Ratio

Normal

Abnormal

See as below

PWM Signal Falling Time T

PWMF

Input Impedance RIN

PWM Delay Time

BLON Delay Time

BLON Off Time

T

PWM

T

on1

on

Ё Ё Ё

Ё

1

100

300

Ё Ё

50 us

M

ms

Note (1) The dimming signal should be valid before backlight turns on by BLON signal. It is inhibited to

change the internal/external PWM signal during backlight turn on period.

Note (2) The power sequence and control signal timing are shown in the following figure. For a certain

reason, the inverter has a possibility to be damaged with wrong power sequence and control

signal timing.

Note (3) While system is turned ON or OFF, the power sequences must follow as below descriptions:

Turn ON sequence: VBL Ш PWM signal Ш BLON

Turn OFF sequence: BLOFF Ш PWM signal Ш VBL

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VBL

VBLON

VADIM

V

IPWM

V

9

Toff

%/

Tf1

9

%/

Tr1

9

%/

9

%/

2.0V

0.8V

Ton

Ton1

0

Backlight on duration

Tr

2.0V

0

0.8V

Tf

ECO mode

Normal mode

3.0V

0

PWM

T

W

100%

Minimun

Duty

100%

Minimun

Duty

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A

)

4. BLOCK DIAGRAM OF INTERFACE

4.1 TFT LCD MODULE

ERX0(+/-) ERX1(+/-) ERX2(+/-) ERX3(+/-) ERX4(+/ECLK(+/-)

ORX0(+/-) ORX1(+/-) ORX2(+/-) ORX3(+/-) ORX4(+/-) OCLK(+/-)

SELLVDS ODSEL

(FI-RE51S-HF (JAE)) or equivalent

INPUT CONNECTOR

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FRAME

BUFFER

TIMING

CONTROLLER

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SCAN DRIVER

TFT LCD PANEL

(1920x3x1080)

DATA DRIVER (RSDS

Vcc

GND

CN1

VBL

GND

Status

_DIM

I_PWM

BLON

DC/DC CONVERTER

CN11: 528520870 (Molex) or equivalent

CN2-CN7:SM02 (13.0)-BDAS-3-TB(LF)(JST) or equivalent

INVERTER

CONNECTOR

CN1:S14B-PH-SM4-TB

(D)(LF) or equivalent

& REFERENCE

VOLTAGE

GENERATOR

BACKLIGHT

UNIT

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5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD Module Input

Pin Name Description Note

1 GND Ground 2 N.C. No Connection 3 N.C. No Connection 4 N.C. No Connection 5 N.C. No Connection 6 N.C. No Connection 7 SELLVDS LVDS data format Selection (2)

N.C. No Connection

8

9 ODSEL

10 N.C. No Connection (1) 11 GND Ground 12 ERX0- 2nd pixel Negative LVDS differential data input. Channel 0 13 ERX0+ 2nd pixel Positive LVDS differential data input. Channel 0 14 ERX1- 2nd pixel Negative LVDS differential data input. Channel 1 15 ERX1+ 2nd pixel Positive LVDS differential data input. Channel 1 16 ERX2- 2nd pixel Negative LVDS differential data input. Channel 2 17 ERX2+ 2nd pixel Positive LVDS differential data input. Channel 2 18 GND Ground 19 ECLK- 2nd pixel Negative LVDS differential clock input. 20 ECLK+ 2nd pixel Positive LVDS differential clock input. 21 GND Ground 22 ERX3- 2nd pixel Negative LVDS differential data input. Channel 3 23 ERX3+ 2nd pixel Positive LVDS differential data input. Channel 3 24 ERX4- 2nd pixel Negative LVDS differential data input. Channel 4 25 ERX4+ 2nd pixel Positive LVDS differential data input. Channel 4 26 N.C. No Connection (1) 27 N.C. No Connection (1) 28 ORX0- 1st pixel Negative LVDS differential data input. Channel 0 29 ORX0+ 1st pixel Positive LVDS differential data input. Channel 0 30 ORX1- 1st pixel Negative LVDS differential data input. Channel 1 31 ORX1+ 1st pixel Positive LVDS differential data input. Channel 1 32 ORX2- 1st pixel Negative LVDS differential data input. Channel 2 33 ORX2+ 1st pixel Positive LVDS differential data input. Channel 2 34 GND Ground 35 OCLK- 1st pixel Negative LVDS differential clock input. 36 OCLK+ 1st pixel Positive LVDS differential clock input. 37 GND Ground 38 ORX3- 1st pixel Negative LVDS differential data input. Channel 3 39 ORX3+ 1st pixel Positive LVDS differential data input. Channel 3 40 ORX4- 1st pixel Negative LVDS differential data input. Channel 4 41 ORX4+ 1st d pixel Positive LVDS differential data input. Channel 4 42 N.C. No Connection (1) 43 N.C. No Connection (1) 44 GND Ground 45 GND Ground 46 GND Ground 47 GND Ground

Overdrive Lookup Table Selection

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(1)

(3)

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48 VCC +12V power supply 49 VCC +12V power supply 50 VCC +12V power supply 51 VCC +12V power supply

Note (1) Reserved for internal use. Please leave it open.

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Note (2)

Note (3) Overdrive lookup table selection. The overdrive lookup table should be selected in accordance with the

Note ( 4) Low=Open or Connect to GND, High = Connect to +3.3V

Low : VESA LVDS Format (default), High : JEIDA Format.

frame rate to optimize image quality.

ODSEL Note

L Lookup table was optimized for 60 Hz frame rate.

H Lookup table was optimized for 50 Hz frame rate.

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5.2 BACKLIGHT UNIT

The pin configuration for the housing and the leader wire is shown in the table below.

Pin Name Description Wire Color

1 HV High Voltage White

2 HV High Voltage Pink

1 HV(White)

2 HV(Pink)

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1 HV(White)

2 HV(Pink)

1 HV(White)

2 HV(Pink)

5.3 INVERTER UNIT

CN1: S14B-PH-SM4-TB(D)(LF)(JST) or equivalent

Pin  Symbol Feature

1 2 3 4 5 6 7 8 9

10

11 STAT US

12 A_DIM Amplitude Dimming Control 13 I_PWM Internal PWM Control Signal 14 BLON BL ON/OFF

CN2-CN7: SM02 -BDAS-3-TB(JST) or equivalent

Pin No. Symbol Description

1 2

VBL +24V

GND GND

CCFL HOT CCFL HOT

CCFL high voltage CCFL high voltage

Normal (3.3V) Abnormal(GND)

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CN8: 528520870 (Molex) or equivalent

Pin No. Symbol Description

1 Board to Board 2 Board to Board

3 Board to Board

4 Board to Board

5 Board to Board

6 Board to Board 7 Board to Board 8

Note (1) Floating of any control signal is not allowed.

Control

Signal

Board to Board

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5.4 BLOCK DIAGRAM OF INTERFACE

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ARx0 +

ARx0 -

ARx1 +

ARx1 -

ARx2 +

ARx2 -

ARx3 +

ARx3 -

ARx4 +

ARx4 -

ACLK +

ACLK -

51

100pF

RxOUT

AR0 Ω AR9

AG0 Ω AG9

AB0 Ω AB9

DE

PLL

BRx0 +

BRx0 -

BRx1 +

BRx1 -

BRx2 +

BRx2 -

BRx3 +

BRx3 -

BRx4 +

BRx4 -

BCLK +

BCLK -

51

100pF

PLL

BR0 Ω BR9

BG0 Ω BG9

BB0 Ω BB9

DCLK

DCLK Timing Controller

LVDS Receiver (MASTER)

LVDS INPUT

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AR0~AR9: First pixel R data

AG0~AG9: First pixel G data

AB0~AB9: First pixel B data

BR0~BR9: Second pixel R data

BG0~BG9: Second pixel G data

BB0~BB9: Second pixel B data

DE: Data enable signal

DCLK: Data clock signal

Notes (1) The system must have the transmitter to drive the module.

Notes (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it

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is used differentially.

Notes (3) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and

the second pixel is even pixel.

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5.5 LVDS INTERFACE

VESA Format : SELLVDS = L or Open

JEIDA Format : SELLVDS = H

VESA Format

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Current Cycle

AR 0P

AR 0N

AR 1P

AR 1N

AR 2P

AR 2N

AR 3P

AR 3N

AR 4P AR 4N

JEIDA Format

AR 0P

AR 0N

AR 1P

AR 1N

AR0

AG1

AB2

AR6

AR4

AG5

AG0 AR5

AB1

DE VS HS AB5 AB4 AB3 AB2

REV AB7 AB6 AG7 AG6 AR7 AR6

REV AB9 AB8 AG9 AG8 AR9 AR8AR8 REV

AG4 AR7

AB5

AB0 AG5 AG4 AG3 AG2 AG1

AB4 AG7 AG6 AG5AG9 AG8

AR4 AR3 AR2 AR1 AR0

AR6 AR5 AR4AR9 AR8

AG0

AB1

DE

REV

AG4

AB5

AR 2P

AR 2N

AR 3P

AR 3N

AR 4P AR 4N

AR0~AR9: First Pixel R Data (9; MSB, 0; LSB)

AG0~AG9: First Pixel G Data (9; MSB, 0; LSB)

AB0~AB9: First Pixel B Data (9; MSB, 0; LSB)

DE : Data enable signal

DCLK : Data clock signal

RSVD : Reserved

AB6

AR2

DE VS HS AB7 AB6AB9 AB8

REV AB3 AB2 AG3 AG2 AR3 AR2

REV AB1 AB0 AG1 AG0 AR1 AR0AR0 REV

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5.6 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 10-bit gray scale data input for the

color. The higher the binary input, the brighter the color. The table below provides the assignment of the color

versus data input.

Basic Colors

Gray Scale Of Red

Gray Scale Of Green

Gray Scale Of Blue

Color

Black Red Green Blue Cyan Magenta Yellow White

Red (0) / Dark Red (1) Red (2)

:

: Red (1021) Red (1022) Red (1023)

Green (0) / Dark Green (1) Green (2)

:

: Green (1021) Green (1022) Green (1023)

Blue (0) / Dark Blue (1) Blue (2)

:

: Blue (1021) Blue (1022) Blue (1023)

R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 G9 G8 G7 G6 G5 G4 G3 G2 G1 G0 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0

0

1

0

1

0

1

0

:

0

:

0

Red Green Blue

0

0 1 0 0 0 1 1 1

0 0 0

:

: 1 1 1

0 0 0

:

: 0 0 0

0 0 0

:

: 0 0 0

0

1

0

1

0

:

1

0

:

0

:

0

Note (1) 0: Low Level Voltage, 1: High Level Voltage

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0

1

0

1

0

1

:

1

0

1

0

:

0

:

0

1

0

1

0

1

0

1

0

1

0

:

1

0

1

0

:

0

1

0

1

0

1

0

:

0

Data Signal

0

1

0

1

0

1

0

:

0

:

1

0

:

0

Issue Date:Oct.30.2008

Model No.: V420H1-L14

Tentative

0

1

0

1

1 0 1 1

0 0 0

:

: 0 0 0

0 0 0

:

: 1 1 1

0 0 0

:

: 0 0 0

1

0

1

0

:

0

:

1

0

0 0

0

:

0

1

0

1

0

1

0

:

;

0

1

0

1

0

:

0

1

0

1

0

1

0

:

0

1

0

1

0

1

0

1

0

1

0

:

0

:

0

:

1

0

1

0

1

0

:

0

:

0

:

1

0

1

0

1

0

:

0

:

0

1

0

1

0

:

1

0

1

0

1

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6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

(Ta = 25 ± 2 ºC)

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

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Model No.: V420H1-L14

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LVDS Rec eive r Clock

LVDS Rec eive r Data

Vertical Active Display Te rm

Horizontal Active Display Te rm

Note (1) : (ODSEL) = (H) , (L). Please refer to 5.1 for detail information

Frequency 1/Tc 60 74.25 80 MHz -

Input cycle to cycle jitter

Setup Time Tlvsu 600 - - ps -

Hold Time Tlvhd 600 - - ps -

Frame Rate

Total Tv 111 5 1125 1135 Th

Display Tvd 1080 1080 1080 Th -

Blank Tvb 35 45 55 Th -

Total Th 1050 1100 1150 Tc

Display Thd 960 960 960 Tc -

Blank Thb 90 140 190 Tc -

Trcl - - 200 ps -

Fr5 47 50 53 Hz (1)

Fr6 57 60 63 Hz (1)

Tv=Tvd+Tvb

Th=Thd+Thb

Note (2) : Since the module is operated in DE only mode, Hsync and Vsync input signals should be set to low

logic level. Otherwise, this module would operate abnormally.

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INPUT SIGNAL TIMING DIAGRAM

Tvd Tvb

DE

Th

DCLK

Tc

DE

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Model No.: V420H1-L14

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Tv

Thb Thd

Data

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Љ

6.2 POWER ON/OFF SEQUENCE

(Ta = 25 ± 2 ºC)

To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram

below.

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Issue Date:Oct.30.2008

Model No.: V420H1-L14

Tentative

50ms

T

0V

4

0.5ЉT1Љ10ms

0

500ms

2

T

3

T

0.1V

CC

3 T1

T

2

T

0.1V

T4

cc

VALI D

LVDS Signals

0V

Power On

Power Off

0ЉT7ЉT2

T

0

8

T3

T

7

8

Option Signals

(SELLVDS)

Backlight (Recommended)

T

5

500ms

100msЉT6

50%

T

5

50%

T

6

Power ON/OFF Sequence

Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.

Note (2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD

operation or the LCD turns off before the backlight turns off, the display may momentarily become

abnormal screen.

Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance. If

T2<0,that maybe cause electrical overstress failure.

Note (4) T4 should be measured after the module has been fully discharged between power off and on period.

Note (5) Interface signal shall not be kept at high impedance when the power is on.

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7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit

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Model No.: V420H1-L14

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Ambient Temperature Ta

Ambient Humidity Ha

Supply Voltage VCC 12 V

Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"

Lamp Current IL TBD mA

Oscillating Frequency (Inverter) FW TBD KHz

Vertical Frame Rate Fr 120 Hz

The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature change during

measuring. In order to stabilize the luminance, the measurement should be executed after lighting backlight for 1

hour in a windless room.

LCD Module

LCD Panel

25r2

50r10

oC

%RH

Center of the Screen

Display Color Analyzer

(Minolta CA210)

Light Shield Room

(Ambient Luminance < 2 lux)

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7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should be

measured under the test conditions described in 7.1 and stable environment shown in 7.1.

Item Symbol Condition Min. Typ. Max. Unit Note

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Contrast Ratio CR (4000) - - Note (2)

Response Time

Noraml mode LC Luminance of White

White Variation

Cross Talk CT - - (4) % Note (5)

Color Chromaticity

ECO mode LC - (450) - cd/m

Red

Green

Blue

White

Gray to

gray

GW

Rx (0.652) -

Ry (0.333) -

Gx (0.270) -

Gy (0.617) -

Bx (0.149) -

By (0.063) -

Wx (0.280) -

Wy

Tx=0q, Ty =0q

Viewing angle

at normal direction

- (6.5) - ms Note (3)

2

-

Note (4)Center

Note (4),

- (500) - cd/m

- - (1.3) - Note (6)

Typ.

-0.03

(0.285)

Typ.

+0.03

(7)

-

Color Gamut C.G

Tx+

Horizontal

Tx-

Viewing Angle

TY+

Vertical

TY-

Gamma - (2.2) - - -

Note (1) Definition of Viewing Angle (Tx, Ty):

Viewing angles are measured by Eldim EZ-Contrast 160R

CRt20

- (72) - % NTSC

80 88 -

Deg. Note (1)

80 88 -

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Normal

T x = T y = 0º

y-

T

y

Issue Date:Oct.30.2008

Model No.: V420H1-L14

Tentative

TX- = 90º

6 oϗclock

Ty- = 90º

x-

Tx

Tx

y-

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) =

CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (6).

Note (3) Definition of Gray-to-Gray Switching Time:

y+

12 oϗclock direction

Ty+ = 90º

x+

TX+ = 90º

pixels whiteall withLuminance Surface pixels black all withLuminance Surface

Optical Response

100 %

90 %

10 %

0 %

Gray to Gray

Switching Time

The driving signal means the signal of gray level 0, 124, 252, 380, 508, 636, 764, 892 and 1023.

Gray to gray average time means the average switching time of gray level 0, 124, 252, 380, 508, 636,

764, 892, 1023 to each other.

Note (4) Definition of Luminance of White (L

Measure the luminance of gray level 1023 at center point and 5 points

Time

Gray to Gray

Switching Time

, L

):

C

AVE

L

= L (5), where L (X) is corresponding to the luminance of the point X at the figure in Note (6).

C

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Note (5) Definition of Cross Talk (CT):

CT = | YB – YA | / YA u 100 (%)

Where:

YA = Luminance of measured location without gray level 0 pattern (cd/m2)

YB = Luminance of measured location with gray level 0 pattern (cd/m2)

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(0,0)

Active Area

Y

A,U

(D/2,W/8)

Gray 512

(D/8,W/2) Y

Y

A,L

Y

(D/2,7W/8)

A,D

Note (6) Definition of White Variation (GW):

Measure the luminance of gray level 1023 at 5 points

GW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

(7D/8,W/2)

A,R

Horizontal Line

D

(0,0)

Y

(D/8,W/2) Y

B,L

Active Area

(D/4,W/4)

Gray 128

Y

Gray 0

Y

B,U

B,D

(D/2,W/8)

B,R

(D/2,7W/8)

(7D/8,W/2)

W

D

4

1 2

W

4

W

5

D

3D

2

4

X

Test point :

X = 1 ~ 5

2

Vertical Line

3 4

3W

4

Note (7) ECO mode:

ECO mode was selected by inverter pin: A_DIM.

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8. PRECAUTIONS

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

[ 1 ] Do not apply rough force such as bending or twisting to the module during assembly.

[ 2 ] It is recommended to assemble or to install a module into the user’s system in clean working areas. The

dust and oil may cause electrical short or worsen the polarizer.

[ 3 ] Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.

[ 4 ] Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the

damage and latch-up of the CMOS LSI chips.

[ 5 ] Do not plug in or pull out the I/F connector while the module is in operation.

[ 6 ] Do not disassemble the module.

[ 7 ] Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and easily

scratched.

[ 8 ] Moisture can easily penetrate into LCD module and may cause the damage during operation.

[ 9 ] When storing modules as spares for a long time, the following precaution is necessary.

[ 9.1 ] Do not leave the module in high temperature, and high humidity for a long time. It is highly

recommended to store the module with temperature from 0 to 35кat normal humidity without

condensation.

[ 9.2 ] The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or

fluorescent light.

[ 10 ] When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the

response time will become slow, and the starting voltage of CCFL will be higher than that of room

temperature.

8.2 SAFETY PRECAUTIONS

[ 1 ] The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while

assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit.

[ 2 ] If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of

contact with hands, skin or clothes, it has to be washed away thoroughly with soap.

[ 3 ] After the module’s end of life, it is not harmful in case of normal operation and storage.

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9. DEFINITION OF LABELS

9.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

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Issue Date:Oct.30.2008

Model No.: V420H1-L14

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Model Name: V420H1-L14

Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.

Serial ID: X X X X X X X Y M D L N N N N

CHI MEI

OPTOELECTRONICS

CHI MEI

OPTOELECTRONICS

V420H1 -L14 Rev. XX

X X X X X X X Y M D L N N N N

V420H1 -L14 Rev. XX

X X X X X X X Y M D L N N N N

Serial No.

Product Line

E207943

MADE IN TAIWAN

GEMN

RoHS

E207943

MADE IN TAIWAN

MADE IN CHINA

LEOO(or CAPG or CANO)

RoHS

Serial ID includes the information as below:

Manufactured Date:

Year: 0~9, for 2000~2009

Month: 1~9, A~C, for Jan. ~ Dec.

Day: 1~9, A~Y, for 1st to 31st, exclude I ,O, and U.

Revision Code: Cover all the change

Serial No.: Manufacturing sequence of product

Product Line: 1 -> Line1, 2 -> Line 2, …etc.

Year, Month, Date

CMO Internal Use

Revision

CMO Internal Use

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10. PACKAGING

10.1 PACKAGING SPECIFICATIONS

(1) 4 LCD TV modules / 1 Box

(2) Box dimensions : 1110(L)x317(W)x670(H)mm

(3) Weight : Approx. 53.17Kg(4 modules per carton)

10.2 PACKAGING METHOD

Figures 10-1 and 10-2 are the packing method

LCD TV Module

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Model No.: V420H1-L14

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3 pcs Drier

Cushion(Bottom)

Anti-Static Bag

Carton

Cushion(Top)

PP Belt

Carton Label

Figure.10-1 packing method

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Sea / Land Transportation

(40ft Container)

Air Transportation

Figure.10-2 packing method

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11. MECHANICAL CHARACTERISTICS

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CMO V420H1-L14 Specification

Specifications and Main Features

Frequently Asked Questions

User Manual