The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification.
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REVISION HISTORY
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Issued Date: Sept. 30 2005
Model No.: V420H1-L03
Approval
Version Date
Ver 2.0 Sept.9,’05 All All Approval Specification was first issued.
Page
(New)
Section Description
3
The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification.
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
V420H1- L03 is a 42” TFT Liquid Crystal Display module with 24-CCFL Backlight unit and 2ch-LVDS
interface. This module supports 1920 x 1080 HDTV format and can display true 16.7M colors (8-bit/color).
The inverter module for backlight is built-in.
1.2 FEATURES
- Ultra wide viewing angle – Super MVA technology
- High brightness (550 nits)
- High contrast ratio (1000:1)
- Fast response time (8 ms)
- High color saturation (NTSC 75%)
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Issued Date: Sept. 30 2005
Model No.: V420H1-L03
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- Full HD (1920 x 1080 pixels) resolution
- DE (Data Enable) only mode
- LVDS (Low Voltage Differential Signaling) interface
- 180 degree rotation display option
- Optimized response time for 50 / 60 Hz frame rate
1.3 APPLICATION
-Standard Living Room TVs.
-Home Theater Application.
-Public Display Application.
-MFM Application.
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note
Active Area 930.24(H) x 523.26 (V) (42.02” diagonal) mm
Bezel Opening Area 938.3 (H) x 531.3 (V) mm
Driver Element a-si TFT active matrix - Pixel Number 1920x R.G.B. x 1080 pixel Pixel Pitch(Sub Pixel) 0.1615 (H) x 0.4845 (V) mm Pixel Arrangement RGB vertical stripe - Display Colors 16.7M color Display Operation Mode Transmissive mode / Normally black - -
Anti-reflective coating
Surface Treatment
Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and
Hard coating (3H)
Reflection rate : < 2%
- -
(1)
back outlines.
4
The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification.
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1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. UnitNote
Horizontal(H) 982.3 983 984 mm
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Vertical(V) 575.3 576 577 mm
Depth(D)
Weight 11000 11200 11400 g -
W/PCB-Cover 43.1 43.8 44.8 mm
W/I INV 51 52 53 mm -
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 50 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
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Issued Date: Sept. 30 2005
Model No.: V420H1-L03
Approval
Note (1)
Value
Min. Max.
- (50) G (3), (5)
NOP
- 1.0 G (4), (5)
NOP
Unit Note
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 60 ºC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature
of display area from being over 60 ºC. The range of operating temperature may degrade in case of
improper thermal management in final product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so
that the module would not be twisted or bent by the fixture.
5
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notice. Please contact CMO ’s representative while your product design is based on this specification.
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2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
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Issued Date: Sept. 30 2005
Model No.: V420H1-L03
Approval
Item Symbol
Min. Max.
Power Supply Voltage VCC -0.3 20 V
Logic Input Voltage VIN -0.3 (3.6) V
Value
Unit Note
(1)
2.2.2 BACKLIGHT UNIT
Item Symbol
Lamp Voltage V
Power Supply Voltage VBL 0 30 V(1)
Control Signal Level
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
Note (2) No moisture condensation or freezing.
Note (3) The control signals includes On/Off Control, Internal PWM Control, External PWM Control and
Internal/External PWM Selection.
W
Ё
Value
Min.Max.
Ё
-0.3 7 V(1), (3)
3000 V
Unit Note
RMS
6
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3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Parameter Symbol
Power Supply Voltage Vcc 16.2 18 19.8 V (1)
Ripple Voltage VRP - - 350 mV Rush Current I
LVDS differential input low threshold voltageVTL -100 - - mV LVDS common input voltage Vic 1.125 1.25 1.375 V Terminating Resistor RT - 100 - ohm -
CMOS interface
Note (1) The module should be always operated within the above ranges.
Black - 0.30 -A (3)b
Vertical Stripe
Input High Threshold
Voltage
Input Low Threshold
Voltage
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Min. Typ. Max.
RUSH
lcc
2.7 - 3.3 V -
V
IH
0 - 0.7 V -
V
IL
- 3.5 - A (2)
- 0.55 - A (3)c
Value
Issued Date: Sept. 30 2005
Model No.: V420H1-L03
Approval
Unit Note
Note (2) Measurement condition:
+18V
R1
47K
(High to Low)
(Control Signal)
SW
+12V
VR1
C1
1uF
47K
Q1 2SK1475
FUSE
R2
1K
0.01uF
Q2
2SK1470
C2
C3
1uF
Vcc
(LCD Module Input)
7
The information described in this technical specification is tentative and it is possible to be changed without prior
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GND
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Issued Date: Sept. 30 2005
Model No.: V420H1-L03
Approval
Vcc rising time is 470Ps
+18V
0.9Vcc
0.1Vcc
470Ps
Note (3) The specified power supply current is under the conditions at Vcc = 18 V, Ta = 25 ± 2 ºC, f
Hz, whereas a power dissipation check pattern below is displayed.
a. White Pattern
Active Area
c. Vertical Stripe Pattern
b. Black Pattern
Active Area
R
G
R
B
G
B
B
R
R
G
G
B
B
R
= 60
v
Active Area
R
B
RR
G
G
B
B
R
G
G
B
B
8
The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification.
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Lamp Input Voltage VL --- 1420 --- V
Lamp Current IL 4.5 5.0 5.5 mA
Lamp Starting Voltage V
Operating Frequency FL 40 - 70 KHz (3)
Lamp Life Time LBL 50,000 - - Hrs (4)
S
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Value
Min. Typ. Max.
- - 2270
- - 1910
Unit Note
RMS
V
RMS
V
RMS
Issued Date: Sept. 30 2005
Model No.: V420H1-L03
Approval
I
(1)
RMS
(2), Ta = 0 ºC,
(2), Ta = 25 ºC
= 5.0 mA
L
3.2.2 INVERTER CHARACTERISTICS (
Parameter Symbol
Power Consumption P
Power Supply Voltage VBL 22.8 24 25.2 V
- 187 - W (5), IL = 5.0mA
BL
Ta = 25 ± 2 ºC)
Value
Min. Typ. Max.
Unit Note
DC
Power Supply Current IBL - 7.8 - A Non Dimming
Input Ripple Noise - - - 500 mV
Backlight Turn on Voltage V
BS
2270
1910 - - V
- -
V
P-P
Ta = 0 ºC
RMS
Ta = 25 ºC
RMS
VBL=22.8V
Oscillating Frequency FW 47 50 53 kHz
Dimming frequency FB 150 160 170 Hz
Minimum Duty Ratio D
- 20 - %
MIN
Note (1) Lamp current is measured by utilizing high frequency current meters as shown below:
9
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Issued Date: Sept. 30 2005
Model No.: V420H1-L03
Approval
Inverter
(Master)
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
HV(Pink -)
2
HV (White +)
1
HV(Pink +)
2
HV (White -)
1
HV(Pink -)
2
HV (White +)
1
HV(Pink +)
2
HV (White -)
1
HV(Pink -)
2
HV (White +)
1
HV(Pink +)
2
HV (White -)
1
HV(Pink -)
2
HV (White +)
1
HV(Pink +)
2
LCD Module
HV (White -)
1
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
A
1
2
A
A
1
2
A
A
1
2
A
A
1
2
A
A
1
2
A
A
1
2
A
A
1
2
A
A
1
2
A
Inverter
(Slavor)
A
A
A
A
A
A
A
A
HV (Pink -)
2
HV(Blue +)
1
HV (Pink +)
2
HV(Blue -)
1
HV (Pink -)
2
HV(Blue +)
1
HV (Pink +)
2
HV(Blue -)
1
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
A
1
2
A
A
1
2
A
A
1
2
A
A
1
2
A
Note (2) The lamp starting voltage VS should be applied to the lamp for more than 1 second after startup.
Otherwise the lamp may not be turned on.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the display
input signals, and it may result in line flow on the display. In order to avoid interference, the lamp
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.
Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and
the effective discharge length is longer than 80% of its original length (Effective discharge length is
defined as an area that has equal to or more than 70% brightness compared to the brightness at the
center point of lamp.) as the time in which it continues to operate under the condition at Ta = 252к
10
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notice. Please contact CMO ’s representative while your product design is based on this specification.
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y
y
and IL = 4.5 ~ 5.5 mArms.
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Issued Date: Sept. 30 2005
Model No.: V420H1-L03
Approval
Note (5) The power supply capacity should be higher than the total inverter power consumption P
the pulse width modulation (PWM) mode was applied for backlight dimming, the driving current
changed as PWM duty on and off. The transient response of power supply should be considered
for the changing loading when inverter dimming.
3.2.3 INVERTER INTERTFACE CHARACTERISTICS
Parameter Symbol
On/Off Control Voltage
Select Voltage
Voltage
Voltage
ON
OFF
HI
LO
MAX
MIN
HI 2.0
LO
V
V
V
V
BLON
SEL
IPWM
EPWM
Control Signal Rising Time Tr
Control Signal Falling Time Tf
PWM Signal Rising Time T
PWM Signal Falling Time T
PWMR
PWMF
Input impedance R
BLON Delay Time T
BLON Off Time T
on
off
IN
Test
Condition
Ё
Ё
Ё
Ё
V
SEL
V
SEL
ЁЁЁ
ЁЁЁ
ЁЁЁ
ЁЁЁ
Ё
Ё 1 ЁЁ ms
Ё 1 ЁЁ ms
Min.Typ.Max.
= L
= H
Note (1) The SEL signal should be valid before backlight turns on by BLON signal. It is inhibited to change
Value
2.0
0
2.0
0
Ё
Ё
Ё-
Ё
ЁЁ
Ё
0
Ё
0
1
Ё
ЁЁ MӨ
Unit Note
5.0V
0.8V
5.0V Internal/External PWM
0.8V
3.0V maximum duty ratioInternal PWM Control
Ё
V minimum dut
5.0V duty on External PWM Control
0.8V dut
100 ms
100 ms
50 us
50 us
off
. Since
BL
ratio
the internal/external PWM selection (SEL) during backlight turn on period.
Note (2) The power sequence and control signal timing are shown in the following figure.
Note (3) The power sequence and control signal timing must follow the figure below. For a certain reason,
the inverter has a possibility to be damaged with wrong power sequence and control signal
timing.
11
The information described in this technical specification is tentative and it is possible to be changed without prior
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BL
V
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Issued Date: Sept. 30 2005
Model No.: V420H1-L03
Approval
V
V
V
BLON
V
SEL
EPWM
IPWM
V
0
on1
T
T
off1
2.0V
0
0.8V
Backlight on duration
r
T
T
f
2.0V
0
0.8V
Ext. Dimming Function
T
T
PWMR
PWMF
Int. Dimming Function
2.0V
0
0.8V
3.0V
0
W
External
PWM
Period
External
PWM Duty
100%
Minimun
Duty
12
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)
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
ERX0(+/-)
ERX1(+/-)
ERX2(+/-)
ERX3(+/-)
ERXC(+/-)
ORX0(+/-)
ORX1(+/-)
ORX2(+/-)
ORX3(+/-)
ORXC(+/-)
(FI-X30SSL-HF (JAE))
INPUT CONNECTOR
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Model No.: V420H1-L03
Approval
FRAME
SCAN DRIVER
BUFFER
TFT LCD PANEL
(1920x3x1080)
TIMING
CONTROLLER
RPF
ODSEL1
ODSEL2
Vcc
GND
VBL
GND
SEL
E_PWM
I_PWM
BLON
CN1.
POWER
CONNECTOR
(53261-1560
(Molex))
INVERTER
CONNECTOR
CN1:S14B-PH-SM3-TB
(D)(LF) or equivalent
(Master)
DATA DRIVER (RSDS
DC/DC CONVERTER
& REFERENCE
VOLTAGE
GENERATOR
CN3-CN26:SM02 (12.0)B-BHS-1-TB(LF)(JST)
or equivalent
BACKLIGHT
UNIT
CN27-CN30: LM113P-020-TF1-3(Unicorn) or equivalent
CN2:S12B-PH-SM3-TB
(D)(LF) or equivalent
INVERTER
CONNECTOR
(Slave)
CN2.
VBL
GND
13
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5. V420H1-L03 LCD INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE SIGNAL INPUT
CNF1 Connector Pin Assignment (1)
Pin Name Description
1 NC No Connection
2 RPF Display Rotation
3 NC No Connection
4 NC No Connection
5 NC No Connection
6 ODSEL1 Overdrive Lookup Table Selection
7 ODSEL2 Overdrive Lookup Table Selection
8 GND Ground
9 ERX0- Even pixel, negative LVDS differential data input, channel 0
10 ERX0+ Even pixel, positive LVDS differential data input, channel 0
11 ERX1- Even pixel, negative LVDS differential data input, channel 1
12 ERX1+ Even pixel, positive LVDS differential data input, channel 1
13 ERX2- Even pixel, negative LVDS differential data input, channel 2
14 ERX2+ Even pixel, positive LVDS differential data input, channel 2
15 ECLK- Even pixel, negative LVDS differential clock input
16 ECLK+ Even pixel, positive LVDS differential clock input
17 ERX3- Even pixel, negative LVDS differential data input, channel 3
18 ERX3+ Even pixel, positive LVDS differential data input, channel 3
The information described in this technical specification is tentative and it is possible to be changed without prior
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5.2 TFT LCD MODULE Power input
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Issued Date: Sept. 30 2005
Model No.: V420H1-L03
Approval
CNF2
Note (1) CNF1 Connector part no.: FI-X30SSL-HF (JAE) or equivalent.
Note (2) CNF2 Connector part no.: 53261-1560 (Molex) or equivalent.
Note (3) Low : normal display (default), High : display with 180 degree rotation
Note (4) Reserved for internal use. Please leave it open.
Connector Pin Assignment (2)
Pin Name Description
1 VCC Power input (+18V)
2 VCC Power input (+18V)
3 VCC Power input (+18V)
4 VCC Power input (+18V)
5 VCC Power input (+18V)
6 GND Ground
7 GND Ground
8 GND Ground
9 GND Ground
10 GND Ground
11 NC No Connection
12 NC No Connection
13 NC No Connection
14 NC No Connection
15 NC No Connection
Note
(4)
Note (5) Overdrive lookup table selection. The overdrive lookup table should be selected in accordance with
the frame rate to optimize image quality.
ODSEL2 ODSEL1 Note
LL Lookup table was optimized for 60 Hz frame rate.
L H Lookup table was optimized for 50 Hz frame rate.
H L Reserved. Do not use.
H H Reserved. Do not use.
5.3 BACKLIGHT UNIT
The pin configuration for the housing and leader wire is shown in the table below.
CN3-CN26: BHR-04VS-1 (JST).
Pin Name Description Wire Color
1 HV High Voltage Pink
2 HV High Voltage White
Note (1) The backlight interface housing for high voltage side is a model BHR-04VS-1, manufactured by
JST. The mating header on inverter part number is SM02(12.0)B-BHS-1-TB(LF).
15
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Issued Date: Sept. 30 2005
Model No.: V420H1-L03
Approval
1 HV(White)
2 HV(Pink)
1 HV(White)
2 HV(Pink)
1 HV(White)
2 HV(Pink)
5.4 INVERTER UNIT
CN1 (Header): S14B-PH-SM3-TB (D)(LF)(JST) or equivalent.
External PWM control signal
E_PWM should be connected to ground when internal PWM was selected
(SEL = Low).
Internal PWM Control Signal
I_PWM should be connected to ground when external PWM was selected
(SEL = High).
power input
DC
1 HV(Pink)
2 HV(White)
1 HV(Pink)
2 HV(White)
1 HV(Pink)
2 HV(White)
16
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CN2 (Header): S12B-PH-SM3-TB (D)(LF)(JST) or equivalent.
Pin No. Symbol Description
1
2
3
4
5
6
7
8
9
10
11
12 NC NC
CN3-CN26 (Header): SM02(12.0)B-BHS-1-TB (LF)(JST) or equivalent
Pin No. Symbol Description
1
2
VBL +24V
GND GND
NC NC
CCFL HOT
CCFL HOT
CCFL high voltage
CCFL high voltage
power input
DC
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Model No.: V420H1-L03
Approval
CN27-CN30 (Header): LM113P-020-TF1-3(Unicorn) or equivalent
Pin No. Symbol Description
1 Board to Board
2 Board to Board
3 Board to Board
4 Board to Board
5 Board to Board
6 Board to Board
7 Board to Board
8 Board to Board
9 Board to Board
10 Board to Board
11 Board to Board
12 Board to Board
13 Board to Board
14 Board to Board
15 Board to Board
16 Board to Board
17 Board to Board
18 Board to Board
19 Board to Board
20
Control
Signal
Board to Board
Note (1) Floating of any control signal is not allowed.
17
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G0-EG
0
G0-EG
0
0
p
O
p
OB0
CLK
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5.5 BLOCK DIAGRAM OF INTERFACE
CNF1
Issued Date: Sept. 30 2005
Model No.: V420H1-L03
Approval
ER0-ER7
E
-EB7
EB
DE
OR0-OR7
-
-OB7
D
Host
Graphics
Controller
ERx0+
TxIN
ERx
ERx1+
7
ERx1-
ERx2+
ERx2-
ERx3+
7
ERx3-
51Ө
51Ө
51Ө
51Ө
51Ө
51Ө
51Ө
51Ө
100pF
100
100pF
100pF
F
-
RxOUT
ER0-ER7
E
-EB7
EB
DE
OR0-OR7
-
7
7
B-B7
ECLK+
PLL
51Ө
-
100pF
51Ө
PLL
D
L
Timing
ORx0+
Rx
-
ORx1+
ORx1-
51Ө
51Ө
51Ө
100pF
100
F
Controller
ORx2+
Rx2-
ORx3+
ORx3-
OCLK+
PLL
LVDS Transmitter
51Ө
100pF
51Ө
51Ө
100pF
51Ө
51Ө
-
100pF
51Ө
LVDS Receiver
PLL
THC63LVDM83A
(LVDF83A)
18
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ER0~ER7 : Even pixel R data
EG0~EG7 : Even pixel G data
EB0~EB7 : Even pixel B data
OR0~OR7 : Odd pixel R data
OG0~OG7: Odd pixel G data
OB0~OB7 : Odd pixel B data
DE : Data enable signal
DCLK : Data clock signal
Note (1) The system must have the transmitter to drive the module.
Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is
used differentially.
Note (3) Two pixel data send into the module for every clock cycle. The first pixel of the frame is even pixel and the
second pixel is odd pixel.
19
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notice. Please contact CMO ’s representative while your product design is based on this specification.
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Notes (1) RSVD(reserved)pins on the transmitter shall be “H” or “L”.
20
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5.7 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for
the color. The higher the binary input, the brighter the color. The table below provides the assignment of the
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Ye ll ow
White
Red (0) / Dark
Red (1)
Red (2)
:
:
Red (253)
Red (254)
Red (255)
Green (0) / Dark
Green (1)
Green (2)
:
:
Green (253)
Green (254)
Green (255)
Blue (0) / Dark
Blue (1)
Blue (2)
:
:
Blue (253)
Blue (254)
Blue (255)
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
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Data Signal
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
1
1
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
21
The information described in this technical specification is tentative and it is possible to be changed without prior
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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item SymbolMin. Typ. Max. Unit Note
Frequency 1/Tc 60 74 80 MHZ -
LVDS Receiver Clock
LVDS Receiver Data
Vertical Active Display Term
Horizontal Active Display Term
Note (1) Since this module is operated in DE only mode, Hsync and Vsync input signals should be set to
Input cycle to
cycle jitter
Setup Time Tlvsu 600 - - ps Hold Time Tlvhd600 - - ps -
Frame Rate
Total Tv 1115 1125 1135 Th Tv=Tvd+Tvb
Display Tvd 1080 1080 1080 Th -
low logic level. Otherwise, this module would operate abnormally.
Note (2) (ODSEL2, ODSEL1) = (L,H). Please refer to 5.1 for detail information.
Note (3) (ODSEL2, ODSEL1) = (L,L). Please refer to 5.1 for detail information.
INPUT SIGNAL TIMING DIAGRAM
Tv
Tvd
DE
Th
DCLK
Tc
Thd
Thb
DE
Tvb
DATA
Valid display data (960 clocks)
22
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Љ
Љ
Љ
Љ
Љ
Љ
Љ
LVDS RECEIVER INTERFACE TIMING DIAGRAM
RXCLK+/-
RXn+/-
Tlvsu
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Tc
Tlvhd
1T
14
3T
14
5T
14
7T
14
9T
14
11T
14
13T
14
6.2 POWER ON/OFF SEQUENCE
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram
below.
Power Supply
V
0.5ЉT1Љ10ms
0
T
2
0
T
3
500ms
50ms
50ms
T
4
CC
Signals
0V
0V
0.9 VCC
CC
0.1V
Power On
T1
T
3
2
T
VALID
Power Off
0.9 V
CC
0.1V
CC
T4
Backlight (Recommended)
500ms
100ms
T
5
T6
50%
5
T
50%
6
T
Power ON/OFF
23
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Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.
Note (2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD
operation or the LCD turns off before the backlight turns off, the display may momentarily become
abnormal screen.
Note (3) In case of VCC is in off level, please keep the level of input signals on the low or high impedance.
Note (4) T4 should be measured after the module has been fully discharged between power off and on period.
Note (5) Interface signal shall not be kept at high impedance when the power is on.
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24
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC 18 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Lamp Current I
Oscillating Frequency (Inverter) F
Frame Rate Fr 60Hz
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should be
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L
L
25r2
50r10
5.0r0.5
50r3
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Model No.: V420H1-L03
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o
C
%RH
mA
KHz
measured under the test conditions described in 7.1 and stable environment shown in Note (6).
Item Symbol Condition Min. Typ.Max. Unit Note
Contrast Ratio CR800 1000- - Note (2)
Response Time
Center Luminance of White L
White Variation
Cross Talk CT - - 4 % Note (5)
Red
Green
Color
Chromaticity
Blue
White
Color Gamut C.G
Horizontal
Viewing
Angle
Ver t ical
Gray to
gray
C
GW
T
=0q, TY =0q
Rx 0.651 Ry
x
Viewing Normal Angle
Gx
Gy
Bx
By
- 8 12 ms Note (3)
450 550 - cd/m2Note (4)
- - 1.3 - Note (7)
Typ.
-0.03
0.330
0.275
0.596
0.142
0.067
Typ.
+0.03
-
-
-
-
-
Note (6)
Wx 0.285 Wy
0.293
-
72 75 - % NTSC
Tx+
T
x
TY+
T
Y
CRt20
-
80 88 80 88 80 88 80 88 -
Deg. Note(1)
25
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T
T
Note (1) Definition of Viewing Angle (Tx, Ty):
Viewing angles are measured by EZ-Contrast 160R (Eldim)
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Normal
Tx = Ty = 0º
Ty-Ty
TX- = 90º
6 o’clock
T
y- = 90º
x-
y-
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L255 / L0
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
CR = CR (5)
CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (7).
Note (3) Definition of Gray to Gray Switching Time:
Tx
Tx
y+
12 o’clock direction
T
y+ = 90º
x+
TX+ = 90º
ime
100%
90%
Optical
Response
10%
0%
ime
Gray to gray
switching time
Gray to gray
switching time
The driving signal means the signal of gray level 0, 63, 127, 191, 255.
26
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A
(
)
A
(
)
(
)
Gray to gray average time means the average switching time of gray level 0 ,63,127,191,255 to each other.
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Note (4) Definition of Luminance of White (L
Measure the luminance of gray level 255 at center point and 5 points
L
= L (5)
C
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
AVE
L (x) is corresponding to the luminance of the point X at the figure in Note (7).
Note (5) Definition of Cross Talk (CT):
CT = | Y
– YA | / YAu 100 (%)
B
Where:
Y
= Luminance of measured location without gray level 0 pattern (cd/m2)
A
Y
= Luminance of measured location with gray level 0 pattern (cd/m2)
B
ctive Area
Gray 128
Y
Y
D,W
A, U
A, R
Y
(D/8,W/2)
A, L
Y
(D/2,7W/8)
A, D
(0, 0)
, L
):
C
AVE
(D/2,W/8)
(7D/8,W/2)
(D/4,W/4)
Y
(D/8,W/2)
B, L
Y
(D/2,7W/8)
B, D
0, 0
ctive Area
Gray 0
Gray 0
Gray 128
Y
(D/2,W/8)
B, U
Y
(7D/8,W/2)
B, R
(3D/4,3W/4)
D,W
27
The information described in this technical specification is tentative and it is possible to be changed without prior
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Note (6) Measurement Setup:
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature
change during measuring. In order to stabilize the luminance, the measurement should be
executed after lighting backlight for 1 hour in a windless room.
LCD Module
LCD Panel
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Center of the Screen
Note (7) Definition of White Variation (GW):
Measure the luminance of gray level 255 at 5 points
GW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
Display Color Analyzer
(Minolta CA210)
Light Shield Room
(Ambient Luminance < 2 lux)
Horizontal Line
D
D/4D/23D/4
12
X
5
: Test Point
X=1 to 5
W
W/4
W/2
Vertical Line
3W/4
34
Active Area
28
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8. PRECAUTIONS
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) It is recommended to assemble or to install a module into the user’s system in clean working areas.
The dust and oil may cause electrical short or worsen the polarizer.
(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.
(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMOS LSI chips.
(5) Do not plug in or pull out the I/F connector while the module is in operation.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.
(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD
modules in the specified storage conditions.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of CCFL will be higher than that of room
temperature.
8.2 SAFETY PRECAUTIONS
(1) The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while
assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
29
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9. DEFINITION OF LABELS
9.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
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CHI MEI
OPTOELECTRONICS
(a) Model Name: V420H1-L03
(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.
(c) Serial ID: X X
X X X X X Y M D L N N N N
V420H1 -L03 Rev. XX
X X X X X X X Y M D L N N N N
Serial No.
Product Line
Year, Month, Date
CMO Internal Use
CMO Internal Use
Revision
E207943
MADE IN TAIWAN
CMO Internal Use
Serial ID includes the information as below:
(a) Manufactured Date: Year: 0~9, for 2000~2009
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1
(b) Revision Code: Cover all the change
(c) Serial No.: Manufacturing sequence of product
(d) Product Line: 1 -> Line1, 2 -> Line 2, …etc.
st
to 31st, exclude I ,O, and U.
30
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10. PACKAGING
10.1 PACKING SPECIFICATIONS
(1) 3 LCD TV modules / 1 Box
(2) Box dimensions : 1086(L) X 356 (W) X 715 (H)
(3) Weight : approximately 40Kg ( 3 modules per box)
10.2 PACKING METHOD
Figures 10-1 and 10-2 are the packing method
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Anti-static Bag
PE Foam(Bottom)
Carton
LCD TV Module
3pcs Drier
Figure.10-1 packing method
Carton dimensions: 1086(L)x356(W)x715(H)mm
Weight
: Approx.40Kg(3 modules per carton)
Carton Label
31
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11. MECHANICAL CHARACTERISTICS
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࡛ભሽٝڶૻֆ
%*+/'+
33
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࡛ભሽٝڶૻֆ
%*+/'+
34
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Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Sept. 30 2005
Model No.: V420H1-L03
Approval
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%*+/'+
35
The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification.
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Version2.0
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