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notice. Please contact CMO ’s representative while your product design is based on this specification.
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REVISION HISTORY
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Issued Date: Jan. 14, 2005
Model No.: V420H1-L01
Te n t a t ive
Version Date
Ver 0.0 Jan. 14,’05 AllAllTentative Specification was first issued.
Page
(New)
SectionDescription
3
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
V420H1- L01 is a 42” TFT Liquid Crystal Display module with 24-CCFL Backlight unit and 2ch-LVDS
interface. This module supports 1920 x 1080 HDTV format and can display true 16.7M colors (8-bit/color).
The inverter module for backlight is built-in.
1.2 FEATURES
- Ultra wide viewing angle – Super MVA technology
- High brightness (600 nits)
- High contrast ratio (1000:1)
- Fast response time (8 ms)
- High color saturation (NTSC 75%)
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Issued Date: Jan. 14, 2005
Model No.: V420H1-L01
Te n t a t ive
- HD (1920 x 1080 pixels) resolution
- DE (Data Enable) only mode
- LVDS (Low Voltage Differential Signaling) interface
- 180 degree rotation display option
- Optimized response time for 50 / 60 Hz frame rate
1.3 APPLICATION
- TFT LCD TVs
1.4 GENERAL SPECIFICATI0NS
ItemSpecification UnitNote
Active Area 930.24(H) x 523.26 (V) (42.02” diagonal) mm
Bezel Opening Area 938.3 (H) x 531.3 (V) mm
Driver Element a-si TFT active matrix -Pixel Number 1920x R.G.B. x 1080 pixelPixel Pitch(Sub Pixel) 0.1615 (H) x 0.4845 (V) mmPixel Arrangement RGB vertical stripe -Display Colors 16.7Mcolor Display Operation Mode Transmissive mode / Normally black --
Anti-reflective coating
Surface Treatment
Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and
Hard coating (3H)
Reflection rate : < 2%
--
(1)
back outlines.
1.5 MECHANICAL SPECIFICATIONS
ItemMin.Typ. Max. UnitNote
Horizontal(H) 982.3983984mm
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Vertical(V) 575.3576577mm
Depth(D)
Weight 11800 12000 12200 g-
W/PCB-Cover 43.143.844.8mm
W/I INV 52.35354mm
4
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Note (1)
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2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
ItemSymbol
Storage Temperature T
Operating Ambient Temperature T
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 60 ºC with LCD module alone in a temperature controlled chamber.
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Value
Min.Max.
ST
OP
NOP
NOP
-20+60ºC(1)
050ºC(1), (2)
-(50) G(3), (5)
-1.0G(4), (5)
Issued Date: Jan. 14, 2005
Model No.: V420H1-L01
Te n t a t iv e
UnitNote
Thermal management should be considered in final product design to prevent the surface temperature
of display area from being over 60 ºC. The range of operating temperature may degrade in case of
improper thermal management in final product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so
that the module would not be twisted or bent by the fixture.
Relative Humidity (%RH)
100
90
80
60
Operating Range
40
20
10
-40-20200406080
Storage Range
Temperature (ºC)
5
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2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
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Issued Date: Jan. 14, 2005
Model No.: V420H1-L01
Te n t a t iv e
ItemSymbol
Value
UnitNote
Min.Max.
Power Supply Voltage V
Logic Input Voltage V
CC
IN
-0.320V
-0.3(3.6)V
(1)
2.2.2 BACKLIGHT UNIT
ItemSymbol
Lamp Voltage V
Power Supply Voltage V
Auxiliary Power Supply Voltage
Control Signal Level
W
BL
V
AUX
Ё
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
Note (2) No moisture condensation or freezing.
Note (3) The control signals includes On/Off Control, Internal PWM Control, External PWM Control and
Internal/External PWM Selection.
Value
Min.Max.
Ё
4500V
UnitNote
RMS
0140V(1)
023V(1)
-0.37V(1), (3)
6
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Issued Date: Jan. 14, 2005
Model No.: V420H1-L01
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Parameter Symbol
Min.Typ. Max.
Power Supply Voltage Vcc16.21819.8V(1)
Ripple Voltage V
Rush Current I
-100 -- mV
LVDS common input voltage Vic1.1251.251.375V
Terminating Resistor RT-100-ohm
CMOS interface
Input High Threshold
Voltage
Input Low Threshold
Voltage
V
IH
V
IL
2.7-3.3V
0-0.7V
Note (1) The module should be always operated within the above ranges.
Value
UnitNote
Te n t a t iv e
Note (2) Measurement condition:
+18V
R1
47K
(High to Low)
(Control Signal)
SW
+12V
VR1
C1
1uF
47K
Q1 2SK1475
FUSE
R2
1K
0.01uF
Q2
2SK1470
C2
C3
1uF
Vcc
(LCD Module Input)
7
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GND
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Issued Date: Jan. 14, 2005
Model No.: V420H1-L01
Te n t a t iv e
Vcc rising time is 470Ps
+18V
0.9Vcc
0.1Vcc
470Ps
Note (3) The specified power supply current is under the conditions at Vcc = 18 V, Ta = 25 ± 2 ºC, f
Hz, whereas a power dissipation check pattern below is displayed.
a. White Pattern
Active Area
c. Vertical Stripe Pattern
b. Black Pattern
Active Area
R
G
G
B
R
B
B
R
R
G
G
B
B
R
= 60
v
B
G
Active Area
B
R
G
B
R
RR
G
G
B
B
8
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Power consumption P
Power Supply Voltage V
Power Supply Current I
Auxiliary Power Supply Voltage
Auxiliary Power Supply Current I
V
BL
BL
BL
AUX
AUX
Input Ripple Noise ---2.5V
Backlight Turn on Voltage V
Oscillating Frequency F
Dimming frequency F
Minimum Duty Ratio D
BS
W
B
MIN
Note (1) Lamp current is measured by utilizing high frequency current meters as shown below:
Min.Typ. Max.
-200-W(5), IL = 5.0mA
114 120 126V
-1.7-ANon Dimming
171819V
--200mA
3030
2570--V
515457kHz
150160170Hz
-20-%
Value
Value
--
Issued Date: Jan. 14, 2005
Model No.: V420H1-L01
Te n t a t iv e
UnitNote
RMS
RMS
V
RMS
V
RMS
UnitNote
P-P
V
RMS
RMS
IL = 5.0 mA
(1)
(2), Ta = 25 ºC
(2), Ta = 0 ºC
DC
DC
VBL=114V
Ta = 0 ºC
Ta = 25 ºC
9
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Issued Date: Jan. 14, 2005
Model No.: V420H1-L01
Te n t a t iv e
Inverter
(Master)
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
HV(Pink -)
2
HV (White +)
1
HV(Pink +)
2
HV (White -)
1
HV(Pink -)
2
HV (White +)
1
HV(Pink +)
2
HV (White -)
1
HV(Pink -)
2
HV (White +)
1
HV(Pink +)
2
HV (White -)
1
HV(Pink -)
2
HV (White +)
1
HV(Pink +)
2
LCD Module
HV (White -)
1
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
A
1
2
A
A
1
2
A
A
1
2
A
A
1
2
A
A
1
2
A
A
1
2
A
A
1
2
A
A
1
2
A
Inverter
(Slavor)
A
A
A
A
A
A
A
A
HV (Pink -)
2
HV(Blue +)
1
HV (Pink +)
2
HV(Blue -)
1
HV (Pink -)
2
HV(Blue +)
1
HV (Pink +)
2
HV(Blue -)
1
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
A
1
2
A
A
1
2
A
A
1
2
A
A
1
2
A
Note (2) The lamp starting voltage VS should be applied to the lamp for more than 1 second after startup.
Otherwise the lamp may not be turned on.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the display
input signals, and it may result in line flow on the display. In order to avoid interference, the lamp
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.
Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and
the effective discharge length is longer than 80% of its original length (Effective discharge length is
defined as an area that has equal to or more than 70% brightness compared to the brightness at the
center point of lamp.) as the time in which it continues to operate under the condition at Ta = 25 2к
10
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yp
A
y
y
and IL = 4.5 ~ 5.5 mArms.
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Issued Date: Jan. 14, 2005
Model No.: V420H1-L01
Te n t a t iv e
Note (5) The power supply capacity should be higher than the total inverter power consumption P
. Since
BL
the pulse width modulation (PWM) mode was applied for backlight dimming, the driving current
changed as PWM duty on and off. The transient response of power supply should be considered for
the changing loading when inverter dimming.
3.2.3 INVERTER INTERTFACE CHARACTERISTICS
Parameter Symbol
Inverter Good Signal
On/Off Control Voltage
Select Voltage
Voltage
Voltage
HIV
LO
ON
OFF
HI
LO
MAX
MIN
HI2.0
LO
V
V
V
V
V
BLON
SEL
IPWM
EPWM
Control Signal Rising Time Tr
Control Signal Falling Time Tf
PWM Signal Rising Time T
PWM Signal Falling Time T
PWMR
PWMF
Input impedance R
BLON Delay Time1 T
BLON Off Time1 T
BLON Delay Time2 T
BLON Off Time2 T
on1
off1
on2
off2
IG
IN
Te st
Condition
Min.T
= High2.0
=Low0
V
Ё
Ё
Ё
Ё
V
= L
SEL
V
= H
SEL
ЁЁЁ
ЁЁЁ
ЁЁЁ
ЁЁЁ
Ё
Ё1ЁЁms
Ё1ЁЁms
Ё1ЁЁms
Ё1ЁЁms
Note (1) The SEL signal should be valid before backlight turns on by BLON signal. It is inhibited to change
Value
.Max.
Ё
Ё
2.0
0
2.0
0
Ё
Ё
Ё
Ё
ЁЁ
Ё
0
Ё
0
1
Ё
ЁЁMӨ
UnitNote
5.0V Normal Output
0.8V
bnormal Output
5.0V
0.8V
5.0V Internal/External PWM
0.8V
3.0V maximum duty ratioInternal PWM Control
Ё
Vminimum dut
5.0V duty on External PWM Control
0.8V dut
off
100ms
100ms
50us
50us
ratio
the internal/external PWM selection (SEL) during backlight turn on period.
Note (2) The power sequence and control signal timing are shown in the following figure.
Note (3) The power sequence and control signal timing must follow the figure below. For a certain reason,
the inverter has a possibility to be damaged with wrong power sequence and control signal
timing.
11
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V
BL
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Issued Date: Jan. 14, 2005
Model No.: V420H1-L01
Te n t a t iv e
V
V
V
V
AUX
BLON
V
SEL
EPWM
IPWM
V
0
0
0
0
0
0
W
2.0V
0.8V
2.0V
0.8V
2.0V
0.8V
3.0V
External
PWM
Period
on1
T
T
on2
Backlight on duration
T
r
Ext. Dimming Function
T
PWMR
T
PWMF
T
f
External
PWM Duty
Int. Dimming Function
100%
T
Minimun
Duty
off2
T
off1
12
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(
)
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
ERX0(+/-)
ERX1(+/-)
ERX2(+/-)
ERX3(+/-)
ERXC(+/-)
ORX0(+/-)
ORX1(+/-)
ORX2(+/-)
ORX3(+/-)
ORXC(+/-)
RPF
ODSEL1
ODSEL2
GND
VBL
GND
V
GND
IG
SEL
E_PWM
I_PWM
BLON
CN1
(FI-X30SSL-HF (JAE))
INPUT CONNECTOR
POWER
CONNECTOR
(53261-1560
(Molex))
INVERTER
CONNECTOR
CN1:S12B-PH-SM3-TB
(D)(LF)
CN3:S10B-PH-SM3-TB
(D)(LF)
(Master)
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FRAME
BUFFER
TIMING
CONTROLLER
DC/DC CONVERTER
& REFERENCE
VOLTAGE
GENERATOR
CN4-CN27:SM02 (12.0)B-BHS-1-TB(LF)(JST)
BACKLIGHT
UNIT
CN28-CN31: SM20B-SHLS-TF(LF)
SCAN DRIVER
DATA DRIVER
CN2:S12B-PH-SM3-TB
Issued Date: Jan. 14, 2005
Model No.: V420H1-L01
Te n t a t iv e
TFT LCD PANEL
(1920x3x1080)
RSDS
CN2
INVERTER
CONNECTOR
(D)(LF)
(Slave)
VBL
GND
V
13
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10ERX0+ Even pixel, positive LVDS differential data input, channel 0
11 ERX1-Even pixel, negative LVDS differential data input, channel 1
12ERX1+ Even pixel, positive LVDS differential data input, channel 1
13ERX2-Even pixel, negative LVDS differential data input, channel 2
14ERX2+ Even pixel, positive LVDS differential data input, channel 2
15ECLK-Even pixel, negative LVDS differential clock input
16ECLK+ Even pixel, positive LVDS differential clock input
17ERX3-Even pixel, negative LVDS differential data input, channel 3
18ERX3+ Even pixel, positive LVDS differential data input, channel 3
19GNDGround
20ORX0-Odd pixel, negative LVDS differential data input, channel 0
21ORX0+ Odd pixel, positive LVDS differential data input, channel 0
22ORX1-Odd pixel, negative LVDS differential data input, channel 1
23ORX1+ Odd pixel, positive LVDS differential data input, channel 1
24ORX2-Odd pixel, negative LVDS differential data input, channel 2
25ORX2+ Odd pixel, positive LVDS differential data input, channel 2
26OCLK-Odd pixel, negative LVDS differential clock input
27OCLK+ Odd pixel, positive LVDS differential clock input
28ORX3-Odd pixel, negative LVDS differential data input, channel 3
29ORX3+ Odd pixel, positive LVDS differential data input, channel 3
30GNDGround
Overdrive Lookup Table Selection
Issued Date: Jan. 14, 2005
Model No.: V420H1-L01
Te n t a t iv e
Note
(3)
(4)
(5)
(4)
14
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Note (1) CNF1 Connector part no.: FI-X30SSL-HF (JAE) or equivalent.
Note (2) CNF2 Connector part no.: 53261-1560 (Molex) or equivalent.
Note (3) Low : normal display (default), High : display with 180 degree rotation
Note (4) Reserved for internal use. Please leave it open.
Note
(4)
Note (5) Overdrive lookup table selection. The overdrive lookup table should be selected in accordance with
the frame rate to optimize image quality.
ODSEL2ODSEL1Note
LLLookup table was optimized for 60 Hz frame rate.
LHLookup table was optimized for 50 Hz frame rate.
HLReserved. Do not use.
HHReserved. Do not use.
5.3 BACKLIGHT UNIT
The pin configuration for the housing and leader wire is shown in the table below.
CN4-CN27: BHR-04VS-1 (JST).
PinName Description Wire Color
1HVHigh Voltage Pink
2HVHigh Voltage White
Note (1) The backlight interface housing for high voltage side is a model BHR-04VS-1, manufactured by
JST. The mating header on inverter part number is SM02(12.0)B-BHS-1-TB(LF).
15
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Model No.: V420H1-L01
Te n t a t iv e
1 HV(White)
2 HV(Pink)
1 HV(White)
2 HV(Pink)
1 HV(White)
2 HV(Pink)
5.4 INVERTER UNIT
CN1-CN2 (Header):S12B-PH-SM3-TB (D)(LF)(JST) or equivalent.
Pin No. SymbolDescription
1
2
3
4
5
6
7
8
9
10
11
12
VBL+120V
NCNC
GNDGND
V
AUX
18V
Power input
DC
DC
1 HV(Pink)
2 HV(White)
1 HV(Pink)
2 HV(White)
1 HV(Pink)
2 HV(White)
CN3 (Header): S10B-PH-SM3-TB (D)(LF)(JST) or equivalent.
Pin No. SymbolDescription
1
2
3
4NCNC
5IGInverter Good Signal
6NCNC
7SEL
8E_PWM
9I_PWM
10BLONBacklight on/off control
GNDGND
Internal/external PWM selection
High : external dimming
Low : internal dimming
External PWM control signal
E_PWM should be connected to ground when internal PWM was selected (SEL
= low).
Internal PWM control signal
I_PWM should be connected to ground when external PWM was selected (SEL
= high).
16
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CN4-CN27 (Header): SM02(12.0)B-BHS-1-TB (LF)(JST)
Pin No. SymbolDescription
1
2
CN28-CN31 (Header): SM20B-SHLS-TF(LF)(JST)
Pin No. SymbolDescription
1Board to Board
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Note (1) Floating of any control signal is not allowed.
CCFL HOT
CCFL HOT
Control
Signal
CCFL high voltage
CCFL high voltage
Board to Board
Board to Board
Board to Board
Board to Board
Board to Board
Board to Board
Board to Board
Board to Board
Board to Board
Board to Board
Board to Board
Board to Board
Board to Board
Board to Board
Board to Board
Board to Board
Board to Board
Board to Board
Board to Board
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Model No.: V420H1-L01
Te n t a t iv e
17
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C
OB0
OG0
G0-EG
0
r
0
p
OB0
OG0
p
ORx0
0
G0-EG
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5.5 BLOCK DIAGRAM OF INTERFACE
CNF1
Issued Date: Jan. 14, 2005
Model No.: V420H1-L01
Te n t a t iv e
ER0-ER7
E
EB
-EB7
DE
OR0-OR7
-OG7
-OB7
D
LK
Host
Graphics
Controller
ERx0+
-
TxIN
ERx
ERx1+
7
ERx1-
ERx2+
ERx2-
ERx3+
ERx3-
51Ө
51Ө
51Ө
51Ө
51Ө
51Ө
51Ө
100pF
51Ө
100pF
100
100pF
RxOUT
ER0-ER7
F
E
EB
7
-EB7
DE
OR0-OR7
-OG7
-OB7
ECLK+
PLL
51Ө
-
100pF
51Ө
PLL
DCLK
Timing
ORx0+
-
ORx1+
ORx1-
51Ө
51Ө
51Ө
100pF
100
F
Controlle
ORx2+
ORx2-
ORx3+
ORx3-
OCLK+
PLL
LVDS Transmitter
51Ө
100pF
51Ө
51Ө
100pF
51Ө
51Ө
-
100pF
51Ө
LVDS Receiver
PLL
THC63LVDM83A
(LVDF83A)
18
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Model No.: V420H1-L01
Te n t a t iv e
ER0~ER7 : Even pixel R data
EG0~EG7 : Even pixel G data
EB0~EB7 : Even pixel B data
OR0~OR7 : Odd pixel R data
OG0~OG7: Odd pixel G data
OB0~OB7 : Odd pixel B data
DE : Data enable signal
DCLK : Data clock signal
Note (1) The system must have the transmitter to drive the module.
Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is
used differentially.
Note (3) Two pixel data send into the module for every clock cycle. The first pixel of the frame is even pixel and the
second pixel is odd pixel.
19
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Notes (1) RSVD(reserved)pins on the transmitter shall be “H” or “L”.
20
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5.7 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for
the color. The higher the binary input, the brighter the color. The table below provides the assignment of the
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Yellow
White
Red (0) / Dark
Red (1)
Red (2)
:
:
Red (253)
Red (254)
Red (255)
Green (0) / Dark
Green (1)
Green (2)
:
:
Green (253)
Green (254)
Green (255)
Blue (0) / Dark
Blue (1)
Blue (2)
:
:
Blue (253)
Blue (254)
Blue (255)
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
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Issued Date: Jan. 14, 2005
Model No.: V420H1-L01
Data Signal
RedGreen Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
1
1
0
1
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
0
0
0
0
0
0
:
:
0
0
0
:
:
:
:
:
:
0
1
1
1
1
1
1
0
1
1
1
1
1
1
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
1
1
1
1
0
0
0
0
0
0
:
:
0
0
0
0
0
0
0
0
0
1
0
1
:
:
1
0
0
1
1
1
0
0
0
0
0
0
:
:
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
Te n t a t iv e
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
:
:
:
:
:
:
:
:
1
1
0
1
1
1
1
0
1
1
1
1
21
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v
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
SignalItemSymbolMin.Typ. Max.UnitNote
LVDS Receiver Clock Frequency 1/Tc (60) 74(80) MHZ
LVDS Receiver Data
Vertical Active Display Term
Horizontal Active Display Term
Note (1) Since this module is operated in DE only mode, Hsync and Vsync input signals should be set to
Setup Time Tlvsu600--ps
Hold Time Tlvhd600--ps
Frame Rate
Total Tv (1115)1125 (1135) ThTv=Tvd+Tvb
DisplayTvd108010801080ThBlankTvb(35) 45 (55) ThTotal Th(2100)2200(2300) Tc Th=Thd+Thb
DisplayThd192019201920Tc BlankThb (180) 280 (380) Tc -
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Fr5475053Hz(2)
Fr
6576063Hz(3)
Issued Date: Jan. 14, 2005
Model No.: V420H1-L01
Te n t a t iv e
low logic level. Otherwise, this module would operate abnormally.
Note (2) (ODSEL2, ODSEL1) = (L,H). Please refer to 5.1 for detail information.
Note (3) (ODSEL2, ODSEL1) = (L,L). Please refer to 5.1 for detail information.
INPUT SIGNAL TIMING DIAGRAM
T
Tvd
DE
Th
DCLK
Tc
Thd
Thb
DE
Tvb
DATA
Valid display data (960 clocks)
22
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Љ
Љ
Љ
Љ
Љ
Љ
LVDS RECEIVER INTERFACE TIMING DIAGRAM
RXCLK+/-
RXn+/-
Tlvsu
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Issued Date: Jan. 14, 2005
Model No.: V420H1-L01
Te n t a t iv e
Tc
Tlvhd
1T
14
3T
14
5T
14
7T
14
9T
14
11T
14
13T
14
6.2 POWER ON/OFF SEQUENCE
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram
below.
Power Supply
V
0ЉT1Љ10ms
2
T
0
3
T
0
500ms
50ms
50ms
4
T
CC
Signals
0V
0V
0.9 VCC
0.1V
CC
Power On
T
1
T
T
2
3
VALID
Power Off
0.9 V
CC
0.1V
CC
T4
Backlight (Recommended)
500ms
100msЉT6
T5
50%
T
5
50%
T
6
Power ON/OFF
23
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Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.
Note (2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD
operation or the LCD turns off before the backlight turns off, the display may momentarily become
abnormal screen.
Note (3) In case of VCC is in off level, please keep the level of input signals on the low or high impedance.
Note (4) T4 should be measured after the module has been fully discharged between power off and on period.
Note (5) Interface signal shall not be kept at high impedance when the power is on.
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Te n t a t iv e
24
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
ItemSymbolValue Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Lamp Current I
Oscillating Frequency (Inverter) F
Frame Rate Fr60Hz
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should be
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CC
L
L
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Model No.: V420H1-L01
25r2
50r10
18V
(5.0r0.5)
(54r3)
Te n t a t iv e
o
C
%RH
mA
KHz
measured under the test conditions described in 7.1 and stable environment shown in Note (6).
ItemSymbolCondition Min.Typ. Max.UnitNote
Contrast Ratio CR(900)-Note (2)
Response Time
Center Luminance of White L
White Variation
Cross Talk CT(4)% Note (5)
Red
Green
Color
Chromaticity
Blue
White
Color Gamut
Viewing
Horizontal
Angle
Vertica l
Gray to
gray
C
GW
=0q, TY =0q
T
Rx (0.65) Ry
x
Viewing Normal Angle
Gx
Gy
Bx
By
(8)msNote (3)
(550)cd/m2Note (4)
(1.3)-Note (7)
(0.33)
(0.27)
(0.59)
(0.14)
(0.07)
Wx0.285Wy0.293-
(75) %
Tx+
T
x
TY+
T
Y
CRt20
-
(80) (88)
(80) (88)
(80) (88)
(80) (88)
-
Note (6)
-
-
-
Deg.Note(1)
25
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Note (1) Definition of Viewing Angle (Tx, Ty):
Viewing angles are measured by Eldim EZ-Contrast 160R
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Normal
Tx = Ty = 0º
yTy-
T
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Model No.: V420H1-L01
Te n t a t iv e
TX- = 90º
6 o’clock
T
y- = 90º
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L255 / L0
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
CR = CR (5)
CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (7).
x-
y-
Tx
Tx
y+
12 o’clock direction
T
y+ = 90º
x+
T
X+ = 90º
26
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A
A
Note (3) Definition of Gray to Gray Switching Time:
Drive signal
of LCD Panel
100%
90%
Optical
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Model No.: V420H1-L01
Te n t a t iv e
Time
Response
10%
0%
Gray to gray
switching time
The driving signal means the signal of gray level 0, 63, 127, 191, 255.
Note (4) Definition of Luminance of White (L
Measure the luminance of gray level 255 at center point and 5 points
L
= L (5)
C
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
AVE
L (x) is corresponding to the luminance of the point X at the figure in Note (7).
Note (5) Definition of Cross Talk (CT):
CT = | Y
– YA | / YAu 100 (%)
B
Where:
Y
= Luminance of measured location without gray level 0 pattern (cd/m2)
A
Y
= Luminance of measured location with gray level 0 pattern (cd/m2)
B
Gray to gray
Time
switching time
, L
):
C
AVE
Y
(D/8,W/2)
A, L
Y
(D/2,7W/8)
A, D
(0, 0)
ctive Area
Gray 128
Y
A, U
Y
A, R
(D,W)
(D/2,W/8)
(7D/8,W/2)
(D/4,W/4)
Y
(D/8,W/2)
B, L
Y
(D/2,7W/8)
B, D
(0, 0)
ctive Area
Gray 0
Gray 0
Gray 128
27
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Y
(D/2,W/8)
B, U
Y
(7D/8,W/2)
B, R
(3D/4,3W/4)
(D,W)
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Note (6) Measurement Setup:
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting backlight for 1 hour in a windless room.
LCD Module
LCD Panel
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Model No.: V420H1-L01
Te n t a t iv e
Center of the Screen
Note (7) Definition of White Variation (GW):
Measure the luminance of gray level 255 at 5 points
GW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
Display Color Analyzer
(Minolta CA210)
Light Shield Room
(Ambient Luminance < 2 lux)
Horizontal Line
D
3D/4D/2D/4
W
W/4
W/2
5
21
X
: Test Point
X=1 to 5
Vertical Line
3W/4
Active Area
43
28
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Issued Date: Jan. 14, 2005
Model No.: V420H1-L01
Te n t a t iv e
8. PRECAUTIONS
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) It is recommended to assemble or to install a module into the user’s system in clean working areas.
The dust and oil may cause electrical short or worsen the polarizer.
(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.
(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMOS LSI chips.
(5) Do not plug in or pull out the I/F connector while the module is in operation.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.
(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD
modules in the specified storage conditions.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of CCFL will be higher than that of room
temperature.
8.2 SAFETY PRECAUTIONS
(1) The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while
assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
29
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9. MECHANICALCHARA
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Te n t a t iv e
࡛ભሽٝڶૻֆ
%*+/'+
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࡛ભሽٝڶૻֆ
%*+/'+
31
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