CMO V420B1-L04 Specification

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TFT LCD Approval Specification

MODEL NO.: V420B1 - L04

Customer: _________________________________

Approved by:_______________________________

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Issue Date:Apr.24.2007

Model No.: V420B1-L04

Approval

Note:

TV Head Division

Approved By

LY C hen

Reviewed By

QRA Dept. Product Development Div.

Tomy Chen WT Lin

Prepared By

LCD TV Marketing and Product Management Div.

Ken Wu CY Chang

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Model No.: V420B1-L04

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CONTENTS

REVISION HISTORY ..................................................................................................................................................4

1. GENERAL DESCRIPTION......................................................................................................................................5

1.1 OVERVIEW....................................................................................................................................................5

1.2 FEATURES ....................................................................................................................................................5

1.3 APPLICATION................................................................................................................................................5

1.4 GENERAL SPECIFICATIONS ........................................................................................................................5

1.5 MECHANICAL SPECIFICATIONS ..................................................................................................................6

2. ABSOLUTE MAXIMUM RATINGS ...........................................................................................................................7

2.1 ABSOLUTE RATINGS OF ENVIRONMENT....................................................................................................7

2.2 ELECTRICAL ABSOLUTE RATINGS..............................................................................................................8

2.2.1 TFT LCD MODULE...............................................................................................................................8

2.2.2 BACKLIGHT INVERTER UNIT .............................................................................................................8

2.3 ENVIRONMENT TEST CONDITION...............................................................................................................9

3. ELECTRICAL CHARACTERISTICS ......................................................................................................................10

3.1 TFT LCD MODULE.......................................................................................................................................10

3.2 BACKLIGHT UNIT........................................................................................................................................12

3.2.1 CCFL (Cold Cathode Fluorescent Lamp) CHARACTERISTICS...........................................................12

3.2.2 INVERTER CHARACTERISTICS .......................................................................................................12

3.2.3 INVERTER INTERFACE CHARACTERISTICS...................................................................................14

4. BLOCK DIAGRAM OF INTERFACE ......................................................................................................................16

4.1 TFT LCD MODULE.......................................................................................................................................16

5. INPUT TERMINAL PIN ASSIGNMENT..................................................................................................................17

5.1 TFT LCD Module Input .................................................................................................................................17

5.2 BACKLIGHT UNIT........................................................................................................................................18

5.3 INVERTER UNIT..........................................................................................................................................19

5.4 BLOCK DIAGRAM OF INTERFACE .............................................................................................................21

5.5 LVDS INTERFACE ....................................................................................................................................... 22

5.6 COLOR DATA INPUT ASSIGNMENT............................................................................................................23

6. INTERFACE TIMING............................................................................................................................................. 24

6.1 INPUT SIGNAL TIMING SPECIFICATIONS..................................................................................................24

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6.2 POWER ON/OFF SEQUENCE..................................................................................................................... 27

7. OPTICAL CHARACTERISTICS.............................................................................................................................28

7.1 TEST CONDITIONS .....................................................................................................................................28

7.2 OPTICAL SPECIFICATIONS........................................................................................................................28

8. PRECAUTIONS ....................................................................................................................................................32

8.1 ASSEMBLY AND HANDLING PRECAUTIONS .............................................................................................32

8.2 SAFETY PRECAUTIONS.............................................................................................................................32

9. REGULATORY STANDARD ..................................................................................................................................33

9.1 SAFETY.......................................................................................................................................................33

9.2 EMC.............................................................................................................................................................33

10. DEFINITION OF LABELS....................................................................................................................................34

10.1 CMO MODULE LABEL...............................................................................................................................34

11. PACKAGING .......................................................................................................................................................35

11.1 PACKAGING SPECIFICATIONS.................................................................................................................35

11.2 PACKAGING METHOD ..............................................................................................................................35

12. MECHANICAL CHARACTERISTICS...................................................................................................................37

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REVISION HISTORY

Version Date

Ver.1.0

Ver.1.1

Apr.24,’07

Jun. 21, 07

Jun. 21, 07

Page
(New)

All

29
37

36

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Section Description

All

7.2
12

11.2

Approval Specification was first issued.

Notes(2) drawing combine with Notes(6).
Add ME parts assembly suggest drawing.

Figure.11-2 Packing method amend.

Issue Date:Apr.24.2007

Model No.: V420B1-L04

Approval

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1. GENERAL DESCRIPTION

1.1 OVERVIEW

V420B1-L04 is a 42” TFT Liquid Crystal Display module with 20-CCFL Backlight unit and 1ch-LVDS interface.

This module supports 1366 x 768 HDTV format and can display true 16.7M colors (8-bit/color). The inverter

module for backlight is built-in.

1.2 FEATURES

Ё

High brightness (500 nits)

Ё

High contrast ratio (1500:1)

Ё

Fast response time (Gray to gray average 6 ms)

Ё

High color saturation (CIE1976 85% NTSC)

Ё

HDTV (1366 x 768 pixels) resolution, true HDTV format

Ё

DE (Data Enable) only mode

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Model No.: V420B1-L04

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Ё

LVDS (Low Voltage Differential Signaling) interface

Ё

Auto frame rate detection for 60/50Hz

Ё

Optimized response time for 60/50 Hz frame rate

Ё

Ultra wide viewing angle : Super MVA technology

Ё

180 degree rotation display option

Ё

RoHS compliance

1.3 APPLICATION

Ё

Standard Living Room TVs.

Ё

Public Display Application.

Ё

Home Theater Application.

Ё

MFM Application.

1.4 GENERAL SPECIFICATIONS

Item Specification Unit Note

Active Area 930.246(H) x 523.008 (V) (42.02” diagonal) mm

Bezel Opening Area 938.3 (H) x 531.3 (V) mm

Driver Element a-si TFT active matrix - -

Pixel Number 1366 x R.G.B. x 768 pixel -

(1)

Pixel Pitch(Sub Pixel) 0.227 (H) x 0.681 (V) mm -

Pixel Arrangement RGB vertical stripe - -

Display Colors 16.7M color -

Display Operation Mode Transmissive mode / Normally black - -

Surface Treatment Anti-Glare coating, Hard coating (3H) - (2)

Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and back outlines.

Note (2) The spec. of the surface treatment is temporarily for this phase. CMO reserves the rights to change this

feature.

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1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal (H) 982.0 983.0 984.0 mm

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Issue Date:Apr.24.2007

Model No.: V420B1-L04

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Module Size

Weight 12800 12900 13000 g -

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

Note (2) Module Depth does not include connectors.

Vertical (V) 575.0 576.0 577.0 mm

Depth (D) 51.3 52.3 53.3 mm

(1), (2)

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2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

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Issue Date:Apr.24.2007

Model No.: V420B1-L04

Approval

Item Symbol

Storage Temperature TST -20 +60 ºC (1)

Operating Ambient Temperature TOP 0 50 ºC (1), (2)

Shock (Non-Operating) SNOP - 50 G (3), (5)

Vibration (Non-Operating) VNOP - 1.0 G (4), (5)

Note (1) Temperature and relative humidity range is shown in the figure below.

(a) 90 %RH Max. (Ta

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

(d) 40 ºC 95% RH is for reference

Note (2) The maximum operating temperature is based on the test condition that the surface temperature of

display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.

Thermal management should be considered in final product design to prevent the surface temperature of

display area from being over 65 ºC. The range of operating temperature may degrade in case of

improper thermal management in final product design.

Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.

Љ

40 ºC).

Min. Max.

Value

Unit Note

Note (4) 10 ~ 500 Hz, 60 min, 1 time each X, Y, Z.

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that

the module would not be twisted or bent by the fixture.

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2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

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Issue Date:Apr.24.2007

Model No.: V420B1-L04

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Item Symbol

Power Supply Voltage VCC -0.3 6.0 V

Logic Input Voltage VIN -0.3 3.6 V

2.2.2 BACKLIGHT INVERTER UNIT

Item Symbol

Lamp Voltage VW

Power Supply Voltage VBL 0 30 V (1)

Ё

Control Signal Level

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

Note (2) No moisture condensation or freezing.

Note (3) The control signals include On/Off Control, Internal/External PWM Control, Amplitude Dimming Control

and Internal/External PWM Selection.

Min. Max.

Min. Max.

Ё

-0.3 7 V (1), (3)

Value

Value

3000 VRMS

Unit Note

(1)

Unit Note

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2.3 ENVIRONMENT TEST CONDITION

No Test Item Codition

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Issue Date:Apr.24.2007

Model No.: V420B1-L04

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1 High temperature storage test

2 Low temperature storage test

High temperature high humidity storage

3

test

4 High temperature operation test

5 Low temperature operation test

High temperature high humidity operation

6

test

7 Thermal shock

8 Vibration test (non-operation)

9 Shock test (non-operation)

10 ESD

11 Package vibration

12 Package drop

Ta = 6 0

Ta = -25

Ta = 5 0
(40

Ta= 5 0

Ta =0

Ta= 4 0

Ta= -25

Wave form: Sine wave
Vibration level: 1.0G
Fre. range : 10~500Hz
Duration: X, Y, Z, 60min,
One time each direction

Wave form: half sine wave, 11ms
Shock level: 50G



One time each direction
Storage: Contact mode +/-20kV,

Air mode +/-20kV
Operation: Contact mode +/-20kV,
Air mode +/-20kV
Condition: 150pF, 330ohm

Wave form: Sine wave
Vibration level: 1.0G
Fre. range : 5~50Hz
Duration: 15min for X, Y, 60 min for Z.
One time each direction

Drop 1 corner, 3 sides, 6 faces, each one for 1 time.
Height is 30cm. (Test environment: 25

к

, 500hrs

к

, 500hrs

к

, 90%RH 500hrs

к

95%RH 500hrs judge for reference)

к

, 500hrs

к

, 500hrs

к

, 95%RH 500hrs

к

/ 60min ~ 60к/ 60min, 100cycles

X, Y,  Z,

к

)

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3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE

(Ta = 25 ± 2 ºC)

Parameter Symbol

Power Supply Voltage VCC 4.5 5 5.5 V (1)

Power Supply Ripple Voltage VRP - - 350 mV

Rush Current IRUSH - - 4.5 A (2)

White - 1.48 2.1 A

Power Supply Current

Black - 0.77 - A

Vertical Stripe

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Min. Typ. Max.

-

-

-

- 1.47 - A

Issue Date:Apr.24.2007

Model No.: V420B1-L04

Approval

Value

Unit Note

(3)

Differential Input High Threshold
Voltage

Differential Input Low Threshold
LVDS
Interface

CMOS
interface

Note (1) The module should be always operated within the above ranges.

Note (2) Measurement condition:

Voltage

Common Input Voltage VLVC 1.1 1.25 1.4 V

Terminating Resistor RT - 100 - ohm

Input High Threshold Voltage VIH 2.4 - 3.3 V

Input Low Threshold Voltage VIL 0 - 0.7 V

VLVTH - - 100 mV

VLVTL -100 - - mV

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Vcc rising time is 470us

Vcc

0.9Vcc

GND

Note (3) The specified power supply current is under the conditions at Vcc = 5 V, Ta = 25 ± 2 ºC, fv = 60 Hz,

whereas a power dissipation check pattern below is displayed.

a. White Pattern

0.1Vcc

470 us

b. Black Pattern

Active Area

c. Vertical Stripe Pattern

Active Area

Active Area

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3.2 BACKLIGHT UNIT

3.2.1 CCFL (Cold Cathode Fluorescent Lamp) CHARACTERISTICS

(Ta = 25 ± 2 ºC)

Issue Date:Apr.24.2007

Model No.: V420B1-L04

Approval

Parameter Symbol

Min. Typ. Max.

Lamp Input Voltage VL - 1520 - VRMS -

Lamp Current IL 5.3 5.8 6.3 mARMS (1)

- - 2370 VRMS Ta = 0 ºC

Lamp Turn On Voltage VS

- - 2160 VRMS Ta = 25 ºC

Operating Frequency FL 40 - 70 KHz

Lamp Life Time LBL 50,000 60,000 - Hrs (2)

3.2.2 INVERTER CHARACTERISTICS

(Ta = 25 ± 2 ºC)

Parameter Symbol

Min. Typ. Max.

Power Consumption PBL - 170 180 W (5), IL =5.8mA

Power Supply Voltage VBL 22.8 24.0 26.4 VDC

Value

Unit Note

Value

Unit Note

Power Supply Current IBL - 7.1 7.5 A Non Dimming

Input Inrush Current - - - 11 Apeak

Input Ripple Noise - - - 912 mVP-P VBL=22.8V

Oscillating Frequency FW 47 50 53 kHz

Dimming frequency FB 150 160 170 Hz

Minimum Duty Ratio DMIN - 25 - %

Note (1) Lamp current is measured by utilizing AC current probe and its value is average by measuring master

and slave board.

Note (2) The lamp starting voltage VS should be applied to the lamp for more than 1 second after startup.

Otherwise the lamp may not be turned on.

Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the display input

signals, and it may result in line flow on the display. In order to avoid interference, the lamp frequency

should be detached from the horizontal synchronous frequency and its harmonics as far as possible.

Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and the

effective discharge length is longer than 80% of its original length (Effective discharge length is defined

as an area that has equal to or more than 70% brightness compared to the brightness at the center point

of lamp.) as the time in which it continues to operate under the condition at Ta = 25 ±2

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and IL =6.0~

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7.0mArms.

Note (5) The power supply capacity should be higher than the total inverter power consumption PBL. Since the

pulse width modulation (PWM) mode was applied for backlight dimming, the driving current changed as

PWM duty on and off. The transient response of power supply should be considered for the changing

loading when inverter dimming.

Note (6)

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Model No.: V420B1-L04

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Inverter

(Master)

A
A

A
A

A
A

A
A

A
A

A
A

A
A

A
A

HV (White -)

1

HV(Pink -)

2

HV (White +)

1

HV(Pink +)

2

HV (White -)

1

HV(Pink -)

2

HV (White +)

1

HV(Pink +)

2

HV (White -)

1

HV(Pink -)

2

HV (White +)

1

HV(Pink +)

2

HV (White -)

1

HV(Pink -)

2

HV (White +)

1

HV(Pink +)

2

LCD Module

HV (Pink +)
HV (White +)

HV (Pink -)
HV (White -)

HV (Pink +)
HV (White +)

HV (Pink -)
HV (White -)

HV (Pink +)
HV (White +)

HV (Pink -)
HV (White -)

HV (Pink +)
HV (White +)

HV (Pink -)
HV (White -)

A

1
2

A

A

1
2

A

A

1
2

A

A

1
2

A

A

1
2

A

A

1
2

A

A

1
2

A

A

1
2

A

Inverter
(Slavor)

A
A

A
A

HV(Blue -)

1

HV (Pink -)

2

HV(Blue +)

1

HV (Pink +)

2

HV (Pink +)
HV (White +)

HV (Pink -)
HV (White -)

A

1
2

A

A

1
2

A

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3.2.3 INVERTER INTERFACE CHARACTERISTICS

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Issue Date:Apr.24.2007

Model No.: V420B1-L04

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Parameter Symbol

On/Off Control Voltage

ON

VBLON

OFF

Internal/External PWM
Select Voltage

HI

VSEL

LO

Internal PWM Control
Voltage

External PWM Control
Voltage

Amplitude dimming

MAX

MIN VSEL = H

VPDIM

HI

LO

Max

Typ

VADI M

Min

Control Signal Rising Time Tr

Control Signal Falling Time Tf

VBL Rising Time Tr1

VBL Falling Time Tf1

PWM Delay Time TPWM

Input impedance RIN

BLON Delay Time Ton

BLON Off Time Toff

Te st

Condition

Ё

Ё

Ё

Ё

VSEL =H

VSEL = L

Min. Typ. Max.

2.0

0

3.0 3.3 3.6 V

0

Ё

Ё

3.0 3.3 3.6 V

VSEL = L 0

Ё

Ё

Ё

Ё

Ё

Ё

Ё

Ё

Ё

Ё

Ё

Ё

Ё

Ё

Ё

Ё

30

30

100

1

300

300

Value

Ё

Ё

Ё

3.3

0

Ё

3.3

1.6

0

Ё

Ё

Ё

Ё

Ё

Ё

Ё

Ё

Unit Note

3.3 V

0.8 V

Open/High (3.3V):

Internal PW M dimming.

0.8 V

Ё

Ё

0.8 V

Ё

Ё

Ё

GND: External PWM

dimming

Max. Duty Ratio

V

V

Min. Duty Ratio

ON Duration

OFF Duration

110% Luminanc e

V

Open/1.6V: 100%

V

Luminance

80% Luminance

V

100 ms

100 ms

50 ms

50 ms

300 ms

Ё

MΩ

500 ms

500 ms

Note (1) The power sequence and control signal timing are shown in the following figure.

Note (2) The power sequence and control signal timing must follow the figure below. For a certain reason, the

inverter has a possibility to be damaged with wrong power sequence and control signal timing.

Note (3) VADIM (amplitude dimming) is control signal for Inverter’s output power to backlight lamp bulb. Input

signal should be able to control amplitude of Inverter output voltage. From 0V to 3.3V, Inverter output

voltage should be able to vary to control brightness of lamp from 80% to110% luminance variation.

Approximate 1.6V might be 100% luminance control point.

Note (4) VPDIM is PWM duty control input for +3.3V TTL level signal or DC voltage by Pin 14 input. This input

signal is (a) continuous pulse signal with +3.3V, TTL level signal spec, or (b) DC power with 0~3.3V. If

this is Open or +3.3V, 100% duty (i.e. +3.3V, DC level), backlight should perform 100% luminance. Duty

ratio of this input signal should be proportional relationship in certain range of control without any kind of

inherent side effect like waterfall effect on screen. Guaranteed duty range and dimming ratio should be

specified with supplementary measurement result.

Note (5) Pin 14 is the selection pin for PWM control method; if this pin is connected to GND, VPDIM input of Pin

13 should have logic level duty signal for PWM control. If this is set to High or Open, Pin 13 should have

DC level signal therefore the Inverter should have Saw Tooth Wave Generator to generate internal PWM

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signal. Default setting is “Not Connected”, Pin 13 of PWM control should have DC Level signal for PWM.

Note (6) Pin 14 vs. Pin 11/13 control function table:

Pin 11

Pin 14 = GND

Pin 14 = Open/High

V

BL

(DC Power Control Duty Amplitude)
Function Always Turn On
Default: Open/1.6V: 100%

GND: 80%;
Open/1.6V: 100%;
High (3.3V) 110%, Luminance

Tr1

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Model No.: V420B1-L04

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Pin 13
Default: Open/High: 100%

External PWM
(AC Signal Control Duty)
Internal PWM
(DC Power Control Duty)

Tf1

V

V

V

BLON

V

SEL

EPWM

IPWM

V

Toff

2.0V

0.8V

2.0V

0.8V

2.0V

0.8V

3.0V

PWM

Period

Ton

Backlight on duration

Tr

Ext. Dimming Function

T

PWMR

PWM

T

Tf

PWMF

T

External

PWM Duty

Int. Dimming Function

0

0

0

0

0

W

External

100%

Minimun

Duty

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4. BLOCK DIAGRAM OF INTERFACE

4.1 TFT LCD MODULE

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Model No.: V420B1-L04

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RX0(+/-)

RX1(+/-)

RX2(+/-)

RX3(+/-)

CLK(+/-)

SELLVDS

Vcc

GND

CN1

VBL

GND

VSEL

VADIM

VPDIM

BLON

INPUT CONNECTOR

FI-X30SS L-H F(JAE)

INVERTER

CONNECTOR

CN1: S14B-PH-SM3-

TB(D)(LF) or equivalent

(Master)

FRAME

BUFFER

TIMING

CONTROLLER

DC/DC CONVERTER &

REFERENCE

VOLTAGE

GENERATOR

CN24, CN26: 528521070(Molex)

BACKLIGHT

UNIT

CN3, CN18: SM02(12.0)B-BHS-

1-TB(LF) (JST) or equivalent

SCAN DRIVER

TFT LCD PANEL

1366 X 3 X 768

DATA DRIVER(RSDS)

INVERTER

CONNECTOR

CN2: S12B-PH-SM3-

TB(D) (LF ) or equivalent

(Slave)

CN201

CN2

VBL

GND

CN23, CN25: 528521070(Molex)

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5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD Module Input

Pin Name Description Note

1 VCC +5V power supply

2 VCC +5V power supply

3 VCC +5V power supply

4 VCC +5V power supply

5 GND Ground

6 GND Ground

7 GND Ground

8 GND Ground or Open

9 SELLVDS LVDS data format Selection (2)

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10 GND Ground

11 GND Ground

12 RX0- Pixel Negative LVDS differential data input. Channel 0

13 RX0+ Pixel Positive LVDS differential data input. Channel 0

14 GND Ground

15 RX1- Pixel Negative LVDS differential data input. Channel 1

16 RX1+ Pixel Positive LVDS differential data input. Channel 1

17 GND Ground

18 RX2- Pixel Negative LVDS differential data input. Channel 2

19 RX2+ Pixel Positive LVDS differential data input. Channel 2

20 GND Ground

21 CLK- Pixel Negative LVDS differential clock input.

22 CLK+ Pixel Positive LVDS differential clock input.

23 GND Ground

24 RX3- Pixel Negative LVDS differential data input. Channel 3

25 RX3+ Pixel Positive LVDS differential data input. Channel 3

26 GND Ground

27 N.C. Ground or Open (3)

28 N.C. Ground or Open (3)

29 GND Ground or Open

30 GND Ground or Open

Note (1) Connector part No: FI-X30SSL-HF (JAE).

Note (2) Low : VESA LVDS Format, High or open : JEIDA LVDS Format (default).

Note (3) Reserved for internal use. We stongly suggest it open.

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5.2 BACKLIGHT UNIT

The pin configuration for the housing and the leader wire is shown in the table below.

CN3-CN22: BHR-04VS-1 (JST).

Pin Name Description Wire Color

1 HV High Voltage Pink

2 HV High Voltage White

Note (1) The backlight interface housing for high voltage side is a model BHR-04VS-1, manufactured by JST. The

mating header on inverter part number is SM02(12.0)B-BHS-1-TB(LF).

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1 HV(White)

2 HV(Pink )

1 HV(White)

2 HV(Pink )

1 HV(White)

2 HV(Pink )

1 HV(Pink )

2 HV(White)

1 HV(Pink )

2 HV(White)

1 HV(Pink )

2 HV(White)

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5.3 INVERTER UNIT

CN1: S14B-PH-SM3-TB(D)(LF)(JST) or equivalent

Pin № Symbol Feature

1

2

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3

4

5

6

7

8

9

10

11 VADI M

12 BLON BL ON/OFF

13 VPDIM Open/High (+3.3V, 100% Duty) for 100% Luminance.

14 VSEL

CN201: S12B-PH-SM3-TB(D)(LF)(JST) or equivalent

Pin № Symbol Feature

VBL +24V

GND GND

GND: 80% Luminance;
Open/1.6V: 100% Luminance;
High (3.3V) 110% Luminance,

GND: External PWM dimming;
Open/High (3.3V): Internal PWM dimming.

1

2

3

4

5

6

7

8

9

10

11 NC NC

12 NC NC

VBL +24V

GND GND

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CN3-CN22: SM02(12.0)B-BHS-1-TB(LF)(JST) or equivalent

Pin № Symbol Description

1 CCFL HOT CCFL high voltage

2 CCFL HOT CCFL high voltage

CN23-CN26: 528521070 (Molex)

Pin № Symbol Description

1 Board to Board

2 Board to Board

3 Board to Board

4 Board to Board

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Model No.: V420B1-L04

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5 Board to Board

6 Board to Board

7 Board to Board

8 Board to Board

9 Board to Board

10

Note (1) Floating of any control signal is not allowed.

Control Signal

Board to Board

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5.4 BLOCK DIAGRAM OF INTERFACE

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Model No.: V420B1-L04

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TxIN RxOUT

Rx0 +

50Ω

100pF

Rx0 -

R0 Ω R7

Ω

G7

G0

Rx1 +

50Ω

50Ω

100pF

R0 Ω R7

G0

Rx1 -

B0

Ω

B7

Rx2 +

DE

50Ω

50Ω

100pF

B0

DE

Rx2 -

50Ω

Rx3 +

50Ω

100pF

Rx3 -

50Ω

50Ω

50Ω

100pF

DCLK
Timing
Controller

LVDS Receiver

Host
Graphic
Controller

PLL PLL

CLK +

CLK -

LVDS Transmitter

Ω

Ω

G7

B7

THC63LVDM83A

(LVDF83A)

R0~R7: Pixel R data

G0~G7: Pixel G data

B0~B7: Pixel B data

DE: Data enable signal

DCLK: Data clock signal

Note (1) The system must have the transmitter to drive the module.

Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is

used differentially.

THC63LVDF84

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5.5 LVDS INTERFACE

TRANSMITTER

SIGNAL

THC63LVDM83A INTERFACE CONNECTOR

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Model No.: V420B1-L04

RECEIVER

THC63LVDF84A

Issue Date:Apr.24.2007

Approval

TFT CONTROL INPUT

LVDS_SEL

=L or OPEN

24
bit

R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5
B0
B1
B2
B3
B4
B5
DE
R6
R7
G6
G7
B6

B7
RSVD 1
RSVD 2
RSVD 3

LVDS_SEL

= H

R2
R3
R4
R5
R6

R7
G2
G3
G4
G5
G6
G7

B2

B3

B4

B5

B6

B7
DE
R0
R1
G0
G1

B0

B1

RSVD 1
RSVD 2
RSVD 3

PIN INPUT Host TFT-LCD PIN OUTPUT

51
52
54
55
56

3
4
6

7
11
12
14
15
19
20
22
23
24
30
50

2

8
10
16
18
25
27
28

TxIN0
TxIN1
TxIN2
TxIN3
TxIN4
TxIN6
TxIN7
TxIN8

TxIN9
TxIN12
TxIN13
TxIN14
TxIN15
TxIN18
TxIN19
TxIN20
TxIN21
TxIN22
TxIN26
TxIN27

TxIN5
TxIN10
TxIN11
TxIN16
TxIN17
TxIN23
TxIN24
TxIN25

TA OUT0+

TA OUT0-

TA OUT1+

TA OUT1-

TA OUT2+

TA OUT2-

TA OUT3+

TA OUT3-

Rx 0+

Rx 0-

Rx 1+

Rx 1-

Rx 2+

Rx 2-

Rx 3+

Rx 3-

27
29
30
32
33
35
37
38
39
43
45
46
47
51
53
54
55

1
6

7
34
41
42
49
50

2

3

5

Rx OUT0
Rx OUT1
Rx OUT2
Rx OUT3
Rx OUT4
Rx OUT6
Rx OUT7
Rx OUT8

Rx OUT9
Rx OUT12
Rx OUT13
Rx OUT14
Rx OUT15
Rx OUT18
Rx OUT19
Rx OUT20
Rx OUT21
Rx OUT22
Rx OUT26
Rx OUT27

Rx OUT5
Rx OUT10
Rx OUT11
Rx OUT16
Rx OUT17
Rx OUT23
Rx OUT24
Rx OUT25

LVDS_SEL

=L or OPEN

R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5

B0
B1
B2
B3
B4

B5
DE
R6
R7
G6
G7

B6

B7
NC
NC
NC

LVDS_SEL

= H

R2
R3
R4
R5
R6
R7
G2
G3
G4
G5
G6
G7
B2
B3
B4
B5
B6
B7

DE

R0

R1
G0
G1

B0

B1
NC
NC
NC

DCLK 31 TxCLK IN TxCLK OUT+

R0~R7: Pixel R Data (7; MSB, 0; LSB)

G0~G7: Pixel G Data (7; MSB, 0; LSB)

B0~B7: Pixel B Data (7; MSB, 0; LSB)

DE : Data enable signal

DCLK : Data clock signal

Notes: (

1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.

TxCLK OUT-

22

RxCLK IN+

RxCLK IN-

26 RxCLK

OUT

DCLK

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5.6 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the color.

The higher the binary input, the brighter the color. The table below provides the assignment of the color versus

data input.

Color

R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0

Black
Red
Green

Basic

Colors

Scale

Green

Scale

Scale

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Blue
Cyan
Magenta
Yellow
White
Red (0) / Dark
Red (1)
Red (2)

Red

:

Gray

:
Red (253)
Red (254)
Red (255)
Green (0) / Dark
Green (1)
Green (2)
:

Gray

:
Green (253)
Green (254)
Green (255)
Blue (0) / Dark
Blue (1)
Blue (2)

Blue

:

Gray

:
Blue (253)
Blue (254)
Blue (255)

0

0

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

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Data Signal

Red Green Blue

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

1

1

1

1

0

1

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

0

0

0

0

0

1

1

1

1

1

1

0

1

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

0

0

0

0

:

:

:

:

0

0

0

0

0

0
0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

1

0

:

:

:

:

:

:

:

:

:

:

1

1

0

1
1
1

0

1

1

1

1

1

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6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

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Model No.: V420B1-L04

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LVDS Receiver
Clock

LVDS Receiver
Data

Vertical
Active Display
Term

Horizontal
Active Display
Term

Frequency 1/Tc 60 86 88 MHZ -

Input cycle to
cycle jitter

Setup Time Tlvsu 400 - - ps -

Hold Time Tlvhd 400 - - ps -

Frame Rate

Total Tv 778 795 980 Th

Display Tvd 768 768 768 Th -

Blank Tvb 10 27 212 Th -

Total Th 1442 1798 1936 Tc

Display Thd 1366 1366 1366 Tc -

Blank Thb 76 432 570 Tc -

Trcl - - 200 ps -

57 60 63 Hz

47 50 53 Hz

Tv=Tvd+T vb

Th=Thd+Thb

Note : Since the module is operated in DE only mode, Hsync and Vsync input signals should be set to low logic

level. Otherwise, this module would operate abnormally.

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INPUT SIGNAL TIMING DIAGRAM

Tvb Tvd

DE

Th

DCLK

Tc

DE

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Model No.: V420B1-L04

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Tv

Thb Thd

Data

Valid display data (1366 clocks)

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LVDS INPUT INTERFACE TIMING DIAGRAM

RXCLK +

RXn +/-

Tlvsu Tlvhd

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Model No.: V420B1-L04

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Tc

1T
14

3T

14

5T
14

7T
14

9T
14

11T

14

13T

14

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6.2 POWER ON/OFF SEQUENCE

To prevent a latch-up or DC operation of LCD module, the power on/off sequence should follow the diagram

below.

POWER ON/OFF SEQUENCE

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0.9 Vcc

Power Supply
Vcc

0.1 Vcc

0 V

T1 T2 T3

Signal Valid

0 V

Power ON Power OFF

0.9 Vcc

0.1 Vcc

0.1 Vcc

T4

0.5ЉT1Љ 20 ms

ЉT2Љ

T5 T 6

Backlight (Recommended)

Љ
Љ

T5
T6

50% 50%

500 ms
100 ms

Note.

The supply voltage of the external system for the module input should follow the definition of Vcc.

Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD operation or

0

Љ

0
300 ms

T3

Љ

50 ms

T4

the LCD turns off before the backlight turns off, the display may momentarily become abnormal screen.

In case of VCC is in off level, please keep the level of input signals on the low or high impedance.

T4 should be measured after the module has been fully discharged between power off and on period.

Interface signal shall not be kept at high impedance when the power is on.

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7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit

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Model No.: V420B1-L04

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Ambient Temperature Ta

Ambient Humidity Ha

Supply Voltage VCC 5 V

Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"

Lamp Current IL

Oscillating Frequency (Inverter) FW

Vertical Frame Rate Fr 60 Hz

25±2

50±10

5.8±0.5

50±3

oC

%RH

mA

KHz

7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should be

measured under the test conditions described in 7.1 and stable environment shown in Note (5).

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR 1200

Response Time

Center Luminance of White LC 400

White Variation

Gray to

Gray

δW

1500

6

500

- Note (2)

12 ms Note (3)

cd/m2Note (4)

1.25

- Note (6)

Red

Green

Color
Chromaticity

Viewing Angle

Note (1) Definition of Viewing Angle (θx, θy):

Viewing angles are measured by Eldim EZ-Contrast 160R

Blue

White

Color Gamut C.G

Horizontal

Vertical

Rx

Ry 0.333 -

Gx

Gy

Bx

By

Wx

Wy

θx+

θx-

θY+

θY-

=0°, θY =0°

θ

x

Viewing Angle

at Normal Direction

CR≥20

Typ.

-0.03

81

80

80

80

80

0.644

0.272

0.591

0.143

0.070

0.280

0.285

85

88

88

88

88

-

-

Typ.

+0.03

%

-

-

-

-

-

Deg. Note (1)

Note (5)

CIE

1976

NTSC

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θX- = 90º

x-

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Normal

θ x = θ y = 0º

y-

θ

θx−

θ

y+

θ x+

y+

ϗclock direction

12 o

θy+ = 90º

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Model No.: V420B1-L04

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ϗclock

6 o

y-

θy- = 90º

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculate by following expression

Contrast Ratio (CR) = L255/L0

L255 : Luminance of gray level 255

L0 : Luminance of gray level 0

CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (6)

x+

θX+ = 90º

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Note (3) Definition of Gray-to-Gray Switching Time:

The driving signal means the signal of luminance 0%, 20%, 40%, 60%, 80%, 100%.

Gray to gray average time means the average switching time of luminance 0%, 20%, 40%, 60%, 80%,

100% to each other.

Optical Response

100 %

90 %

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10 %

0 %

Time

Gray to Gray

Switching Time

Note (4) Definition of Luminance of White (LC, LAVE):

Measure the luminance of gray level 255 at center point and 9 points

LC = L (5), where L (X) is corresponding to the luminance of the point X at the figure in Note (6).

Note (5) Measurement Setup:

The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature

change during measuring. In order to stabilize the luminance, the measurement should be executed after

lighting backlight for 1 hour in a windless room.

LCD Module

LCD Panel

Center of the Screen

Gray to Gray

Switching Time

Display Color Analyzer

Light Shield Room

(Ambient Luminance < 2 lux)

(Minolta CA210)

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Note (6) Definition of White Variation (δW):

Measure the luminance of gray level 255 at 9 points

δW = Maximum [L (1), L (2), L (3), L (4), L (5), L (6), L (7), L (8), L (9)] / Minimum [L (1), L (2), L (3), L (4),

L (5), L (6), L (7), L (8), L (9)]

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Horizontal Line

D

D

6

W

6

W

2

W

Vertical Line

1 2

4

D

2

3

X

5

6

Test point :

X = 1 ~ 9

7 8 9

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8. PRECAUTIONS

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

[ 1 ] Do not apply rough force such as bending or twisting to the module during assembly.

[ 2 ] It is recommended to assemble or to install a module into the user’s system in clean working areas. The

dust and oil may cause electrical short or worsen the polarizer.

[ 3 ] Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.

[ 4 ] Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the

damage and latch-up of the CMOS LSI chips.

[ 5 ] Do not plug in or pull out the I/F connector while the module is in operation.

[ 6 ] Do not disassemble the module.

[ 7 ] Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and easily

scratched.

[ 8 ] Moisture can easily penetrate into LCD module and may cause the damage during operation.

[ 9 ] When storing modules as spares for a long time, the following precaution is necessary.

[ 9.1 ] Do not leave the module in high temperature, and high humidity for a long time. It is highly

recommended to store the module with temperature from 0 to 35

condensation.

[ 9.2 ] The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or

fluorescent light.

[ 10 ] When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the

response time will become slow, and the starting voltage of CCFL will be higher than that of room

temperature.

8.2 SAFETY PRECAUTIONS

[ 1 ] The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while

assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit.

[ 2 ] If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of

contact with hands, skin or clothes, it has to be washed away thoroughly with soap.

[ 3 ] After the module’s end of life, it is not harmful in case of normal operation and storage.

к

at normal humidity without

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9. REGULATORY STANDARD

9.1 SAFETY

Regulatory Item Standard

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Issue Date:Apr.24.2007

Model No.: V420B1-L04

Approval

UL UL 60065: 2003

Audio / Video Apparatus

9.2 EMC

[ 1 ] FFC class B part15.

[ 2 ] CISPR20.

Note (1) CMO product can support to meet FFC class B part15 and CISPR20 standard.

cUL CAN/CSA C22.2 No.60065-03

CB IEC 60065:2001

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10. DEFINITION OF LABELS

10.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

Model Name: V420B1-L04

CHI MEI

OPTOELECTRONICS

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V420B1 -L04 Rev. XX

X X X X X X X Y M D L N N N N

Issue Date:Apr.24.2007

Model No.: V420B1-L04

Approval

E207943

MADE IN TAIWAN

RoHS

Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.

Serial ID: X X X X X X X Y M D L N N N N

Serial ID includes the information as below:

Manufactured Date:

Year: 0~9, for 2000~2009

Month: 1~9, A~C, for Jan. ~ Dec.

Day: 1~9, A~Y, for 1st to 31st, exclude I ,O, and U.

Serial No.

Product Line

Year, Month, Date

CMO Internal Use

CMO Internal Use

Revision

CMO Internal Use

Revision Code: Cover all the change

Serial No.: Manufacturing sequence of product

Product Line: 1 -> Line1, 2 -> Line 2, …etc.

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11. PACKAGING

11.1 PACKAGING SPECIFICATIONS

3 LCD TV modules / 1 Box

Box dimensions: 1080(L) X 282 (W) X 685(H)

Weight: approximately 45Kg (3 modules per box)

11.2 PACKAGING METHOD

Figures 10-1 and 10-2 are the packing method.

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Issue Date:Apr.24.2007

Model No.: V420B1-L04

Approval

LCD TV Module

3pcs Drier

Cushion(Bottom)

Anti-static Bag

Carton

PP Belt

Carton Label

Figure.11-1 packing method

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Issue Date:Apr.24.2007

Model No.: V420B1-L04

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Sea / Land Transportation (40ft HQ Container)

(L1000*50*50mm)

Film

(L1250*50*50mm)

Air Transportation &

Sea / Land Transportation (40ft Container)

(L1000*50*50mm)

Film

(L1150*W1085*H140mm)

(L1250*50*50mm)

Figure.11-2 Packing method

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12. MECHANICAL CHARACTERISTICS

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Issue Date:Apr.24.2007

Model No.: V420B1-L04

Approval

࡛ભሽ՗ٝڶૻֆ׹

CHI MEI

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Issue Date:Apr.24.2007

Model No.: V420B1-L04

Approval

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Issue Date:Apr.24.2007

Model No.: V420B1-L04

Approval

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CHI MEI

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