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Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
REVISION HISTORY
Version Date
Ver 1.0 Jun 07,2007 AllAllPreliminary Specification is first issued
Page
(New)
Section Description
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
N170C4 - L01 is a 17.0” TFT Liquid Crystal Display module with two CCFLs Backlight unit and 30 pins
LVDS interface. This module supports 1440 x 900 Wide-XGA+ mode and can display 262,144 colors. The
optimum viewing angle is at 6 o’clock direction. The inverter module for Backlight is not built in.
1.2 FEATURES
- Thin and High Brightness
- WXGA+ (1440 x 900 pixels) resolution
- DE only mode
- 3.3V LVDS (Low Voltage Differential Signaling) interface with 2 pixel/clock
- 2 CCFLs
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Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
1.3 APPLICATION
- TFT LCD Notebook
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note
Active Area 367.2 (H) x 229.5 (V) (17.0” diagonal) mm
Bezel Opening Area 370.7 (H) x 232.8 (V) mm
Driver Element a-si TFT active matrix - Pixel Number 1440 x R.G.B. x 900 pixel Pixel Pitch 0.255 (H) x 0.255 (V) mm Pixel Arrangement RGB vertical stripe - Display Colors 262,144 color Transmissive Mode Normally white - Surface Treatment Hard coating (3H), Glare Type - -
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal (H) 381.7 382.2 382.7 mm
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Vertical (V) 247 247.5 248 mm
Depth (D) --- --- 7.0 mm
Weight --- 710 725 g -
(1)
(1)
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2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 +50 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The temperature of panel display surface area should be 0 ºC Min. and 60 ºC Max...
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Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
Value
Min. Max.
- 200/2 G/ms (3), (5)
NOP
- 1.5 G (4), (5)
NOP
Unit Note
Relative Humidity (%RH)
100
90
80
60
Operating Range
40
20
10
Storage Range
Temperature (ºC)
Note (3) 1 time for ± X, ± Y, ± Z. for Condition (200G / 2ms) is half Sine Wave.
8060-20400 20-40
Note (4) 10 ~ 500 Hz, 0.5 Hr / Cycle, 1 cycles for each X, Y, Z axis.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture.
The fixing condition is shown as below:
LCD Module
Side Mount Fixing Screw
gap=2mm
Bracket
Side Mount Fixing Screw
Stage
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2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage VCC -0.3 +4.0 V
Logic Input Voltage VIN -0.3 VCC+0.3 V
2.2.2 BACKLIGHT UNIT
Item Symbol
Lamp Voltage V
Lamp Current I
Lamp Frequency F
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
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Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
Value
Min. Max.
Value
Min. Max.
L
L
L
Ё
Ё
Ё
2.5K V
(6.0) mA
80 KHz
Unit Note
(1)
Unit Note
(1), (2), IL = 6.0 mA
RMS
RMS
(1), (2)
should be restricted to the conditions described under Normal Operating Conditions.
Note (2) Specified values are for lamp (Refer to 3.2 for further information).
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Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max.
Power Supply Voltage Vcc 3.0 3.3 3.6 V Permissive Ripple Voltage VRP 100 mV Rush Current I
1.5 A (2)
RUSH
Initial Stage Current IIS 1.0 A (2)
Power Supply Current
LVDS Differential Input High Threshold V
LVDS Differential Input Low Threshold V
White(450) (480) mA(3)a
Black
Icc
TH(LVDS)
TL(LVDS)
(570) (600) mA (3)b
+100 mV
-100 mV
LVDS Common Mode Voltage VCM 1.125 1.375 V (5)
LVDS Differential Input Voltage |VID| 100 600 mV (5)
Terminating Resistor RT 100 Ohm
Power per EBL WG P
- (4.52) - W (4)
EBL
Note (1) The module should be always operated within above ranges.
Value
Unit Note
V
V
(5),
=1.2V
CM
(5)
=1.2V
CM
Note (2) I
I
: the maximum current when VCC is rising
RUSH
: the maximum current of the first 100ms after power-on
IS
Measurement Conditions: Shown as the following figure. Test pattern: black.
(High to Low)
(Control Signal)
SW
+12V
+3.3V
R1
47K
R2
1K
VR1
C1
1uF
47K
Q1 2SK1475
FUSE
Q2
2SK1470
C2
0.01uF
Vcc rising time is 470us
C3
1uF
Vcc
(LCD Module Input)
470us
+3.3V
0.9Vcc
100ms
I
Rush
0.1Vcc
I
IS
0V
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Vcc
Icc
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|
|
|
|
Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, fv = 60
Hz, whereas a power dissipation check pattern below is displayed.
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Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
a. White Pattern
Active Area
Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input
power. Test conditions are as follows.
(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f
(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file
(d) The inverter used is provided from Sumida. Please contact them for detail information. CMO
= 60 Hz,
v
b. Black Pattern
Active Area
doesn’t provide the inverter in this product.
Note (5) The parameters of LVDS signals are defined as the following figures.
CM
V
Single Ended
0V
V
Differential
0V
V
VID
VID
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Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max.
Lamp Input Voltage VL (675) (750) (825) V
Lamp Current IL (2.0) (6.0) (6.5) mA
Lamp Turn On Voltage V
S
ЁЁ
ЁЁ
Operating Frequency FL 50
Lamp Life Time LBL (12,000)
Power Consumption P
L
Ё
Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:
Value
o
(1290) (25
(1560) (0
Ё
C)V
o
C)V
80 KHz (3)
ЁЁ
(9.0)
Ё
Unit Note
I
RMS
(1)
RMS
(2)
RMS
(2)
RMS
Hrs (5)
W (4), I
Preliminary
= 6.0 mA
L
= 6.0 mA
L
Note (2) The voltage shown above should be applied to the lamp for more than 1 second after startup.
Otherwise the lamp may not be turned on.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency from the
display, and this may cause line flow on the display. In order to avoid interference, the lamp
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.
Note (4) P
= ILVLx2
L
Note (5) The lifetime of lamp is defined as the time when it continues to operate under the conditions at Ta
= 25 2
o
C and IL = 6.0 mA
until one of the following events occurs:
RMS
(a) When the brightness becomes Љ 50% of its original value.
(b) When the effective ignition length becomes Љ 80% of its original value. (Effective ignition
length is defined as an area that the brightness is less than 70% compared to the center point.)
Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the
inverter must have specifications for the modularized lamp. The performance of the Backlight,
such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for
the lamp. All the parameters of an inverter should be carefully designed to avoid generating too
much current leakage from high voltage output of the inverter. When designing or ordering the
inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the
inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module
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should be operated in the same manners when it is installed in your instrument.
Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its
leakage current.
a. The asymmetry rate of the inverter waveform should be 10% below;
b. The distortion rate of the waveform should be within Ѕ2 ± 10%;
c. The ideal sine wave form shall be symmetric in positive and negative polarities.
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Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
* Asymmetry rate:
I p
I -p
| I
* Distortion rate
I
– I –p | / I
p
(or I –p) / I
p
rms
rms
* 100%
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4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
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Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
LVDSDisplay
Data & Clock
Vcc
GND
Data
EDID
CLK
EDID
V
EDID
VL
TIMING CONTROLLER
INPUT CONNECTOR
DC/DC CONVERTER &
REFERENCE VOLTAGE
LAMP CONNECTOR
LVDS INPUT /
GENERATOR
EDID
EEPROM
SCAN DRIVER IC
TFT LCD PANEL
DATA DRIVER IC
BACKLIGHT UNIT
4.2 BACKLIGHT UNIT
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5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin Symbol Description Polarity Remark
1 Vss Ground
2 Vcc Power Supply +3.3 V (typical)
3 Vcc Power Supply +3.3 V (typical)
4 V
5 NC Non-Connection
6 CLK
7 DATA
8 RXO0- LVDS Differential Data Input (Odd) Negative
9 RXO0+ LVDS Differential Data Input (Odd) Positive
10 Vss Ground
11 RXO1- LVDS Differential Data Input (Odd) Negative
12 RXO1+ LVDS Differential Data Input (Odd) Positive
13 Vss Ground
14 RXO2- LVDS Differential Data Input (Odd) Negative
15 RXO2+ LVDS Differential Data Input (Odd) Positive
16 Vss Ground
17 RXOC- LVDS Clock Data Input (Odd) Negative
18 RXOC+ LVDS Clock Data Input (Odd) Positive
19 Vss Ground
20 RxE0- LVDS Differential Data Input (Even) Negative
21 RxE0+ LVDS Differential Data Input (Even) Positive
22 Vss Ground
23 RxE1- LVDS Differential Data Input (Even) Negative
24 RxE1+ LVDS Differential Data Input (Even) Positive
25 Vss Ground
26 RxE2- LVDS Differential Data Input (Even) Negative
27 RxE2+ LVDS Differential Data Input (Even) Positive
28 Vss Ground
29 RXEC- LVDS Clock Data Input (Even) Negative
30 RXEC+ LVDS Clock Data Input (Even) Positive
DDC 3.3V Power
EDID
DDC Clock
EDID
DDC Data
EDID
Note (1) Connector Part No.: JAE-FI-XB30SRL-HF11 or equivalent
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Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
Note (2) User’s connector Part No: JAE-FI-X30C2L or equivalent
Note (3) The first pixel is odd as shown in the following figure.
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5.2 BACKLIGHT UNIT
PinSymbolDescription Color
1 HV High Voltage Pink
2 LV Ground Black
1 HV High Voltage White
2 LV Ground Black
Note (1) Connector Part No.: JST-BHSR-02VS-1 or equivalent
Note (2) User’s connector Part No.: JST-SM02B-BHSS-1-TB or equivalent
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Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
RXOC+
T/7
RXO2+/-
RXO1+/-
RXO0+/-
RXEC+
RXE2+/-
IN20 IN19 IN18IN17IN16 IN15 IN14
DE OB5OB4OB3 OB2Vsync Hsync
IN13 IN12 IN11IN10IN9IN8 IN7
OB1 OG4OG3OG2 OG1OB0 OG5
IN6 IN5 IN4IN3IN2IN1 IN0
OG0 OR3OR2OR1 OR0OR5 OR4
Signal for 1 DCLK Cycle (T)
T/7
IN20 IN19 IN18IN17IN16 IN15 IN14
DE EB5EB4EB3 EB2Vsync Hsync
RXE1+/-
RXE0+/-
IN13 IN12 IN11IN10IN9IN8 IN7
EB1 EG4EG3EG2 EG1EB0 EG5
IN6 IN5 IN4IN3IN2IN1 IN0
EG0 ER3ER2ER1 ER0ER5 ER4
Signal for 1 DCLK Cycle (T)
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5.4 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for
the color. The higher the binary input, the brighter the color. The table below provides the assignment of
color versus data input.
Color
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black
Red
Green
Basic
Colors
Gray
Scale
Of
Red
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Yellow
White
Red(0)/Dark
Red(1)
Red(2)
38 25 Manufacturer’s reserved timings
39 26 Standard timing ID # 1
00 00000000
00 00000000
00 00000000
01 00000001
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Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
40 27 Standard timing ID # 1
41 28 Standard timing ID # 2
42 29 Standard timing ID # 2
43 2A Standard timing ID # 3
44 2B Standard timing ID # 3
45 2C Standard timing ID # 4
46 2D Standard timing ID # 4
47 2E Standard timing ID # 5
48 2F Standard timing ID # 5
49 30 Standard timing ID # 6
50 31 Standard timing ID # 6
51 32 Standard timing ID # 7
52 33 Standard timing ID # 7
53 34 Standard timing ID # 8
54 35 Standard timing ID # 8
55 36 Detailed timing description # 1 Pixel clock (“88.75 MHz”)
56 37 # 1 Pixel clock (hex LSB first)
57 38 # 1 H active (“1440”)
58 39 # 1 H blank (“160”)
59 3A # 1 H active : H blank (“1440 : 160”)
60 3B # 1 V active (”900”)
61 3C # 1 V blank (”26”)
62 3D # 1 V active : V blank (”900 : 26”)
63 3E # 1 H sync offset (”48”)
64 3F # 1 H sync pulse width (”32”)
65 40 # 1 V sync offset : V sync pulse width (”3 : 6”)
# 1 H sync offset : H sync pulse width : V sync offset : V sync width (”48 : 32 :
66 41
67 42 # 1 H image size (”367 mm”)
68 43 # 1 V image size (”230 mm”)
69 44 # 1 H image size : V image size (”367 : 230”)
70 45 # 1 H boarder (”0”)
71 46 # 1 V boarder (”0”)
72 47 # 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol Negatives
73 48 Detailed timing description # 2
74 49 # 2 Flag
75 4A # 2 Reserved
76 4B # 2 FE (hex) defines ASCII string (Model Name “N170C4-L01”, ASCII)
77 4C # 2 Flag
78 4D # 2 1st character of name (“N”)
79 4E # 2 2nd character of name (“1”)
80 4F # 2 3rd character of name (“7”)
81 50 # 2 4th character of name (“0”)
82 51 # 2 5th character of name (“C”)
83 52 # 2 6th character of name (“4”)
84 53 # 2 7th character of name (“-”)
85 54 # 2 8th character of name (“L”)
86 55 # 2 9th character of name (“0”)
87 56 # 2 10th character of name (“1”)
88 57 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
3 : 6”)
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
AB 10101011
22 00100010
A0 10100000
A0 10100000
50 01010000
84 10000100
1A 00011010
30 00110000
30 00110000
20 00100000
36 00110110
00 00000000
6F 01101111
E6 111 00110
10 00010000
00 00000000
00 00000000
18 00011000
00 00000000
00 00000000
00 00000000
FE 11111110
00 00000000
4E 01001110
31 00110001
37 00110111
30 00110000
43 01000011
34 00110100
2D 00101101
4C 01001100
30 00110000
31 00110001
0A 00001010
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Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
89 58 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
90 59 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
95 5E # 3 Flag
96 5F # 3 1st character of string (“C”)
97 60 # 3 2nd character of string (“M”)
98 61 # 3 3rd character of string (“O”)
99 62 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
100 63 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
101 64 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
102 65 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
103 66 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
104 67 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
105 68 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
106 69 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
107 6A (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
108 6B (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
124 7B (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
125 7C (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
126 7D (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
127 7E Extension flag
128 7F Checksum A0 10100000
20 00100000
20 00100000
00 00000000
00 00000000
00 00000000
FE 11111110
00 00000000
43 01000011
4D 01001101
4F 01001111
0A 00001010
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
00 00000000
00 00000000
00 00000000
FE 11111110
00 00000000
01001110
00110001
00110111
00110000
01000011
00110100
00101101
01001100
30 00110000
31 00110001
0A 00001010
20 00100000
20 00100000
00 00000000
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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item SymbolMin. Typ. Max. Unit Note
DCLK Frequency 1/Tc 4244.552MHz(2)
Vertical Total Time TV 910 926 980 TH -
Vertical Active Display Period TVD 900 900 900 TH -
DE
Note (1) Because this module is operated by DE only mode, Hsync and Vsync are ignored.
(2) 2 channels LVDS input.
Vertical Active Blanking Period TVB TV-TVD26 TV-TVD TH
Horizontal Total Time TH 760 800 880 Tc (2)
Horizontal Active Display Period THD 720 720 720 Tc (2)
Horizontal Active Blanking Period THB
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TH-THD
80
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
TH-THD
Tc (2)
DE
DCLK
TC
DE
DATA
6.2 POWER ON/OFF SEQUENCE
Power On
90%
INPUT SIGNAL TIMING DIAGRAM
HD
T
Power Off
90%
t7
Restart
Power Supply
for LCD, Vcc
- Interface Signal
(LVDS Signal of
Transmitter), V
I
- Power for Lamp
0V
0V
10%
10%
t1
t4
t3t2
Valid Data
t6t5
50%50%
ONOFF OFF
10%
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Timing Specifications:
0.5 Љ t1 Љ 10 ms
0 Љ t2 Љ 50 ms
0 Љ t3 Љ 50 ms
t4 Њ 500 ms
t5 Њ 200 ms
t6 Њ 200 ms
Note (1) Please avoid floating state of interface signal at invalid period.
Note (2) When the interface signal is invalid, be sure to pull down the power supply of LCD Vcc to 0 V.
Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the
interface signal is valid. The Backlight inverter power must be turned off before the power supply
for the logic and the interface signal is invalid.
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Model No.: N170C4 - L01
Preliminary
Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To
avoid this phenomenon, we suggest that the Vcc falling time is better to follow 5Љt7Љ300 ms.
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC 3.3 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Inverter Current IL (6.0) mA
Inverter Driving Frequency FL (61) KHz
Inverter( Darfon VK.12164.101)
The relative measurement methods of optical characteristics are shown in 7.2. The
following items should be measured under the test conditions described in 7.1 and stable
environment shown in Note (6).
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25r2
50r10
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
o
C
%RH
7.2 OPTICAL SPECIFICATIONS
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR(450)(600)- - (2), (5)
Response Time
Central Luminance of White LC (240)(300) cd/m2(4), (5)
White Variation
Red
Color
Chromaticity
Viewing Angle
Green
Blue
White
Horizontal
Vertical
TR - (3)(8)ms
- (7)(12) ms
T
F
5pts- - (1.40) - (5), (6)
GW
Rx
Ry
Gx
Gy
Bx
By
Wx
Wy
Tx+
T
x
TY+
T
Y
=0q, TY =0q
T
x
Viewing Normal
Angle
TYP
-0.03
(60) (70) -
-
-
CRt10
(60) (70) (50) (60) (50) (60) -
(0.643)
(0.349)
(0.281)
(0.609)
(0.142)
(0.068)
0.313
0.329
TYP
+0.03
Deg.
-
-
-
-
-
-
-
-
(3)
(1)
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Note (1) Definition of Viewing Angle (Tx, Ty):
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Model No.: N170C4 - L01
Preliminary
Normal
Tx = Ty = 0º
Ty-Ty
TX- = 90º
6 o’clock
T
y- = 90º
x-
y-
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L63 / L0
L63: Luminance of gray level 63
L 0: Luminance of gray level 0
CR = CR (5)
CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (5).
Tx
Tx
12 o’clock direction
y+
T
y+ = 90º
x+
TX+ = 90º
Note (3) Definition of Response Time (T
100%
90%
Optical
Response
10%
0%
T
R
66.67 ms
, TF) and measurement method:
R
T
F
66.67 ms
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500
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Doc No.: 1406Z330
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Preliminary
Note (4) Definition of Average Luminance of White (L
Measure the luminance of gray level 63 at 5 points
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
AVE
L (x) is corresponding to the luminance of the point X at Figure in Note (6).
Note (5) Measurement Setup:
The LCD module should be stabilized at given temperature for 15 minutes to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting Backlight for 15 minutes in a windless room.
LCD Module
LCD Panel
USB2000
AVE
):
CS-1000T
Center of the Screen
Note (6) Definition of White Variation (GW):
Measure the luminance of gray level 63 at 5 points
GW
= Maximum [L (1) ~ L (5)] / Minimum [L (1) ~ L (5)]
5p
W/4
W/2
W
Vertical Line
3W/4
mm
Light Shield Room
(Ambient Luminance < 2 lux)
Horizontal Line
D
D/4D/23D/4
12
5
3
4
X
: Test Point
X=1 to 5
Active Area
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Preliminary
8. PRECAUTIONS
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) To assemble or install module into user’s system can be only in clean working areas. The dust and oil
may cause electrical short or worsen the polarizer.
(3) It’s not permitted to have pressure or impulse on the module because the LCD panel and Backlight will
be damaged.
(4) Always follow the correct power sequence when LCD module is connecting and operating. This can
prevent damage to the CMOS LSI chips during latch-up.
(5) Do not pull the I/F connector in or out while the module is operating.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) It is dangerous that moisture come into or contacted the LCD module, because moisture may damage
LCD module when it is operating.
(9) High temperature or humidity may reduce the performance of module. Please store LCD module within
the specified storage conditions.
(10) When ambient temperature is lower than 10ºC may reduce the display quality. For example, the
response time will become slowly, and the starting voltage of CCFL will be higher than room
temperature.
8.2 SAFETY PRECAUTIONS
(1) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while
assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
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9. PACKING
9.1 CARTON
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Figure. 9-1 Packing method
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9.2 3$//(7)256($)5(,*+7
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Figure. 9-2 Packing method
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9.3 PALLET FOR AIR FREIGHT
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Figure. 9-3 Packing method
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Preliminary
10. DEFINITION OF LABELS
10.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.