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A
TFT LCD Approval Specification
MODEL NO.: N170C2 - L01
www.panelook.com
Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
Approval
Customer : Acer
pproved by :
Note :
2007-02-26
15:20:03 CST
2007-02-22
10:13:39 CST
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Approve by Dept.
Mgr.(QA RA)
Approve by
Director
tomy_chen(ຫةԫ
/52720/54140/43150)
teren_lin(ࣥո
/56910/36064)
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Department
Manager(QA RA)
Director Accept
Accept
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Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
Approval
- CONTENTS -
REVISION HISTORY ------------------------------------------------------- 3
1. GENERAL DESCRIPTION
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
------------------------------------------------------- 4
2. ABSOLUTE MAXIMUM RATINGS ------------------------------------------------------- 5
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
2.2.2 BACKLIGHT UNIT
3. ELECTRICAL CHARACTERISTICS ------------------------------------------------------- 7
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
4. BLOCK DIAGRAM ------------------------------------------------------- 11
4.1 TFT LCD MODULE
4.2 BACKLIGHT UNIT
5. INPUT TERMINAL PIN ASSIGNMENT ------------------------------------------------------- 12
5.1 TFT LCD MODULE
5.2 BACKLIGHT UNIT
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
5.4 COLOR DATA INPUT ASSIGNMENT
5.5 EDID CODE DATA STRUCTURE
6. INTERFACE TIMING ------------------------------------------------------- 18
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
6.2 POWER ON/OFF SEQUENCE
7. OPTICAL CHARACTERISTICS ------------------------------------------------------- 20
7.1 TEST CONDITIONS
7.2 OPTICAL SPECIFICATIONS
8. PRECAUTIONS ------------------------------------------------------- 24
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
8.2 SAFETY PRECAUTIONS
9. PACKING ------------------------------------------------------- 25
9.1 CARTON
9.2 PALLET
10. DEFINITION OF LABELS
10
.1 CMO MODULE LABEL
10.2 CMO CARTON LABEL
------------------------------------------------------- 26
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www.panelook.com
Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
Approval
REVISION HISTORY
Version Date
Ver. 3.0
Ver. 3.1
Ver. 3.2
Ver. 3.3
Jun. 21, ‘06
Jun. 28, ‘06
Oct. 27, ‘06
Feb. 16, ‘07
Page
(New)
All
8
18
26
27
20
Section Description
All
Approval Specification was first issued
3.1
6.1
10.1
10.2
7.2
Revise 2
Revise Vertical Active Blanking Period from 12 to 26
Revise Horizontal Active Blanking Period from 160 to 80.
Revise Label Description, add NingBo production site information
Revise Label Description, add NingBo production site information
Update “average luminance of white” min spec as 170nits
Update Panel Outline Drawing(Add lamp tape)
nd
signal figure from “Single Ended” to “Differential”.
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
N170C2 - L01 is a 17.0” TFT Liquid Crystal Display module with single CCFL Backlight unit and 30 pins
LVDS interface. This module supports 1440 x 900 Wide-XGA+ mode and can display 262,144 colors. The
optimum viewing angle is at 6 o’clock direction. The inverter module for Backlight is not built in.
1.2 FEATURES
- Thin and High Brightness
- WXGA + (1440 x 900 pixels) resolution
- DE only mode
- 3.3V LVDS (Low Voltage Differential Signaling) interface with 2 pixel/clock
- 1 CCFL
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Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
Approval
1.3 APPLICATION
- TFT LCD Notebook
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note
Active Area 367.2 (H) x 229.5 (V) (17.0” diagonal) mm
Bezel Opening Area 370.7 (H) x 233.0 (V) mm
Driver Element a-si TFT active matrix - Pixel Number 1440 x R.G.B. x 900 pixel Pixel Pitch 0.255 (H) x 0.255 (V) mm Pixel Arrangement RGB vertical stripe - Display Colors 262,144 color Transmissive Mode Normally white - Surface Treatment Hard coating (3H), Anti-Glare Type - -
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal (H) 381.7 382.2 382.7 mm
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Vertical (V) 244.0 244.5 245.0 mm
Depth (D) 5.9 6.2 6.5 mm
Weight --- 670 700 g -
(1)
(1)
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A
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 +50 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) (a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The temperature of panel display surface area should be 0 ºC Min. and 60 ºC Max.
Relative Humidity (%RH)
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Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
Approval
Value
Min. Max.
- 200/2 G/ms (3), (5)
NOP
- 1.5 G (4), (5)
NOP
Unit Note
100
90
80
60
Operating Range
40
20
10
Storage Range
Temperature (ºC)
Note (3) 1 time for ± X, ± Y, ± Z. for Condition (200G / 2ms) is half Sine Wave,.
Note (4) 10 ~ 500 Hz, 30 min/cycle,1cycles for each X, Y, Z axis.
8060-20 400 20-40
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid
enough so that the module would not be twisted or bent by the fixture.
The fixing condition is shown as below:
t Room Temperature
Side Mount Fixing Screw
Gap=2mm
Bracket
LCD Module
Side Mount Fixing Screw
Stage
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2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage VCC -0.3 +4.0 V
Logic Input Voltage VIN -0.3 VCC+0.3 V
2.2.2 BACKLIGHT UNIT
Item Symbol
Lamp Voltage VL -- 2.5K V
Lamp Current IL 2.0 7.0 mA
Lamp Frequency FL 45 80 KHz
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
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Value
Min. Max.
Value
Min. Max.
Unit Note
Unit Note
Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
Approval
(1)
(1), (2), IL = 6.0 mA
RMS
RMS
(1), (2)
should be restricted to the conditions described under Normal Operating Conditions.
Note (2) Specified values are for lamp (Refer to 3.2 for further information).
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K
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Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max.
Power Supply Voltage Vcc 3.0 3.3 3.6 V Ripple Voltage VRP - 100 - mV Rush Current I
Power Supply Current
White - 430 480 mA (3)a
Black
LVDS Differential Input High Threshold V
LVDS Differential Input Low Threshold V
- 1.5 - A (2)
RUSH
Lcc
TH(LVDS)
TL(LVDS)
- 560 610 mA (3)b
- - +100 mV
-100 - - mV
LVDS Common Mode Voltage VCM 1.125 - 1.375 V (5)
LVDS Differential Input Voltage |VID| 100 - 600 mV (5)
Terminating Resistor RT - 100 - Ohm
Power per EBL WG P
- 4.397 - W (4)
EBL
Note (1) The module should be always operated within above ranges.
Value
Unit Note
Approval
(5),
=1.2V
V
CM
(5),
=1.2V
V
CM
Note (2) I
I
: the maximum current when VCC is rising
RUSH
: the maximum current of the first 100ms after power-on
IS
Measurement Conditions: Shown as the following figure. Test pattern: black.
(High to Low)
(Control Signal)
SW
+12V
+3.3V
R1
47
R2
1K
VR1
C1
1u
F
47K
0.01uF
Q1
2SK147
5
Q2
2SK1470
C
2
FUSE
Vcc rising time is 470us
C3
1uF
Vcc
(LCD Module Input)
470us
0.9Vcc
+3.3V
Vcc
100ms
0V
0.1Vcc
I
Rush
I
IS
Icc
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|
|
|
|
Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, fv = 60
Hz, whereas a power dissipation check pattern below is displayed.
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Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
Approval
a. White Pattern
Active Area
Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input
power. Test conditions are as follows.
(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f
(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file
“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.
(c) Luminance: 60 nits.
(d) The inverter used is provided from Sumida. Please contact them for detail information. CMO
= 60 Hz,
v
b. Black Pattern
Active Area
doesn’t provide the inverter in this product.
Note (5) The parameters of LVDS signals are defined as the following figures.
CM
V
Single Ended
0V
V
Differential
0V
V
VID
VID
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Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max.
Lamp Input Voltage VL 705 785 855 V
Lamp Current IL 3.0 6.0 7.0 mA
Lamp Turn On Voltage V
S
- - 1290 (25oC) V
- - 1560 (0
Operating Frequency FL 45 - 80 KHz (3)
Lamp Life Time LBL 12,000 - - Hrs (5)
Power Consumption PL - 4.7 - W (4), IL = 6.0 mA
Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:
Value
o
C) V
Unit Note
I
RMS
(1)
RMS
(2)
RMS
(2)
RMS
Approval
= 6.0 mA
L
HV (White)
LCD
LV (Black)
Module
1
Inverter
2
A
Current Meter
Note (2) The voltage that must be larger than Vs should be applied to the lamp for more than 1 second
after startup. Otherwise the lamp may not be turned on.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency from the
display, and this may cause line flow on the display. In order to avoid interference, the lamp
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.
Note (4) P
L
= I
LVL
Note (5) The lifetime of lamp can be defined as the time in which it continues to operate under the condition
Ta = 25 2
o
C and IL = 6.0 mArms until one of the following events occurs:
(a) When the brightness becomes or lower than 50% of its original value.
(b) When the effective ignition length becomes or lower than 80% of its original value. (Effective
ignition length is defined as an area that has less than 70% brightness compared to the
brightness in the center point.)
Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the
inverter must have specifications for the modularized lamp. The performance of the Backlight,
such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for
the lamp. All the parameters of an inverter should be carefully designed to avoid generating too
much current leakage from high voltage output of the inverter. When designing or ordering the
inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the
inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module
should be operated in the same manners when it is installed in your instrument.
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The output of the inverter must have symmetrical (negative and positive) voltage waveform and
symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter,
which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may
produce interface with horizontal synchronous frequency and as a result this may cause beat on the
display. Therefore lamp frequency shall be as away possible from the horizontal synchronous
frequency and from its harmonics in order to prevent interference.
Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its
leakage current.
a. The asymmetry rate of the inverter waveform should be 10% below;
b. The distortion rate of the waveform should be within Ѕ2 ± 10%;
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Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
Approval
c. The ideal sine wave form shall be symmetric in positive and negative polarities.
* Asymmetry rate:
I p
I -p
| I
* Distortion rate
I
– I –p | / I
p
(or I –p) / I
p
rms
rms
* 100%
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)
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
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Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
Approval
(JAE-FI-XB30SRL-HF11)
LVDS Display
Data & Clock
Vcc
GND
Data
EDID
CLK
EDID
V
EDID
VL
INPUT CONNECTOR
LAMP CONNECTOR
(JST-BHSR-02VS-1)
4.2 BACKLIGHT UNIT
LVDS INPUT /
TIMING CONTROLLER
DC/DC CONVERTER &
REFERENCE VOLTAGE
GENERATOR
EDID
EEPROM
SCAN DRIVER IC
TFT LCD PANEL
DATA DRIVER IC
BACKLIGHT UNIT
1 HV (White)
2 LV (Black
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5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin Symbol Description Polarity Remark
1 Vss Ground
2 Vcc Power Supply +3.3 V (typical)
3 Vcc Power Supply +3.3 V (typical)
4 V
5 NC Non connection
6 CLK
7 DATA
8 RXO0- LVDS Differential Data Input (Odd) Negative
9 RXO0+ LVDS Differential Data Input (Odd) Positive
10 Vss Ground
11 RXO1- LVDS Differential Data Input (Odd) Negative
12 RXO1+ LVDS Differential Data Input (Odd) Positive
13 Vss Ground
14 RXO2- LVDS Differential Data Input (Odd) Negative
15 RXO2+ LVDS Differential Data Input (Odd) Positive
16 Vss Ground
17 RXOC- LVDS Clock Data Input (Odd) Negative
18 RXOC+ LVDS Clock Data Input (Odd) Positive
19 Vss Ground
20 RxE0- LVDS Differential Data Input (Even) Negative
21 RxE0+ LVDS Differential Data Input (Even) Positive
22 Vss Ground
23 RxE1- LVDS Differential Data Input (Even) Negative
24 RxE1+ LVDS Differential Data Input (Even) Positive
25 Vss Ground
26 RxE2- LVDS Differential Data Input (Even) Negative
27 RxE2+ LVDS Differential Data Input (Even) Positive
28 Vss Ground
29 RXEC- LVDS Clock Data Input (Even) Negative
30 RXEC+ LVDS Clock Data Input (Even) Positive
Note (1) Connector Part No.: JAE-FI-XB30SRL-HF11 or equivalent
DDC 3.3V Power
EDID
DDC Clock
EDID
DDC Data
EDID
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Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
Approval
Note (2) User’s connector Part No: JAE-FI-X30C2L or equivalent
Note (3) The first pixel is odd as shown in the following figure.
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5.2 BACKLIGHT UNIT
Pin Symbol Description Color
1 HV High Voltage White
2 LV Ground Black
Note (1) Connector Part No.: JST-BHSR-02VS-1 or equivalent
Note (2) User’s connector Part No.: JST-SM02B-BHSS-1-TB or equivalent
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
RXOC+
T/7
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Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
Approval
RXO2+/-
RXO1+/-
RXO0+/-
RXEC+
RXE2+/-
RXE1+/-
RXE0+/-
IN20 IN19 IN18 IN17 IN16 IN15 IN14
DE OB5 OB4 OB3 OB2Vsync Hsync
IN13 IN12 IN11 IN10 IN9 IN8 IN7
OB1 OG4 OG3 OG2 OG1OB0 OG5
IN6 IN5 IN4 IN3 IN2 IN1 IN0
OG0 OR3 OR2 OR1 OR0OR5 OR4
Signal for 1 DCLK Cycle (T)
T/7
IN20 IN19 IN18 IN17 IN16 IN15 IN14
DE EB5 EB4 EB3 EB2Vsync Hsync
IN13 IN12 IN11 IN10 IN9 IN8 IN7
EB1 EG4 EG3 EG2 EG1EB0 EG5
IN6 IN5 IN4 IN3 IN2 IN1 IN0
EG0 ER3 ER2 ER1 ER0ER5 ER4
Signal for 1 DCLK Cycle (T)
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5.4 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for
the color. The higher the binary input, the brighter the color. The table below provides the assignment of
color versus data input.
Color
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black
Red
Green
Basic
Colors
Gray
Scale
Of
Red
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Yellow
White
Red(0)/Dark
Red(1)
Red(2)
:
:
Red(61)
Red(62)
Red(63)
Green(0)/Dark
Green(1)
Green(2)
:
:
Green(61)
Green(62)
Green(63)
Blue(0)/Dark
Blue(1)
Blue(2)
:
:
Blue(61)
Blue(62)
Blue(63)
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
0
0
0
0
0
0
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Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
Approval
Data Signal
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
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5.5 EDID DATA STRUCTURE
The EDID (Extended Display Identification Data) data formats are to support displays as defined in the
VESA Plug & Display and FPDI standards.
Byte #
(decimal)
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
Byte #
(hex)
Field Name and Comments
0 Header
1 Header
2 Header
3 Header
4 Header
5 Header
6 Header
7 Header
8 EISA ID manufacturer name (“CMO”)
9 EISA ID manufacturer name (Compressed ASCII)
0A ID product code (N170C2-L01) 02
0B ID product code (hex LSB first; N170C2-L01) 17
0C ID S/N (fixed “0”)
0D ID S/N (fixed “0”)
0E ID S/N (fixed “0”)
0F ID S/N (fixed “0”)
10 Week of manufacture (fixed week code)
11 Year of manufacture (fixed year code)
12 EDID structure version # (“1”)
13 EDID revision # (“3”)
14 Video I/P definition (“digital”)
15 Active area horizontal 36.72cm 25
16 Active area vertical 22.95cm 17
17 Display Gamma (Gamma = ”2.2”)
18 Feature support (“Active off, RGB Color”)
19 Rx1 Rx0 Ry1 Ry0 Gx1 Gx0 Gy1 Gy0 69
1A Bx1 Bx0 By1 By0 Wx1 Wx0 Wy1 Wy0
1B Rx=0.571 92
1C Ry=0.334 55
1D Gx=0.330 54
1E Gy=0.567 91
1F Bx=0.152 27
20 By=0.132 21
21 Wx=0.313 50
22 Wy=0.329 54
23 Established timings 1
24 Established timings 2
25 Manufacturer’s reserved timings
26 Standard timing ID # 1
27 Standard timing ID # 1
28 Standard timing ID # 2
29 Standard timing ID # 2
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Doc No.: 1406Y119
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Model No.: N170C2 - L01
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Value
(hex)
00 00000000
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
00 00000000
0D 00001101
AF 10101111
00 00000000
00 00000000
00 00000000
00 00000000
0D 00001101
10 00010000
01 00000001
03 00000011
80 10000000
78 01111000
0A 00001010
35 00110101
00 00000000
00 00000000
00 00000000
01 00000001
01 00000001
01 00000001
01 00000001
Value
(binary)
00000010
00010111
00100101
00010111
01101001
10010010
01010101
01010100
10010001
00100111
00100001
01010000
01010100
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Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
Approval
Byte #
(decimal)
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
Byte #
(hex)
2A Standard timing ID # 3
2B Standard timing ID # 3
2C Standard timing ID # 4
2D Standard timing ID # 4
2E Standard timing ID # 5
2F Standard timing ID # 5
30 Standard timing ID # 6
31 Standard timing ID # 6
32 Standard timing ID # 7
33 Standard timing ID # 7
34 Standard timing ID # 8
35 Standard timing ID # 8
Detailed timing description # 1 Pixel clock (“88.75MHz”,
36
According to VESA CVT Rev1.1)
37 # 1 Pixel clock (hex LSB first)
38 # 1 H active (“1440”)
39 # 1 H blank (“160”)
3A # 1 H active : H blank (“1440 : 160”)
3B # 1 V active (”900”)
3C # 1 V blank (”26”)
3D # 1 V active : V blank (”900 :26”)
3E # 1 H sync offset (”48”)
3F # 1 H sync pulse width ("32”)
40 # 1 V sync offset : V sync pulse width (”3 : 6”)
# 1 H sync offset : H sync pulse width : V sync offset : V sync
41
width (”48: 32 : 3 : 6”)
42 # 1 H image size (”367 mm”) 6F
43 # 1 V image size (”230 mm”) E6
44 # 1 H image size : V image size (”367 : 230”)
45 # 1 H boarder (”0”)
46 # 1 V boarder (”0”)
# 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol
47
Negatives
48 Detailed timing description # 2
49 # 2 Flag
4A # 2 Reserved
# 2 FE (hex) defines ASCII string (Model Name “N170C2-L01”,
4B
ASCII)
4C # 2 Flag
4D # 2 1st character of name (“N”) 4E
4E # 2 2nd character of name (“1”) 31
4F # 2 3rd character of name (“7”) 37
50 # 2 4th character of name (“0”) 30
51 # 2 5th character of name (“C”) 43
52 # 2 6th character of name (“2”) 32
53 # 2 7th character of name (“-”) 2D
54 # 2 8th character of name (“L”) 4C
Field Name and Comments
Va l ue
(hex)
Value
(binary)
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
AB 10101011
22 00100010
A0 10100000
A0 10100000
50 01010000
84 10000100
1A 00011010
30 00110000
30 00110000
20 00100000
36 00110110
00 00000000
01101111
1110 0 110
10 00010000
00 00000000
00 00000000
18 00011000
00 00000000
00 00000000
00 00000000
FE 11111110
00 00000000
01001110
00110001
00110111
00110000
01000011
00110010
00101101
01001100
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Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
Approval
Byte #
(decimal)
85
86
87
88
89
90
91
92
93
94
95 5F # 3 1st character of string (“C”)
96 60 # 3 2nd character of string (“M”)
97 61 # 3 3rd character of string (“O”)
98 62 # 3 New line character indicates end of ASCII string
99 63 # 3 Padding with “Blank” character
100 64 # 3 Padding with “Blank” character
101 65 # 3 Padding with “Blank” character
102 66 # 3 Padding with “Blank” character
103 67 # 3 Padding with “Blank” character
104 68 # 3 Padding with “Blank” character
105 69 # 3 Padding with “Blank” character
106 6A # 3 Padding with “Blank” character
107 6B # 3 Padding with “Blank” character
108 6C Detailed timing description # 4
109 6D # 4 Flag
110 6E # 4 Reserved
111 6F
112 70 # 4 Flag
113 71 # 4 1st character of name (“N”) 4E
114 72 # 4 2nd character of name (“1”) 31
115 73 # 4 3rd character of name (“7”) 37
116 74 # 4 4th character of name (“0”) 30
117 75 # 4 5th character of name (“C”) 43
118 76 # 4 6th character of name (“2”) 32
119 77 # 4 7th character of name (“-”) 2D
120 78 # 4 8th character of name (“L”) 4C
121 79 # 4 9th character of name (“0”)
122 7A # 4 9th character of name (“1”)
123 7B # 4 New line character indicates end of ASCII string
124 7C # 4 Padding with “Blank” character
125 7D # 4 Padding with “Blank” character
126 7E Extension flag
127 7F Checksum
Byte #
(hex)
Field Name and Comments
55 # 2 9th character of name (“0”)
56 # 2 9th character of name (“1”)
57 # 2 New line character indicates end of ASCII string
58 # 2 Padding with “Blank” character
59 # 2 Padding with “Blank” character
5A Detailed timing description # 3
5B # 3 Flag
5C # 3 Reserved
5D # 3 FE (hex) defines ASCII string (Vendor “CMO”, ASCII)
5E # 3 Flag
# 4 FE (hex) defines ASCII string (Model Name“N170C2-L01”,
ASCII)
Va l ue
(hex)
Value
(binary)
30 00110000
31 00110001
0A 00001010
20 00100000
20 00100000
00 00000000
00 00000000
00 00000000
FE 11111110
00 00000000
43 01000011
4D 01001101
4F 01001111
0A 00001010
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
00 00000000
00 00000000
00 00000000
FE 11111110
00 00000000
01001110
00110001
00110111
00110000
01000011
00110010
00101101
01001100
30 00110000
31 00110001
0A 00001010
20 00100000
20 00100000
00 00000000
3D 00111101
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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
DCLK Frequency 1/Tc 25 44.5 60 MHz (2)
Vertical Total Time TV 910 926 1500 TH -
Vertical Active Display Period TVD 900 900 900 TH -
DE
Note (1) Because this module is operated by DE only mode, Hsync and Vsync are ignored.
(2) 2 channels LVDS input.
Vertical Active Blanking Period TVB TV-TVD 26 TV-TVD TH
Horizontal Total Time TH 760 800 880 Tc (2)
Horizontal Active Display Period THD 720 720 720 Tc (2)
Horizontal Active Blanking Period THB
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TH-THD
80
Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
Approval
TH-THD
Tc (2)
DE
DCLK
DE
DATA
INPUT SIGNAL TIMING DIAGRAM
TC
HD
T
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6.2 POWER ON/OFF SEQUENCE
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Doc No.: 1406Y119
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Model No.: N170C2 - L01
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Power Supply
for LCD, Vcc
0V
LVDS Interface
0V
- Power for Lamp
Timing Specifications:
470us < t1 Љ 10 ms
0 < t2 Љ 50 ms
0 < t3 Љ 50 ms
t4 Њ 500 ms
t5 Њ 200 ms
Power On
90%
10%
Power Off
90%
t1
t3t2
Valid Data
t6t5
50%50%
ONOFF OFF
Restart
t7
10%
t4
10%
t6 Њ 200 ms
Note (1) Please follow the power on/off sequence described above. Otherwise, the LCD module might be
damaged.
Note (2) Please avoid floating state of interface signal at invalid period. When the interface signal is invalid, be
sure to pull down the power supply of LCD Vcc to 0 V.
Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the
interface signal is valid. The Backlight inverter power must be turned off before the power supply
for the logic and the interface signal is invalid.
Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To avoid
this phenomenon, we suggest that the Vcc falling time is better to follow 5 t7 300 ms.ЉЉ
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC 3.3 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Inverter Current IL 6.0 mA
Inverter Driving Frequency FL 61 KHz
Inverter Sumida-H05-4915
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items
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25r2
50r10
Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
Approval
o
C
%RH
should be measured under the test conditions described in 7.1 and stable environment shown in Note (5).
Item Symbol Condition Min. Typ. Max. Unit Note
Red
Green
Color
Chromaticity
Blue
White
Average Luminance of White L
Rx
Ry
Gx
Gy
Bx
By
Wx 0.313
Wy
AVE
Contrast Ratio CR
Response Time
White Variation
Horizontal
Viewing Angle
Vertical
TR --- 3 8 ms
T
GW T
Tx+
T
x
TY+
T
Y
Typ –
=0q, TY =0q
T
x
0.03
CS-1000T
170 200 --- cd/m2(4), (5)
300 400 --- - (2), (5)
T
=0q, TY =0q
F
x
=0q, TY =0q
x
--- 7 12 ms
--- 1.25 1.40 - (5), (6)
40 45 ---
-
CR Њ 10
BM-5A
-
40 45 ---
10 15 ---
30 35 ---
0.599
0.341
0.303
0.524
0.151
0.114
0.329
Typ +
0.03
(1), (5)
(3)
Deg. (1), (5)
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.67 ms
Note (1) Definition of Viewing Angle (Tx, Ty):
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Doc No.: 1406Y119
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Model No.: N170C2 - L01
Approval
Normal
Tx = Ty = 0º
Ty- Ty
TX- = 90º
6 o’clock
T
y- = 90º
x-
y-
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L63 / L0
L63: Luminance of gray level 63
L 0: Luminance of gray level 0
CR = CR (1)
CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).
Tx
Tx
y+
12 o’clock direction
T
y+ = 90º
x+
TX+ = 90º
Note (3) Definition of Response Time (T
100%
90%
Optical
Response
10%
0%
T
R
66.67 ms
, TF):
R
21 / 29
66
Time
T
F
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Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
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Note (4) Definition of Average Luminance of White (L
Measure the luminance of gray level 63 at 5 points
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
AVE
L (x) is corresponding to the luminance of the point X at Figure in Note (6)
Note (5) Measurement Setup:
The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting Backlight for 20 minutes in a windless room.
LCD Module
LCD Panel
Center of the Screen
AVE
):
Photometer
(CA210, CS-1000T)
Field of View = 2º
500 mm
Light Shield Room
(Ambient Luminance < 2 lux)
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Note (6) Definition of White Variation (GW):
Measure the luminance of gray level 63 at 5 points
GW = { Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
H/4
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Horizontal Line
W
W/4 W/2 3W/4
2 3
Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
Approval
: Test Point
X
X=1 to 5
H
Vertical Line
H/2
3H/4
1
4
Active Area
5
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Doc No.: 1406Y119
Issued Date: Feb. 16, 2007
Model No.: N170C2 - L01
Approval
8. PRECAUTIONS
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) To assemble or install module into user’s system can be only in clean working areas. The dust and oil
may cause electrical short or worsen the polarizer.
(3) It’s not permitted to have pressure or impulse on the module because the LCD panel and Backlight will
be damaged.
(4) Always follow the correct power sequence when LCD module is connecting and operating. This can
prevent damage to the CMOS LSI chips during latch-up.
(5) Do not pull the I/F connector in or out while the module is operating.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) It is dangerous that moisture come into or contacted the LCD module, because moisture may damage
LCD module when it is operating.
(9) High temperature or humidity may reduce the performance of module. Please store LCD module within
the specified storage conditions.
(10) When ambient temperature is lower than 10ºC may reduce the display quality. For example, the
response time will become slowly, and the starting voltage of CCFL will be higher than room
temperature.
8.2 SAFETY PRECAUTIONS
(1) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while
assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
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9. PACKING
9.1 CARTON
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Model No.: N170C2 - L01
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9.2 PALLET
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10. DEFINITION OF LABELS
10.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following
explanation.
(a) Model Name: N170C2 - L01
(b) Revision: Rev. XX, for example: A1, …, C1, C2 …etc.
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Model No.: N170C2 - L01
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(c) Serial ID: X X
(d) Production Location: MADE IN XXXX. XXXX stands for production location.
(e)UL logo: LEOO especially stands for panel manufactured by CMO NingBo satisfying UL requirement.
The panel without LEOO mark stands for manufactured by CMO Taiwan satisfying UL requirement.
Serial ID includes the information as below:
(a) Manufactured Date: Year: 1~9, for 2001~2009
(b) Revision Code: cover all the change
(c) Serial No.: Manufacturing sequence of product
X X X X X Y M D X N N N N
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1
Serial No.
CMO Internal Use
Year, Month, Date
CMO Internal Use
Revision
CMO Internal Use
st
to 31st, exclude I , O and U
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10.2 CMO CARTON LABEL
(a) Production location: Made In XXXX. XXXX stands for production location.
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