CMO N154I3-L02 Specification

Global LCD Panel Exchange Center

TFT LCD Approval Specification

MODEL NO.: N154I3-L02

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

Customer :

Approved by :

Note :

Liquid Crystal Display Division

QRA Division. OA Head Division.

Approval Approval

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

- CONTENTS -

REVISION HISTORY ------------------------------------------------------- 3

1. GENERAL DESCRIPTION

1.1 OVERVIEW

1.2 FEATURES

1.3 APPLICATION

1.4 GENERAL SPECIFICATIONS

1.5 MECHANICAL SPECIFICATIONS

------------------------------------------------------- 4

2. ABSOLUTE MAXIMUM RATINGS ------------------------------------------------------- 5

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

2.2.2 BACKLIGHT UNIT

3. ELECTRICAL CHARACTERISTICS ------------------------------------------------------- 7

3.1 TFT LCD MODULE

3.2 BACKLIGHT UNIT

4. BLOCK DIAGRAM ------------------------------------------------------- 11

4.1 TFT LCD MODULE

4.2 BACKLIGHT UNIT

5. INPUT TERMINAL PIN ASSIGNMENT ------------------------------------------------------- 12

5.1 TFT LCD MODULE

5.2 BACKLIGHT UNIT

5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL

5.4 COLOR DATA INPUT ASSIGNMENT

5.5 EDID DATA STRUCTURE

5.6 EDID SIGNAL SPECIFICATION

6. INTERFACE TIMING ------------------------------------------------------- 18

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

6.2 POWER ON/OFF SEQUENCE

7. OPTICAL CHARACTERISTICS ------------------------------------------------------- 20

7.1 TEST CONDITIONS

7.2 OPTICAL SPECIFICATIONS

8. PRECAUTIONS ------------------------------------------------------- 24

8.1 HANDLING PRECAUTIONS

8.2 STORAGE PRECAUTIONS

8.3 OPERATION PRECAUTIONS

9. PACKING ------------------------------------------------------- 25

9.1 CARTON

9.2 PALLET

10. DEFINITION OF LABELS ------------------------------------------------------- 27

10.1 CMO MODULE LABEL

10.2 CARTON LABEL

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

REVISION HISTORY

Version Date

Ver 1.0 Mar,28, 2007 All All Preliminary specification first issued.

Page

(New)

Section Description

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1. GENERAL DESCRIPTION

1.1 OVERVIEW

N154I3-L02 is a 15.4” TFT Liquid Crystal Display module with single CCFL Backlight unit and 30 pins

LVDS interface. This module supports 1280 x 800 Wide-XGA mode and can display 262,144 colors. The

optimum viewing angle is at 6 o’clock direction. The inverter module for Backlight is not built in.

1.2 FEATURES

- Thin and light weight

- WXGA (1280 x 800 pixels) resolution

- 3.3V LVDS (Low Voltage Differential Signaling) interface with 1 pixel/clock

1.3 APPLICATION

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

- TFT LCD Notebook

1.4 GENERAL SPECIFICATI0NS

Item Specification Unit Note
Active Area 331.2 (H) x 207.0 (V) (15.4” diagonal) mm
Bezel Opening Area 334.7 (H) x 210.5 (V) mm
Driver Element a-si TFT active matrix - ­Pixel Number 1280 x R.G.B. x 800 pixel ­Pixel Pitch 0.2588 (H) x 0.2588 (V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 262,144 color ­Transmissive Mode Normally white - ­Surface Treatment Hard coating (3H), Anti-glare - -

1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal(H) 343.5 344.0 344.5 mm

Module Size

Glass Thickness

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

Vertical(V) 221.5 222.0 222.5 mm
Thickness(T) - 6.0 6.2 mm

TFT 0.45 0.5 0.55 Mm

CF 0.45 0.5 0.55 Mm

Weight - 510 525 g -

(1)

(1)

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A

2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature T
Operating Ambient Temperature T
Shock (Non-Operating) S
Vibration (Non-Operating) V

Note (1) Temperature and relative humidity range is shown in the figure below.

(a) 90 %RH Max. (Ta <= 40 ºC).

(b) Wet-bulb temperature should be 39 ºCMax.(Ta>40ºC).

(c) No condensation.

Note (2) The temperature of panel surface area should be 0 ºC min. and 60 ºCmax.

Relative Humidity (%RH)

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Val ue

Min. Max.

ST

OP

NOP

NOP

-20 +60 ºC(1)
0+50ºC (1), (2)

- 220/2 G/ms (3), (5)

-1.5G(4),(5)

Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

Unit Note

100

90

80

60

Operating Range

40

20
10

Storage Range

8060-20 40020-40

Temperature (ºC)

Note (3) 1 time for ± X, ± Y, ± Z. for Condition (220G / 2ms) is half Sine Wave,.

Note (4) 10~500 Hz, 30 min/cycle, 1cycle for X,Y,Z-axis.

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid

enough so that the module would not be twisted or bent by the fixture.

The fixing condition is shown as below:

tRoomTemperature

Side Mount Fixing Screw

Gap=2mm

Bracket

LCD Module

Side Mount Fixing Screw

Stage

5 / 29

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2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

Item Symbol

Power Supply Voltage Vcc -0.3 +4.0 V
Logic Input Voltage V

2.2.2 BACKLIGHT UNIT

Item Symbol

Lamp Voltage V
Lamp Current I
Lamp Frequency F

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

Val ue

Min. Max.

IN

-0.3 Vcc+0.3 V

Val ue

Min. Max.

L

L

L

- 2.5K V

2.0 7.0 mA
50 80 KHz

Unit Note

(1)

Unit Note

RMS

RMS

(1), (2), IL=6.0mA

(1), (2)

Note (2) Specified values are for lamp (Refer to Section 3.2 for further information).

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE Ta = 25 ± 2 ºC

Parameter Symbol

Min. Typ. Max.
Power Supply Voltage Vcc 3.0 3.3 3.6 V ­Ripple Voltage V
Rush Current I
Initial Stage Current I

Power Supply Current

LVDS Differential Input High Threshold V

LVDS Differential Input Low Threshold V

White - 320 - mA (3)a
Black

TH(LVDS)

TL(LVDS)

LVDS Common Mode Voltage V

RP

RUSH

IS

lcc

CM

- - mV -

--1.5A(2)

--1.0A(2)

- 380 480 mA (3)b

- - +100 mV

-100 - - mV

1.125 - 1.375 V (5)
LVDS Differential Input Voltage |VID| 100 - 600 mV (5)
Terminating Resistor R

Power per EBL WG P

T

EBL

- 100 - Ohm -

-3.86- W(4)

Note (1) The ambient temperature is Ta = 25 ± 2 ºC.

Val ue

Unit Note

Preliminary

(5),

=1.2V

V

CM

(5)

=1.2V

V

CM

Note (2) I

: the maximum current when VCC is rising

RUSH

I

: the maximum current of the first 100ms after power-on

IS

Measurement Conditions: Shown as the following figure. Test pattern: black.

(High to Low)

(Cont rol Si gnal)

SW

+12V

+3.3V

R1

47K

R2

1K

47K

VR1

C1

1uF

Q1 2SK1475

C2

0.01uF

Q2

2SK1470

FUSE

C3

1uF

Vcc rising time is 470us

+3.3V

VCC

Vcc

(LCD Module Input)

100ms

I

IS

0V

I

RUSH

470us

0.1Vcc

ICC

7 / 29

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|

|

|

|

Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, DC

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

Current and f

a. White Pattern

Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input

power. Test conditions are as follows.

(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, fv =60Hz,

(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file

“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.

= 60 Hz, whereas a power dissipation check pattern below is displayed.

v

b. Black Pattern

Active Area

Active Area

(c) Luminance: 60 nits.

(d) The inverter used is provided from Sumida

Note (5) The parameters of LVDS signals are defined as the following figures.

CM

V

.

Single Ended

0V

V

Differential

0V

V

VID

VID

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC

Parameter Symbol

Min. Typ. Max.
Backlight Structure Conventional B/L
Lamp Input Voltage V

Lamp Current I

Lamp Turn On Voltage V

Operating Frequency F
Lamp Life Time L
Power Consumption P

L

L

S

L

BL

L

675 730 945 V

2.0 (1),(2)

3.0

- - 1140(25oC) V

- - 1580(0oC) V

50 - 80 KHz (5)

12,000 - - Hrs (7)

- 4.38 - W (6), IL=6.0mA

Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:

Val ue

Unit Note

6.0 7.0 mA

RMS

RMS

RMS

RMS

IL=6.0mA

(1),(3)

(4)
(4)

HV (Pink)

LCD

LV (W hi t e)

Module

1

Inverter

2

A

Current Meter

Note (2) for burst mode inverter design

Note (3) for continuous mode inverter design

Note (4) The voltage that must be larger than Vs should be applied to the lamp for more than 1 second after

startup. Otherwise the lamp may not be turned on.

Note (5) The lamp frequency may generate interference with horizontal synchronous frequency from the

display, and this may cause line flow on the display. In order to avoid interference, the lamp

frequency should be detached from the horizontal synchronous frequency and its harmonics as far

as possible.

Note (6) P

= ILV

L

L

Note (7) The lifetime of lamp is defined as the time when it continues to operate under the conditions at Ta

=25 2

C and IL=6.0mA

until one of the following events occurs:

RMS

o

(a) When the brightness becomes  50% of its original value.

(b) When the effective ignition length becomes  80% of its original value. (The effective ignition

length is a scope that luminance is over70% of that at thecenterpoint.)

Note (8) The waveform of the voltage output of inverter must be area-symmetric and the design of the

inverter must have specifications for the modularized lamp. The performance of the Backlight,

such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for

the lamp. All the parameters of an inverter should be carefully designed to avoid generating too

much current leakage from high voltage output of the inverter. When designing or ordering the

inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the

inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module

should be operated in the same manners when it is installed in your instrument.

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The output of the inverter must have symmetrical (negative and positive) voltage waveform and

symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter,

which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may

produce interface with horizontal synchronous frequency and as a result this may cause beat on the

display. Therefore lamp frequency shall be as away possible from the horizontal synchronous

frequency and from its harmonics in order to prevent interference.

Requirements for a system inverter design, which is intended to have a better display performance, a

better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its

leakage current.

a. The asymmetry rate of the inverter waveform should be 10% below;

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

b. The distortion rate of the waveform should be within 2 ± 10%;

c. The ideal sine wave form shall be symmetric in positive and negative polarities.

* Asymmetry rate:

I p

I -p

* Distortion rate

| I

– I–p|/ I

p

I

(or I –p)/ I

p

rms

rms

* 100%

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)

4. BLOCK DIAGRAM

4.1 TFT LCD MODULE

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

LVDS Display

Data & Clock

Vcc

Data

EDID

V

EDID

VL

INPUT CONNECTOR

REFERENCE VOLTAGE

LAMP CONNECTOR

LVDS INPUT /

TIMING CONTROLLER

DC/DC CONVERTER &

GENERATOR

EDID

EEPROM

SCAN DRIVER IC

TFT LCD PANEL

DATA DRIVER IC

BACKLIGHT UNIT

4.2 BACKLIGHT UNIT

1 HV (Pink)

2LV (White

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5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD MODULE

Pin Symbol Description Polarity Remark

1 Vss Ground
2 Vcc Power Supply +3.3 V (typical)
3 Vcc Power Supply +3.3 V (typical)
4 V
5 NC Non-Connection
6 CLK
7DATA
8 Rxin0- LVDS Differential Data Input Negative

9 Rxin0+ LVDS Differential Data Input Positive

10 Vss Ground
11 Rxin1- LVDS Differential Data Input Negative

12 Rxin1+ LVDS Differential Data Input Positive
13 Vss Ground

14 Rxin2- LVDS Differential Data Input Negative B2~B5, DE, Hsync, Vsync
15 Rxin2+ LVDS Differential Data Input Positive
16 Vss Ground
17 CLK- LVDS Clock Data Input Negative
18 CLK+ LVDS Clock Data Input Positive
19 Vss Ground
20 NC Non-Connection
21 NC Non-Connection
22 Vss Ground
23 NC Non-Connection
24 NC Non-Connection
25 Vss Ground
26 NC Non-Connection
27 NC Non-Connection
28 Vss Ground
29 NC Non-Connection
30 NC Non-Connection

Note (1) Connector Part No.: JAE FI-XB30SL-HF10 or equivalent

EDID

EDID

EDID

DDC 3.3V Power DDC 3.3V Power

DDC Clock DDC Clock
DDC Data DDC Data

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

R0~R5,G0

G1~G5, B0, B1

LVDS Lev el Cloc k

Note (2) User’s connector Part No: FI-X30M or equivalent

Note (3) The first pixel is odd as shown in the following figure.

12 / 29

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5.2 BACKLIGHT UNIT

Pin Symbol Description Color

1 HV High Voltage Pink
2 LV Ground White

Note (1) Connector Part No.: JST-BHSR-02VS-1 or equivalent

Note (2) User’s connector Part No.: JST-SM02B-BHSS-1-TB or equivalent

5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL

CLK+

T/7

Rxin2

IN20 IN19 IN18 IN17 IN16 IN15 IN14

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

Rxin1

Rxin0

DE B5 B4 B3 B2Vsync Hsync

IN13 IN12 IN11 IN10 IN9 IN8 IN7

B1 G4 G3 G2 G1B0 G5

IN6 IN5 IN4 IN3 IN2 IN1 IN0

G0 R3 R2 R1 R0R5 R4

Signal for 1 DCLK Cycle (T)

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5.4 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for

the color. The higher the binary input the brighter the color. The table below provides the assignment of

color versus data input.

Color

R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black
Red
Green

Basic
Colors

Gray
Scale
Of
Red

Gray
Scale
Of
Green

Gray
Scale
Of
Blue

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Blue
Cyan
Magenta
Yellow
White
Red(0)/Dark
Red(1)
Red(2)

:

:
Red(61)
Red(62)
Red(63)
Green(0)/Dark
Green(1)
Green(2)

:

:
Green(61)
Green(62)
Green(63)
Blue(0)/Dark
Blue(1)
Blue(2)

:

:
Blue(61)
Blue(62)
Blue(63)

0

0

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Data Signal

Red Green Blue

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

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0

0

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Preliminary

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

5.5 EDID DATA STRUCTURE

The EDID (Extended Display Identification Data) data formats are to support displays as defined in the

VESA Plug & Display and FPDI standards.

Byte
#(decimal)

00Header

11Header

22Header

33Header

44Header

55Header

66Header

77Header

8 8 EISA ID manufacturer name (“CMO”)

9 9 EISA ID manufacturer name (Compressed ASCII)

10 0A ID product code (N154I3-L02) 38

11 0B ID product code (hex LSB first; N154I3-L02) 14

12 0C ID S/N (fixed “0”)

13 0D ID S/N (fixed “0”)

14 0E ID S/N (fixed “0”)

15 0F ID S/N (fixed “0”)

16 10 Week of manufacture (fixed “00H”)

17 11 Year of manufacture (fixed “00H”)

18 12 EDID structure version # (“1”)

19 13 EDID revision # (“3”)

20 14 Video I/P definition (“digital”)

21 15 Active area horizontal 33cm

22 16 Active area vertical 21cm

23 17 Display Gamma (Gamma = ”2.2”)

24 18 Feature support (“Active off, RGB Color”)

25 19

26 1A

27 1B

28 1C

29 1D

30 1E

31 1F

32 20

33 21

34 22

35 23 Established timings 1

36 24 Established timings 2 (1280*800@60Hz)

37 25 Manufacturer’s reserved timings

38 26 Standard timing ID # 1

39 27 Standard timing ID # 1

Byte
#(hex) Field Name and Comments

Rx1, Rx0, Ry1, Ry0, Gx1, Gx0, Gy1, Gy0
Bx1, Bx0, By1, By0, Wx1, Wx0, Wy1, Wy0
Rx=0.58
Ry=0.34
Gx=0.31
Gy=0.55
Bx=0.155
By=0.155
Wx=0.313
Wy=0.329

Valu e(h
ex) Value(binary)

Preliminary

00 00000000

FF 11111111

FF 11111111

FF 11111111

FF 11111111

FF 11111111

FF 11111111

00 00000000

0D 00001101

AF 10101111

00111000

00010100

00 00000000

00 00000000

00 00000000

00 00000000

0C 00001100

11 00010001

01 00000001

03 00000011

90 10010000

21 00100001

15 00010101

78 01111000

0A 00001010

87 10000111

F5 11110101

94 10010100

57 01010111

4F 01001111

8C 10001100

27 00100111

27 00100111

50 01010000

54 01010100

00 00000000

00 00000000

00 00000000

01 00000001

01 00000001

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

40 28 Standard timing ID # 2

41 29 Standard timing ID # 2

42 2A Standard timing ID # 3

43 2B Standard timing ID # 3

44 2C Standard timing ID # 4

45 2D Standard timing ID # 4

46 2E Standard timing ID # 5

47 2F Standard timing ID # 5

48 30 Standard timing ID # 6

49 31 Standard timing ID # 6

50 32 Standard timing ID # 7

51 33 Standard timing ID # 7

52 34 Standard timing ID # 8

53 35 Standard timing ID # 8

54 36 Detailed timing description # 1 Pixel clock (“71MHz”, According to VESA CVT Rev1.1)

55 37 # 1 Pixel clock (hex LSB first)

56 38 # 1 H active (“1280”)

57 39 # 1 H blank (“160”)

58 3A # 1 H active : H blank (“1280 : 160”)

59 3B # 1 V active (”800”)

60 3C # 1 V blank (”23”)

61 3D # 1 V active : V blank (”800 :23”)

62 3E # 1 H sync offset (”48”)

63 3F # 1 H sync pulse width ("32”)

64 40 # 1 V sync offset : V sync pulse width (”3: 6”)

65 41 # 1 H sync offset : H sync pulse width : V sync offset : V sync width (”48: 32 : 3 : 6”)

66 42 # 1 H image size (”331 mm”)

67 43 # 1 V image size (”207 mm”)

68 44 # 1 H image size : V image size (”331 : 207”)

69 45 # 1 H boarder (”0”)

70 46 # 1 V boarder (”0”)

# 1 Non-interlaced ; Normal display, no stereo ; Digital Separate ; V sync POL is

71 47

72 48

73 49 # 1 Pixel clock (hex LSB first)

74 4A # 1 H active (“1280”)

75 4B # 1 H blank (“160”)

76 4C # 1 H active : H blank (“1280 : 160”)

77 4D # 1 V active (”800”)

78 4E # 1 V blank (”15”)

79 4F # 1 V active : V blank (”800 :15”)

80 50 # 1 H sync offset (”48”)

81 51 # 1 H sync pulse width ("32”)

82 52 # 1 V sync offset : V sync pulse width (”3: 6”)

83 53 # 1 H sync offset : H sync pulse width : V sync offset : V sync width (”48: 32 : 3 : 6”)

84 54 # 1 H image size (”331 mm”)

negative ; H sync POL is positive
Detailed timing description # 1 Pixel clock (“46.75MHz”, According to VESA CVT
Rev1.1)

01 00000001

01 00000001

01 00000001

01 00000001

01 00000001

01 00000001

01 00000001

01 00000001

01 00000001

01 00000001

01 00000001

01 00000001

01 00000001

01 00000001

BC 10111100

1B 00011011

00 00000000

A0 10100000

50 01010000

20 00100000

17 00010111

30 00110000

30 00110000

20 00100000

36 00110110

00 00000000

4B 01001011

CF 110 01111

10 00010000

00 00000000

00 00000000

18 00011000

43 01000011

12 00010010

00 00000000

A0 10100000

50 01010000

20 00100000

0F 00001111

30 00110000

30 00110000

20 00100000

36 00110110

00 00000000

4B 01001011

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

85 55 # 1 V image size (”207 mm”)

86 56 # 1 H image size : V image size (”303 : 190”)

87 57 # 1 H boarder (”0”)

88 58 # 1 V boarder (”0”)

# 1 Non-interlaced ; Normal display, no stereo ; Digital Separate ; V sync POL is

89 59

90 5A Detailed timing description # 3

91 5B # 3 Flag

92 5C # 3 Reserved

93 5D # 3 FE (hex) defines ASCII string (Model Name “N154I3”,ASCII)

94 5E # 3 Flag

95 5F # Dell P/N " GR551" 1st character (“T”)

96 60 # Dell P/N " GR551" 1st character (“N”)

97 61 # Dell P/N " GR551" 1st character (“5”)

98 62 # Dell P/N " GR551" 1st character (“2”)

99 63 # Dell P/N " GR551" 1st character (“6”)

100 64

101 65 Manufacturer P/N ( "N")

102 66 Manufacturer P/N ( "1" )

103 67 Manufacturer P/N ( "5" )

104 68 Manufacturer P/N ( "4" )

105 69 Manufacturer P/N ( "I" )

106 6A Manufacturer P/N ( "3" )

107 6B

108 6C Flag

109 6D Flag

110 6E Fla g

111 6F D ata Type Tag:

112 7 0 Fl a g

113 71 SMBUS value @ 10nits = 33d 21

114 72 SMBUS value @ 17nits = 45d 2D

115 73 SMBUS value @ 24nits = 54d 36

116 74 SMBUS value @ 30nits = 60d 3C

117 75 SMBUS value @ 60nits = 88d 58

118 76 SMBUS value @ 100nits = 120d 78

119 77 SMBUS value @ 160nits = 165d A5

120 78 SMBUS value @ max nits = 228d E4

121 79

122 7A BIST Enable: Yes = '01' No = '00' ("Yes")

123 7B (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)

124 7C (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)

125 7D (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)

126 7E Extension flag

127 7F Checksum

negative; H sync POL is positive

LCD Supplier EEDID Revision #: "1" 01 00000001

Manufacturer P/N (If <13 char, then terminate with ASCII code 0Ah, set remaining char
= 20h)

Bit[1:0] 00:reserved , 01: single LVDS, 10: dual LVDS, 11: reserved
Bit[2] 0: No RTC support , 1: RTC support
Bit[7:3] Reserved

CF 110 01111

10 00010000

00 00000000

00 00000000

1A 00011010

00 00000000

00 00000000

00 00000000

FE 11111110

00 00000000

54 01010100

4E 01001110

35 00110101

32 00110010

36 00110110

4E 01001110

31 00110001

35 00110101

34 00110100

49 01001001

33 00110011

0A 00001010

00 00000000

00 00000000

00 00000000

00 00000000

00 00000000

01 00000001

01 00000001

0A 00001010

20 00100000

20 00100000

00 00000000

DC 11011100

00100001

00101101

00110110

00111100

01011000

01111000

10100101

11100100

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6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

DCLK Frequency 1/Tc 66 71 73 MHz (2)

Vertical Total Time TV 802 823 840 TH -

Vertical Active Display Period TVD 800 800 800 TH -

DE

Note (1) Because this module is operated by DE only mode, Hsync and Vsync are ignored.

(2) 1 channels LVDS input.

Vertical Active Blanking Period TVB TV-TVD 23 TV-TVD TH

Horizontal Total Time TH 1380 1440 1450 Tc (2)

Horizontal Active Display Period THD 1280 1280 1280 Tc (2)

Horizontal Active Blanking Period THB

INPUT SIGNAL TIMING DIAGRAM

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TH-THD

160

Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

TH-THD

Tc (2)

DE

DCLK

DE

DATA

TC

T

HD

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6.2 POWER ON/OFF SEQUENCE

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

Power Supply
for LCD, Vcc

- Interface Signal

(LVDS Signal of
Transmitter), V

I

- Power for Lamp

Timing Specifications:

0.5< t1 <= 10 msec

0 < t2 <= 50 msec

0 < t3 <= 50 msec

t4 >= 500 msec

0V

0V

Power On

90%

10%

Power Off

90%

t1

t3t2

Valid Data

t6t5

50%50%

ONOFF OFF

Restart

t7

10%

t4

10%

t5 >= 200 msec

t6 >= 200 msec

Note (1) Please follow the power on/off sequence described above. Otherwise, the LCD module might be

damaged.

Note (2) Please avoid floating state of interface signal at invalid period. When the interface signal is invalid, be

sure to pull down the power supply of LCD Vcc to 0 V.

Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the

interface signal is valid. The Backlight inverter power must be turned off before the power supply

for the logic and the interface signal is invalid.

Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To

avoid this phenomenon, we suggest that the Vcc falling time is better to follow 5mst7300 ms.

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7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Inverter Current I
Inverter Driving Frequency F
Inverter Sumida-H05-4915

The measurement methods of optical characteristics are shown in Section 7.2. The following items

should be measured under the test conditions described in Section 7.1 and stable environment shown in

Note (6).

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CC

L

L

Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

25±2

50±10

3.3 V

6.0 mA
61 KHz

Preliminary

o

C

%RH

7.2 OPTICAL SPECIFICATIONS

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR 300 500 - - (2), (5)

Response Time

Average Luminance of White

Red

Color
Chromaticity

Green

Blue

White

Horizontal

Viewing Angle

Vertical

L

Rx
Ry
Gx
Gy
Bx

By
Wx 0.313 ­Wy

θx+

θ
θY+

θ

White Variation of 5 Points δW

T
T

AVE

R

F

=0°, θY=0°

θ

x

Viewing Normal Angle

-

x

-

Y

5p

θx=0°, θY=0°

CR≥10

-38ms

-512ms

187 220 - cd/m2(4), (5)

TYP.

-0.03

0.572

0.336

0.310

0.556

0.159

0.147

0.329

TYP.

+0.03

-

-

-

-

-

-

­40 45 ­40 45 ­15 20 -

Deg. (1),(5)

40 45 ­80 - - % (5),(6)

(3)

(1)

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T

66.67 ms

66.67 ms

Note (1) Definition of Viewing Angle (θx, θy):

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

Normal

θx=θy= 0º

θy- θy+

θX- = 90º

6 o’clock

θ

y- = 90º

x-

y-

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) = L63 / L0

L63: Luminance of gray level 63

L 0: Luminance of gray level 0

CR = CR (1)

CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).

θx−

θx+

y+

12 o’clock direction

θ

y+ = 90º

x+

θX+ = 90º

Note (3) Definition of Response Time (T

100%

90%

Optical

Response

10%

0%

T

R

, TF):

R

21 / 29

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Note (4) Definition of Average Luminance of White (L

Measure the luminance of gray level 63 at 5 points

L

= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5

AVE

L (x) is corresponding to the luminance of the point X at Figure in Note (6)

Note (5) Measurement Setup:

The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt

temperature change during measuring. In order to stabilize the luminance, the measurement

should be executed after lighting Backlight for 20 minutes in a windless room.

LCD Module

LCD Panel

USB2000

AVE

):

CS-1000T

Center of the Screen

Light Shield Room

(Ambient Luminance < 2 lux)

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X

Note (6) Definition of White Variation (δW):

Measure the luminance of gray level 63 at 5 points

δW

= Minimum [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / Maximum [L (1)+ L (2)+ L (3)+ L (4)+ L (5)]

5p

10mm

678

H/4

2

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

3

:TestPoint

H

H/4 H/4 H/4

9 10

45

11 12 13

10mm 10mm

10mm

W/4 W/4 W/4 W/4

1

W

X=1 to 13

Active area

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8. PRECAUTIONS

8.1 SYSTEM MATCHING PRECAUTIONS

(1) Refer to the drawing.

(2) To avoid wireless noise interference, please keep the antenna away from LCD control board.

8.2 HANDLING PRECAUTIONS

(1) The module should be assembled into the system firmly by using every mounting hole. Be careful not

to twist or bend the module.

(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause

electrical short or damage the polarizer.

(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and

assembly process.

(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

very soft and easily scratched.

(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use

Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might

permanently damage the polarizer due to chemical reaction.

(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel for

a long time.

(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In

case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.

(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.

(9) Do not disassemble the module.

(10) Do not pull or fold the lamp wire.

(11) Pins of I/F connector should not be touched directly with bare hands.

8.3 STORAGE PRECAUTIONS

(1) High temperature or humidity may reduce the performance of module. Please store LCD module within

the specified storage conditions.

(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may

damage LCD module when it is operating.

(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the

response time will become slowly, and the starting voltage of lamp will be higher than the room

temperature.

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8.4 OPERATION PRECAUTIONS

(1) Do not pull the I/F connector in or out while the module is operating.

(2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This

can prevent the CMOS LSI chips from damage during latch-up.

(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while

assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.

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9. PACKING

9.1 CARTON

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Figure. 9-1 Packing method

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9.2 PALLET

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Model No.: N154I3-L02

Preliminary

Figure. 9-2 Packing method

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Issued Date: Mar, 28, 2008

Model No.: N154I3-L02

Preliminary

10. DEFINITION OF LABELS

10.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

-

(a) Model Name: N154I3 - L02

(b) Revision: Rev. XX, for example: C1, C2 …etc.

(c) Serial ID: X X

(d) Production Location: MADE IN XXXX. XXXX stands for production location.

X X XX XYM D L NNN N

Rev. XX

LEOO

Serial No.

Product Line

Year, Month, Date

CMO Internal Use

Revision

CMO Internal Use

(e) UL logo: LEOO especially stands for panel manufactured by CMO NingBo satisfying UL requirement.

The panel without LEOO mark stands for manufactured by CMO Taiwan satisfying UL requirement.

Serial ID includes the information as below:

(a) Manufactured Date: Year: 1~9, for 2001~2009

Month: 1~9, A~C, for Jan. ~ Dec.

Day: 1~9, A~Y, for 1

(b) Revision Code: cover all the change

(c) Serial No.: Manufacturing sequence of product

(d) Product Line: 1 -> Line1, 2 -> Line 2, …etc.

st

to 31st, exclude I , O and U

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10.2 CARTON LABEL

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