CMO N154I3-L02 Specification

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A
TFT LCD Approval Specification
MODEL NO.: N154I3-L02
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Doc No.:
Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
Customer NEC Computer
pproved by :
Note :
annie_hsu(ஊՅ
2008-04-22
14:05:08 CST
PMMD III
Director
/56522 /
DirectorAccept
54873)
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Doc No.:
Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
- CONTENTS -
REVISION HISTORY ------------------------------------------------------- 3
1. GENERAL DESCRIPTION
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
------------------------------------------------------- 4
2. ABSOLUTE MAXIMUM RATINGS ------------------------------------------------------- 5
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
2.2.2 BACKLIGHT UNIT
3. ELECTRICAL CHARACTERISTICS ------------------------------------------------------- 7
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
4. BLOCK DIAGRAM ------------------------------------------------------- 11
4.1 TFT LCD MODULE
4.2 BACKLIGHT UNIT
5. INPUT TERMINAL PIN ASSIGNMENT ------------------------------------------------------- 12
5.1 TFT LCD MODULE
5.2 BACKLIGHT UNIT
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
5.4 COLOR DATA INPUT ASSIGNMENT
5.5 EDID DATA STRUCTURE
5.6 EDID SIGNAL SPECIFICATION
6. INTERFACE TIMING ------------------------------------------------------- 18
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
6.2 POWER ON/OFF SEQUENCE
7. OPTICAL CHARACTERISTICS ------------------------------------------------------- 20
7.1 TEST CONDITIONS
7.2 OPTICAL SPECIFICATIONS
8. PRECAUTIONS ------------------------------------------------------- 24
8.1 HANDLING PRECAUTIONS
8.2 STORAGE PRECAUTIONS
8.3 OPERATION PRECAUTIONS
9. PACKING ------------------------------------------------------- 25
9.1 CARTON
9.2 PALLET
10. DEFINITION OF LABELS ------------------------------------------------------- 27
10.1 CMO MODULE LABEL
10.2 CARTON LABEL
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Doc No.:
Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
REVISION HISTORY
Version Date
Ver 3.0 Apr. 22, 2008 All All Approval specification 3.0 first issued.
Page
(New)
Section Description
.
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
N154I3-L02 is a 15.4” TFT Liquid Crystal Display module with single CCFL Backlight unit and 30 pins
LVDS interface. This module supports 1280 x 800 Wide-XGA mode and can display 262,144 colors. The
optimum viewing angle is at 6 o’clock direction. The inverter module for Backlight is not built in.
1.2 FEATURES
- Thin and light weight
- WXGA (1280 x 800 pixels) resolution
- 3.3V LVDS (Low Voltage Differential Signaling) interface with 1 pixel/clock
1.3 APPLICATION
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Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
- TFT LCD Notebook
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note Active Area 331.2 (H) x 207.0 (V) (15.4” diagonal) mm Bezel Opening Area 334.7 (H) x 210.5 (V) mm Driver Element a-si TFT active matrix - ­Pixel Number 1280 x R.G.B. x 800 pixel ­Pixel Pitch 0.2588 (H) x 0.2588 (V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 262,144 color ­Transmissive Mode Normally white - ­Surface Treatment Hard coating (3H), Anti-glare - -
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal(H) 343.5 344.0 344.5 mm
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Vertical(V) 221.5 222.0 222.5 mm Thickness(T) - 6.0 6.2 mm
Weight - 510 525 g -
Module Size
(1)
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A
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1) Operating Ambient Temperature TOP 0 +50 ºC (1), (2) Shock (Non-Operating) S Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta <= 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The temperature of panel surface area should be 0 ºC min. and 60 ºC max.
Relative Humidity (%RH)
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Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
Value
Min. Max.
- 220/2 G/ms (3), (5)
NOP
- 1.5 G (4), (5)
NOP
Unit Note
100
90
80
60
Operating Range
40
20 10
Storage Range
8060-20 400 20-40
Temperature (ºC)
Note (3) 1 time for ± X, ± Y, ± Z. for Condition (220G / 2ms) is half Sine Wave,.
Note (4) 10~500 Hz, 30 min/cycle, 1cycle for X,Y,Z-axis.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid
enough so that the module would not be twisted or bent by the fixture.
The fixing condition is shown as below:
t Room Temperature
Side Mount Fixing Screw
Gap=2mm
Bracket
LCD Module
Side Mount Fixing Screw
Stage
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2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage Vcc -0.3 +4.0 V Logic Input Voltage VIN -0.3 Vcc+0.3 V
2.2.2 BACKLIGHT UNIT
Item Symbol
Lamp Voltage VL - 2.5K V Lamp Current IL 2.0 7.0 mA Lamp Frequency FL 50 80 KHz
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
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Value
Min. Max.
Value
Min. Max.
Unit Note
Unit Note
Doc No.:
Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
(1)
(1), (2), IL = 6.0 mA
RMS
RMS
(1), (2)
Note (2) Specified values are for lamp (Refer to Section 3.2 for further information).
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Doc No.:
Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max. Power Supply Voltage Vcc 3.0 3.3 3.6 V ­Ripple Voltage VRP - - mV ­Rush Current I
- - 1.5 A (2)
RUSH
Initial Stage Current IIS - - 1.0 A (2)
Power Supply Current
LVDS Differential Input High Threshold V
LVDS Differential Input Low Threshold V
White - 320 - mA (3)a Black
lcc
TH(LVDS)
-100 - - mV
TL(LVDS)
380 480 mA (3)b
- - +100 mV
LVDS Common Mode Voltage VCM 1.125 - 1.375 V (5) LVDS Differential Input Voltage |VID| 100 - 600 mV (5) Terminating Resistor RT - 100 - Ohm -
Power per EBL WG P
- 3.86 - W (4)
EBL
Note (1) The ambient temperature is Ta = 25 ± 2 ºC.
Value
Unit Note
Approval
(5),
=1.2V
V
CM
(5)
=1.2V
V
CM
Note (2) I
Measurement Conditions: Shown as the following figure. Test pattern: black.
: the maximum current when VCC is rising
RUSH
I
: the maximum current of the first 100ms after power-on
IS
(High to Low)
(Control Signal)
SW
+12V
+3.3V
R1
47K
R2
1K
47K
VR1
C1
1uF
0.01uF
2SK1475
Q1
Q2
2SK1470
C2
FUSE
C3
1uF
Vcc rising time is 470us
+3.3V
VCC
Vcc
(LCD Module Input)
100ms
I
IS
0V
I
RUSH
470us
0.1Vcc
ICC
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|
|
|
|
Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, DC
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Doc No.:
Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
Current and f
a. White Pattern
Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input
power. Test conditions are as follows.
(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f
(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file
= 60 Hz, whereas a power dissipation check pattern below is displayed.
v
b. Black Pattern
Active Area
= 60 Hz,
v
Active Area
“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.
(c) Luminance: 60 nits.
(d) The inverter used is provided from Sumida
Note (5) The parameters of LVDS signals are defined as the following figures.
CM
V
.
Single Ended
0V
V
Differential
0V
V
VID
VID
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Doc No.:
Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max.
Lamp Input Voltage VL 675 730 945 V
Lamp Current I
Lamp Turn On Voltage V
L
S
2.0 (1),(2)
3.0
- - 1140(25
- - 1400(0 Operating Frequency FL 50 - 80 KHz (5) Lamp Life Time LBL 12,000 - - Hrs (7) Power Consumption PL - 4.38 - W (6), IL = 6.0 mA
Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:
Value
Unit Note
6.0 7.0 mA
o
C) V
o
C) V
IL = 6.0 mA
RMS
RMS
(4)
RMS
(4)
RMS
(1),(3)
HV (Pink)
LCD
LV (White)
Module
1
Inverter
2
A
Current Meter
Note (2) for burst mode inverter design
Note (3) for continuous mode inverter design
Note (4) The voltage shown above should be applied to the lamp for more than 1 second after startup.
Otherwise the lamp may not be turned on.
Note (5) The lamp frequency may generate interference with horizontal synchronous frequency from the
display, and this may cause line flow on the display. In order to avoid interference, the lamp
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.
Note (6) P
L
= I
LVL
Note (7) The lifetime of lamp is defined as the time when it continues to operate under the conditions at Ta
= 25 2
o
C and IL = 6.0 mA
until one of the following events occurs:
RMS
(a) When the brightness becomes Љ 50% of its original value.
(b) When the effective ignition length becomes Љ 80% of its original value. (˧˻˸ʳ ˸˹˹˸˶˼˸ʳ ˼˺˼˼ʳ
˿˸˺˻ʳ˼ʳ˴ʳ˶˸ʳ˻˴ʳ˿˼˴˶˸ʳ˼ʳ˸ʳˊ˃ʸʳ˹ʳ˻˴ʳ˴ʳ˻˸ʳ˶˸˸ʳ˼ˁ)
Note (8) The waveform of the voltage output of inverter must be area-symmetric and the design of the
inverter must have specifications for the modularized lamp. The performance of the Backlight,
such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for
the lamp. All the parameters of an inverter should be carefully designed to avoid generating too
much current leakage from high voltage output of the inverter. When designing or ordering the
inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the
inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module
should be operated in the same manners when it is installed in your instrument.
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The output of the inverter must have symmetrical (negative and positive) voltage waveform and
symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter,
which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may
produce interface with horizontal synchronous frequency and as a result this may cause beat on the
display. Therefore lamp frequency shall be as away possible from the horizontal synchronous
frequency and from its harmonics in order to prevent interference.
Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its
leakage current.
a. The asymmetry rate of the inverter waveform should be 10% below;
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Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
b. The distortion rate of the waveform should be within Ѕ2 ± 10%;
c. The ideal sine wave form shall be symmetric in positive and negative polarities.
* Asymmetry rate:
I p
I -p
| I
* Distortion rate
I
– I –p | / I
p
(or I –p) / I
p
rms
rms
* 100%
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)
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
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Doc No.:
Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
LVDS Display
Data & Clock
Vcc
GND
Data
EDID
CLK
EDID
V
EDID
VL
TIMING CONTROLLER
INPUT CONNECTOR
DC/DC CONVERTER &
REFERENCE VOLTAGE
LAMP CONNECTOR
LVDS INPUT /
GENERATOR
EDID
EEPROM
SCAN DRIVER IC
TFT LCD PANEL
DATA DRIVER IC
BACKLIGHT UNIT
4.2 BACKLIGHT UNIT
1 HV (Pink)
2 LV (White
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5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin Symbol Description Polarity Remark
1 Vss Ground 2 Vcc Power Supply +3.3 V (typical) 3 Vcc Power Supply +3.3 V (typical) 4 V 5 NC Non-Connection 6 CLK 7 DATA 8 Rxin0- LVDS Differential Data Input Negative
9 Rxin0+ LVDS Differential Data Input Positive
10 Vss Ground
11 Rxin1- LVDS Differential Data Input Negative
12 Rxin1+ LVDS Differential Data Input Positive
13 Vss Ground 14 Rxin2- LVDS Differential Data Input Negative B2~B5, DE, Hsync, Vsync
15 Rxin2+ LVDS Differential Data Input Positive 16 Vss Ground 17 CLK- LVDS Clock Data Input Negative 18 CLK+ LVDS Clock Data Input Positive 19 Vss Ground 20 NC Non-Connection 21 NC Non-Connection 22 Vss Ground 23 NC Non-Connection 24 NC Non-Connection 25 Vss Ground 26 NC Non-Connection 27 NC Non-Connection 28 Vss Ground 29 NC Non-Connection 30 NC Non-Connection
Note (1) Connector Part No.: JAE FI-XB30SL-HF10
DDC 3.3V Power DDC 3.3V Power
EDID
DDC Clock DDC Clock
EDID
DDC Data DDC Data
EDID
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Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
R0~R5,G0
G1~G5, B0, B1
LVDS Level Clock
Note (2) User’s connector Part No: FI-X30M or equivalent
Note (3) The first pixel is odd as shown in the following figure.
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5.2 BACKLIGHT UNIT
Pin Symbol Description Color
1 HV High Voltage Pink 2 LV Ground White
Note (1) Connector Part No.: JST-BHSR-02VS-1
Note (2) User’s connector Part No.: JST-SM02B-BHSS-1-TB or equivalent
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
CLK+
T/7
Rxin2
IN20 IN19 IN18 IN17 IN16 IN15 IN14
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Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
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Rxin1
Rxin0
DE B5 B4 B3 B2 Vsync Hsync
IN13 IN12 IN11 IN10 IN9 IN8 IN7
B1 G4 G3 G2 G1 B0 G5
IN6 IN5 IN4 IN3 IN2 IN1 IN0
G0 R3 R2 R1 R0
R5
R4
Signal for 1 DCLK Cycle (T)
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5.4 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for
the color. The higher the binary input the brighter the color. The table below provides the assignment of
color versus data input.
Color
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0 Black Red Green
Basic Colors
Gray Scale Of Red
Gray Scale Of Green
Gray Scale Of Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue Cyan Magenta Yellow White Red(0)/Dark Red(1) Red(2)
:
: Red(61) Red(62) Red(63) Green(0)/Dark Green(1) Green(2)
:
: Green(61) Green(62) Green(63) Blue(0)/Dark Blue(1) Blue(2)
:
: Blue(61) Blue(62) Blue(63)
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0 : :
1
1
1
1
1
1
0
0
0
0
0
0 : :
0
0
0
0
0
0
0
0
0
0
0
0 : :
0
0
0
0
0
0
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Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
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Data Signal
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
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:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
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5.5 EDID DATA STRUCTURE
The EDID (Extended Display Identification Data) data formats are to support displays as defined in the
VESA Plug & Display and FPDI standards.
Byte #(decimal)
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
Byte #(hex)
Field Name and Comments Value(hex) Value(binary)
0 Header , Fixed 00 00000000
1 Header , Fixed FF 11111111
2 Header , Fixed FF 11111111
3 Header , Fixed FF 11111111
4 Header , Fixed FF 11111111
5 Header , Fixed FF 11111111
6 Header , Fixed FF 11111111
7 Header , Fixed 00 00000000
8 ID=IBM 30 00110000
9 ID=IBM AE 10101110
0A XGA (IBM Unique ID) 50 01010000
0B XGA (IBM Unique ID) 40 01000000
0C 32-bit serial # Unused(01h for VESA, 00h for SPWG) 00 00000000
0D 32-bit serial # Unused(01h for VESA, 00h for SPWG) 00 00000000
0E 32-bit serial # Unused(01h for VESA, 00h for SPWG) 00 00000000
0F 32-bit serial # Unused(01h for VESA, 00h for SPWG) 00 00000000
10 Week of manufacture 1 - 53 (unused: 00h) : 02h fixed by CMO 28 00101000
Year of manufacture year - 1990(unsed:00h) : 0Dh (Year 2003) fixed by
11
CMO 11 00010001
12 Version=1 01 00000001
13 Revision=3 03 00000011
14 Digital 80 10000000
15 Active area horizontal 33 cm 21 00100001
16 Active area vertical 21cm 15 00010101
17 gamma * 100-100 = 2.2*100-100=120 78 01111000
18 Feature support (no DPMS, Active off, RGB, Preferred Timing Mode) EA 11101010
19 Red/Green (Rx1, Rx0, Ry1, Ry0, Gx1, Gx0, Gy1, Gy0) 07 00000111
1A Blue/White (Bx1, Bx0, By1, By0, Wx1, Wx0, Wy1, Wy0) F5 11110101
1B Red-x (Rx = “0.602”) 9A 10011010
1C Red-y (Ry = “0.340”) 57 01010111
1D Green-x (Gx = ”0.306”) 4E 01001110
1E Green-y (Gy = ”0.530”) 87 10000111
1F Blue-x (Bx = ”0.151”) 26 00100110
20 Blue-y (By = ”0.120”) 1E 00011110
21 White-x (Wx = ”0.313”) 50 01010000
22 White-y (Wy = ”0.329”) 54 01010100
23 Established timings 1 00 00000000
24 Established timings 2 (1280x800@60Hz) 00 00000000
25 No manufacturer's specific timing 00 00000000
26 Standard timing ID # 1 01 00000001
27 Standard timing ID # 1 01 00000001
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Model No.: N154I3-L02
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Doc No.:
Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
40
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28 Standard timing ID # 2 01 00000001
29 Standard timing ID # 2 01 00000001
2A Standard timing ID # 3 01 00000001
2B Standard timing ID # 3 01 00000001
2C Standard timing ID # 4 01 00000001
2D Standard timing ID # 4 01 00000001
2E Standard timing ID # 5 01 00000001
2F Standard timing ID # 5 01 00000001
30 Standard timing ID # 6 01 00000001
31 Standard timing ID # 6 01 00000001
32 Standard timing ID # 7 01 00000001
33 Standard timing ID # 7 01 00000001
34 Standard timing ID # 8 01 00000001
35 Standard timing ID # 8 01 00000001
Detailed timing description # 1 Pixel clock (“69.3MHz”, According to VESA CVT Rev1.1)
36
12 00010010
37 69.3MHz/10000 =6930=1B12H 1B 00011011
38 HActive(D7-D0) = 1280 mod 256 00 00000000
39 HBlank(D7-D0) = 125 mod 256 7D 01111101
3A HActive(D11-D8) : HBlank(D11-D8) = 1280/256 : 125/256 50 01010000
3B VActive(D7-D0) =800 mod 256 20 00100000
3C VBlank(D7-D0) = 22 mod 256 16 00010110
3D VActive(D11-D8) : VBlank(D11-D8) = 800/256 : 22/256 30 00110000
3E HSyncOffset(D7-D0) = HBorder+HFrontPorch = 48 30 00110000
3F HSyncWidth(D7-D0) =32 20 00100000
40 VSyncOffset(D3-D0)=3 : VSyncWidth(D3-D0)=6 36 00110110
HSyncOffset(D9-D8) : HSyncWidth(D9-D8) : VSyncOffset(D5-D4) : VSyncWidth(D5-D4)
41
00 00000000
42 HImageSize(mm, D7-D0) = 331mod 256 4B 01001011
43 VImageSize(mm, D7-D0) = 207mod 256 CF 11001111
44 HImageSize(D11-D8) : VImageSize(D11-D8) =331/256 : 207/256 10 00010000
45 Horizontal Border=0 00 00000000
46 Vertical Border=0 00 00000000
Non-interlaced, Normal Display, Digital separate, Positive Hsync, Negative
47
Vsync 18 00011000 Detailed timing description # 1 Pixel clock (“57.75MHz”, According to VESA
48
CVT Rev1.1) 8F 10001111
49 57.75MHz/10000 =5775=168FH 16 00010110
4A Horizontal Active =1280 mod 256 00 00000000
4B Horizontal Blanking =125mod 256 7D 01111101
4C HActive(D11-D8) : HBlank(D11-D8) = 1280/256 : 125/256 50 01010000
4D Vertical Avtive =800 mod 256 20 00100000
4E Vertical Blanking =22 mod 256 16 00010110
4F VActive(D11-D8) : VBlank(D11-D8) =800/256 : 22/256 30 00110000
50 Horizontal Sync. Offset =48 30 00110000
51 Horizontal Sync Pulse Width =32 20 00100000
52 VSyncOffset(D3-D0)=3 : VSyncWidth(D3-D0)=6 36 00110110
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Doc No.:
Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
83
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53 Horizontal Vertical Sync Offset/Width upper 2bits = 0 00 00000000
54 HImageSize(mm, D7-D0) = 331mod 256 4B 01001011
55 VImageSize(mm, D7-D0) = 207mod 256 CF 11001111
56 HImageSize(D11-D8) : VImageSize(D11-D8) = 331/256 : 207/256 10 00010000
57 Horizontal Border=0 00 00000000
58 Vertical Border=0 00 00000000
Non-interlaced,Normal display,no stereo,Digital separate sync,H/V pol negatives
59
18 00011000
5A Flag 00 00000000
5B Flag 00 00000000
5C Flag 00 00000000
5D Data type tag :0F 0F 00001111
5E Flag 00 00000000
5F Low Refresh Rate #1 (Horizontal active pixels / 8 ) - 31=129(81h) 81 10000001
60 Low Refresh Rate #1 Image Aspect ratio(16 : 10) 0A 00001010
61 Low Refresh Rate #1 Refresh Rate=50Hz 32 00110010
62 Low Refresh Rate #2 (Horizontal active pixels / 8 ) - 31=129(81h) 81 10000001
63 Low Refresh Rate #2 Image Aspect ratio(16 : 10) 0A 00001010
64 Low Refresh Rate #2 Refresh Rate=40Hz 28 00101000
65 Brightness (1/10nit) , 200/10=20(=0Fh) 14 00010100
66 Feature Flags 01 00000001
67 Reserved 00 00000000
68 EISA manufacturer code(3 Character ID) -CMO 0D 00001101
69 Compressed ASCII AF 10101111
6A Panel Supplier Reserved - Product code -1407 53 01010011
6B (Hex, LSB first) 15 00010101
6C Flag 00 00000000
6D Flag 00 00000000
6E Flag 00 00000000
6F Data type tag : FEh FE 11111110
70 Flag 00 00000000
71 "N" 4E 01001110
72 "1" 31 00110001
73 "5" 35 00110101
74 "4" 34 00110100
75 "I" 49 01001001
76 "3" 33 00110011
77 "-" 2D 00101101
78 "L" 4C 01001100
79 "0" 30 00110000
7A "2" 32 00110010
7B (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h) 0A 00001010
7C (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h) 20 00100000
7D (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h) 20 00100000
7E No extension 00 00000000
7F One-byte checksum of entire 128 bytes EDID equals 00h.
82
10000010
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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
DCLK Frequency 1/Tc 66 71 73 MHz (2)
Vertical Total Time TV 802 823 840 TH -
Vertical Active Display Period TVD 800 800 800 TH -
DE
Vertical Active Blanking Period TVB TV-TVD 23 TV-TVD TH
Horizontal Total Time TH 1380 1440 1450 Tc (2)
Horizontal Active Display Period THD 1280 1280 1280 Tc (2)
Horizontal Active Blanking Period THB
INPUT SIGNAL TIMING DIAGRAM
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TH-THD
160
Doc No.:
Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
TH-THD
Tc (2)
DE
DCLK
DE
DATA
TC
HD
T
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6.2 POWER ON/OFF SEQUENCE
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Doc No.:
Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
Power Supply
for LCD, Vcc
0V
- Interface Signal
(LVDS Signal of Transmitter), V
0V
I
- Power for Lamp
Timing Specifications:
0.5< t1 <= 10 msec
0 < t2 <= 50 msec
0 < t3 <= 50 msec
t4 >= 500 msec
Power On
90%
10%
Power Off
90%
t1
t3t2
Valid Data
t6t5
50%50%
ONOFF OFF
Restart
t7
10%
t4
10%
t5 >= 200 msec
t6 >= 200 msec
Note (1) Please follow the power on/off sequence described above. Otherwise, the LCD module might be
damaged.
Note (2) Please avoid floating state of interface signal at invalid period. When the interface signal is invalid, be
sure to pull down the power supply of LCD Vcc to 0 V.
Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the
interface signal is valid. The Backlight inverter power must be turned off before the power supply
for the logic and the interface signal is invalid.
Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To
avoid this phenomenon, we suggest that the Vcc falling time is better to follow 5msЉt7Љ300 ms.
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit Ambient Temperature Ta Ambient Humidity Ha Supply Voltage VCC 3.3 V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" Inverter Current IL 6.0 mA Inverter Driving Frequency FL 61 KHz Inverter Sumida-H05-4915
The measurement methods of optical characteristics are shown in Section 7.2. The following items
should be measured under the test conditions described in Section 7.1 and stable environment shown in
Note (6).
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25r2
50r10
Doc No.:
Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
o
C
%RH
7.2 OPTICAL SPECIFICATIONS
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR 300 500 - - (2), (5)
Response Time
Average Luminance of White
Red
Color Chromaticity
Green
Blue
White
Horizontal
Viewing Angle
Vertica l
White Variation of 5 Points GW
TR - 3 8 ms
- 5 12 ms
T
F
L
AVE
Rx
Ry Gx Gy
Bx
By
=0q, TY =0q
T
x
Viewing Normal Angle
180 200 - cd/m
0.572
0.336
0.310
TYP.
-0.03
0.556
0.159
TYP.
+0.03
0.147 Wx 0.313 ­Wy
Tx+
T
x
TY+ T
Y
-
-
5p
CRt10
Tx=0q, TY =0q
0.329
40 45 ­40 45 ­15 20 -
Deg. (1),(5)
40 45 ­80 - - % (5),(6)
(3)
2
(4), (5)
-
-
-
-
-
(1)
-
-
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.67 ms
Note (1) Definition of Viewing Angle (Tx, Ty):
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Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
Normal
Tx = Ty = 0º
Ty- Ty
TX- = 90º
6 o’clock
T
y- = 90º
x-
y-
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L63 / L0
L63: Luminance of gray level 63
L 0: Luminance of gray level 0
CR = CR (1)
CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).
Tx
Tx
y+
12 o’clock direction
T
y+ = 90º
x+
TX+ = 90º
Note (3) Definition of Response Time (T
100%
90%
Optical
Response
10%
0%
T
R
66.67 ms
, TF):
R
21 / 30
66
Time
T
F
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500
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Doc No.:
Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
Note (4) Definition of Average Luminance of White (L
Measure the luminance of gray level 63 at 5 points
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
AVE
L (x) is corresponding to the luminance of the point X at Figure in Note (6)
Note (5) Measurement Setup:
The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting Backlight for 20 minutes in a windless room.
LCD Module
LCD Panel
USB2000
AVE
):
CS-1000T
ʳʳʳʳʳʳʳʳʳʳʳʳ
Center of the Screen
Light Shield Room
mm
(Ambient Luminance < 2 lux)
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Note (6) Definition of White Variation (GW):
Measure the luminance of gray level 63 at 5 points
GW
= Minimum [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / Maximum [L (1)+ L (2)+ L (3)+ L (4)+ L (5)]
5p
˄˃
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Doc No.:
Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
ˉ
˛˂ˇ
˅
˄˃
ˌ
ˇˈ
˄˄
˄˃ ˄˃
˪˂ˇ ˪˂ˇ ˪˂ˇ ˪˂ ˇ
˛
˛˂ˇ ˛˂ˇ ˛˂ˇ
ˊ
ˆ
˄
˄˅
˪
ˋ
X
: Test Point
˄˃
˄ˆ
X=1 to 13
Active area
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8. PRECAUTIONS
8.1 HANDLING PRECAUTIONS
(1) The module should be assembled into the system firmly by using every mounting hole. Be careful not
to twist or bend the module.
(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause
electrical short or damage the polarizer.
(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and
assembly process.
(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is
very soft and easily scratched.
(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use
Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might
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Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
permanently damage the polarizer due to chemical reaction.
(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel for
a long time.
(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.
(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.
(9) Do not disassemble the module.
(10) Do not pull or fold the lamp wire.
(11) Pins of I/F connector should not be touched directly with bare hands.
8.2 STORAGE PRECAUTIONS
(1) High temperature or humidity may reduce the performance of module. Please store LCD module within
the specified storage conditions.
(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may
damage LCD module when it is operating.
(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the
response time will become slowly, and the starting voltage of lamp will be higher than the room
temperature.
8.3 OPERATION PRECAUTIONS
(1) Do not pull the I/F connector in or out while the module is operating.
(2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This
can prevent the CMOS LSI chips from damage during latch-up.
(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while
assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.
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9. PACKING
9.1 CARTON
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Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
Figure. 9-1 Packing method
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9.2 3$//(7
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Doc No.:
Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
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Figure. 9-2 Packing method
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Doc No.:
Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
10. DEFINITION OF LABELS
10.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
N154I3-L02 Rev.XX
MADE IN CHINA
LEOO
P/N 42T0454
11S 42T0454 Z1ZDSG SSSSSS YMM
(a) Model Name: N154I3- L02
(b) Revision: Rev. XX, for example: C1, C2 …etc.
(c) Serial ID: X X
(d) Production Location: MADE IN CHINA.
(e) UL logo: LEOO especially stands for panel manufactured by CMO NingBo satisfying UL requirement.
X X X X X Y M D L N N N N
Serial No.
Product Line
Year, Month, Date
CMO Internal Use
Revision
CMO Internal Use
FRU42T0455
RoHS
Serial ID includes the information as below:
(a) Manufactured Date: Year: 1~9, for 2001~2009
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1
(b) Revision Code: cover all the change
(c) Serial No.: Manufacturing sequence of product
(d) Product Line: 1 -> Line1, 2 -> Line 2, …etc.
st
to 31st, exclude I , O and U
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Lenovo Barcode Definition:
11S PPPPPPP Z1Z HHH SSSSSS YMM
(a) 11S: Fixed Character
(b) PPPPPPP(P/N): Customer part number (42T0454:Fixed Character)
(c) Z1Z: Fixed Character
(d) HHH: Head Code: (DSG: Fixed Character)
(e) SSSSSS: Serial number
(f) YMM: manufacturing year and month (Y: The last character of Year; MM: Month)
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Model No.: N154I3-L02
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10.2 CARTON LABEL
P/N 42T0454
N154I3-L02
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Doc No.:
Issued Date: Apr. 22, 2008
Model No.: N154I3-L02
Approval
YY/MM
Carton Label Explanation
(1) Part ID: Customer Part Number (P/N:42T0454: Fixed Character)
(2) Model Name: CMO’s Project Name: (N154I3-L02 :Fixed Character)
(3) YY/MM: Manufacturing Year and Month: (YY: The last two character of Year and MM: Month)
Made in China
(4) Production Location: Made in China,.
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