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TFT LCD Approval Specification
MODEL NO.: N154C3-L02
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
Customer : Compal
pproved by :
Note :
記錄 工作 審核 角色 投票
2007-06-05
12:41:25 CST
2007-06-01
09:46:36 CST
2007-05-30
23:45:03 CST
2007-05-30
15:20:25 CST
Approve by
Dept. Mgr.(QA
RA)
Approve by
Director
Approve by
Director
Approve by
Director
yuan_chan(趙俊淵
/52760/54760)
jy_wu(吳震乙
/56360/54952)
ck_wei(韋忠光
/44700)
davis_wang(王銘典
/56600/54383)
Department
Manager(QA RA)
Director Accept
Director Accept
Director Accept
Accept
1 / 30
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Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
- CONTENTS -
REVISION HISTORY
1. GENERAL DESCRIPTION
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
2.2.2 BACKLIGHT UNIT
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
4.2 BACKLIGHT UNIT
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
5.2 BACKLIGHT UNIT
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
5.4 COLOR DATA INPUT ASSIGNMENT
5.5 EDID DATA STRUCTURE
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
6.2 POWER ON/OFF SEQUENCE
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
7.2 OPTICAL SPECIFICATIONS
8. PRECAUTIONS
8.1 HANDLING PRECAUTIONS
8.2 STORAGE PRECAUTIONS
8.3 OPERATION PRECAUTIONS
9. PACKING ------------------------------------------------------- 25
9.1 CARTON
9.2 PALLET
10. DEFINITION OF LABELS
10.1 CMO MODULE LABEL
10.2 CARTON LABEL
------------------------------------------------------- 3
------------------------------------------------------- 4
------------------------------------------------------- 5
------------------------------------------------------- 7
------------------------------------------------------- 11
------------------------------------------------------- 12
------------------------------------------------------- 18
------------------------------------------------------- 20
------------------------------------------------------- 24
------------------------------------------------------- 28
2 / 30
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14076096
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
Version Date
Ver 3.0
May 30, ‘07 All
Page
(New)
REVISION HISTORY
Section Description
All Approval specification release.
3 / 30
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
N154C3-L02 is a 15.4” TFT Liquid Crystal Display module with single CCFL Backlight unit and 30 pins
LVDS interface. This module supports 1440 x 900 WXGA+ mode and can display 262,144 colors. The
optimum viewing angle is at 6 o’clock direction. The inverter module for Backlight is not built in.
1.2 FEATURES
- Thin and light weight
- WXGA+ (1440 x 900 pixels) resolution
- DE (Data Enable) only mode
- 3.3V LVDS (Low Voltage Differential Signaling) interface with 2 pixel/clock
- Support EDID Structure Version 1.3
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
1.3 APPLICATION
- TFT LCD Notebook
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note
Outline Dimension 344(W) x 222 (H) mm
Active Area 331.56 (H) x 207.225 (V) mm
Bezel Opening Area 335 (H) x 210.7 (V) mm
Driver Element a-si TFT active matrix - Pixel Number 1440 x R.G.B. x 900 pixel Pixel Pitch 0.23025 (H) x 0.23025 (V) mm Pixel Arrangement RGB vertical stripe - Display Colors 262,144 color Transmissive Mode Normally white - Surface Treatment Hard coating (3H), Glare - -
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal(H) 343.5 344 344.5 mm
Module Size
I/F connector mounting position The mounting inclination of the connector makes the screen
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Vertical(V) 221.5 222 222.5 mm
Depth(D) --- 6.2 6.5 mm
Weight --- 550 565 g -
center within ±0.5mm as the horizontal.
(1)
(1)
(2)
4 / 30
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2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 +50 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) (a) 90 %RH Max. (Ta <= 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The temperature of panel surface should be 0 ºC min. and 50 ºC max.
Relative Humidity (%RH)
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
Value
Min. Max.
- 200/2 G/ms (3), (5)
NOP
- 1.5 G (4), (5)
NOP
Unit Note
100
90
80
60
Operating Range
40
20
10
Storage Range
Temperature (ºC)
Note (3) 1 time for ± X, ± Y, ± Z. for Condition (200G / 2ms) is half Sine Wave,.
Note (4) 10~200 Hz, 0.5hr/cycle 1cycle for X,Y,Z
8060 -20 400 20-40
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid
enough so that the module would not be twisted or bent by the fixture.
The fixing condition is shown as below:
t Room Temperature
Side Mount Fixing Screw
Gap=2mm
Bracket
LCD Module
Side Mount Fixing Screw
Stage
5 / 30
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2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage Vcc -0.3 +4.0 V
Logic Input Voltage VIN -0.3 Vcc+0.3 V
2.2.2 BACKLIGHT UNIT
Item Symbol
Lamp Voltage VL - 2.5K V
Lamp Current IL 2.0 7.0 mA
Lamp Frequency FL 45 80 KHz
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
Value
Min. Max.
Value
Min. Max.
Unit Note
Unit Note
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
(1)
(1), (2), IL = 6.0 mA
RMS
RMS
(1), (2)
should be restricted to the conditions described under Normal Operating Conditions.
Note (2) Specified values are for lamp (Refer to Section 3.2 for further information).
6 / 30
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Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
3 ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max.
Power Supply Voltage Vcc 3.0 3.3 3.6 V Permissive Ripple Voltage VRP 50 mV Rush Current I
1.5 A (2)
RUSH
Initial Stage Current IIS 1.0 A (2)
Power Supply Current
White 370 410 mA (3)a
Black
LVDS Differential Input High Threshold V
LVDS Differential Input Low Threshold V
TH(LVDS)
TL(LVDS)
480 520 mA (3)b
+100 mV
-100 mV
LVDS Common Mode Voltage VCM 1.125 1.375 V (5)
LVDS Differential Input Voltage |VID| 100 600 mV (5)
Terminating Resistor RT 100 Ohm
Power per EBL WG P
- 3.63 - W (4)
EBL
Note (1) The ambient temperature is Ta = 25 ± 2 ºC.
Value
Unit Note
Approval
(5),
=1.2V
V
CM
(5)
=1.2V
V
CM
Note (2) I
I
: the maximum current when VCC is rising
RUSH
: the maximum current of the first 100ms after power-on
IS
Measurement Conditions: Shown as the following figure. Test pattern: black.
+3.3V
R1
47K
Q1 2SK1475
FUSE
C3
1uF
(High to Low)
(Control Signal)
SW
+12V
C1
1uF
VR1
R2
1K
47K
0.01uF
Q2
2SK1470
C2
Vcc rising time is 470us
0.9Vcc
0V
470us
0.1Vcc
+3.3V
100ms
I
I
RUSH
IS
Vcc
(LCD Module Input)
VCC
ICC
7 / 30
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14076096
Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, fv = 60
Hz, whereas a power dissipation check pattern below is displayed.
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input
a. White Pattern
Active Area
power. Test conditions are as follows.
(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f
(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file
“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.
(c) Luminance: 60 nits.
(d) The inverter used is provided from _Sumida__.
= 60 Hz,
v
b. Black Pattern
Active Area
Please contact them for detail information.
CMO doesn’t provide the inverter in this product.
Note (5) The parameters of LVDS signals are defined as the following figures.
CM
Single Ended
Differential
V
0V
V
0V
V
VID|
VID
8 / 30
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Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max.
Lamp Input Voltage VL 657 730 803 V
Lamp Current IL 2.0 6.0 7.0 mA
Lamp Turn On Voltage VS
- - 1460 (25
- - 1600 (0
Operating Frequency FL 45 55 80 KHz (3)
Power Consumption PL - 4.38 - W (4), IL = 6.0 mA
Lamp Life Time LBL 15,000 - - Hrs (5)
Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:
Value
o
C) V
o
C) V
Unit Note
IL = 6.0 mA
RMS
(1)
RMS
(2)
RMS
(2)
RMS
Approval
LCD
Module
HV (Pink)
LV (Black)
1
2
Current Meter
Inverter
A
Note (2) The voltage that must be larger than Vs should be applied to the lamp for more than 1 second after
startup. Otherwise, the lamp may not be turned on normally.
Note (3) The lamp frequency may generate interference with horizontal synchronous frequency from the
display, and this may cause line flow on the display. In order to avoid interference, the lamp
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.
Note (4) P
= IL ×VL
L
Note (5) The lifetime of lamp is defined as the time when it continues to operate under the conditions at Ta
= 25 ±2
C and IL = 6.0 mA
until one of the following events occurs:
RMS
o
(a) When the brightness becomes ≦ 50% of its original value.
(b) When the effective ignition length becomes ≦ 80% of its original value. (Effective ignition
length is defined as an area that the brightness is less than 70% compared to the center point.)
Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the
inverter must have specifications for the modularized lamp. The performance of the Backlight,
such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for
the lamp. All the parameters of an inverter should be carefully designed to avoid generating too
much current leakage from high voltage output of the inverter. When designing or ordering the
inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the
inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module
should be operated in the same manners when it is installed in your instrument.
Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its
leakage current.
a. The asymmetry rate of the inverter waveform should be 10% below;
9 / 30
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b. The distortion rate of the waveform should be within √2 ± 10%;
c. The ideal sine wave form shall be symmetric in positive and negative polarities.
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
* Asymmetry rate:
I p
I -p
| I
* Distortion rate
I
– I –p | / I
p
(or I –p) / I
p
rms
rms
* 100%
10 / 30
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4 BLOCK DIAGRAM
4.1 TFT LCD MODULE
LVDS Display
Data & Clock
(JAE-FI-XB30SRL-HF11)
INPUT CONNECTOR
Vcc
GND
Data
CLK
V
EDID
EDID
EDID
VL
LAMP CONNECTOR
(JST-BHSR-02VS-1)
LVDS INPUT /
TIMING CONTROLLER
DC/DC CONVERTER &
REFERENCE VOLTAGE
GENERATOR
EDID
EEPROM
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
SCAN DRIVER IC
TFT LCD PANEL
DA TA DRIVER IC
BACKLIGHT UNIT
Approval
4.2 BACKLIGHT UNIT
1 HV (White)
2 LV (Black
11 / 30
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5 INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin Symbol Description Polarity Remark
1 Vss Ground
2 Vcc Power Supply +3.3 V (typical)
3 Vcc Power Supply +3.3 V (typical)
4 V
5 NC Non-Connection
6 CLK
7 DATA
8 RXO0- LVDS Differential Data Input (Odd) Negative
9 RXO0+ LVDS Differential Data Input (Odd) Positive
10 Vss Ground
11 RXO1- LVDS Differential Data Input (Odd) Negative
12 RXO1+ LVDS Differential Data Input (Odd) Positive
13 Vss Ground
14 RXO2- LVDS Differential Data Input (Odd) Negative
15 RXO2+ LVDS Differential Data Input (Odd) Positive
16 Vss Ground
17 RXOC- LVDS Clock Data Input (Odd) Negative
18 RXOC+ LVDS Clock Data Input (Odd) Positive
19 Vss Ground
20 RxE0- LVDS Differential Data Input (Even) Negative
21 RxE0+ LVDS Differential Data Input (Even) Positive
22 Vss Ground
23 RxE1- LVDS Differential Data Input (Even) Negative
24 RxE1+ LVDS Differential Data Input (Even) Positive
25 Vss Ground
26 RxE2- LVDS Differential Data Input (Even) Negative
27 RxE2+ LVDS Differential Data Input (Even) Positive
28 Vss Ground
29 RXEC- LVDS Clock Data Input (Even) Negative
30 RXEC+ LVDS Clock Data Input (Even) Positive
Note (1) Connector Part No.: JAE-FI-XB30SRL-HF11 or equivalent
DDC 3.3V Power
EDID
DDC Clock
EDID
DDC Data
EDID
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
Note (2) User’s connector Part No: JAE-FI-X30C2L or equivalent
Note (3) The first pixel is odd as shown in the following figure.
12 / 30
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5.2 BACKLIGHT UNIT
Pin Symbol Description Color
1 HV High Voltage Pink
2 LV Ground Black
Note (1) Connector Part No.: JST-BHSR-02VS-1 or equivalent
Note (2) User’s connector Part No.: JST-SM02B-BHSS-1-TB or equivalent
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
RXOC+
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
RXO2+/-
RXO1+/-
RXO0+/-
RXEC+
RXE2+/-
RXE1+/-
RXE0+/-
T/7
IN20 IN19 IN18 IN17 IN16 IN15 IN14
DE OB5 OB4 OB3 OB2 Vsync Hsync
IN13 IN12 IN11 IN10 IN9 IN8 IN7
OB1 OG4 OG3 OG2 OG1 OB0 OG5
IN6 IN5 IN4 IN3 IN2 IN1 IN0
OG0 OR3 OR2 OR1 OR0 OR5 OR4
Signal for 1 DCLK Cycle (T)
T/7
IN20 IN19 IN18 IN17 IN16 IN15 IN14
DE EB5 EB4 EB3 EB2 Vsync Hsync
IN13 IN12 IN11 IN10 IN9 IN8 IN7
EB1 EG4 EG3 EG2 EG1 EB0 EG5
IN6 IN5 IN4 IN3 IN2 IN1 IN0
EG0 ER3 ER2 ER1 ER0 ER5 ER4
Signal for 1 DCLK Cycle (T)
13 / 30
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5.4 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for
the color. The higher the binary input the brighter the color. The table below provides the assignment of
color versus data input.
Color
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black
Red
Green
Basic
Colors
Gray
Scale
Of
Red
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Yellow
White
Red(0)/Dark
Red(1)
Red(2)
:
:
Red(61)
Red(62)
Red(63)
Green(0)/Dark
Green(1)
Green(2)
:
:
Green(61)
Green(62)
Green(63)
Blue(0)/Dark
Blue(1)
Blue(2)
:
:
Blue(61)
Blue(62)
Blue(63)
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
0
0
0
0
0
0
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
Data Signal
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
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5.5 EDID DATA STRUCTURE
The EDID (Extended Display Identification Data) data formats are to support displays as defined in the
VESA Plug & Display and FPDI standards.
Byte #
(decimal)
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
Byte #
(hex)
Field Name and Comments
0 Header
1 Header
2 Header
3 Header
4 Header
5 Header
6 Header
7 Header
8 EISA ID manufacturer name (“CMO”)
9 EISA ID manufacturer name (Compressed ASCII)
0A ID product code (N154C3-L02) 41
0B ID product code (hex LSB first; N154C3-L02) 15
0C ID S/N (fixed “0”)
0D ID S/N (fixed “0”)
0E ID S/N (fixed “0”)
0F ID S/N (fixed “0”)
10 Week of manufacture (fixed week code)
11 Year of manufacture (fixed year code)
12 EDID structure version # (“1”)
13 EDID revision # (“3”)
14 Video I/P definition (“digital”)
15 Active area horizontal 33.156cm 21
16 Active area vertical 20.7225cm 14
17 Display Gamma (Gamma = ”2.2”)
18 Feature support (“Active off, RGB Color”)
19 Rx1 Rx0 Ry1 Ry0 Gx1 Gx0 Gy1 Gy0 6C
1A Bx1 Bx0 By1 By0 Wx1 Wx0 Wy1 Wy0
1B Rx= 0.591 97
1C Ry= 0.338 56
1D Gx= 0.319 51
1E Gy= 0.535 89
1F Bx= 0.151 26
20 By= 0.127 20
21 Wx= 0.313 50
22 Wy= 0.329 54
23 Established timings 1
24 Established timings 2
25 Manufacturer’s reserved timings
26 Standard timing ID # 1
27 Standard timing ID # 1
28 Standard timing ID # 2
29 Standard timing ID # 2
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
Value
(hex)
00 00000000
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
00 00000000
0D 00001101
AF 10101111
00 00000000
00 00000000
00 00000000
00 00000000
32 00110010
10 00010000
01 00000001
03 00000011
80 10000000
78 01111000
0A 00001010
E5 11100101
00 00000000
00 00000000
00 00000000
01 00000001
01 00000001
01 00000001
01 00000001
Value
(binary)
01000001
00010101
00100001
00010100
01101100
10010111
01010110
01010001
10001001
00100110
00100000
01010000
01010100
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Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
2A Standard timing ID # 3
2B Standard timing ID # 3
2C Standard timing ID # 4
2D Standard timing ID # 4
2E Standard timing ID # 5
2F Standard timing ID # 5
30 Standard timing ID # 6
31 Standard timing ID # 6
32 Standard timing ID # 7
33 Standard timing ID # 7
34 Standard timing ID # 8
35 Standard timing ID # 8
Detailed timing description # 1 Pixel clock (“88.75MHz”,
36
According to VESA CVT Rev1.1)
37 # 1 Pixel clock (hex LSB first)
38 # 1 H active (“1440”)
39 # 1 H blank (“160”)
3A # 1 H active : H blank (“1440 : 160”)
3B # 1 V active (”900”)
3C # 1 V blank (”26”)
3D # 1 V active : V blank (”900 :26”)
3E # 1 H sync offset (”48”)
3F # 1 H sync pulse width ("32”)
40 # 1 V sync offset : V sync pulse width (”3 : 6”)
# 1 H sync offset : H sync pulse width : V sync offset : V sync
41
width (”48: 32 : 3 : 6”)
42 # 1 H image size (”332 mm”) 4C
43 # 1 V image size (”207 mm”) CF
44 # 1 H image size : V image size (”332 : 207”)
45 # 1 H boarder (”0”)
46 # 1 V boarder (”0”)
# 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol
47
Negatives
48 Detailed timing description # 2
49 # 2 Flag
4A # 2 Reserved
# 2 FE (hex) defines ASCII string (Model Name “N154C3-L02”,
4B
ASCII)
4C # 2 Flag
4D # 2 1st character of name (“N”) 4E
4E # 2 2nd character of name (“1”) 31
4F # 2 3rd character of name (“5”) 35
50 # 2 4th character of name (“4”) 34
51 # 2 5th character of name (“C”) 43
52 # 2 6th character of name (“3”) 33
53 # 2 7th character of name (“-”) 2D
54 # 2 8th character of name (“L”) 4C
55 # 2 9th character of name (“0”) 30
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
AB 10101011
22 00100010
A0 10100000
A0 10100000
50 01010000
84 10000100
1A 00011010
30 00110000
30 00110000
20 00100000
36 00110110
00 00000000
10 00010000
00 00000000
00 00000000
18 00011000
00 00000000
00 00000000
00 00000000
FE 11111110
00 00000000
01001100
11001111
01001110
00110001
00110101
00110100
01000011
00110011
00101101
01001100
00110000
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Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
56 # 2 9th character of name (“2”) 32
57 # 2 New line character indicates end of ASCII string
58 # 2 Padding with “Blank” character
59 # 2 Padding with “Blank” character
5A Detailed timing description # 3
5B # 3 Flag
5C # 3 Reserved
5D # 3 FE (hex) defines ASCII string (Vendor “CMO”, ASCII)
5E # 3 Flag
5F # 3 1st character of string (“C”)
60 # 3 2nd character of string (“M”)
61 # 3 3rd character of string (“O”)
62 # 3 New line character indicates end of ASCII string
63 # 3 Padding with “Blank” character
64 # 3 Padding with “Blank” character
65 # 3 Padding with “Blank” character
66 # 3 Padding with “Blank” character
67 # 3 Padding with “Blank” character
68 # 3 Padding with “Blank” character
69 # 3 Padding with “Blank” character
6A # 3 Padding with “Blank” character
6B # 3 Padding with “Blank” character
6C Detailed timing description # 4
6D # 4 Flag
6E # 4 Reserved
# 4 FE (hex) defines ASCII string (Model Name“N154C3-L02”,
6F
ASCII)
70 # 4 Flag
71 # 4 1st character of name (“N”) 4E
72 # 4 2nd character of name (“1”) 31
73 # 4 3rd character of name (“5”) 35
74 # 4 4th character of name (“4”) 34
75 # 4 5th character of name (“C”) 43
76 # 4 6th character of name (“3”) 33
77 # 4 7th character of name (“-”) 2D
78 # 4 8th character of name (“L”) 4C
79 # 4 9th character of name (“0”)
7A # 4 9th character of name (“2”)
7B # 4 New line character indicates end of ASCII string
7C # 4 Padding with “Blank” character
7D # 4 Padding with “Blank” character
7E Extension flag
7F Checksum 68
0A 00001010
20 00100000
20 00100000
00 00000000
00 00000000
00 00000000
FE 11111110
00 00000000
43 01000011
4D 01001101
4F 01001111
0A 00001010
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
00 00000000
00 00000000
00 00000000
FE 11111110
00 00000000
30 00110000
32 00110010
0A 00001010
20 00100000
20 00100000
00 00000000
00110010
01001110
00110001
00110101
00110100
01000011
00110011
00101101
01001100
01101000
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6 INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
DCLK Frequency 1/Tc 25 44.5 60 MHz (2)
Vertical Total Time TV 910 926 1500 TH -
Vertical Active Display Period TVD 900 900 900 TH -
DE
Note (1) Because this module is operated by DE only mode, Hsync and Vsync are ignored.
(2) 2 channels LVDS input.
Vertical Active Blanking Period TVB TV-TVD 26 TV-TVD TH
Horizontal Total Time TH 760 800 880 Tc (2)
Horizontal Active Display Period THD 720 720 720 Tc (2)
Horizontal Active Blanking Period THB
TH-THD
80
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
TH-THD
Tc (2)
INPUT SIGNAL TIMING DIAGRAM
DE
DCLK
T
DE
DATA
TVD
C
v
T
T
H
HD
T
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6.2 POWER ON/OFF SEQUENCE
Power On
Power Off
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
Restart
Power Supply
for LCD, Vcc
0V
- LVDS Interface
0V
- Power for Lamp
Timing Specifications:
0.5 ≦ t1 ≦ 10 ms
0 ≦ t2 ≦ 50 ms
0 ≦ t3 ≦ 50 ms
t4 ≧ 500 ms
t5 ≧ 200 ms
10%
90%
t1
90%
Valid Data
t6 t5
50%50%
ONOFF OFF
t7
10%
t4
t3 t2
10%
t6 ≧ 200 ms
Note (1) Please follow the power on/off sequence described above. Otherwise, the LCD module might be
damaged.
Note (2) Please avoid floating state of interface signal at invalid period. When the interface signal is invalid, be
sure to pull down the power supply of LCD Vcc to 0 V.
Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the
interface signal is valid. The Backlight inverter power must be turned off before the power supply
for the logic and the interface signal is invalid.
Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To
avoid this phenomenon, we suggest that the Vcc falling time is better to follow 5≦t7≦300 ms.
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
Ambient Temperature Ta 25±2
Ambient Humidity Ha 50±10 %RH
Supply Voltage VCC 3.3 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Inverter Current IL
Inverter Driving Frequency FL
Inverter Sumida-H05-4915
The measurement methods of optical characteristics are shown in Section 7.2. The following items
should be measured under the test conditions described in Section 7.1 and stable environment shown in
Note (5).
6.0
61
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
o
C
mA
KHz
7.2 OPTICAL SPECIFICATIONS
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR 300 400 - - (2), (5)
Response Time
Average Luminance of White L
White Variation
Red
Color
Chromaticity
Green
Blue
White
Horizontal
Viewing Angle
Vertical
TR - 2 4 ms
- 6 12 ms
T
F
170 200 - cd/m2(4), (5)
AVE
5pts - - 1.3 - (5), (6)
δW
Rx
Ry
Gx
Gy
Bx
By
θ
=0°, θY =0°
x
Viewing Normal
Angle
TYP
-0.03
0.594
0.342
0.319
0.537
0.152
0.134
TYP
+0.03
Wx 0.313 Wy
θ
+
x
θ
x
θ
+
Y
θ
Y
CR≥10
-
0.329
40 45 40 45 15 20 40 45 -
Deg.
(3)
-
-
-
-
-
(1)
-
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Note (1) Definition of Viewing Angle (θx, θy):
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
θX- = 90º
x-
6 o’clock
θ
y- = 90º
y-
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Normal
θx = θy = 0º
θy- θy+
θx-
θx+
y+
12 o’clock direction
θ
y+ = 90º
x+
θX+ = 90º
Contrast Ratio (CR) = L63 / L0
L63: Luminance of gray level 63
L 0: Luminance of gray level 0
CR = CR (5)
CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).
Note (3) Definition of Response Time (T
100%
90%
Optical
Response
10%
0%
R
T
R
, TF):
Time
T
F
66.67 ms
66.67 ms
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500
14076096
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
Note (4) Definition of Average Luminance of White (L
Measure the luminance of gray level 63 at 5 points
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
AVE
L (x) is corresponding to the luminance of the point X at Figure in Note (6).
Note (5) Measurement Setup:
The LCD module should be stabilized at given temperature for 15 minutes to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting Backlight for 15 minutes in a windless room.
LCD Module
LCD Panel
USB2000
AVE
):
CS-1000T
Center of the Screen
mm
Light Shield Room
(Ambient Luminance < 2 lux)
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Note (6) Definition of White Variation (δW):
Measure the luminance of gray level 63 at 5 points
= Maximum [L (1) ~ L (5)] / Minimum [L (1) ~ L (5)]
δW
5p
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
Horizontal Line
Vertical Line
W
W/4
W/2
3W/4
D/4 D/2 3D/4
1 2
3
D
5
Active Area
X
4
: Test Point
X=1 to 5
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8 PRECAUTIONS
8.1 HANDLING PRECAUTIONS
(1) The module should be assembled into the system firmly by using every mounting hole. Be careful not
to twist or bend the module.
(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause
electrical short or damage the polarizer.
(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and
assembly process.
(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is
very soft and easily scratched.
(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might
permanently damage the polarizer due to chemical reaction.
(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel for
a long time.
(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.
(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.
(9) Do not disassemble the module.
(10) Do not pull or fold the lamp wire.
(11) Pins of I/F connector should not be touched directly with bare hands.
8.2 STORAGE PRECAUTIONS
(1) High temperature or humidity may reduce the performance of module. Please store LCD module within
the specified storage conditions.
(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may
damage LCD module when it is operating.
(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the
response time will become slowly, and the starting voltage of lamp will be higher than the room
temperature.
8.3 OPERATION PRECAUTIONS
(1) Do not pull the I/F connector in or out while the module is operating.
(2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This
can prevent the CMOS LSI chips from damage during latch-up.
(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while
assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.
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9. PACKING
9.1 CARTON
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
Figure. 9-1 Packing method
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9.2 PALLET
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
Figure. 9-2 Packing method
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9.3 PALLET FOR AIR FLEIGHT
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
Figure. 9-3 Packing method
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Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
10
DEFINITION OF LABELS
10.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
E207943
N154C3-L02
X X X X X X X Y M D L N N N N
Rev.XX
(a) Model Name: N154C3-L02
MADE IN XXXXX
XXXX
(b) Revision: Rev. XX, for example: A1, …, C1, C2 …etc.
(c) Serial ID: X X
X X X X X Y M D X N N N N
Serial No.
CMO Internal Use
Year, Month, Date
CMO Internal Use
Revision
CMO Internal Use
Serial ID includes the information as below:
(a) Manufactured Date: Year: 1~9, for 2001~2009
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1
st
to 31st, exclude I , O and U
(b) Revision Code: cover all the change
(c) Serial No.: Manufacturing sequence of product
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10.2 CARTON LABEL
Doc. No.:
Issued Date: May.30 2007
Model No.: N154C3-L02
Approval
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