CMO N154C1-L03 Specification

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TFT LCD Approval Specification

MODEL NO.: N154C1-L03

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Doc No.: 14068529

Issued Date: Aug.24, 2006

Model No.: N154C1-L03

Approval

Customer : Dell

pproved by :

Note :











2006-09-07 11:44:33
CST

2006-08-25
16:50:36 CST

Approve by Dept.
Mgr.(QA RA)

Approve by Director

tomy_chen(ຫةԫ
/52720/54140/43150)

teren_lin(ࣥ෌ո/56910/36064)

Assignee Accept

Director Accept

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Doc No.: 14068529

Issued Date: Aug.24, 2006

Model No.: N154C1-L03

Approval

- CONTENTS -

REVISION HISTORY ------------------------------------------------------- 3

1. GENERAL DESCRIPTION ------------------------------------------------------- 4

1.1 OVERVIEW

1.2 FEATURES

1.3 APPLICATION

1.4 GENERAL SPECIFICATIONS

1.5 MECHANICAL SPECIFICATIONS

2. ABSOLUTE MAXIMUM RATINGS ------------------------------------------------------- 5

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

2.2.2 BACKLIGHT UNIT

3. ELECTRICAL CHARACTERISTICS ------------------------------------------------------- 7

3.1 TFT LCD MODULE

3.2 BACKLIGHT UNIT

4. BLOCK DIAGRAM ------------------------------------------------------- 11

4.1 TFT LCD MODULE

4.2 BACKLIGHT UNIT

5. INPUT TERMINAL PIN ASSIGNMENT ------------------------------------------------------- 12

5.1 TFT LCD MODULE

5.2 BACKLIGHT UNIT

5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL

5.4 COLOR DATA INPUT ASSIGNMENT

5.5 EDID DATA STRUCTURE

6. INVERTER SPECIFICATION ------------------------------------------------------- 18

6.1 CONNECTOR TYPE

6.2 INPUT CONNECTOR PIN ASSIGNMENT

6.3 OUTPUT CONNECTOR PIN ASSIGNMENT

6.4 GENERAL ELECTRICAL SPECIFICATION

7. INTERFACE TIMING ------------------------------------------------------- 22

7.1 INPUT SIGNAL TIMING SPECIFICATIONS

7.2 POWER ON/OFF SEQUENCE

8. OPTICAL CHARACTERISTICS ------------------------------------------------------- 24

8.1 TEST CONDITIONS

8.2 OPTICAL SPECIFICATIONS

9. PRECAUTIONS ------------------------------------------------------- 28

9.1 HANDLING PRECAUTIONS

9.2 STORAGE PRECAUTIONS

9.3 OPERATION PRECAUTIONS

10. PACKING ------------------------------------------------------- 29

10.1 CARTON

10.2 PALLET

11. DEFINITION OF LABELS ------------------------------------------------------- 31

11.1 CMO MODULE LABEL

11.2 CARTON LABEL

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Model No.: N154C1-L03

Approval

REVISION HISTORY

Version Date

May. 10. ‘06

Jun. 15. ‘06

Aug. 15.’06
Aug. 24.’06

Ver 0.0
Ver 1.0

Ver 3.0
Ver 3.1

Page

(New)

All

4
6
7

9
12
13
18
24
24
32
16

8
12
13
23

Section Description

Tentative specification first issued.

All

1.5

2.2.2

3.1

3.2

5.1

5.2

8.1

8.2

11.3

5.5

3.1

4.1

5.1

7.1

Mechanical Specification - depth
Backlight Unit – lamp current, lamp frequency
TFT LCD Module – power supply current
Backlight Unit
TFT LCD Module – Note(1) connector part no.
Backlight Unit – connector pin definition

6

Add Inverter Specification
Test Conditions
Optical Specifications
Carton Label
EDID Data Structure
Electrical Characteristics
Block Diagram
Input Terminal Pin Assignment
Input Signal Timing Specifications

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1 GENERAL DESCRIPTION

1.1 OVERVIEW

N154C1-L03 is a 15.4” TFT Liquid Crystal Display module with single CCFL Backlight unit and 30 pins
LVDS interface. This module supports 1440 x 900 WXGA+ mode and can display 262,144 colors. The
optimum viewing angle is at 6 o’clock direction. The inverter module for Backlight is not built in.

1.2 FEATURES

- Thin and light weight

- WXGA+ (1440 x 900 pixels) resolution

- DE (Data Enable) only mode

- 3.3V LVDS (Low Voltage Differential Signaling) interface with 2 pixel/clock

- Support EDID Structure Version 1.3

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Model No.: N154C1-L03

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1.3 APPLICATION

- TFT LCD Notebook

1.4 GENERAL SPECIFICATI0NS

Item Specification Unit Note
Outline Dimension 344(W) x 222 (H) mm
Active Area 331.56 (H) x 207.225 (V) mm
Bezel Opening Area 335 (H) x 210.7 (V) mm
Driver Element a-si TFT active matrix - ­Pixel Number 1440 x R.G.B. x 900 pixel ­Pixel Pitch 0.23025 (H) x 0.23025 (V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 262,144 color ­Transmissive Mode Normally white - ­Surface Treatment Hard coating (3H), Glare - -

1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal(H) 343.5 344 344.5 mm

Module Size

I/F connector mounting position The mounting inclination of the connector makes the screen

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

Vertical(V) 221.5 222 222.5 mm
Depth(D) --- --- 6.3 mm

Weight --- 530 545 g -

center within ±0.5mm as the horizontal.

(1)

(1)

(2)

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A

2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 +50 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V

Note (1) (a) 90 %RH Max. (Ta <= 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The temperature of panel surface should be 0 ºC min. and 50 ºC max.

Relative Humidity (%RH)

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Model No.: N154C1-L03

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Value

Min. Max.

- 220/2 G/ms (3), (5)

NOP

- 1.5 G (4), (5)

NOP

Unit Note

100

90

80

60

Operating Range

40

20
10

Storage Range

Temperature (ºC)

Note (3) 1 time for ± X, ± Y, ± Z. for Condition (220G / 2ms) is half Sine Wave,.
Note (4) 10~200 Hz, 0.5hr/cycle 1cycle for X,Y,Z

8060-20 400 20-40

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid

enough so that the module would not be twisted or bent by the fixture.
The fixing condition is shown as below:

t Room Temperature

Side Mount Fixing Screw

Gap=2mm

Bracket

LCD Module

Side Mount Fixing Screw

Stage

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2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

Item Symbol

Power Supply Voltage Vcc -0.3 +4.0 V
Logic Input Voltage VIN -0.3 Vcc+0.3 V

2.2.2 BACKLIGHT UNIT

Item Symbol

Lamp Voltage VL - 2.5K V
Lamp Current IL 2.0 7.0 mA
Lamp Frequency FL 45 80 KHz

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

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Value

Min. Max.

Value

Min. Max.

Unit Note

Unit Note

Doc No.: 14068529

Issued Date: Aug.24, 2006

Model No.: N154C1-L03

Approval

(1)

(1), (2), IL = 6.0 mA

RMS

RMS

(1), (2)

should be restricted to the conditions described under Normal Operating Conditions.

Note (2) Specified values are for lamp (Refer to Section 3.2 for further information).

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Model No.: N154C1-L03

3 ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE Ta = 25 ± 2 ºC

Parameter Symbol

Min. Typ. Max.
Power Supply Voltage Vcc 3.0 3.3 3.6 V ­Permissive Ripple Voltage VRP 50 mV ­Rush Current I

1.5 A (2)

RUSH

Initial Stage Current IIS 1.0 A (2)
Power Supply Current

LVDS Differential Input High Threshold V

LVDS Differential Input Low Threshold V

White 290 350 mA (3)a
Black

Icc

TH(LVDS)

TL(LVDS)

430 500 mA (3)b
+100 mV

-100 mV

LVDS Common Mode Voltage VCM 1.125 1.375 V (5)
LVDS Differential Input Voltage |VID| 100 600 mV (5)
Terminating Resistor RT 100 Ohm
Power per EBL WG P

- 3.2 - W (4)

EBL

Note (1) The ambient temperature is Ta = 25 ± 2 ºC.

Value

Unit Note

Approval

(5),

=1.2V

V

CM

(5)

=1.2V

V

CM

Note (2) I
I

: the maximum current when VCC is rising

RUSH

: the maximum current of the first 100ms after power-on

IS

Measurement Conditions: Shown as the following figure. Test pattern: black.

+3.3V

R1

47K

Q1 2SK1475

FUSE

C3

1uF

(High to Low)

(Control Signal)

SW

+12V

C1

1uF

VR1

R2

1K

47K

0.01uF

Q2

2SK1470

C2

Vcc rising time is 470us

0.9Vcc

0V

470us

0.1Vcc

+3.3V

100ms

I

I

RUSH

IS

Vcc

(LCD Module Input)

VCC

ICC

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|

|

|

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Doc No.: 14068529

Issued Date: Aug.24, 2006

Model No.: N154C1-L03

Approval

Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, f

Hz, whereas a power dissipation check pattern below is displayed.

Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input

a. White Pattern

Active Area

power. Test conditions are as follows.
(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f
(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file

= 60 Hz,

v

b. Black Pattern

Active Area

= 60

v

“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.
(c) Luminance: 60 nits.

(d) The inverter used is provided from Sumida

Note (5) The parameters of LVDS signals are defined as the following figures.

CM

Single Ended

Differential

V

0V

V

0V

V

.

VID|

VID

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Model No.: N154C1-L03

3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC

Parameter Symbol

Min. Typ. Max.
Lamp Input Voltage VL 657 730 803 V
Lamp Current IL 2.0 6.0 7.0 mA

Lamp Turn On Voltage VS

- - (1460) (25

- - (1600) (0
Operating Frequency FL 45 55 80 KHz (3)
Power Consumption PL - 4.38 - W (4), IL = 6.0 mA
Lamp Life Time LBL 15,000 - - Hrs (5)

Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:

Value

o

C) V

o

C) V

Unit Note

I

RMS

RMS

(2)

RMS

(2)

RMS

= 6.0 mA

L

(1)

Approval

LCD
Module

HV (White)

LV (Black)

1

2

Current Meter

Inverter

A

Note (2) The voltage that must be larger than Vs should be applied to the lamp for more than 1 second

after startup. Otherwise, the lamp may not be turned on normally.

Note (3) The lamp frequency may generate interference with horizontal synchronous frequency from the

display, and this may cause line flow on the display. In order to avoid interference, the lamp
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.

Note (4) P

= IL ×VL

L

Note (5) The lifetime of lamp is defined as the time when it continues to operate under the conditions at Ta

= 25 ±2

o

C and IL = 6.0 mA

until one of the following events occurs:

RMS

(a) When the brightness becomes or lower than 50% of its original value.
(b) When the effective ignition length becomes or lower than 80% of its original value. (Effective

ignition length is defined as an area that the brightness is less than 70% compared to the
center point.)

Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the

inverter must have specifications for the modularized lamp. The performance of the Backlight,
such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for
the lamp. All the parameters of an inverter should be carefully designed to avoid generating too
much current leakage from high voltage output of the inverter. When designing or ordering the
inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the
inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module
should be operated in the same manners when it is installed in your instrument.

Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its
leakage current.
a. The asymmetry rate of the inverter waveform should be 10% below;

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b. The distortion rate of the waveform should be within 2 ± 10%;
c. The ideal sine wave form shall be symmetric in positive and negative polarities.

I p

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* Asymmetry rate:
| I

p

– I –p | / I

* 100%

rms

Doc No.: 14068529

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Model No.: N154C1-L03

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I -p

* Distortion rate
I

(or I –p) / I

p

rms

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)

4 BLOCK DIAGRAM

4.1 TFT LCD MODULE

LVDS Display

Data & Clock

Vcc

INPUT CONNECTOR

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LVDS INPUT /

TIMING CONTROLLER

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Model No.: N154C1-L03

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SCAN DRIVER IC

TFT LCD PANEL

GND

Data

EDID

CLK

EDID

V

EDID

VL

LAMP CONNECTOR

4.2 BACKLIGHT UNIT

DC/DC CONVERTER &

REFERENCE VOLTAGE

GENERATOR

EDID

EEPROM

DATA DRIVER IC

BACKLIGHT UNIT

1 HV (White)

2 LV (Black

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5 INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD MODULE

Pin Symbol Description Polarity Remark

1 Vss Ground
2 Vcc Power Supply +3.3 V (typical)
3 Vcc Power Supply +3.3 V (typical)
4 V
5 NC Non-Connection
6 CLK
7 DATA
8 RXO0- LVDS Differential Data Input (Odd) Negative

9 RXO0+ LVDS Differential Data Input (Odd) Positive
10 Vss Ground
11 RXO1- LVDS Differential Data Input (Odd) Negative
12 RXO1+ LVDS Differential Data Input (Odd) Positive
13 Vss Ground
14 RXO2- LVDS Differential Data Input (Odd) Negative
15 RXO2+ LVDS Differential Data Input (Odd) Positive
16 Vss Ground
17 RXOC- LVDS Clock Data Input (Odd) Negative
18 RXOC+ LVDS Clock Data Input (Odd) Positive
19 Vss Ground

20 RxE0- LVDS Differential Data Input (Even) Negative
21 RxE0+ LVDS Differential Data Input (Even) Positive

22 Vss Ground
23 RxE1- LVDS Differential Data Input (Even) Negative
24 RxE1+ LVDS Differential Data Input (Even) Positive
25 Vss Ground
26 RxE2- LVDS Differential Data Input (Even) Negative
27 RxE2+ LVDS Differential Data Input (Even) Positive
28 Vss Ground
29 RXEC- LVDS Clock Data Input (Even) Negative
30 RXEC+ LVDS Clock Data Input (Even) Positive

Note (1) Connector Part No.: JAE-FI-XB30SL-HF11 or equivalent

DDC 3.3V Power

EDID

DDC Clock

EDID

DDC Data

EDID

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Note (2) User’s connector Part No: JAE-FI-X30C2L or equivalent
Note (3) The first pixel is odd as shown in the following figure.

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5.2 BACKLIGHT UNIT

Pin Symbol Description Color

1 HV High Voltage White
2 LV Ground Black

Note (1) Connector Part No.: JST-BHSR-02VS-1 or equivalent
Note (2) User’s connector Part No.: JST-SM02B-BHSS-1-TB or equivalent

5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL

RXOC+

RXO2+/-

RXO1+/-

RXO0+/-

T/7

IN20 IN19 IN18 IN17 IN16 IN15 IN14

DE OB5 OB4 OB3 OB2 Vsync Hsync

IN13 IN12 IN11 IN10 IN9 IN8 IN7

OB1 OG4 OG3 OG2 OG1 OB0 OG5

IN5 IN4 IN3 IN2 IN1 IN0

OG0 OR3 OR2 OR1 OR0 OR5 OR4

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Signal for 1 DCLK Cycle (T)

RXEC+

RXE2+/-

RXE1+/-

RXE0+/-

T/7

IN20 IN19 IN18 IN17 IN16 IN15 IN14

DE EB5 EB4 EB3 EB2 Vsync Hsync

IN13 IN12 IN11 IN10 IN9 IN8 IN7

EB1 EG4 EG3 EG2 EG1 EB0 EG5

IN6 IN5 IN4 IN3 IN2 IN1 IN0

EG0 ER3 ER2 ER1 ER0 ER5 ER4

Signal for 1 DCLK Cycle (T)

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5.4 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for
the color. The higher the binary input the brighter the color. The table below provides the assignment of
color versus data input.

Color

R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black
Red
Green

Basic
Colors

Gray
Scale
Of
Red

Gray
Scale
Of
Green

Gray
Scale
Of
Blue

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Blue
Cyan
Magenta
Yellow
White
Red(0)/Dark
Red(1)
Red(2)

:

:
Red(61)
Red(62)
Red(63)
Green(0)/Dark
Green(1)
Green(2)

:

:
Green(61)
Green(62)
Green(63)
Blue(0)/Dark
Blue(1)
Blue(2)

:

:
Blue(61)
Blue(62)
Blue(63)

0

0

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0
:
:

1

1

1

1

1

1

0

0

0

0

0

0
:
:

0

0

0

0

0

0

0

0

0

0

0

0
:
:

0

0

0

0

0

0

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Model No.: N154C1-L03

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Data Signal

Red Green Blue

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

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0

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1

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1

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1

1

0

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1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

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1

1

1

1

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1

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1

1

1

1

1

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1

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1

0

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0

0

0

0

0

0

0

0

1

1

1

1

0

1

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

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5.5 EDID DATA STRUCTURE

The EDID (Extended Display Identification Data) data formats are to support displays as defined in the
VESA Plug & Display and FPDI standards.

Byte #

(decimal)

0
1
2
3
4
5
6
7
8
9

10

11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41

Byte #

(hex)

Field Name and Comments

0 Header
1 Header
2 Header
3 Header
4 Header
5 Header
6 Header
7 Header
8 EISA ID manufacturer name (“CMO”)

9 EISA ID manufacturer name (Compressed ASCII)
0A ID product code (N154C1-L03) 38
0B ID product code (hex LSB first; N154C1-L03) 15
0C ID S/N (fixed “0”)
0D ID S/N (fixed “0”)
0E ID S/N (fixed “0”)

0F ID S/N (fixed “0”)
10 Week of manufacture (fixed week code)
11 Year of manufacture (fixed year code)
12 EDID structure version # (“1”)
13 EDID revision # (“3”)
14 Video I/P definition (“digital”)
15 Active area horizontal 33.156cm 21
16 Active area vertical 20.7225cm 15
17 Display Gamma (Gamma = ”2.2”)
18 Feature support (“Active off, RGB Color”)

19 Rx1 Rx0 Ry1 Ry0 Gx1 Gx0 Gy1 Gy0 D5
1A Bx1 Bx0 By1 By0 Wx1 Wx0 Wy1 Wy0
1B Red-x (Rx = “0.593”) 97
1C Red-y (Ry = “0.337”) 57
1D Green-x (Gx = ”0.315”) 51
1E Green-y (Gy = ”0.528”) 8A

1F Blue-x (Bx = ”0.149”) 26

20 Blue-y (By = ”0.119”) 25

21 White-x (Wx = ”0.307”) 50

22 White-y (Wy = ”0.316”) 54

23 Established timings 1

24 Established timings 2

25 Manufacturer’s reserved timings

26 Standard timing ID # 1

27 Standard timing ID # 1

28 Standard timing ID # 2

29 Standard timing ID # 2

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Model No.: N154C1-L03

Approval

Value

(hex)

00 00000000
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
00 00000000
0D 00001101
AF 10101111

00 00000000
00 00000000
00 00000000
00 00000000
28 00101000
10 00010000
01 00000001
03 00000011
80 10000000

78 01111000
0A 00001010

40 01000000

00 00000000
00 00000000
00 00000000
01 00000001
01 00000001
01 00000001
01 00000001

Value

(binary)

00111000
00010101

00100001
00010101

11010101

10010111
01010111
01010001
10001010
00100110
00100101
01010000
01010100

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Model No.: N154C1-L03

Approval

42
43
44
45
46
47
48
49
50
51
52
53
54

55
56
57
58
59
60
61
62
63
64
65

66
67
68
69
70
71

72

73
74
75
76
77
78
79
80
81
82
83

84
85

2A Standard timing ID # 3
2B Standard timing ID # 3
2C Standard timing ID # 4
2D Standard timing ID # 4
2E Standard timing ID # 5

2F Standard timing ID # 5

30 Standard timing ID # 6

31 Standard timing ID # 6

32 Standard timing ID # 7

33 Standard timing ID # 7

34 Standard timing ID # 8

35 Standard timing ID # 8

Detailed timing description # 1 Pixel clock (“88.75MHz”,

36

According to VESA CVT Rev1.1)
37 # 1 Pixel clock (hex LSB first)
38 # 1 H active (“1440”)
39 # 1 H blank (“160”)

3A # 1 H active : H blank (“1440 : 160”)
3B # 1 V active (”900”)
3C # 1 V blank (”26”)
3D # 1 V active : V blank (”900 :26”)
3E # 1 H sync offset (”48”)

3F # 1 H sync pulse width ("32”)
40 # 1 V sync offset : V sync pulse width (”3 : 6”)

# 1 H sync offset : H sync pulse width : V sync offset : V sync
41

width (”48: 32 : 3 : 6”)
42 # 1 H image size (”332 mm”)
43 # 1 V image size (”207 mm”)
44 # 1 H image size : V image size (”332 : 207”)
45 # 1 H boarder (”0”)
46 # 1 V boarder (”0”)

# 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol
47

Negatives

Detailed timing description # 2 Pixel clock (“73.75 MHz”,
48

According to VESA CVT Rev1.1)
49 # 2 Pixel clock (hex LSB first)

4A # 2 H active (“1440”)
4B # 2 H blank (“160”)
4C # 2 H active : H blank (“1440 : 160”)
4D # 2 V active (”900”)
4E # 2 V blank (”22”)

4F # 2 V active : V blank (”900 : 22”)
50 # 2 H sync offset (”48”)
51 # 2 H sync pulse width (”32”)
52 # 2 V sync offset : V sync pulse width (”3 : 6”)

# 2 H sync offset : H sync pulse width : V sync offset : V sync
53

width (”48 : 32 : 3 : 6”)
54 # 2 H image size (”332 mm”)

55 # 2 V image size (”207 mm”)

01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001

AB 10101011

22 00100010
A0 10100000
A0 10100000

50 01010000

84 10000100
1A 00011010

30 00110000

30 00110000

20 00100000

36 00110110

00 00000000

4C 01001100
CF 11001111

10 00010000

00 00000000

00 00000000

18 00011000

CF 11001111

1C 00011100
A0 10100000
A0 10100000

50 01010000

84 10000100

16 00010110

30 00110000

30 00110000

20 00100000

36 00110110

00 00000000

4C 01001100
CF 11001111

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Doc No.: 14068529

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Model No.: N154C1-L03

Approval

86
87
88
89
90
91
92
93

94
95
96
97
98

99
100
101
102
103
104
105
106
107

108
109

110
111
112
113
114
115
116
117
118

119
120
121
122
123

124

125

126
127

56 # 2 H image size : V image size (”332 : 207”)
57 # 2 H boarder (”0”)
58 # 2 V boarder (”0”)

59 Module "A" Revision = Example: 00, 01, 02, 03, etc.
5A Detailed timing description # 2
5B # 2 Flag
5C # 2 Reserved

# 2 FE (hex) defines ASCII string (Model Name “N154C1-L03”,

5D

ASCII)

5E # 2 Flag

5F # Dell P/N "MC196" 1st character (“X”)

60 # Dell P/N " MC196" 1st character (“U”)

61 # Dell P/N " MC196" 1st character (“2”)

62 # Dell P/N " MC196" 1st character (“9”)

63 # Dell P/N " MC196" 1st character (“7”)

64 LCD Supplier EEDID Revision #: "1"

65 # 2 1st character of name (“N”) 4E

66 # 2 2nd character of name (“1”) 31

67 # 2 3rd character of name (“5”) 35

68 # 2 4th character of name (“4”) 34

69 # 2 5th character of name (“C”) 43
6A # 2 6th character of name (“1”) 31

Manufacturer P/N (If <13 char, then terminate with ASCII code

6B

0Ah, set remaining char = 20h)
6C Flag
6D Flag
6E Flag

6F Data Type Tag:
70 Flag
71 SMBUS value @ 10nits = 36d 1F
72 SMBUS value @ 17nits = 51d 2B
73 SMBUS value @ 24nits = 58d 34
74 SMBUS value @ 30nits = 70d 3A
75 SMBUS value @ 60nits = 98d 55
76 SMBUS value @ 110nits = 141d 6F
77 SMBUS value @ 150nits = 171d 8B
78 SMBUS value @ max nits = 232d F4
79 Numbers of LVDS Recevier chip = 2

7A BIST Enable: Yes = '01' No = '00' ("Yes")

(If <13 char, then terminate with ASCII code 0Ah, set remaining
7B

char = 20h)

(If <13 char, then terminate with ASCII code 0Ah, set remaining
7C

char = 20h)

(If <13 char, then terminate with ASCII code 0Ah, set remaining
7D

char = 20h)
7E Extension flag

7F Checksum

10 00010000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000

FE 11111110

00 00000000
58 01011000
55 01010101
32 00110010
39 00111001
37 00110111
32 00110010

01001110
00110001
00110101
00110100
01000011
00110001

0A 00001010

00 00000000
00 00000000
00 00000000

FE 11111110

00 00000000

00011111
00101011
00110100
00111010
01010101

01101111
10001011

11110100

02 00000010
01 00000001

0A 00001010

20 00100000

20 00100000

00 00000000
97 10010111

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6 INVERTER SPECIFICATION

6.1 Connector type
Input connector type: LVC-D20SFYG (HONDA)
Output connector: JST SM02B-BHSS-1-TB (JST)

6.2 Input connector pin assignment

Input Connector pin assignment:

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Doc No.: 14068529

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Model No.: N154C1-L03

Approval

Input connector

HONDA LVC-D20SFYG

Pin Function

1 INV_SRC

2 INV_SRC

3 INV_SRC

4 INV_SRC

5 GND Ground
6 NC No Connection

7 5VALW

8 GND Ground

9 SMB_DAT

10 SMB_CLK

11 GND Ground
12 INV_PWM System side PWM input signal for brightness control
13 GND Ground
14 NC No Connection

15 ~ 20 NC No Connection

This power rail should be used as a power rail to drive the backlight
DC-AC converter

This power rail should be used as a power rail to drive the backlight
DC-AC converter

This power rail should be used as a power rail to drive the backlight
DC-AC converter

This power rail should be used as a power rail to drive the backlight
DC-AC converter

This should be used as power source that stores the brightness/contrast
values & the circuit that interfaces with SMB_CLK & SMB_DAT

SMBus interface for sending brightness & contrast information to the
inverter/panel

SMBus interface for sending brightness & contrast information to the
inverter/panel

Comments

Absolute maximum ratings

Items Absolute max. ratings Unit

INV_SRC (Voltage) -1.0~23.5 V
FPBACK/SMB_CLK/SMB_DAT
(Voltage)

-1.0~5.5 V

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6.3 Output connector pin assignment

Pin Name Description

1 CFL-High High-voltage output to the CCFL
2 CFL-Low Low-voltage output to the CCFL

6.4 General electrical specification:

6.4.1Absolute maximum ratings

Items Absolute max. ratings Unit

INV_SRC (Voltage) -1.0~23.5 V
FPBACK/SMB_CLK/SMB_DAT
(Voltage)

6.4.2 Electrical characteristics:

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Approval

-1.0~5.5 V

No. Item Symbol

1 Input Voltage INV_SRC 7.5 14.4 21 V

Input Signal Level for

2

Input Signal Level for

3

4 Input Power Pin(Max) 185nits@Vin=12V - - 4.6 W

Brightness Adjust (Lamp

5

6 Output Voltage Vout IL = 6.3mA(typ) 612 680 748 Vrms

7

8 Operation Frequency Freq Vin=7.5V~21V 45

5VSUS

5VALW

Current Control)

Output Current

5VSUS - - - V

5VALW 4.75 5 5.2 V

SMB_DAT

Iout (Min)

Iout (Max)

Condition

Control by SMBus(256 steps
dimming control)

Vin=7.5V~21V SMB_DAT=00H
Ta=25 , after running 30 min.к

Vin=7.5V~21V SMB_DAT=FFH
Ta=25 , after running 30 min.к

Min. Typ. Max. Uint

00H - FFH -

1.5 1.8 2.1 mArms

6 6.3 6.6 mArms

-

65 KHz

9 Burst mode frequency fB Vin=7.5V~21V 200 - 220 Hz

10 Open Lamp Voltage Vopen No Load 1400 -- 1800 Vrms

11 Striking Time Ts No Loadw

12

13 Start and Delay Time

14

Efficiency K

Start –up time

(Turn on delay time)

Vin=7.5V, SMB_DAT=FFH
(RES LOAD=100K ohm)

Vin=14.4V,
SMB_DAT=00H - 130 200 uS
Vin=14.4V,
SMB_DAT=FFH - - 0.1 Sec

0.6

80 - - %

1 1.4 Sec

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zInput Voltage

The operating input voltage of inverter shall be defined.
The inverter shall ignite the CCFL lamp at minimum input voltage at any environment conditions.

zOn/Off control

Enable: At “ON” condition (FPBACK=Hi), enable the inverter.
Disable: At “OFF” condition (FPBACK=Lo), disable the inverter.

zQuiescent current

At the inverter “OFF” condition, input quiescent should be less than 0.1mA.

zOpen lamp voltage

The inverter start-up output voltage will be above “Vopen” for “Ts” minimum at any condition under specify
until lamp to be ignited. The inverter should be shutdown if lamp ignition was failed in “Ts” maximum. The
inverter shall be capable of withstanding the output connections open without component over-stress / fire /

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smoke /arc.

zBurst mode frequency

The burst mode frequency should be in specification in any environment condition and electrical condition.

zBrightness control

SM-BUS values for panel luminance are to be included in the on LCD board EEDID ROM chip table. The
supplier will measure panel luminance in a system and define the SMBUS values for each of the 8 required
luminance levels. The panel luminance, for which SMBUS values will be provided in the EEDID from byte #
113(hex #71), to byte # 120, (hex # 78), is show in the table below. The inverter supplier should provide
these appropriate values to CMO.

Step Count Step 1 Step 2 Step3 Step 4 Step 5 Step 6 Step 7 Step 8

Address Byte

113

SM-Bus Data Value 22 31 3A 42 61 88 A2 BC

Luminance (nits) 10 17 24 30 60 110 150 Max

z Output ripple ratio

Ripple ratio = 2 * (Ipeak - Ivalley) / (Ipeak + Ivalley) * 100%
The Ripple ratio should be less than 5% and ripple frequency should be less than 200 Hz.

Byte

114

Byte

115

Byte

116

Byte

117

Byte

118

Byte

119

Byte

120

z Power up Overshoot & Undershoot

Overshoot & Undershoot at power up should not exceed the following limits.

Vin

0Vin(min.)

0Vin(typ.)

0Vin(max.)

Output current

Io(rms)

Io(max.)

Io(min.)

Io(max.)

Io(min.)

Io(max.)

Io(min.)

Overshoot/Undershoot

Io (dI)

150% / 50% 5 ms max.

150% / 50% 5 ms max.

150% / 50% 5 ms max.

Settling time

(dT)

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dI=Imax.-Io or dI=(Io-Imin.)/Io
z Output connections short protection

The inverter shall be capable of withstanding the output connections short without damage or over-stress.
And the inverter maximum input power shall be limited within 1W.

6.4.3 Mechanical Drawing

6.4.4 Other Information

z Safety

x The inverter shall meet the requirement of “Limited current circuits” in paragraphs 2.4.1 in IEC60950.
There is no fire/smoke while simulating the component of the inverter open/short test.

x The Inverter AND panel must be UL certified with CB certificate and LCC (Limited Current Circuit) test

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and test reports from UL. Inverter panel combo must pass Dell Safety requirements.

z EMI

The inverter must meet the radiated limitation requirement of CISPR22 class B, FCC-B and VCCI level II
with 6dB margin minimum while the inverter operating in the complete system.

z Environment Regulation

x Follow the RoHS requirement.
x Fill in CMO’s official document <<Environmentally Conscious Products Questionnaire for Suppliers of

Materials, Parts, and Products>> and turn in to CMO before CMO’s specification approval process.

z Dell’s other requirements

1. The inverter must not emit any audible noise.

2. Please refer to CMO’s official document. “General Inverter Specification for LCD Module” for other
general information such as reliability test, safety and etc..

3. Please also refer to DELL’s official document about inverter:

z LCD Backlight Design Spec X00-04
z DELL’s LCD Inverter Qualification Plan, Rev. A00
z Prohibited Components
z “Holy Stone(كعഘ)”’s products are prohibited.

Confidential Notice

Remind that all the information described in this document is confidential. Please don’t reveal to other people else
before getting CMO’s agreement.

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7 INTERFACE TIMING

7.1 INPUT SIGNAL TIMING SPECIFICATIONS

The input signal timing specifications are shown as the following table and timing diagram.
The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

DCLK Frequency 1/Tc 25 44.5 60 MHz (2)

Vertical Total Time TV 910 926 1500 TH -

Vertical Active Display Period TVD 900 900 900 TH -

DE

Note (1) Because this module is operated by DE only mode, Hsync and Vsync are ignored.
(2) 2 channels LVDS input.

Vertical Active Blanking Period TVB TV-TVD 26 TV-TVD TH

Horizontal Total Time TH 760 800 880 Tc (2)

Horizontal Active Display Period THD 720 720 720 Tc (2)

Horizontal Active Blanking Period THB

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TH-THD

80

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Issued Date: Aug.24, 2006

Model No.: N154C1-L03

Approval

TH-THD

Tc (2)

INPUT SIGNAL TIMING DIAGRAM

DE

DCLK

T

DE

DATA

TVD

C

v

T

H

T

HD

T

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7.2 POWER ON/OFF SEQUENCE

Power On

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Power Off

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Model No.: N154C1-L03

Approval

Restart

Power Supply

for LCD, Vcc

0V

- LVDS Interface

0V

- Power for Lamp

Timing Specifications:

0.5 Љ t1 Љ 10 ms
0 Љ t2 Љ 50 ms
0 Љ t3 Љ 50 ms

t4 Њ 500 ms
t5 Њ 200 ms
t6 Њ 200 ms

10%

90%

t1

90%

Valid Data

t6 t5

50%50%

ONOFF OFF

t7

10%

t4

t3 t2

10%

Note (1) Please follow the power on/off sequence described above. Otherwise, the LCD module might be

damaged.

Note (2) Please avoid floating state of interface signal at invalid period. When the interface signal is invalid, be

sure to pull down the power supply of LCD Vcc to 0 V.

Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the

interface signal is valid. The Backlight inverter power must be turned off before the power supply
for the logic and the interface signal is invalid.

Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To

avoid this phenomenon, we suggest that the Vcc falling time is better to follow 5Љt7Љ300 ms.

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8 OPTICAL CHARACTERISTICS

8.1 TEST CONDITIONS

Item Symbol Value Unit
Ambient Temperature Ta 25r2
Ambient Humidity Ha 50r10 %RH
Supply Voltage VCC 3.3 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Inverter Current IL
Inverter Driving Frequency FL
Inverter Sumida-H05-4915

The measurement methods of optical characteristics are shown in Section 8.2. The following items
should be measured under the test conditions described in Section 8.1 and stable environment shown in
Note (5).

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6.0
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Approval

o

C

mA

KHz

8.2 OPTICAL SPECIFICATIONS

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR 400 600 - - (2), (5)

Response Time

Average Luminance of White L

Luminance Non-Uniformity

Color Gamut C.G - 45 - % (5), (7)

Red

Color
Chromaticity

Green

Blue

White

Horizontal

Viewing Angle

Vertical

TR - 6 11 ms

- 14 19 ms

T

F

220 250 - cd/m2(4), (5)

AVE

GW5p

GW

Rx
Ry
Gx
Gy

Bx
By

13p

Viewing Normal

T

=0q, TY =0q

x

Angle

- - 20 %

- - 35 %

0.593

0.341

0.318

TYP

-0.02

0.541

0.150

TYP

+0.02

0.136

Wx 0.313 ­Wy

Tx+

T

-

x

TY+

T

Y

CRt10

-

0.329

55 60 ­55 60 ­45 50 ­45 50 -

Deg.

(3)

(5), (6)

-

-

-

-

-

­(1), (5)

-

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Note (1) Definition of Viewing Angle (Tx, Ty):

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Model No.: N154C1-L03

Approval

TX- = 90º

x-

6 o’clock

T

y- = 90º

y-

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Normal

Tx = Ty = 0º

Ty- Ty

Tx-

Tx+

y+

12 o’clock direction

T

y+ = 90º

x+

TX+ = 90º

Contrast Ratio (CR) = L63 / L0
L63: Luminance of gray level 63
L 0: Luminance of gray level 0

CR = CR (5)
CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).

Note (3) Definition of Response Time (T

100%

90%

Optical

Response

10%

0%

R

T

R

, TF):

Time

T

F

66.67 ms

66.67 ms

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Note (4) Definition of Average Luminance of White (L

Measure the luminance of gray level 63 at 5 points
L

= [L (5)+ L (10)+ L (11)+ L (12)+ L (13)] / 5

AVE

L (x) is corresponding to the luminance of the point X at Figure in Note (6).

Note (5) Measurement Setup:

The LCD module should be stabilized at given temperature for 15 minutes to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting Backlight for 15 minutes in a windless room.

LCD Module

LCD Panel

Center of the Screen

):

AVE

Field of View = 2º

Photometer
MINOLTA /CA210
MINOLTA /CS-1000T

500 mm

Light Shield Room

(Ambient Luminance < 2 lux)

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Note (6) Definition of White Variation (GW5p, GW

Measure the luminance of gray level 63 at 5, 13 points

GW

={1-{ Minimum [L (5)+ L (10)+ L (11)+ L (12)+ L (13)] / Maximum [L (5)+ L (10)+ L (11)+ L (12)+

5p

L (13)]}} *100%

GW

={1-{ Minimum [L (1) ~ L (13)] / Maximum [L (1) ~ L (13)]}} *100%

13p

13p

):

X

: Test Point

X=1 to 13

Note (7) Definition of Color Gamut (C.G):

C.G= R G B / RΓΓ
R
R, G, B
RΓ

, G0, B0 : color coordinates of red, green, and blue defined by NTSC, respectively.

0

: color coordinates of module on 63 gray levels of red, green, and blue, respectively.

0 G0 B0

: area of triangle defined by R0, G0, B0

0 G0 B0

 R G B: area of triangle defined by R, G, BΓ

,*100%

˖˜˘ ʳ˄ˌ ˆ˄

˃ˁˌ

˃ˁˋ

˃ˁˊ

˃ˁˉ

˃ˁˈ

˃ˁˇ

˃ˁˆ

˃ˁ˅

˃ˁ˄

˃

˃ ˃ˁ˅ ˃ˁˇ ˃ˁˉ ˃ˁˋ

G

0

G

R

R

B

B

0

0

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9 PRECAUTIONS

9.1 HANDLING PRECAUTIONS

(1) The module should be assembled into the system firmly by using every mounting hole. Be careful not

to twist or bend the module.

(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause

electrical short or damage the polarizer.

(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and

assembly process.

(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is

very soft and easily scratched.

(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use

Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might

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permanently damage the polarizer due to chemical reaction.

(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel for

a long time.

(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In

case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.
(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.
(9) Do not disassemble the module.
(10) Do not pull or fold the lamp wire.
(11) Pins of I/F connector should not be touched directly with bare hands.

9.2 STORAGE PRECAUTIONS

(1) High temperature or humidity may reduce the performance of module. Please store LCD module within

the specified storage conditions.
(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may

damage LCD module when it is operating.
(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the

response time will become slowly, and the starting voltage of lamp will be higher than the room

temperature.

9.3 OPERATION PRECAUTIONS

(1) Do not pull the I/F connector in or out while the module is operating.
(2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This

can prevent the CMOS LSI chips from damage during latch-up.
(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while

assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.

10 PACKING

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10.1 CARTON

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Figure. 10-1 Packing method

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10.2 PALLET

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Figure. 10-2 Packing method

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11 DEFINITION OF LABELS

11.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

N154C1 -L03

(a) Model Name: N154C1-L03
(b) Revision: Rev. XX, for example: A1, …, C1, C2 …etc.
(c) Serial ID: X X

(d) Production Location: MADE IN XXXX. XXXX stands for production location.
Serial ID includes the information as below:

(a) Manufactured Date: Year: 1~9, for 2001~2009

(b) Revision Code: cover all the change
(c) Serial No.: Manufacturing sequence of product

X X X X X Y M D X N N N N

Month: 1~9, A~C, for Jan. ~ Dec.

Day: 1~9, A~Y, for 1

Serial No.
CMO Internal Use
Year, Month, Date
CMO Internal Use

Revision

CMO Internal Use

st

to 31st, exclude I , O and U

11.2 CARTON LABEL

(a) Production location: Made In XXXX. XXXX stands for production location

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11.3 CARTON LABEL

PKG ID (3S)124161241729112345609886C20

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REV.A06

DP/N 03J849

BOX Qty 20 Made in Taiwan

11.4 PALLET LABEL

FROM :CMO Corporation

Tainan,
Taiwan 744 R.O.C

P.O.NUMBER

12345678

COUNTRY OF ORIGIN

TW

TO:DELL COMPUTER

2128 West Braker
Austin TX

DELL P/N

12345

PACKING LIST#
1234567890123

Vendor ID Loc Id

12416 12416

Mfg Id
70896

PACKING LIST QTY
654321

DESTINATION MAS LOC

DESTINATION LOCATION

B4

12345678901234567890

PKG CNT
999 OF 999 12345

PART DESCRIPTION XXXXXXXXXXXXXXXXXXXXXXXXX

12345678901234567890123456789012345678901

BOX CNT REVISION

A00-00 Apr 29,2003

60

AIRBILL NUMBER

SHIP DATE

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