CMO N154C1-L02 Specification

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TFT LCD Approval Specification

MODEL NO.: N154C1 -L02

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Doc. No.:

Issued Date: Aug.04 2006

Model No.: N154C1 -L02

Approval

Customer : ASUS

pproved by :

Note :



2006-08-09 19:27:09 CST

2006-08-08 10:09:56 CST

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Approve by Dept. Mgr.(QA RA)

Approve by Director

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tomy_chen(ຫةԫ /52720/54140/43150)

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- CONTENTS -

REVISION HISTORY ------------------------------------------------------- 3

1. GENERAL DESCRIPTION

1.1 OVERVIEW

1.2 FEATURES

1.3 APPLICATION

1.4 GENERAL SPECIFICATIONS

1.5 MECHANICAL SPECIFICATIONS

------------------------------------------------------- 4

2. ABSOLUTE MAXIMUM RATINGS ------------------------------------------------------- 5

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

2.2.2 BACKLIGHT UNIT

3. ELECTRICAL CHARACTERISTICS ------------------------------------------------------- 7

3.1 TFT LCD MODULE

3.2 BACKLIGHT UNIT

4. BLOCK DIAGRAM ------------------------------------------------------- 11

4.1 TFT LCD MODULE

4.2 BACKLIGHT UNIT

5. INPUT TERMINAL PIN ASSIGNMENT ------------------------------------------------------- 12

5.1 TFT LCD MODULE

5.2 BACKLIGHT UNIT

5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL

5.4 COLOR DATA INPUT ASSIGNMENT

5.5 EDID DATA STRUCTURE

6. INTERFACE TIMING ------------------------------------------------------- 18

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

6.2 POWER ON/OFF SEQUENCE

7. OPTICAL CHARACTERISTICS ------------------------------------------------------- 20

7.1 TEST CONDITIONS

7.2 OPTICAL SPECIFICATIONS

8. PRECAUTIONS ------------------------------------------------------- 24

8.1 HANDLING PRECAUTIONS

8.2 STORAGE PRECAUTIONS

8.3 OPERATION PRECAUTIONS

9. PACKING ------------------------------------------------------- 25

9.1 CARTON

9.2 PALLET

10. DEFINITION OF LABELS

10.1 CMO MODULE LABEL

10.2 CARTON LABEL

------------------------------------------------------- 26

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REVISION HISTORY

Version Date

Ver 0.0

Ver 1.0

Ver 1.1

Ver 3.0

Ver3.1

Ver 3.2

Aug. 30. ‘05

Oct. 13. ‘05

Dec. 05. ‘05

Jun. 15. ‘06

Jul. 20. ‘06

Aug. 04. ‘06

Page

(New)

All

4.

10.

17~19

22.

27.

All

6.

7.

10.

22.

28.

30

7

12

17

27

Section Description

All

1.4.

3.2

5.5

7.2.

All

2.1

2.2

3.2

7.2

10.2

3.1

5.1

6.1

Tentative specification first issued.

Preliminary specification first issued.

Modify Surface Treatment

Modify BACKLIGHT UNIT spec.

Modify EDID DATA STRUCTURE

Modify

9.

Packing specification changed.

Preliminary specification updated.

Modify Modify 2.2.2 BACKLIGHT UNIT Modify 3.2 BACKLIGHT UNIT Modify 7.2 OPTICAL SPECIFICATIONS Modify 10.2 CARTON LABEL

-

Module drawing update

OPTICAL SPECIFICATIONS

ABSOLUTE RATINGS OF ENVIRONMENT.

Electrical characteristics/TFT LCD module Input terminal pin assignment/TFT LCD module Interface timing/input signal timing specifications Outline drawing update

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1 GENERAL DESCRIPTION

1.1 OVERVIEW

N154C1 -L02 is a 15.4” TFT Liquid Crystal Display module with single CCFL Backlight unit and 30 pins

LVDS interface. This module supports 1440 x 900 WXGA+ mode and can display 262,144 colors. The

optimum viewing angle is at 6 o’clock direction. The inverter module for Backlight is not built in.

1.2 FEATURES

- Thin and light weight

- WXGA+ (1440 x 900 pixels) resolution

- DE (Data Enable) only mode

- 3.3V LVDS (Low Voltage Differential Signaling) interface with 2 pixel/clock

- Support EDID Structure Version 1.3

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1.3 APPLICATION

- TFT LCD Notebook

1.4 GENERAL SPECIFICATI0NS

Item Specification Unit Note Outline Dimension 344(W) x 222 (H) mm Active Area 331.56 (H) x 207.225 (V) mm Bezel Opening Area 335 (H) x 210.7 (V) mm Driver Element a-si TFT active matrix - Pixel Number 1440 x R.G.B. x 900 pixel Pixel Pitch 0.23025 (H) x 0.23025 (V) mm Pixel Arrangement RGB vertical stripe - Display Colors 262,144 color Transmissive Mode Normally white - Surface Treatment

Hardness (3H), Anti Glare

- -

1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal(H) 343.5 344 344.5 mm

Module Size

I/F connector mounting position The mounting inclination of the connector makes the screen

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

Vertical(V) 221.5 222 222.5 mm Depth(D) --- --- 6.2 mm

Weight --- 530 540 g -

center within ±0.5mm as the horizontal.

(1)

(2)

(2) Connector mounting position

+/- 0.5mm

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2 ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature TST -20 +60 ºC (1) Operating Ambient Temperature TOP 0 +50 ºC (1), (2) Shock (Non-Operating) S Vibration (Non-Operating) V

Note (1) (a) 90 %RH Max. (Ta <= 40 ºC).

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The temperature of panel surface should be 0 ºC min. and 50 ºC max.

Relative Humidity (%RH)

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Value

Min. Max.

- 220/2 G/ms (3), (5)

NOP

- 1.5 G (4), (5)

NOP

Unit Note

100

90

80

60

Operating Range

40

20 10

Storage Range

Temperature (ºC)

Note (3) 1 time for ± X, ± Y, ± Z. for Condition (220G / 2ms) is half Sine Wave,.

Note (4) 10~200 Hz, 0.5hr/cycle 1cycle for X,Y,Z

8060-20 400 20-40

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid

enough so that the module would not be twisted or bent by the fixture.

The fixing condition is shown as below:

t Room Temperature

Side Mount Fixing Screw

Gap=2mm

Bracket

LCD Module

Side Mount Fixing Screw

Stage

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2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

Item Symbol

Power Supply Voltage Vcc -0.3 +4.0 V Logic Input Voltage VIN -0.3 Vcc+0.3 V

2.2.2 BACKLIGHT UNIT

Item Symbol

Lamp Voltage VL - 2.5K V Lamp Current IL 2.0 7.0 mA Lamp Frequency FL 50 60 KHz

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

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Value

Min. Max.

Value

Min. Max.

Unit Note

Doc. No.:

Issued Date: Aug.04 2006

Model No.: N154C1 -L02

Approval

(1)

(1), (2), IL = 6.0 mA

RMS

(1), (2)

Note (2) Specified values are for lamp (Refer to Section 3.2 for further information).

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3 ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE Ta = 25 ± 2 ºC

Parameter Symbol

Min. Typ. Max. Power Supply Voltage Vcc 3.0 3.3 3.6 V Permissive Ripple Voltage VRP 50 mV Rush Current I

1.5 A (2)

RUSH

Initial Stage Current IIS 1.0 A (2)

Power Supply Current

LVDS Differential Input High Threshold V

LVDS Differential Input Low Threshold V

White 270 320 mA (3)a Black

Icc

TH(LVDS)

TL(LVDS)

410 470 mA (3)b

+100 mV

-100 mV

LVDS Common Mode Voltage VCM 1.125 1.375 V (5) LVDS Differential Input Voltage |VID| 100 600 mV (5) Terminating Resistor RT 100 Ohm Power per EBL WG P

- 2.9 - W (4)

EBL

Note (1) The ambient temperature is Ta = 25 ± 2 ºC.

Value

Unit Note

Approval

(5),

=1.2V

V

CM

(5)

=1.2V

V

CM

Note (2) I

I

: the maximum current when VCC is rising

RUSH

: the maximum current of the first 100ms after power-on

IS

Measurement Conditions: Shown as the following figure. Test pattern: black.

(High to Low)

(Control Signal)

SW

+12V

+3.3V

R1

47K

R2

1K

47K

VR1

C1

1uF

Q1 2SK1475

C2

0.01uF

Q2

2SK1470

FUSE

C3

1uF

Vcc rising time is 470us

+3.3V

0.9Vcc

Vcc

(LCD Module Input)

VCC

100ms

I

IS

0V

I

RUSH

470us

0.1Vcc

ICC

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Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, f

Hz, whereas a power dissipation check pattern below is displayed.

a. White Pattern

Active Area

Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input

power. Test conditions are as follows.

(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f

(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file

= 60 Hz,

v

b. Black Pattern

Active Area

= 60

v

“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.

(c) Luminance: 60 nits.

(d) The inverter used is provided from _Sumida__. Please contact them for detail information.

CMO doesn’t provide the inverter in this product.

Note (5) The parameters of LVDS signals are defined as the following figures.

CM

V

Single Ended

0V

V

Differential

0V

V

VID

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3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC

Parameter Symbol

Min. Typ. Max. Lamp Input Voltage VL 657 730 803 V Lamp Current IL 2.0 6.0 7.0 mA

Lamp Turn On Voltage V

S

- - 1460 (25oC) V

- - 1600 (0 Operating Frequency FL 50 55 60 KHz (3) Power Consumption PL 3.94 4.38 4.82 W (4), IL = 6.0 mA Lamp Life Time LBL 15,000 - - Hrs (5) Leakage Current IIN-I

- - 1.3 mA (7)

OUT

Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:

Value

o

C) V

Unit Note

I

RMS

(1)

RMS

(2)

RMS

(2)

RMS

Approval

= 6.0 mA

L

HV (Pink)

LCD

LV (White)

Module

1

Inverter

2

A

Current Meter

Note (2) The voltage shown above should be applied to the lamp for more than 1 second after startup.

Otherwise the lamp may not be turned on.

Note (3) The lamp frequency may generate interference with horizontal synchronous frequency from the

display, and this may cause line flow on the display. In order to avoid interference, the lamp

frequency should be detached from the horizontal synchronous frequency and its harmonics as far

as possible.

Note (4) P

L

= I

LVL

Note (5) The lifetime of lamp is defined as the time when it continues to operate under the conditions at Ta

= 25 2

o

C and IL = 6.0 mA

until one of the following events occurs:

RMS

(a) When the brightness becomes Љ 50% of its original value.

(b) When the effective ignition length becomes Љ 80% of its original value. (Effective ignition

length is defined as an area that the brightness is less than 70% compared to the center point.)

Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the

inverter must have specifications for the modularized lamp. The performance of the Backlight,

such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for

the lamp. All the parameters of an inverter should be carefully designed to avoid generating too

much current leakage from high voltage output of the inverter. When designing or ordering the

inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the

inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module

should be operated in the same manners when it is installed in your instrument.

Requirements for a system inverter design, which is intended to have a better display performance, a

better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its

leakage current.

a. The asymmetry rate of the inverter waveform should be 10% below;

b. The distortion rate of the waveform should be within Ѕ2 ± 10%;

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c. The ideal sine wave form shall be symmetric in positive and negative polarities.

I p

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* Asymmetry rate:

| I

p

– I –p | / I

* 100%

rms

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Model No.: N154C1 -L02

Approval

I -p

* Distortion rate

I

(or I –p) / I

p

rms

Note (7) The lamp leakage current is measured by the current difference between in and out. And the

measurement condition is as below:

LCD Module

FG

High

Current Probe

I

High

GND

Low

I

Low

Current Probe

Inverter

Lamp

ྙ

I

Leak(RMS)

= I

High(RMS)

- I

Low(RMS)

ʳ

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)

4 BLOCK DIAGRAM

4.1 TFT LCD MODULE

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LVDS Display

Data & Clock

Vcc

GND

Data

EDID

CLK

EDID

V

EDID

VL

TIMING CONTROLLER

INPUT CONNECTOR

DC/DC CONVERTER &

REFERENCE VOLTAGE

LAMP CONNECTOR

LVDS INPUT /

GENERATOR

EDID

EEPROM

SCAN DRIVER IC

TFT LCD PANEL

DATA DRIVER IC

BACKLIGHT UNIT

4.2 BACKLIGHT UNIT

1 HV (White)

2 LV (Black

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5 INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD MODULE

Pin Symbol Description Polarity Remark

1 Vss Ground 2 Vcc Power Supply +3.3 V (typical) 3 Vcc Power Supply +3.3 V (typical) 4 V 5 NC Non-Connection 6 CLK 7 DATA 8 RXO0- LVDS Differential Data Input (Odd) Negative

9 RXO0+ LVDS Differential Data Input (Odd) Positive 10 Vss Ground 11 RXO1- LVDS Differential Data Input (Odd) Negative 12 RXO1+ LVDS Differential Data Input (Odd) Positive 13 Vss Ground 14 RXO2- LVDS Differential Data Input (Odd) Negative 15 RXO2+ LVDS Differential Data Input (Odd) Positive 16 Vss Ground 17 RXOC- LVDS Clock Data Input (Odd) Negative 18 RXOC+ LVDS Clock Data Input (Odd) Positive 19 Vss Ground

20 RxE0- LVDS Differential Data Input (Even) Negative 21 RxE0+ LVDS Differential Data Input (Even) Positive

22 Vss Ground 23 RxE1- LVDS Differential Data Input (Even) Negative 24 RxE1+ LVDS Differential Data Input (Even) Positive 25 Vss Ground 26 RxE2- LVDS Differential Data Input (Even) Negative 27 RxE2+ LVDS Differential Data Input (Even) Positive 28 Vss Ground 29 RXEC- LVDS Clock Data Input (Even) Negative 30 RXEC+ LVDS Clock Data Input (Even) Positive

Note (1) Connector Part No.: JAE-FI-XB30SL-HF11

DDC 3.3V Power

EDID

DDC Clock

EDID

DDC Data

EDID

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Note (2) User’s connector Part No: JAE-FI-X30C2L

Note (3) The first pixel is odd as shown in the following figure.

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5.2 BACKLIGHT UNIT

Pin Symbol Description Color

1 HV High Voltage White 2 LV Ground Black

Note (1) Connector Part No.: JST-BHSR-02VS-1 or equivalent

Note (2) User’s connector Part No.: JST-SM02B-BHSS-1-TB or equivalent

5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL

RXOC+

T/7

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RXO2+/-

RXO1+/-

RXO0+/-

RXEC+

RXE2+/-

RXE1+/-

RXE0+/-

IN20 IN19 IN18 IN17 IN16 IN15 IN14

DE OB5 OB4 OB3 OB2Vsync Hsync

IN13 IN12 IN11 IN10 IN9 IN8 IN7

OB1 OG4 OG3 OG2 OG1OB0 OG5

IN6 IN5 IN4 IN3 IN2 IN1 IN0

OG0 OR3 OR2 OR1 OR0OR5 OR4

Signal for 1 DCLK Cycle (T)

T/7

IN20 IN19 IN18 IN17 IN16 IN15 IN14

DE EB5 EB4 EB3 EB2Vsync Hsync

IN13 IN12 IN11 IN10 IN9 IN8 IN7

EB1 EG4 EG3 EG2 EG1EB0 EG5

IN6 IN5 IN4 IN3 IN2 IN1 IN0

EG0 ER3 ER2 ER1 ER0ER5 ER4

Signal for 1 DCLK Cycle (T)

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5.4 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for

the color. The higher the binary input the brighter the color. The table below provides the assignment of

color versus data input.

Color

R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0 Black Red Green

Basic Colors

Gray Scale Of Red

Gray Scale Of Green

Gray Scale Of Blue

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Blue Cyan Magenta Yellow White Red(0)/Dark Red(1) Red(2)

:

: Red(61) Red(62) Red(63) Green(0)/Dark Green(1) Green(2)

:

: Green(61) Green(62) Green(63) Blue(0)/Dark Blue(1) Blue(2)

:

: Blue(61) Blue(62) Blue(63)

0

1

0

1

0

0 : :

1

0

0 : :

0

0 : :

0

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Data Signal

Red Green Blue

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

:

1

0

1

0

1

0

1

0

1

0

1

0

:

0

1

0

1

0

1

0

1

0

1

0

1

0

:

0

1

0

1

0

1

0

1

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5.5 EDID DATA STRUCTURE

The EDID (Extended Display Identification Data) data formats are to support displays as defined in the

VESA Plug & Display and FPDI standards.

Byte #

(decimal)

0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9

10 0A

11 0B 12 0C 13 0D 14 0E 15 0F 16 10 17 11 18 12 19 13 20 14 21 15 22 16 23 17 24 18 25 19 26 1A 27 1B 28 1C 29 1D 30 1E 31 1F 32 20 33 21 34 22 35 23 36 24 37 25 38 26 39 27 40 28 41 29

Byte #

(hex)

Field Name and Comments

Header Header Header Header Header Header Header Header EISA ID manufacturer name (“CMO”) EISA ID manufacturer name (Compressed ASCII) ID product code (N154C1-L02) 46 ID product code (hex LSB first; N154C1-L02) 15 ID S/N (fixed “0”) ID S/N (fixed “0”) ID S/N (fixed “0”) ID S/N (fixed “0”) Week of manufacture (fixed week code) Year of manufacture (fixed year code) EDID structure version # (“1”) EDID revision # (“3”) Video I/P definition (“digital”) Active area horizontal 33.156cm 21 Active area vertical 20.7225cm 15 Display Gamma (Gamma = ”2.2”) Feature support (“Active off, RGB Color”) Rx1 Rx0 Ry1 Ry0 Gx1 Gx0 Gy1 Gy0 DD Bx1 Bx0 By1 By0 Wx1 Wx0 Wy1 Wy0 Red-x (Rx = “0.593”) 97 Red-y (Ry = “0.337”) 56 Green-x (Gx = ”0.315”) 50 Green-y (Gy = ”0.528”) 87 Blue-x (Bx = ”0.149”) 26 Blue-y (By = ”0.119”) 1E White-x (Wx = ”0.307”) 4E White-y (Wy = ”0.316”) 51 Established timings 1 Established timings 2 Manufacturer’s reserved timings Standard timing ID # 1 Standard timing ID # 1 Standard timing ID # 2 Standard timing ID # 2

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Value

(hex)

00 00000000 FF 11111111 FF 11111111 FF 11111111 FF 11111111 FF 11111111 FF 11111111

00 00000000 0D 00001101 AF 10101111

00 00000000

25 00100101

10 00010000

01 00000001

03 00000011

80 10000000

78 01111000 0A 00001010

68 01101000

00 00000000

01 00000001

Value

(binary)

01000110 00010101

00100001 00010101

110111 0 1

10010111 01010110 01010000 10000111 00100110

0001111 0 01001110 01010001

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42 2A 43 2B 44 2C 45 2D 46 2E 47 2F 48 30 49 31 50 32 51 33 52 34 53 35 54 36 Detailed timing description # 1 Pixel clock (“88.75MHz”,

55 37 56 38 57 39 58 3A 59 3B 60 3C 61 3D 62 3E 63 3F 64 40 65 41 # 1 H sync offset : H sync pulse width : V sync offset : V sync

66 42 67 43 68 44 69 45 70 46 71 47 # 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol

72 48 73 49 74 4A 75 4B # 2 FE (hex) defines ASCII string (Model Name “N154C1-L02”,

76 4C 77 4D 78 4E 79 4F 80 50 81 51 82 52 83 53 84 54

85 55

Standard timing ID # 3 Standard timing ID # 3 Standard timing ID # 4 Standard timing ID # 4 Standard timing ID # 5 Standard timing ID # 5 Standard timing ID # 6 Standard timing ID # 6 Standard timing ID # 7 Standard timing ID # 7 Standard timing ID # 8 Standard timing ID # 8

According to VESA CVT Rev1.1) # 1 Pixel clock (hex LSB first) # 1 H active (“1440”) # 1 H blank (“160”) # 1 H active : H blank (“1440 : 160”) # 1 V active (”900”) # 1 V blank (”26”) # 1 V active : V blank (”900 :26”) # 1 H sync offset (”48”) # 1 H sync pulse width ("32”) # 1 V sync offset : V sync pulse width (”3 : 6”)

width (”48: 32 : 3 : 6”) # 1 H image size (”332 mm”) 4C # 1 V image size (”207 mm”) CF # 1 H image size : V image size (”332 : 207”) # 1 H boarder (”0”) # 1 V boarder (”0”)

Negatives Detailed timing description # 2 # 2 Flag # 2 Reserved

ASCII) # 2 Flag # 2 1st character of name (“N”) 4E # 2 2nd character of name (“1”) 31 # 2 3rd character of name (“5”) 35 # 2 4th character of name (“4”) 34 # 2 5th character of name (“C”) 43 # 2 6th character of name (“1”) 31 # 2 7th character of name (“-”) 2D

# 2 8th character of name (“L”) 4C # 2 9th character of name (“0”) 30

01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001

AB 10101011

22 00100010 A0 10100000 A0 10100000

50 01010000

84 10000100 1A 00011010

30 00110000

20 00100000

36 00110110

00 00000000

01001100

11001111 10 00010000 00 00000000 00 00000000

18 00011000

00 00000000 00 00000000 00 00000000

FE 11111110

00 00000000

01001110 00110001 00110101 00110100 01000011 00110001 00101101

01001100

00110000

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86 56 87 57 88 58 89 59 90 5A 91 5B 92 5C 93 5D 94 5E 95 5F 96 60 97 61 98 62

99 63 100 64 101 65 102 66 103 67 104 68 105 69 106 6A 107 6B 108 6C 109 6D

110 6E 111 6F # 4 FE (hex) defines ASCII string (Model Name“N141C1-L02”,

112 70 113 71 114 72 115 73 116 74 117 75 118 76

119 77 120 78 121 79 122 7A 123 7B 124 7C 125 7D 126 7E 127 7F

# 2 9th character of name (“2”) 32 # 2 New line character indicates end of ASCII string # 2 Padding with “Blank” character # 2 Padding with “Blank” character Detailed timing description # 3 # 3 Flag # 3 Reserved # 3 FE (hex) defines ASCII string (Vendor “CMO”, ASCII) # 3 Flag # 3 1st character of string (“C”) # 3 2nd character of string (“M”) # 3 3rd character of string (“O”) # 3 New line character indicates end of ASCII string # 3 Padding with “Blank” character # 3 Padding with “Blank” character # 3 Padding with “Blank” character # 3 Padding with “Blank” character # 3 Padding with “Blank” character # 3 Padding with “Blank” character # 3 Padding with “Blank” character # 3 Padding with “Blank” character # 3 Padding with “Blank” character Detailed timing description # 4 # 4 Flag # 4 Reserved

ASCII) # 4 Flag # 4 1st character of name (“N”) 4E # 4 2nd character of name (“1”) 31 # 4 3rd character of name (“5”) 35 # 4 4th character of name (“4”) 34 # 4 5th character of name (“C”) 43 # 4 6th character of name (“1”) 31 # 4 7th character of name (“-”) 2D # 4 8th character of name (“L”) 4C # 4 9th character of name (“0”) # 4 9th character of name (“2”) # 4 New line character indicates end of ASCII string # 4 Padding with “Blank” character # 4 Padding with “Blank” character Extension flag Checksum 89

00110010

0A 00001010

20 00100000 20 00100000 00 00000000 00 00000000 00 00000000

FE 11111110

00 00000000

43 01000011 4D 01001101 4F 01001111 0A 00001010

20 00100000

00 00000000

FE 11111110

00 00000000

01001110 00110001 00110101 00110100 01000011 00110001 00101101

01001100 30 00110000 32 00110010

0A 00001010

20 00100000 20 00100000 00 00000000

10001001

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6 INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

DCLK Frequency 1/Tc 25 44.5 60 MHz (2)

Vertical Total Time TV 910 926 1500 TH -

Vertical Active Display Period TVD 900 900 900 TH -

DE

Note (1) Because this module is operated by DE only mode, Hsync and Vsync are ignored.

(2) 2 channels LVDS input.

Vertical Active Blanking Period TVB TV-TVD 26 TV-TVD TH

Horizontal Total Time TH 760 800 880 Tc (2)

Horizontal Active Display Period THD 720 720 720 Tc (2)

Horizontal Active Blanking Period THB

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TH-THD

160

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TH-THD

Tc (2)

DE

DCLK

DE

DATA

INPUT SIGNAL TIMING DIAGRAM

TC

HD

T

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6.2 POWER ON/OFF SEQUENCE

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Model No.: N154C1 -L02

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Power Supply

for LCD, Vcc

0V

- LVDS Interface

0V

- Power for Lamp

Timing Specifications:

0.5 Љ t1 Љ 10 ms

0 Љ t2 Љ 50 ms

0 Љ t3 Љ 50 ms

t4 Њ 500 ms

Power On

90%

10%

Power Off

90%

t1

t3t2

Valid Data

t6t5

50%50%

ONOFF OFF

Restart

t7

10%

t4

10%

t5 Њ 200 ms

t6 Њ 200 ms

Note (1) Please follow the power on/off sequence described above. Otherwise, the LCD module might be

damaged.

Note (2) Please avoid floating state of interface signal at invalid period. When the interface signal is invalid, be

sure to pull down the power supply of LCD Vcc to 0 V.

Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the

interface signal is valid. The Backlight inverter power must be turned off before the power supply

for the logic and the interface signal is invalid.

Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To

avoid this phenomenon, we suggest that the Vcc falling time is better to follow 5Љt7Љ300 ms.

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7 OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit Ambient Temperature Ta 25r2 Ambient Humidity Ha 50r10 %RH Supply Voltage VCC 3.3 V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" Inverter Current I Inverter Driving Frequency F Inverter Sumida-H05-4915

The measurement methods of optical characteristics are shown in Section 7.2. The following items

should be measured under the test conditions described in Section 7.1 and stable environment shown in

Note (6).

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L

6.0

61

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o

C

mA

KHz

7.2 OPTICAL SPECIFICATIONS

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR

Response Time

Luminance of White L

White Variation

Red

Color Chromaticity

Viewing Angle

Green

Blue

White

Horizontal

Vertica l

300 400 -

T

R

T

F

AVE

5pts - -

GW

Rx Ry

Gx

=0q, TY =0q

T

x

Viewing Normal

Angle

Gy Bx

- 8 12

- 23 28

250 300 -

TYP

-0.03

By

Wx

Wy

Tx+

T

x

TY+

T

Y

CRt10

-

55 65 55 65 40 50 50 60

0.592

0.338

0.322

0.531

0.151

0.126

0.313

0.329

1.3

TYP

+0.03

-

- (2), (5) ms ms

2

cd/m

- (5), (6)

-

Deg.

(3)

(4), (5)

(1)

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Note (1) Definition of Viewing Angle (Tx, Ty):

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Normal

Tx = Ty = 0º

Ty- Ty

TX- = 90º

6 o’clock

T

y- = 90º

x-

y-

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) = L63 / L0

L63: Luminance of gray level 63

L 0: Luminance of gray level 0

CR = CR (5)

Tx-

Tx+

y+

12 o’clock direction

T

y+ = 90º

x+

TX+ = 90º

CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).

Note (3) Definition of Response Time (T

100%

90%

Optical

Response

10%

0%

, TF):

R

T

R

66.67 ms

T

F

66.67 ms

Time

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Note (4) Definition of Average Luminance of White (L

Measure the luminance of gray level 63 at 5 points

L

= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5

AVE

L (x) is corresponding to the luminance of the point X at Figure in Note (6).

Note (5) Measurement Setup:

The LCD module should be stabilized at given temperature for 15 minutes to avoid abrupt

temperature change during measuring. In order to stabilize the luminance, the measurement

should be executed after lighting Backlight for 15 minutes in a windless room.

LCD Module

LCD Panel

Center of the Screen

AVE

):

TOPCON/BM-5A

MINOLTA /CA210

MINOLTA /CS-1000T

Field of View = 2º

500 mm

Light Shield Room

(Ambient Luminance < 2 lux)

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Note (6) Definition of White Variation (GW):

Measure the luminance of gray level 63 at 5 points

GW

= Maximum [L (1) ~ L (5)] / Minimum [L (1) ~ L (5)]

5p

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Horizontal Line

D

D/4 D/2 3D/4

W/4

W/2

W

Vertical Line

3W/4

1 2

5

3

Active Area

X

4

: Test Point

X=1 to 5

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8 PRECAUTIONS

8.1 HANDLING PRECAUTIONS

(1) The module should be assembled into the system firmly by using every mounting hole. Be careful not

to twist or bend the module.

(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause

electrical short or damage the polarizer.

(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and

assembly process.

(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is

very soft and easily scratched.

(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use

Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might

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permanently damage the polarizer due to chemical reaction.

(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel for

a long time.

(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In

case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.

(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.

(9) Do not disassemble the module.

(10) Do not pull or fold the lamp wire.

(11) Pins of I/F connector should not be touched directly with bare hands.

8.2 STORAGE PRECAUTIONS

(1) High temperature or humidity may reduce the performance of module. Please store LCD module within

the specified storage conditions.

(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may

damage LCD module when it is operating.

(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the

response time will become slowly, and the starting voltage of lamp will be higher than the room

temperature.

8.3 OPERATION PRECAUTIONS

(1) Do not pull the I/F connector in or out while the module is operating.

(2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This

can prevent the CMOS LSI chips from damage during latch-up.

(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while

assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.

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9 PACKING

9.1 CARTON

LCD Module

Anti-static Bag

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Model No.: N154C1 -L02

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Box dimensions:422(L)x337(W)x355(H)mm

Weight:Appox. 6.9 kg(10 module per 1 box)

9.2 PALLET

PE Foam(Cover)

Carton

Drier

Carton Label

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10

DEFINITION OF LABELS

10.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

*ZYywwsssTW8A*

N154C1 -L02

N141X5 - L03 Rev.XX

01A

X X X X X X X Y M D L N N N N

C P 1 3 5 4 4 8 - 0 1

(a) Model Name: N154C1 - L02

(b) Revision: Rev. XX, for example: A1, …, C1, C2 …etc.

(c) Serial ID: X X

X X X X X Y M D X N N N N

Serial No.

CMO Internal Use

Year, Month, Date

CMO Internal Use

Revision

CMO Internal Use

Serial ID includes the information as below:

(a) Manufactured Date: Year: 1~9, for 2001~2009

Month: 1~9, A~C, for Jan. ~ Dec.

Day: 1~9, A~Y, for 1

st

to 31st, exclude I , O and U

E207943

MADE IN TAIWAN

(b) Revision Code: cover all the change

(c) Serial No.: Manufacturing sequence of product

10.2 CARTON LABEL

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