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N150X3-L0A
Specification
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Specification
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CMO N150X3-L0A Specification

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Issued Date: Jan.23, 2006
Approval
- CONTENTS -
REVISION HISTORY ------------------------------------------------------- 3
1. GENERAL DESCRIPTION ------------------------------------------------------- 5
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
2. ABSOLUTE MAXIMUM RATINGS ------------------------------------------------------- 6
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
2.2.2 BACKLIGHT UNIT
3. ELECTRICAL CHARACTERISTICS ------------------------------------------------------- 7
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
4. BLOCK DIAGRAM ------------------------------------------------------- 10 TFT LCD MODULE w/ INVERTER
5. INPUT TERMINAL PIN ASSIGNMENT ------------------------------------------------------- 10
5.1 TFT LCD MODULE
5.2 TIMING DIAGRAM OF LVDS INPUT SIGNAL
5.3 COLOR DATA INPUT ASSIGNMENT
6. INTERFACE TIMING ------------------------------------------------------- 12
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
6.2 POWER ON/OFF SEQUENCE
7. OPTICAL CHARACTERISTICS ------------------------------------------------------- 14
7.1 TEST CONDITIONS
7.2 OPTICAL SPECIFICATIONS
8. PRECAUTIONS ------------------------------------------------------- 18
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
8.2 SAFETY PRECAUTIONS
9. DEFINITION OF LABELS ------------------------------------------------------- 19
9.1 CMO MODULE LABEL
9.2 Dell LABEL
10.2.1 MAL PPID LABEL
10.2.2 CARTON LABEL
10.2.3 PALLET LABEL
10. PACKING ------------------------------------------------ 20
10.1 CARTON
10.2 PALLET
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Version Date
Ver 3.0
Ver 3.1
Ver 3.1
Ver 3.2
Sep.24,’05
Dec.07’05
Dec.07’05
Jan.23,’06
Page
(New)
All
P19
P21
P27
P29
Section Description
All
6.2
7.2
9.1
10.1
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Issued Date: Jan.23, 2006
Approval
REVISION HISTORY
Approval specification was first issued
Marked t7 at drawing
Modified tolerance of white color chromaticity
Carton packing
CMO Module label
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
N150X3- L09 is a 15.0” TFT Liquid Crystal Display module & ROHS module. This module supports 1024 x
768 XGA mode and can display 262,144 colors. The optimum viewing angle is at 6 o’clock direction.
1.2 FEATURES
- Thin and Light Weight
- XGA (1024 x 768 pixels) resolution
- DE only mode
- 3.3V LVDS (Low Voltage Differential Signaling) interface with 1 pixel/clock
- SPWG (Standard Panel Working Group) Style B compatible
- Single CCFL
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1.3 APPLICATION
- TFT LCD Notebook
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note Active Area 304.1 (H) x 228.1 (V) (15.0” diagonal) mm Bezel Opening Area 307.8 (H) x 231.6 (V) mm Driver Element a-si TFT active matrix - ­Pixel Number 1024 x R.G.B. x 768 pixel ­Pixel Pitch 0.297 (H) x 0.297 (V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 262,144 color ­Transmissive Mode Normally white - ­Surface Treatment
Hardness (2H), Haze 40,ReflectionЉ3н
- -
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal(H) 316.8 317.3 317.8 mm (1)
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Vertical(V) 241.5 242 242.5 mm (1) Depth(D) - 5.7 6.0 mm (1)
Weight - 500 515 g -
(1)
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A
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1) Operating Ambient Temperature TOP 0 +50 ºC (1), (2) Shock (Non-Operating) S Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation .
Note (2) The temperature of panel display surface area should be 0 ºC Min. and 60 ºC Max.
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Value
Min. Max.
-
NOP
- 1.5 G (4), (5)
NOP
Issued Date: Jan.23, 2006
Approval
Unit Note
210 G (3), (5)
Relative Humidity (%RH)
100
95
80
60
40
20
8
5
Operating Range
Storage Range
Temperature (ºC)
Note (3) 1 time for ± X, ± Y, ± Z. for Condition (210G / 3ms) is half Sine Wave,
Condition( 50G / 18ms ) is Rectangle Wave,
Note (4) 10 ~ 200 Hz, 0.5 Hr / Cycle, 1 cycles for each X, Y, Z.:
80 60 -20 400 20-40
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture.
The fixing condition is shown as below:
t Room Temperature
Side Mount Fixing Screw
Gap=2mm
Bracket
LCD Module
Side Mount Fixing Screw
Stage
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2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage Vcc -0.3 +4.0 V Logic Input Voltage VIN -0.3 Vcc+0.3 V
2.2.2 BACKLIGHT UNIT
Item Symbol
Lamp Voltage VL - 2.5K V Lamp Current IL - 7.0 mA Lamp Frequency FL - 80 KHz
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
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Value
Min. Max.
Value
Min. Max.
Unit Note
Unit Note
Issued Date: Jan.23, 2006
Approval
(1)
(1), (2), IL = (6.0) mA
RMS
RMS
(1), (2)
should be restricted to the conditions described under Normal Operating Conditions.
Note (2) Specified values are for lamp (Refer to Section 3.2 for further information).
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Issued Date: Jan.23, 2006
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max. Power Supply Voltage Vcc 3.0 3.3 3.6 V ­Ripple Voltage VRP - 100 - mV ­Rush Current I
Power Supply Current
White - 300 350 mA (3)a Black
- - 1.5 A (2)
RUSH
Lcc
- 350 400 mA (3)b
“H” Level VIL - - +100 mV - Logical Input Voltage
(LVDS)
“L” Level V
-100 - - mV -
IH
Terminating Resistor RT - 100 - Ohm ­Power per EBL WG P
- 3.176 - W (4)
EBL
Value
Unit Note
Approval
Note (1) The module should be always operated within above ranges.
Note (2) Measurement Conditions:
+3.3V
VR1
R1 47K
R2
1K
47K
(High to Low)
(Control Signal)
SW
+12V
C1
1uF
0.01uF
Q1
2SK1475
FUSE
Q2
2SK1470
C2
Vcc rising time is 470μs
C3 1uF
Vcc
(LCD Module Input)
+3.3V
0.9Vcc
0.1Vcc
GND
470μs
Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, f
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= 60
v
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Hz, whereas a power dissipation check pattern below is displayed.
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Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input
a. White Pattern
Active Area
power. Test conditions are as follows.
(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f
(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file
“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.
(c) Luminance: 60 nits.
(d) The inverter used is provided from O2Micro (www.o2micro.com). Please contact O2Mirco for detail
= 60 Hz,
v
b. Black Pattern
Active Area
information. CMO doesn’t provide the inverter in this product.
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3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max. Lamp Input Voltage VL 627 660 693 V Lamp Current IL 2.0 6.0 6.5 mA
Lamp Turn On Voltage VS
--- --- 1110 (25
--- --- 1330 (0 Operating Frequency FL 45 60 80 KHz (3) Lamp Life Time LBL 15000 --- - Hrs (5) Power Consumption PL - 3.96 - W (4), IL = 6.0 mA
Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:
Value
o
C) V
o
C) V
Unit Note
I
RMS
RMS
(2)
RMS
(2)
RMS
= 6.0 mA
L
(1)
LCD
Module
HV (White)
LV (Black)
1
2
Current Meter
Inverter
A
Note (2) The voltage shown above should be applied to the lamp for more than 1 second after startup.
Otherwise the lamp may not be turned on.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency from the
display, and this may cause line flow on the display. In order to avoid interference, the lamp
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.
Note (4) P
= IL VL
L
Note (5) The lifetime of lamp can be defined as the time in which it continues to operate under the condition
Ta = 25 2
o
C and IL = 6.0 mArms until one of the following events occurs:
(a) When the brightness becomes or lower than 50% of its original value.
(b) When the effective ignition length becomes or lower than 80% of its original value. (Effective
ignition length is defined as an area that has less than 70% brightness compared to the
brightness in the center point.)
Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the
inverter must have specifications for the modularized lamp. The performance of the Backlight,
such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for
the lamp. All the parameters of an inverter should be carefully designed to avoid producing too
much current leakage from high voltage output of the inverter. When designing or ordering the
inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the
inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module
should be operated in the same manners when it is installed in your instrument.
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The output of the inverter must have symmetrical (negative and positive) voltage waveform and
symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter
which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may
produce interface with horizontal synchronous frequency and as a result this may cause beat on the
display. Therefore lamp frequency shall be as away possible from the horizontal synchronous
frequency and from its harmonics in order to prevent interference.
Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its
leakage current.
a. The asymmetry rate of the inverter waveform should be 10% below;
b. The distortion rate of the waveform should be within Ѕ2 ± 10%;
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The ideal sine wave form shall be symmetric in positive and negative polarities.
I p
I -p
* Asymmetry rate:
| I
* Distortion rate
I
– I –p | / I
p
(or I –p) / I
p
rms
rms
* 100%
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)
4. BLOCK DIAGRAM
TFT LCD MODULE
4.1 TFT LCD MODULE
Rxin0(+/-)
Rxin1(+/-)
Rxin2(+/-)
(JAE-FI-XB30S-HF10)
INPUT CONNECTOR
CLK(+/-)
Vcc
GND
Data
CLK
V
EDID
EDID
EDID
VL
LAMP CONNECTOR
(JST-BHSR-02VS-1)
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LVDS INPUT /
TIMING CONTROLLER
DC/DC CONVERTER &
REFERENCE VOLTAGE
GENERATOR
EDID
EEPROM
Issued Date: Jan.23, 2006
SCAN DRIVER IC
TFT LCD PANEL
(1024xR.G.B.x768)
DATA DRIVER IC
BACKLIGHT UNIT
Approval
4.2 BACKLIGHT UNIT
1 HV (White)
2 LV (Black
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5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin Symbol Description Polarity Remark
1 Vss Ground 2 Vcc Power Supply +3.3 V (typical) 3 Vcc Power Supply +3.3 V (typical) 4 V 5 NC Non-Connection 6 CLK 7 DATA 8 Rxin0- LVDS Differential Data Input Negative
9 Rxin0+ LVDS Differential Data Input Positive
10 Vss Ground 11 Rxin1- LVDS Differential Data Input Negative
12 Rxin1+ LVDS Differential Data Input Positive
13 Vss Ground
14 Rxin2- LVDS Differential Data Input Negative
15 Rxin2+ LVDS Differential Data Input Positive 16 Vss Ground 17 CLK- LVDS Clock Data Input Negative 18 CLK+ LVDS Clock Data Input Positive 19 Vss Ground 20 NC Non-Connection 21 NC Non-Connection 22 Vss Ground 23 NC Non-Connection 24 NC Non-Connection 25 Vss Ground 26 NC Non-Connection 27 NC Non-Connection 28 Vss Ground
29 NC Non-Connection 30 NC Non-Connection
DDC 3.3V Power DDC 3.3V Power
EDID
DDC Clock DDC Clock
EDID
DDC Data DDC Data
EDID
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R0~R5,G0
-
G1~G5,B0,B1
-
B2~B5,DE,Hsync,Vsync
LVDS Level Clock
Note (1) Connector Part No.: JAE-FI-XB30SL-HF10
Note (2) User’s connector Part No: JAE-FI-X30C2L
Note (3) The first pixel is even.
5.2 BACKLIGHT UNIT
Pin Symbol Description Color
1 HV High Voltage White 2 LV Ground Black
Note (1) Connector Part No.: JST-BHSR-02VS-1
Note (2) User’s connector Part No.: JST-SM02B-BHSS-1-TB
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5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
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CLK+
Rxin2
Rxin1
Rxin0
T/7
IN20 IN19 IN18 IN17 IN16 IN15 IN14
DE B5 B4 B3 B2 Vsync Hsync
IN13 IN12 IN11 IN10 IN9 IN8 IN7
B1 G4 G3 G2 G1 B0 G5
IN6 IN5 IN4 IN3 IN2 IN1 IN0
G0 R3 R2 R1 R0 R5 R4
Signal for 1 DCLK Cycle (T)
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5.4 EDID DATA
The EDID (Extended Display Identification Data) data formats are to support displays as defined in the
VESA Plug & Display and FPDI standards.
Byte #
(decimal)
0 0 Header , Fixed 00 00000000 1 1 Header , Fixed FF 11111111 2 2 Header , Fixed FF 11111111 3 3 Header , Fixed FF 11111111 4 4 Header , Fixed FF 11111111 5 5 Header , Fixed FF 11111111 6 6 Header , Fixed FF 11111111 7 7 Header , Fixed 00 00000000 8 8 ID=IBM 30 00100100
9 9 ID=IBM AE 01001101 10 0A XGA (IBM Unique ID) 40 01010101 11 0B XGA (IBM Unique ID) 40 00001010 12 0C 32-bit serial # Unused(01h for VESA, 00h for SPWG) 00 00000000 13 0D 32-bit serial # Unused(01h for VESA, 00h for SPWG) 00 00000000 14 0E 32-bit serial # Unused(01h for VESA, 00h for SPWG) 00 00000000 15 0F 32-bit serial # Unused(01h for VESA, 00h for SPWG) 00 00000000 16 10 Week of manufacture 1 - 53 (unused: 00h) 32 00000000 17 11 Year of manufacture year - 1990(unsed:00h) 0F 00000000 18 12 Version=1 01 00000001 19 13 Revision=3 03 00000011 20 14 Digital 80 10000000 21 15 Active area horizontal 30.4128 cm 1E 00011110 22 16 Active area vertical 22.8096cm 17 00010111 23 17 gamma * 100-100 = 2.2*100-100=120 78 01111000
24 18 25 19 Rx1 Rx0 Ry1 Ry0 Gx1 Gx0 Gy1 Gy0 77 01110111 26 1A Bx1 Bx0 By1 By0 Wx1 Wx0 Wy1 Wy0 F1 11110001 27 1B Rx=0.626 A0 10100000 28 1C Ry=0.355 5A 01011010 29 1D Gx=0.294 4B 01001011 30 1E Gy=0.589 96 10010110 31 1F Bx=0.144 24 00100100 32 20 By=0.097 18 00011000 33 21 Wx=0.313 50 01010000 34 22 Wy=0.329 54 01010100 35 23 Established timings 1 21 00000000 36 24 Established timings 2 (1024x768@60Hz) 08 00001000 37 25 No manufacturer's specific timing 00 00000000 38 26 Standard timing ID # 1 01 00000001 39 27 Standard timing ID # 1 01 00000001 40 28 Standard timing ID # 2 01 00000001
Byte
#(hex)
Field Name and Comments Value
Feature support (no DPMS, Active off, RGB, Preferred Timing Mode)
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Value
(hex)
EA 00001010
(binary)
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41 29 Standard timing ID # 2 01 00000001 42 2A Standard timing ID # 3 01 00000001
43 2B Standard timing ID # 3 01 00000001 44 2C Standard timing ID # 4 01 00000001 45 2D Standard timing ID # 4 01 00000001 46 2E Standard timing ID # 5 01 00000001 47 2F Standard timing ID # 5 01 00000001 48 30 Standard timing ID # 6 01 00000001 49 31 Standard timing ID # 6 01 00000001 50 32 Standard timing ID # 7 01 00000001 51 33 Standard timing ID # 7 01 00000001 52 34 Standard timing ID # 8 01 00000001 53 35 Standard timing ID # 8 01 00000001 54 36 Detailed timing description # 1 Pixel clock (“65MHz”) 64 01100100 55 37 65MHz/10000 =6500=1964H 19 00011001 56 38 HActive(D7-D0) = 1024 mod 256 00 00000000 57 39 HBlank(D7-D0) = 320 mod 256 40 01000000 58 3A HActive(D11-D8) : HBlank(D11-D8) = 1024/256 : 320/256 41 01000001 59 3B VActive(D7-D0) = 768 mod 256 00 00000000 60 3C VBlank(D7-D0) = 38 mod 256 26 00100110 61 3D VActive(D11-D8) : VBlank(D11-D8) = 768/256 : 38/256 30 00110000 62 3E HSyncOffset(D7-D0) = HBorder+HFrontPorch = 24 18 00011000 63 3F HSyncWidth(D7-D0) = 136 88 10001000 64 40 VSyncOffset(D3-D0)=3 : VSyncWidth(D3-D0)=6 36 00110110
HSyncOffset(D9-D8) : HSyncWidth(D9-D8) :
65 41 66 42 HImageSize(mm, D7-D0) = 304mod 256 30 00110000 67 43 VImageSize(mm, D7-D0) = 228mod 256 E4 11100100
68 44 69 45 Horizontal Border=0 00 00000000 70 46 Vertical Border=0 00 00000000
71 47 72 48 Detailed timing description # 1 Pixel clock (“54.16MHz”) 28 01010000 73 49 54.16MHz/10000 =5416=1528H 15 00010100 74 4A HActive(D7-D0) = 1024 mod 256 00 00000000 75 4B HBlank(D7-D0) = 320 mod 256 40 00100000 76 4C HActive(D11-D8) : HBlank(D11-D8) = 1024/256 : 320/256 41 01000001 77 4D Vertical Avtive =768 mod 256 00 00000000 78 4E Vertical Blanking =38 mod 256 26 00011001 79 4F VActive(D11-D8) : VBlank(D11-D8) = 768/256 : 38/256 30 00110000 80 50 HSyncOffset(D7-D0) = HBorder+HFrontPorch = 24 18 00101000 81 51 HSyncWidth(D7-D0) = 136 88 01101000 82 52 VSyncOffset(D3-D0)=3 : VSyncWidth(D3-D0)=6 36 00110100 83 53 Horizontal Vertical Sync Offset/Width upper 2bits = 0 00 00000000 84 54 HImageSize(mm, D7-D0) = 304mod 256 30 00011101 85 55 VImageSize(mm, D7-D0) = 228mod 256 E4 11010110
VSyncOffset(D5-D4) : VSyncWidth(D5-D4)
HImageSize(D11-D8) : VImageSize(D11-D8) = 304/256 : 228/256
Non-interlaced, Normal Display, Digital separate, Positive Hsync, Negative Vsync 18 00011000
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00 00000000
10 00010000
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HImageSize(D11-D8) : VImageSize(D11-D8) = 304/256 :
86 56 87 57 Horizontal Border=0 00 00000000
88 58 Vertical Border=0 00 00000000
89 59 90 5A Flag 00 00000000 91 5B Flag 00 00000000 92 5C Flag 00 00000000 93 5D Data type tag :0F 0F 00001111 94 5E Flag 00 00000000
95 5F 96 60 Low Refresh Rate #1 Image Aspect ratio(4 : 3) 43 01000011 97 61 Low Refresh Rate #1 Refresh Rate=50Hz 32 00110010
98 62 99 63 Low Refresh Rate #2 Image Aspect ratio(4 : 3) 43 01000011
100 64 Low Refresh Rate #2 Refresh Rate=40Hz 28 00101000 101 65 Brightness (1/10nit) , 200/10=20(=14h) 14 00010100 102 66 Feature Flags 01 00000001 103 67 Reserved 00 00000000 104 68 EISA manufacturer code(3 Character ID) -CMO 0D 00001101 105 69 Compressed ASCII AF 10101111 106 6A Panel Supplier Reserved - Product code -1512 12 00010010 107 6B (Hex, LSB first) 15 00010101 108 6C Flag 00 00000000 109 6D Flag 00 00000000 110 6E Flag 00 00000000
111 6F Data type tag : FEh FE 11111110 112 70 Flag 00 00000000 113 71 "N" 4E 01001110 114 72 "1" 31 00110001 115 73 "5" 35 00110101 116 74 "0" 30 00110000 117 75 "X" 58 01011000 118 76 "3" 33 00110011 119 77 "-" 2D 00101101 120 78 "L" 4C 01001100 121 79 "0" 30 00110000 122 7A "A" 41 01000001
123 7B
124 7C
125 7D 126 7E No extension 00 00000000 127 7F One-byte checksum of entire 128 bytes EDID equals 00h.
228/256
Non-interlaced,Normal display,no stereo,Digital separate sync,H/V pol negatives 18 00011000
Low Refresh Rate #1 (Horizontal active pixels / 8 ) ­31=97(61h) 61 01100001
Low Refresh Rate #2 (Horizontal active pixels / 8 ) ­31=97(61h) 61 01100001
(If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h) 0A 00001010 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h) (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
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10 00010000
20 00100000
20 00100000
1A
00011010
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5.5 EDID SIGINAL SPECIFICATION
(1) EDID Power
Parameter Symbol Test Condition Min. Typ. Max. Unit
Power supply
voltage
Vcc — 2.7 — 5.5 V
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(2) DC characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Supply current Vcc=5.0V Icc READ at 100kHz — 0.4 1.0 mA
Supply current Vcc=5.0V Icc WRITE at 100kHz — 2.0 3.0 mA
Standby Current ISB Vin=Vcc or Vss — 1.6 4.0 μA
Input Leakage Current ILI Vin=Vcc or Vss — 0.1 3.0 μA
Onput Leakage Current ILO Vout=Vcc or Vss — 0.05 3.0 μA
Input Low Level VIL — -1.0 — Vcc x 0.3 V
Input High Level VIH — Vcc x 0.7 — Vcc+0.5 V
Output Low Level Vcc=1.8V VOL1 IOL=0.15mA — — 0.2 V
Output Low Level Vcc=3.0V VOL2 IOL=2.1mA — — 0.4 V
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(3) AC characteristics (VCC=2.5~5.5V standard operation mode)
Parameter Symbol Min Max Unit
Clock Frequency, SCL FSCL — 100 kHz
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Clock Pulse Width Low TLOW 4.7 —
Clock Pulse Width High THIGH 4.0 —
Noise Suppression Time TI — 100 ns
Clock Low to Data Out Valid TAA 0.1 4.5
Time the bus must be free
BUF 4.7 —
before a new transmission
can start
Start Hold Time THD.STA 4.0 —
Start Set-up Time TSU.STA 4.7 —
Data in Hold Time THD.DAT 0 —
Data in Set-up Time TSU.DAT 200 — ns
Inputs Rise Time TR — 1.0
T
Ӵs
Ӵs
Ӵs
Ӵs
Ӵs
Ӵs
Ӵs
Ӵs
Inputs Fall Time TF — 300 ns
Stop Set-up Time TSU.STO 4.7 —
Data Out Hold Time TDH 100 — ns
Write Cycle Time TWR — 10 ms
Ӵs
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5.6 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for
the color. The higher the binary input, the brighter the color. The table below provides the assignment of
color versus data input.
Color
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0 Black Red Green
Basic Colors
Gray Scale Of Red
Gray Scale Of Green
Gray Scale Of Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue Cyan Magenta Yellow White Red(0)/Dark Red(1) Red(2)
:
: Red(61) Red(62) Red(63) Green(0)/Dark Green(1) Green(2)
:
: Green(61) Green(62) Green(63) Blue(0)/Dark Blue(1) Blue(2)
:
: Blue(61) Blue(62) Blue(63)
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
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Approval
Data Signal
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
19 /31
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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
DCLK Frequency 1/Tc 50 65 68 MHz -
Vertical Total Time TV 771 806 850 TH -
DE
Note (1) Because this module is operated by DE only mode, Hsync and Vsync input signals should be set
to low logic level or ground. Otherwise, this module would operate abnormally.
Vertical Addressing Time TVD 768 768 768 TH -
Horizontal Total Time TH 1200 1344 1600 Tc -
Horizontal Addressing Time THD 1024 1024 1024 Tc -
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Issued Date: Jan.23, 2006
Approval
DE
DCLK
TC
DE
DATA
6.2 POWER ON/OFF SEQUENCE
Power Supply
for LCD, Vcc
0V
INPUT SIGNAL TIMING DIAGRAM
Power On
90%
10%
t1
HD
T
Power Off
90%
t3 t2
t7
Restart
10%
t4
10%
- Interface Signal
(LVDS Signal of Transmitter), V
- Power for Lamp
0V
I
Valid Data
t6 t5
50%50%
ONOFF OFF
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Timing Specifications:
t1 Љ 10 msec
0 < t2 Љ 50 msec
0 < t3 msec
t4 Њ150 msec
t5 Њ200 msec
t6 Њ0 msec
t7Љ 10 msec
Note (1) Please avoid floating state of interface signal at invalid period.
Note (2) When the interface signal is invalid, be sure to pull down the power supply of LCD Vcc to 0 V.
Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the
interface signal is valid. The Backlight inverter power must be turned off before the power supply
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Approval
for the logic and the interface signal is invalid.
Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To
avoid this phenomenon, we suggest that the Vcc falling time had better to follow t7Њ5 msec
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit Ambient Temperature Ta Ambient Humidity Ha Supply Voltage VCC 3.3 V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" Inverter Current IL 6.0 mA Inverter Driving Frequency FL 61 KHz Inverter Sumida H05 4915
The relative measurement methods of optical characteristics are shown in 6.2. The following items
should be measured under the test conditions described in 6.1 and stable environment shown in Note (6).
7.2 OPTICAL SPECIFICATIONS
Item Symbol Condition Min. Typ. Max. Unit Note
Red
Color Chromaticity
Average Luminance of White L
Green
Blue
White
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Approval
o
25r2
50r10
Rx 0.580 ---
Ry 0.335 --­Gx 0.314 --­Gy 0.534 ---
TYP
-0.03
TYP
+0.03 Bx 0.151 --­By
Wx 0.285 0.313 0.341 ---
T
=0q, TY =0q
x
CS-1000T
0.119
Wy 0.309 0.329 0.349 ---
AVE
170 200 --- cd/m2(4),(5)
C
%RH
(1), (5)
---
Contrast Ratio CR 170 250 --- --- (2), (5)
Color Gamut C.G%
--- 45 --- (5), (7)
Tr --- 5 10 ms
Response Time
White Variation
Viewing Angle
Horizontal
Vertical
T
GW5
GW
Tx+
T
x
TY+
T
Y
f
13
-
-
=0q, TY =0q
T
x
Tx=0q, TY =0q
CA-210
CRt10
CA-210
--- 11 16 ms
80 --- ---
65 --- ---
40 45 --­40 45 --­15 20 ---
Deg. (1), (5)
40 45 ---
(3)
% (6)
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y
Note (1) Definition of Viewing Angle (Tx, Ty):
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Approval
TX- = 90º
x-
6 o’clock
T
y- = 90º
y-
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Normal
Tx = Ty = 0º
Ty- Ty
Tx
Tx
y+
12 o’clock direction
T
y+ = 90º
x+
TX+ = 90º
Contrast Ratio (CR) = L63 / L0
L63: Luminance of gray level 63
L 0: Luminance of gray level 0
CR = CR (1)
CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).
Note (3) Definition of Response Time (T
100%
Optical
Response
Gray Level 63
90%
10%
0%
, TF):
R
Gray Level 63
Gra
Level 0
Tr
T
f
66.67 ms 66.67 ms
Time
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Approval
Note (4) Definition of Average Luminance of White (L
Measure the luminance of gray level 63 at 5 points
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
AVE
L (x) is corresponding to the luminance of the point X at Figure in Note (7).
Note (5) Measurement Setup:
The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting Backlight for 20 minutes in a windless room.
LCD Module
LCD Panel
Center of the Screen
Field of View = 2º
AVE
):
BM-5A
CS-1000T
500 mm
Light Shield Room
(Ambient Luminance < 2 lux)
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Note (6) Definition of White Variation ( GW5, GW13 ):
Measure the luminance of gray level 63 at 5 points
GW
= Minimum [L (1), L (2), L (3), L (4), L (5)] / Maximum [L (1), L (2), L (3), L (4), L (5)]
5
GW
= Minimum [L (1), L (2), …, L (12), L (13)] / Maximum [L (1), L (2), …, L (12), L (13)]
13
˄˃
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Approval
ˉ
˛˂ˇ
˅
˛
˛˂ˇ ˛˂ˇ ˛˂ˇ
ˌ ˄˃
ˇˈ
˄˄
˄˃ ˄˃
˄˃
˪˂ˇ ˪˂ˇ ˪˂ˇ ˪˂ˇ
Note (7) Definition of color gamut (C.G%):
C.G%= 'R G B /'R
R
R, G, B
'R
, G0, B0 : color coordinates of red, green, and blue defined by NTSC, respectively.
0
: color coordinates of module on 63 gray levels of red, green, and blue, respectively.
0 G0 B0
0 G0 B0
: area of triangle defined by R0, G0, B0
,*100%
'R G B: area of triangle defined by R, G, B
ˊ
ˆ
˄
˄˅
˪
ˋ
˄ˆ
˖ ˜˘ ʳ˄ˌ ˆ˄
˃ˁˌ
˃ˁˋ
˃ˁˊ
˃ˁˉ
˃ˁˈ
˃ˁˇ
˃ˁˆ
˃ˁ˅
˃ˁ˄
˃
˃ ˃ˁ˅ ˃ˁˇ ˃ˁˉ ˃ˁˋ
G
0
G
R
0
R
B
B
0
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8. PRECAUTIONS
8.1 HANDLING PRECAUTIONS
(1) The module should be assembled into the system firmly by using every mounting hole. Be careful not
to twist or bend the module.
(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause
electrical short or damage the polarizer.
(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and
assembly process.
(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is
very soft and easily scratched.
(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use
Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might
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Approval
permanently damage the polarizer due to chemical reaction.
(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel for
a long time.
(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.
(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.
(9) Do not disassemble the module.
(10) Do not pull or fold the lamp wire.
(11) Pins of I/F connector should not be touched directly with bare hands.
8.2 STORAGE PRECAUTIONS
(1) High temperature or humidity may reduce the performance of module. Please store LCD module within
the specified storage conditions.
(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may
damage LCD module when it is operating.
(3) It may reduce the display quality if the ambient temperature is lower than 10 deg C. For example, the
response time will become slowly, and the starting voltage of lamp will be higher than the room
temperature.
8.3 OPERATION PRECAUTIONS
(1) Do not pull the I/F connector in or out while the module is operating.
(2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This
can prevent the CMOS LSI chips from damage during latch-up.
(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while
assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.
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9.PACKING
9.1 CARTON
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9.2 PALLET
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10. DEFINITION OF LABELS
10.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following
explanation.
04/53
N150X3 -L0A Rev.C1
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Approval
(a) Model Name: N150X3 - L0A
(b) Revision: Rev. XX, for example: C1, C2 …etc.
(c) Serial ID: X X
Serial ID includes the information as below:
(a) Manufactured Date: Year: 1~9, for 2001~2009
Day: 1~9, A~Y, for 1
(b) Revision Code: cover all the change
(c) Serial No.: Manufacturing sequence of product
11S13N7068Z1ZABX000042 507
57C22044CT20042
X X X X X Y M D L N N N N
Month: 1~9, A~C, for Jan. ~ Dec.
Serial No.
Product Line
Year, Month, Date
CMO Internal Use
Revision CMO Internal Use
st
to 31st, exclude I , O and U
For Lenovo’s barcode content
11S PPPPPPP Z1Z HHH SSSSSS YMM
(a) 11S: Fixed characters.
(b) PPPPPPP (P/N): Customer part number 13N7068, fixed characters
(c) Z1Z: Fixed characters.
(d) HHH (Header Code):
(e) SSSSSS: Series number.
(f) YMM: Y: The last character of year.
MM: Month
BEU
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10.2 CARTON LABEL
P/N: 13N7068
N150X3-L0A
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