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N141XB-L07
Specification
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CMO N141XB-L07 Specification

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Model No.: N141XB -L07
Approval
- CONTENTS -
REVISION HISTORY
1. GENERAL DESCRIPTION
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
2. ABSOLUTE MAXIMUM RATINGS ------------------------------------------------------- 5
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
2.2.2 BACKLIGHT UNIT
3. ELECTRICAL CHARACTERISTICS ------------------------------------------------------- 7
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
4. BLOCK DIAGRAM ------------------------------------------------------- 10
4.1 TFT LCD MODULE
4.2 BACKLIGHT UNIT
5. INPUT TERMINAL PIN ASSIGNMENT ------------------------------------------------------- 11
5.1 TFT LCD MODULE
5.2 BACKLIGHT UNIT
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
5.4 COLOR DATA INPUT ASSIGNMENT
5.5 EDID DATA STRUCTURE
5.6 EDID SIGNAL SPECIFICATION
6. INVERTER INSPECIFICATION ------------------------------------------------------ 19
6.1Connector type
6.2 Input Connector pin assignment
6.3 Output connector pin assignment
6.4 General electrical specification
7. INTERFACE TIMING
7.1 INPUT SIGNAL TIMING SPECIFICATIONS
7.2 POWER ON/OFF SEQUENCE
8. OPTICAL CHARACTERISTICS ------------------------------------------------------- 25
8.1 TEST CONDITIONS
8.2 OPTICAL SPECIFICATIONS
9. PRECAUTIONS ------------------------------------------------------- 29
9.1 HANDLING PRECAUTIONS
9.2 STORAGE PRECAUTIONS
9.3 OPERATION PRECAUTIONS
10. PACKING ------------------------------------------------------- 30
10.1 CARTON
10.2 PALLET
11. DEFINITION OF LABELS ------------------------------------------------------- 32
11.1 CUSTOMER LABEL
11.2 CMO MODULE LABEL
------------------------------------------------------- 3
------------------------------------------------------- 4
------------------------------------------------------- 23
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Version Date
Ver 1.0
Ver 1.1
Ver 2.0
Ver 3.0
Ver 3.1
Aug. 13. ‘04
Oct. 04. ‘04
Nov. 03. ‘04
Nov. 03. ‘04
Apr. 27. ‘05
Page
(New)
All
1
4
7
14~17
22
All
Last
page
Section Description
drawing
All
Cover
1.2
1.5
3.1
5.5
6.4
All
Outline
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Model No.: N141XB -L07
Approval
REVISION HISTORY
Preliminary specification first issued.
Add “ Lead Free Model “ description
Add “ lead free model “ description
Modify the weight spec to with inverter
Without inverter 420 typ / 430 max Æ With inverter 430 typ / 440max
Modify Power Supply Current Max value
White 450 Æ 380 , Black/Vertical Stripe 500 Æ 480
Update EDID Data for 256 steps inverter
Update Brightness Control SM-BUS Table for 256 steps inverter
Issue Approval Specification for DELL
Modify outline drawing (Drawing no. N141C4107B)
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
N141XB -L07 is a 14.1” TFT Liquid Crystal Display module with single CCFL Backlight unit and 30 pins
LVDS interface and inverter. This module supports 1024 x 768 XGA mode and can display 262,144 colors.
The optimum viewing angle is at 6 o’clock direction.
1.2 FEATURES
- With inverter
- Thin and light weight
- XGA (1024 x 768 pixels) resolution
- DE (Data Enable) only mode
- 3.3V LVDS (Low Voltage Differential Signaling) interface with 1 pixel/clock
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Model No.: N141XB -L07
Approval
- SPWG (Standard Panel Working Group) Style B compatible and lead free model
1.3 APPLICATION
- TFT LCD Notebook
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note Active Area 285.7 (H) x 214.3 (V) (14.1” diagonal) mm Bezel Opening Area 288.9 (H) x 217.5 (V) mm Driver Element a-si TFT active matrix - ­Pixel Number 1024 x R.G.B. x 768 pixel ­Pixel Pitch 0.279 (H) x 0.279 (V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 262,144 color ­Transmissive Mode Normally white - ­Surface Treatment Hardness (3H), Anti-glare (Haze 25) - -
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Module Size
(without inverter)
Weight (Panel with inverter) - 430 440 g -
I/F connector mounting position The mounting inclination of the connector makes the
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Horizontal(H) 298.5 299.0 299.5 mm Vertical(V) 227.5 228.0 228.5 mm Depth(D) - 5.2 5.5 mm
screen center within ±0.5mm as the horizontal.
(1)
(1)
(2)
(2) Connector mounting position
+/- 0.5mm
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A
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1) Storage Humidity HST 5 95 %RH (1) Operating Ambient Temperature TOP 0 +50 ºC (1), (2) Operating Ambient Humidity HOP 8 95 %RH (1)
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) (a) 95 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation .
Note (2) The temperature of panel surface should be 0 ºC Min. and 50 ºC Max.
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Model No.: N141XB -L07
Value
Min. Max.
-
NOP
- 1.5 10-200 G Hz (4), (5)
NOP
50 18 220 2
Unit Note
G ms G ms
(3), (4), (5)
Approval
Note (3) Condition for 50G 18ms is Rectangle Wave. Condition for 220G 2ms is Half Sine Wave.
Note (4) The fixing condition is shown as below:
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
t Room Temperature
Side Mount Fixing Screw
Gap=2mm
so that the module would not be twisted or bent by the fixture.
Bracket
LCD Module
Side Mount Fixing Screw
Stage
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2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage Vcc -0.3 +4.0 V Logic Input Voltage VIN -0.3 Vcc+0.3 V
2.2.2 BACKLIGHT UNIT
Item Symbol
Lamp Voltage VL - 2.5K V Lamp Current IL - 6.5 mA Lamp Frequency FL - 80 KHz
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
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Value
Min. Max.
Value
Min. Max.
Unit Note
Unit Note
Model No.: N141XB -L07
Approval
(1)
(1), (2), IL = (6.0) mA
RMS
RMS
(1), (2)
Note (2) Specified values are for lamp (Refer to Section 3.2 for further information).
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Model No.: N141XB -L07
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max. Power Supply Voltage Vcc 3.0 3.3 3.6 V ­Ripple Voltage VRP - - 100 mV ­Rush Current I
- - 1.5 A (2)
RUSH
White - 350 380 mA (3)a
Power Supply Current
Black - 450 480 mA (3)b Vertical Stripe
lcc
- 450 480 mA (3)c
“H” Level VIH - - +100 mV - Differential Input Voltage for
LVDS Receiver Threshold
“L” Level V
-100 - - mV -
IL
Terminating Resistor RT - 100 - Ohm -
Note (1) The module should be always operated within above ranges.
Note (2) Measurement Conditions:
Value
Unit Note
Approval
+3.3V
R1
47K
Q1 2SK1475
FUSE
C3
1uF
Vcc
(LCD Module Input)
(High to Low)
(Control Signal)
SW
+12V
C1
1uF
VR1
R2
1K
47K
0.01uF
Q2
2SK1470
C2
Vcc rising time is 470us
+3.3V
0.9Vcc
0.1Vcc
GND
470us
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Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, DC
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Model No.: N141XB -L07
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Current and f
a. White Pattern
c. Vertical Stripe Pattern
= 60 Hz, whereas a power dissipation check pattern below is displayed.
v
b. Black Pattern
B
B
R
R
R
Active Area
R
B
B
B
R
R
G
G
G
G
G
G
B
B
B
Active Area
R
R
R R
Active Area
G
B
G
B
3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC
Parameter Symbol
Lamp Input Voltage VL 576 640 704 V Lamp Current IL 3.0 6.0 6.5 mA
Lamp Turn On Voltage VS
Operating Frequency FL 50 - 80 KHz (3) Lamp Life Time LBL 10,000 - - Hrs (5) Power Consumption PL - 3.84 - W (4), IL = 6.0 mA
Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:
LCD
Module
HV (Pink)
LV (White)
Min. Typ. Max.
- - 1360 (25
- - 1670 (0
Value
1
2
Current Meter
Unit Note
o
C) V
o
C) V
I
RMS
RMS
(2)
RMS
(2)
RMS
= 6.0 mA
L
(1)
Inverter
A
Note (2) The voltage shown above should be applied to the lamp for more than 1 second after startup.
Otherwise the lamp may not be turned on.
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Note (3) The lamp frequency may generate interference with horizontal synchronous frequency from the
display, and this may cause line flow on the display. In order to avoid interference, the lamp
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.
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Model No.: N141XB -L07
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Note (4) P
= IL VL
L
Note (5) The lifetime of lamp is defined as the time when it continues to operate under the conditions at Ta
= 25 2
o
C and IL = 6.0 mA
until one of the following events occurs:
RMS
(a) When the brightness becomes Љ 50% of its original value.
(b) When the effective ignition length becomes Љ 80% of its original value. (Effective ignition
length is defined as an area that the brightness is less than 70% compared to the center point.)
Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the
inverter must have specifications for the modularized lamp. The performance of the Backlight,
such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for
the lamp. All the parameters of an inverter should be carefully designed to avoid generating too
much current leakage from high voltage output of the inverter. When designing or ordering the
inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the
inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module
should be operated in the same manners when it is installed in your instrument.
The output of the inverter must have symmetrical (negative and positive) voltage waveform and
symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter,
which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may
produce interface with horizontal synchronous frequency and as a result this may cause beat on the
display. Therefore lamp frequency shall be as away possible from the horizontal synchronous
frequency and from its harmonics in order to prevent interference.
Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its
leakage current.
a. The asymmetry rate of the inverter waveform should be 10% below;
b. The distortion rate of the waveform should be within Ѕ2 ± 10%;
c. The ideal sine wave form shall be symmetric in positive and negative polarities.
* Asymmetry rate:
I p
| I
– I –p | / I
p
* 100%
rms
I
-p
* Distortion rate
I
(or I –p) / I
p
rms
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)
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
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Model No.: N141XB -L07
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Rxin0(+/-)
Rxin1(+/-)
Rxin2(+/-)
CLK(+/-)
Vcc
(JAE-FI-XB30SL-HF10)
GND
Data
CLK
V
EDID
EDID
EDID
VL
LAMP CONNECTOR
4.2 BACKLIGHT UNIT
INPUT CONNECTOR
(JST-BHSR-02VS-1)
TIMING CONTROLLER
DC/DC CONVERTER &
REFERENCE VOLTAGE
LVDS INPUT /
GENERATOR
EDID
EEPROM
SCAN DRIVER IC
TFT LCD PANEL
(1024x3x768)
DATA DRIVER IC
BACKLIGHT UNIT
1 HV (Pink)
2 LV (Black
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5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin Symbol Description Polarity Remark
1 Vss Ground 2 Vcc Power Supply +3.3 V (typical) 3 Vcc Power Supply +3.3 V (typical) 4 V 5 Test Panel Self Test 6 CLK 7 DATA 8 Rxin0- LVDS Differential Data Input Negative
9 Rxin0+ LVDS Differential Data Input Positive
10 Vss Ground
11 Rxin1- LVDS Differential Data Input Negative
12 Rxin1+ LVDS Differential Data Input Positive
13 Vss Ground 14 Rxin2- LVDS Differential Data Input Negative 15 Rxin2+ LVDS Differential Data Input Positive 16 Vss Ground 17 CLK- LVDS Clock Data Input Negative 18 CLK+ LVDS Clock Data Input Positive 19 Vss Ground 20 NC Non-Connection 21 NC Non-Connection 22 Vss Ground 23 NC Non-Connection 24 NC Non-Connection 25 Vss Ground 26 NC Non-Connection 27 NC Non-Connection 28 Vss Ground 29 NC Non-Connection 30 NC Non-Connection
Note (1) Connector Part No.: JAE-FI-XB30SL-HF10 or equivalent
DDC 3.3V Power DDC 3.3V Power
EDID
DDC Clock DDC Clock
EDID
DDC Data DDC Data
EDID
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Model No.: N141XB -L07
Approval
R0~R5,G0
-
G1~G5,B0,B1
-
B2~B5,DE,Hsync,Vsync
LVDS Level Clock
Note (2) User’s connector Part No: JAE-FI-X30C2L or equivalent
5.2 BACKLIGHT UNIT
Pin Symbol Description Color
1 HV High Voltage Pink 2 LV Ground Black
Note (1) Connector Part No.: JST-BHSR-02VS-1 or equivalent
Note (2) User’s connector Part No.: JST-SM02B-BHSS-1-TB or equivalent
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5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
CLK+
T/7
Rxin2
Rxin1
Rxin0
IN20 IN19 IN18 IN17 IN16 IN15 IN14
DE B5 B4 B3 B2 Vsync Hsync
IN13 IN12 IN11 IN10 IN9 IN8 IN7
B1 G4 G3 G2 G1 B0 G5
IN6 IN5 IN4 IN3 IN2 IN1 IN0
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Model No.: N141XB -L07
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G0 R3 R2 R1 R0
R5
R4
Signal for 1 DCLK Cycle (T)
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5.4 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for
the color. The higher the binary input the brighter the color. The table below provides the assignment of
color versus data input.
Color
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0 Black Red Green
Basic Colors
Gray Scale Of Red
Gray Scale Of Green
Gray Scale Of Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue Cyan Magenta Yellow White Red(0)/Dark Red(1) Red(2)
:
: Red(61) Red(62) Red(63) Green(0)/Dark Green(1) Green(2)
:
: Green(61) Green(62) Green(63) Blue(0)/Dark Blue(1) Blue(2)
:
: Blue(61) Blue(62) Blue(63)
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0 : :
1
1
1
1
1
1
0
0
0
0
0
0 : :
0
0
0
0
0
0
0
0
0
0
0
0 : :
0
0
0
0
0
0
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Model No.: N141XB -L07
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Data Signal
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
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5.5 EDID DATA STRUCTURE
The EDID (Extended Display Identification Data) data formats are to support displays as defined in the
VESA Plug & Display and FPDI standards.
Byte #
(decimal)
0 0 Header 00 00000000 1 1 Header FF 11111111 2 2 Header FF 11111111 3 3 Header FF 11111111 4 4 Header FF 11111111 5 5 Header FF 11111111 6 6 Header FF 11111111 7 7 Header 00 00000000 8 8 EISA ID manufacturer name (“CMO”) 0D 00001101
9 9 EISA ID manufacturer name (Compressed ASCII) AF 10101111 10 0A ID product code (N141XB) 11 0B ID product code (hex LSB first; N141XB) 12 0C ID S/N (fixed “0”) 00 00000000 13 0D ID S/N (fixed “0”) 00 00000000 14 0E ID S/N (fixed “0”) 00 00000000 15 0F ID S/N (fixed “0”) 00 00000000 16 10 Week of manufacture (fixed “14H”) 14 00010100 17 11 Year of manufacture (fixed “2004”) 0E 00001110 18 12 EDID structure version # (“1”) 01 00000001 19 13 EDID revision # (“3”) 03 00000011 20 14 Video I/P definition (“digital”) 80 10000000 21 15 Max H image size (“28 cm”) 1C 00011100 22 16 Max V image size (“21 cm”) 15 00010101 23 17 Display Gamma (Gamma = ”2.2”) 78 01111000 24 18 Feature support (“Active off, RGB Color”) 0A 00001010 25 19 Red/Green (Rx1, Rx0, Ry1, Ry0, Gx1, Gx0, Gy1, Gy0) 34 00110100 26 1A Blue/White (Bx1, Bx0, By1, By0, Wx1, Wx0, Wy1, Wy0) 85 10000101 27 1B 28 1C 29 1D 30 1E 31 1F 32 20 33 21 34 22 35 23 Established timings 1 00 00000000 36 24 Established timings 2 (1024x768@60Hz) 08 00001000 37 25 Manufacturer’s reserved timings 00 00000000 38 26 Standard timing ID # 1 01 00000001 39 27 Standard timing ID # 1 01 00000001 40 28 Standard timing ID # 2 01 00000001 41 29 Standard timing ID # 2 01 00000001
Byte #
(hex)
Field Name and Comments
Red-x (Rx = “0.570”) Red-y (Ry = “0.335”) Green-x (Gx = ”0.325”) Green-y (Gy = ”0.570”) Blue-x (Bx = ”0.150”) Blue-y (By = ”0.125”) White-x (Wx = ”0.313”) White-y (Wy = ”0.329”)
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Model No.: N141XB -L07
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Value
(hex)
3F 9C
92 10010010 55 01010101 53 01010011 92 10010010 26 00100110 20 00100000 50 01010000 54 01010100
Value
(binary)
00111111
10011100
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Model No.: N141XB -L07
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Byte #
(decimal)
42 2A Standard timing ID # 3 01 00000001 43 2B Standard timing ID # 3 01 00000001 44 2C Standard timing ID # 4 01 00000001 45 2D Standard timing ID # 4 01 00000001 46 2E Standard timing ID # 5 01 00000001 47 2F Standard timing ID # 5 01 00000001 48 30 Standard timing ID # 6 01 00000001 49 31 Standard timing ID # 6 01 00000001 50 32 Standard timing ID # 7 01 00000001 51 33 Standard timing ID # 7 01 00000001 52 34 Standard timing ID # 8 01 00000001 53 35 Standard timing ID # 8 01 00000001
54 36
55 37 # 1 Pixel clock (hex LSB first) 18 00011000 56 38 # 1 H active (“1024”) 00 00000000 57 39 # 1 H blank (“304”) 30 00110000 58 3A # 1 H active : H blank (“1024 : 304”) 41 01000001 59 3B # 1 V active (”768”) 00 00000000 60 3C # 1 V blank (”30”) 1E 00011110 61 3D # 1 V active : V blank (”768 : 30”) 30 00110000 62 3E # 1 H sync offset (”48”) 30 00110000 63 3F # 1 H sync pulse width (”104”) 68 01101000 64 40 # 1 V sync offset : V sync pulse width (”3 : 4”) 34 00110100
65 41
66 42 # 1 H image size (”285 mm”) 1D 00011101 67 43 # 1 V image size (”214 mm”) D6 11010110 68 44 # 1 H image size : V image size (”285 : 214”) 10 00010000 69 45 # 1 H boarder (”0”) 00 00000000 70 46 # 1 V boarder (”0”) 00 00000000
71 47
72 48
73 49 # 2 Pixel clock (hex LSB first) 14 00010100 74 4A # 2 H active (“1024”) 00 00000000 75 4B # 2 H blank (“288”) 20 00100000 76 4C # 2 H active : H blank (“1024 : 288”) 41 01000001 77 4D # 2 V active (”768”) 00 00000000 78 4E # 2 V blank (”25”) 19 00011001 79 4F # 2 V active : V blank (”768 : 38”) 30 00110000 80 50 # 2 H sync offset (”40”) 28 00101000 81 51 # 2 H sync pulse width (”104”) 68 01101000 82 52 # 2 V sync offset : V sync pulse width (”3 : 4”) 34 00110100
83 53
Byte #
(hex)
Field Name and Comments
Detailed timing description # 1 Pixel clock (“63.5MHz”, According to VESA CVT Rev1.1)
# 1 H sync offset : H sync pulse width : V sync offset : V sync width (”24 : 136 : 3 : 4”)
# 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol Negatives, DE only note: LSB is set to “1” if panel is DE-timing only. H/V can be ignored. Detailed timing description # 2 Pixel clock (“52 MHz”, According to VESA CVT Rev1.1)
# 2 H sync offset : H sync pulse width : V sync offset : V sync width (”24 : 136 : 3 : 4”)
Va l ue (hex)
CE 11001110
00 00000000
19 00011001
50 01010000
00 00000000
(binary)
Value
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Byte # (decimal)
84 54 # 2 H image size (”285 mm”) 1D 00011101 85 55 # 2 V image size (”214 mm”) D6 11010110 86 56 # 2 H image size : V image size (”285 : 214”) 10 00010000 87 57 # 2 H boarder (”0”) 00 00000000 88 58 # 2 V boarder (”0”) 00 00000000 89 59 Module "A" Revision = Example: 00, 01, 02, 03, etc. 00 00000000 90 5A Detailed timing description # 3 00 00000000 91 5B # 3 Flag 00 00000000 92 5C # 3 Reserved 00 00000000
93 5D
94 5E # 3 Flag 00 00000000 95 5F # Dell P/N "N5015" 1st character (“N”) 4E 01001110 96 60 # Dell P/N " N5015" 1st character (“5”) 35 00110101 97 61 # Dell P/N " N5015" 1st character (“0”) 30 00110000 98 62 # Dell P/N " N5015" 1st character (“1”) 31 00110001 99 63 # Dell P/N " N5015" 1st character (“5”) 35 00110101
100 64 LCD Supplier EEDID Revision #: "2" 32 00110010 101 65 Manufacturer P/N ( "N") 4E 01001110 102 66 Manufacturer P/N ( "1" ) 31 00110001 103 67 Manufacturer P/N ( "4" ) 34 00110100 104 68 Manufacturer P/N ( "1" ) 31 00110001 105 69 Manufacturer P/N ( "X" ) 58 01011000 106 6A Manufacturer P/N ( "B" ) 42 01000010
107 6B
108 6C Flag 00 00000000 109 6D Flag 00 00000000
110 6E Flag 00 00000000 111 6F Data Type Tag: FE 11111110 112 70 Flag 00 00000000 113 71 SMBUS value @ 10 [cd/m2]= 114 72 SMBUS value @ 17 [cd/m2]= 115 73 SMBUS value @ 23 [cd/m2]= 116 74 SMBUS value @ 30 [cd/m2]= 117 75 SMBUS value @ 60 [cd/m2]= 118 76 SMBUS value @ 110 [cd/m2]=
119 77 SMBUS value @ 150 [cd/m2]= 120 78 SMBUS value @ max [cd/m2]= 121 79 Numbers of LVDS Recevier chip = 1 01 00000001 122 7A BIST Enable: Yes = '01' No = '00' ("Yes") 01 00000001
123 7B
124 7C
125 7D
Byte # (hex)
Field Name and Comments
# 3 FE (hex) defines ASCII string (Model Name “N141XB”, ASCII)
Manufacturer P/N (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
(If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h) (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h) (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
Va l ue (hex)
Value (binary)
FE 11111110
0A 00001010
FF
E5 D4 C5
9A
67
3B
00
0A 00001010
20 00100000
20 00100000
11111111
11100101 11010100 11000101 10011010
01100111
00111011 00000000
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126 7E Extension flag 00 00000000 127 7F Checksum 59 01011001
5.6 EDID SIGINAL SPECIFICATION
(1) EDID Power
Parameter Symbol Conditions Min. Typ. Max. Unit
Power supply
voltage
Vcc Read Operation 2.2 — 5.5 V
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Model No.: N141XB -L07
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(2) DC characteristics
Symbol Min. Max. Unit Index
SCL, SDA terminal input voltage
Hysteresis Voltage VHYS 0.05 VCC — V
Output Voltage
Input Leak current
(Vin =0.1V~VCC)
Output Leak current ILO -10 10 uA
Terminal capacity(Input, Output) Cin, Cout — 10 pF
Operating current
Stillness current
(SDA=SCL=VCC)
(WP=VSS,A0,A1,A2=VSS)
High Voltage VIH
Low Voltage VIL —
VOL1 VOL2
ILI
ICC Write
ICC Read
ICCS —
0.7uV
—
-10
-10
—
CC
— V
0.3uV
0.4
0.6
10 50
3 1
30
100
V
CC
IOL=3mA, CC=2.5V
V
IOL=6mA, CC=2.5V
uA
mA
uA
WP=VSS WP=VCC
Vout =0.1V~VCC,
WP=VSS
VCC=5.0V
Ta=25
Fclk=1.0MHz
VCC=5.5V,
SCL=400KHz
VCC=3.0V VCC=5.5V
0
C,
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(3) AC characteristics (VCC=2.5~5.5V standard operation mode)
Item Symbol
Clock frequency Fclk — 100 — 400 KHz
Clock High Time THIGH 4000 — 900 —
Clock Low Time TLOW 4700 — 1300 —
SDA, SCL falling time TR — 1000 — 300
SDA, SCL rising time TF — 300 — 300
START hold time THD: STA 4000 — 600 —
START setup time TSU: STA 4700 — 600 —
Data input hold time THD: Data 0 — 0 —
Data input setup time TSU: Data 250 — 100 —
STOP setup time TSU: STO 4700 — 600 —
Output decision time from
a clock
Bus free time TBUF 4700 — 1300 —
Rising time of Min VIH,
VIL
Spike oppression TSP — 50 — 50 ns
A write-in cycle time TWR — 10 — 10 ms
The number of times of
data rewriting
TAA — 3500
TOF — 250
— 1M — 1M — cycles
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VCC=2.5V-5.5V
(Standard operation
mode)
Min. Max. Min. Max. Unit Index
VCC=4.5V-5.5V
(High-speed
operation mode)
100 900
20 250
Model No.: N141XB -L07
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ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CBЉ100pF
Byte and
page mode
VCC=5.0V
Ta=25
0
C,
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6. INVERTER SPECIFICATION
6.1 Connector type:
Input connector type: LVC-D20SFYG (HONDA)
Output connector: JST SM02B-BHSS-1-TB (JST)
6.2 Input Connector pin assignment:
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Model No.: N141XB -L07
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Input connector
HONDA LVC-D20SFYG
Pin Function
1 INV_SRC
2 INV_SRC
3 INV_SRC
4 NC No Connection
5 GND Ground
6 5VSUS
7 5VALW
8 GND Ground
9 SMB_DAT
10 SMB_CLK
This power rail should be used as a power rail to drive the backlight DC-AC converter
This power rail should be used as a power rail to drive the backlight DC-AC converter
This power rail should be used as a power rail to drive the backlight DC-AC converter
This should be used as power source for the control circuitry on the inverter
This should be used as power source that stores the brightness/contrast values & the circuit that interfaces with SMB_CLK & SMB_DAT
SMBus interface for sending brightness & contrast information to the inverter/panel
SMBus interface for sending brightness & contrast information to the inverter/panel
Comments
11 GND Ground
12 FPBACK
13 GND Ground
14 LAMP_STAT
15 ~ 20 NC
Absolute maximum ratings
Control signal input into the inverter to turn the backlight ON & OFF (1 ­ON, 0 – OFF)
Lamp status (Feedback, Lamp On = 5v, Lamp Off 0v), from control chip
No Connection
Items Absolute max. ratings Unit
INV_SRC (Voltage) -1.0~23.5 V FPBACK/SMB_CLK/SMB_DAT
-1.0~5.5 V
(Voltage)
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6.3 Output connector pin assignment
Pin Name Description
1 CFL-High High-voltage output to the CCFL 2 CFL-Low Low-voltage output to the CCFL
Absolute maximum ratings
Items Absolute max. ratings Unit
INV_SRC (Voltage) -1.0~23.5 V FPBACK/SMB_CLK/SMB_DAT (Voltage)
6.4 General electrical specification:
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Model No.: N141XB -L07
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-1.0~5.5 V
Electrical characteristics:
No. Item Symbol
Condition
Min. Typ. Max. Uint
1 Input Voltage INV_SRC 7.5 14.4 21 V
Input Signal Level for
2
Input Signal Level for
3
5VSUS
5VALW
5VSUS 4.85 5 5.2 V
5VALW 4.85 5 5.2 V
Vin=7.5V~21V
4 Input Power Pin(Max)
- - 5.7 W
SMB_DAT=00H
Backlight
FPBACK=
ON
Enable the inverter 2.0 - 5.25 V
5
ON/OFF Control
6
Brightness Adjust
(Lamp Current Control)
FPBACK=
OFF
Disable the inverter -0.3 - 0.8 V
SMB_DAT Control by SMBus FFH - 00H -
7 Output Voltage Vout IL = 6.0mA(typ) TBD 640 TBD Vrms
Vin=7.5V~21V
Iout (Min)
SMB_DAT=FFH
2.0 TBD TBD mArms
Ta=25к, after running 30 min.
8 Output Current
Vin=7.5V~21V
Iout (Max)
SMB_DAT=00H
5.7 6.0 6.3 mArms
Ta=25к, after running 30 min.
9 Operation Frequency Freq Vin=7.5V~21V (45) - (65) KHz
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10 Burst mode frequency fB Vin=7.5V~21V 200 - 220 Hz
11 Open Lamp Voltage Vopen No Load (1400) (1670) (1800) Vrms
12 Striking Time Ts No Load 0.6 1 1.4 Sec
Vin=7.5V, SMB_DAT=00H
13 Efficiency K
(RES LOAD=100K ohm)
(80) - - %
14 Start and Delay Time Vin=14.4V,
- 130 200 uS
SMB_DAT=FFH
15 Start –up time - - 0.1 Sec
zInput Voltage
The operating input voltage of inverter shall be defined.
The inverter shall ignite the CCFL lamp at minimum input voltage at any environment
conditions.
zOn/Off control
Enable: At “ON” condition (FPBACK=Hi), enable the inverter.
Disable: At “OFF” condition (FPBACK=Lo), disable the inverter.
zQuiescent current
At the inverter “OFF” condition, input quiescent should be less than 0.1mA.
zOpen lamp voltage
The inverter start-up output voltage will be above “Vope n” for “Ts” minimum at any
condition under specify until lamp to be ignited. The inverter should be shutdown if lamp
ignition was failed in “Ts” maximum. The inverter shall be capable of withstanding the
output connections open without component over-stress / fire / smoke /arc.
zBurst mode frequency
The burst mode frequency should be in specification in any environment condition and
electrical condition.
zBrightness control
SM-BUS values for panel luminance are to be included in the on LCD board EEDID
ROM chip table. The supplier will measure panel luminance in a system and define the
SMBUS values for each of the 8 required luminance levels. The panel luminance, for
which SMBUS values will be provided in the EEDID from byte # 113(hex #71), to byte #
120, (hex # 78), is show in the table below. The inverter supplier should provide these
appropriate values to CMO.
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Step Count Step 1 Step 2 Step3 Step 4 Step 5 Step 6 Step 7 Step 8
Address Byte
113
SM-Bus Data
FF E5 D4 C5 9A 67 3B 00
Va l ue
Luminance (nits) 10 17 23 30 60 110 150 Max
zOutput ripple ratio
Ripple ratio = 2 * (Ipeak - Ivalley) / (Ipeak + Ivalley) * 100%
The Ripple ratio should be less than 5% and ripple frequency should be less than 200 Hz.
zPower up Overshoot & Undershoot
Overshoot & Undershoot at power up should not exceed the following limits.
Vin
Output current
0ШVin(min.)
0ШVin(typ.)
0ШVin(max.)
dI=Imax.-Io or dI=(Io-Imin.)/Io
Byte
114
Io(rms)
Io(max.)
Io(min.)
Io(max.)
Io(min.)
Io(max.)
Io(min.)
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Byte
115
Byte
116
Io (dI)
Overshoot/Undershoot
150% / 50% 5 ms max.
150% / 50% 5 ms max.
150% / 50% 5 ms max.
Byte
117
Settling time
Model No.: N141XB -L07
Approval
Byte
118
(dT)
Byte
119
Byte
120
z Output connections short protection
The inverter shall be capable of withstanding the output connections short without damage
or over-stress. And the inverter maximum input power shall be limited within 1W.
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7. INTERFACE TIMING
7.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
DCLK Frequency 1/Tc 50 65 68 MHz -
Vertical Total Time TV 771 806 850 TH -
DE
Vertical Addressing Time TVD 768 768 768 TH -
Horizontal Total Time TH 1200 1344 1500 Tc -
Horizontal Addressing Time THD 1024 1024 1024 Tc -
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INPUT SIGNAL TIMING DIAGRAM
DE
DCLK
T
DE
DATA
TVD
C
v
T
T
H
HD
T
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7.2 POWER ON/OFF SEQUENCE
Power On
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Power Off
Model No.: N141XB -L07
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Restart
Power Supply
for LCD, Vcc
- Interface Signal
(LVDS Signal of Transmitter), V
- Power for Lamp
Timing Specifications:
470us Љ t1 Љ 10 msec
0 < t2 Љ 50 msec
0 < t3 Љ 50 msec
0V
0V
I
10%
t4 Њ 500 msec
t5 Њ 200 msec
90%
t1
90%
Valid Data
t6 t5
ONOFF OFF
t4
10%
t3 t2
10%
t6 Њ 200 msec
Note (1) Please avoid floating state of interface signal at invalid period.
Note (2) When the interface signal is invalid, be sure to pull down the power supply of LCD Vcc to 0 V.
Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the
interface signal is valid. The Backlight inverter power must be turned off before the power supply
for the logic and the interface signal is invalid.
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8. OPTICAL CHARACTERISTICS
8.1 TEST CONDITIONS
Item Symbol Value Unit Ambient Temperature Ambient Humidity Supply Voltage Input Signal Inverter Current Inverter Driving Frequency Inverter
The measurement methods of optical characteristics are shown in Section 7.2. The following items
should be measured under the test conditions described in Section 7.1 and stable environment shown in
Note (6).
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Model No.: N141XB -L07
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o
Ta 2 5 r2
Ha 50r10 %RH
3.3 V
V
CC
According to typical value in "3. ELECTRICAL CHARACTERISTICS"
I
L
F
L
6.0 55
Sumida-ʳIV11145/T-LF or Delta-ʳDAC-07B046
C
mA
KHz
8.2 OPTICAL SPECIFICATIONS
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR 300 - - - (2), (6)
Response Time
Average Luminance of White L White Variation of 5 Points GW5p 80 - - % (6), (7) White Variation of 13 Points GW Cross Talk CT - - 4.0 % (5), (6)
Red
Green
Color Chromaticity
Blue
White
Color Gamut C.G%
Horizontal
Viewing Angle
Vertical
TR - 6 10 ms
- 17 25 ms
T
F
150 185 - cd/m2(4), (6)
AVE
65 - - & (6), (7)
13p
Rx
Ry Gx Gy
Bx
By Wx Wy
=0q, TY =0q
T
x
Viewing Normal Angle
Typ.
-0.03
0.283 0.313 0.343
0.299 0.329 0.359
0.570
0.335
0.325
0.570
0.150
0.125
Typ.
+0.03
42 - - % (8)
Tx+
T
x
TY+
T
Y
­CRt10
-
40 45 ­40 45 ­10 15 ­30 35 -
Deg. (1), (6)
(3)
-
-
-
­(1), (6)
-
-
-
-
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Note (1) Definition of Viewing Angle (Tx, Ty):
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TX- = 90º
x-
6 o’clock
T
y- = 90º
y-
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Normal
Tx = Ty = 0º
Ty- Ty
Tx-
Tx+
y+
12 o’clock direction
T
y+ = 90º
x+
TX+ = 90º
Contrast Ratio (CR) = L63 / L0
L63: Luminance of gray level 63
L 0: Luminance of gray level 0
CR = CR (5)
CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (7).
Note (3) Definition of Response Time (T
100%
90%
Optical
Response
10%
0%
R
T
R
, TF):
Time
T
F
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A
A
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Model No.: N141XB -L07
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Note (4) Definition of Average Luminance of White (L
Measure the luminance of gray level 63 at 5 points
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
AVE
L (x) is corresponding to the luminance of the point X at Figure in Note (7).
Note (5) Definition of Cross Talk (CT):
CT = | Y
– YA | / YA u 100 (%)
B
Where:
Y
= Luminance of measured location without gray level 0 pattern (cd/m2)
A
Y
= Luminance of measured location with gray level 0 pattern (cd/m2)
B
(0, 0)
ctive Area
Y
(D/8,W/2)
A, L
Gray 32
Y
(D/2,7W/8)
A, D
(D,W)
Y
(D/2,W/8)
A, U
Y
(7D/8,W/2)
A, R
AVE
):
(D/4,W/4)
Y
(D/8,W/2)
B, L
Y
(D/2,7W/8)
B, D
(0, 0)
ctive Area
Gray 0
Gray 32
Y
B, U
Y
B, R
(3D/4,3W/4)
(D,W)
(D/2,W/8)
(7D/8,W/2)
Note (6) Measurement Setup:
The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting Backlight for 20 minutes in a windless room.
LCD Module
LCD Panel
Center of the Screen
500 mm
Photometer
(BM-5A, CS-1000T)
Field of View = 2º
Light Shield Room
(Ambient Luminance < 2 lux)
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Note (7) Definition of White Variation (GW):
Measure the luminance of gray level 63 at 13 points
GW
= Minimum [L (1), L (2), L (3), L (4), L (5)] / Maximum [L (1), L (2), L (3), L (4), L (5)]
5p
GW
= Minimum [L (1) ~ L (13)] / Maximum [L (1) ~ L (13)]
13p
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Model No.: N141XB -L07
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Horizontal Line
10mm
D/4 D/2 3D/4
10mm
6
W/4
W
W/2
9
23
Vertical Line
3W/4
10mm
4
11 12 13
Active Area
Note (8) Definition of color gamut (C.G%):
C.G%= 'R G B /'R
R
R, G, B
'R
, G0, B0 : color coordinates of red, green, and blue defined by NTSC, respectively.
0
: color coordinates of module on 63 gray levels of red, green, and blue, respectively.
0 G0 B0
0 G0 B0
: area of triangle defined by R0, G0, B0
,*100%
'R G B: area of triangle defined by R, G, B
D
10mm
10
8
X
: Test Point
X=1 to 13
7
1
5
˖˜˘ʳ˄ˌˆ˄
˃ˁˌ
˃ˁˋ
˃ˁˊ
˃ˁˉ
˃ˁˈ
˃ˁˇ
˃ˁˆ
˃ˁ˅
˃ˁ˄
˃
˃ ˃ˁ˅ ˃ˁˇ ˃ˁˉ ˃ˁˋ
G
0
G
R
0
R
B
B
0
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9. PRECAUTIONS
9.1 HANDLING PRECAUTIONS
(1) The module should be assembled into the system firmly by using every mounting hole. Be careful not
to twist or bend the module.
(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause
electrical short or damage the polarizer.
(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and
assembly process.
(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is
very soft and easily scratched.
(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use
Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might
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permanently damage the polarizer due to chemical reaction.
(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel for
a long time.
(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.
(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.
(9) Do not disassemble the module.
(10) Do not pull or fold the lamp wire.
(11) Pins of I/F connector should not be touched directly with bare hands.
9.2 STORAGE PRECAUTIONS
(1) High temperature or humidity may reduce the performance of module. Please store LCD module within
the specified storage conditions.
(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may
damage LCD module when it is operating.
(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the
response time will become slowly, and the starting voltage of lamp will be higher than the room
temperature.
9.3 OPERATION PRECAUTIONS
(1) Do not pull the I/F connector in or out while the module is operating.
(2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This
can prevent the CMOS LSI chips from damage during latch-up.
(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while
assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.
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10. PACKING
10.1 CARTON
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10.2 PALLET
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11. DEFINITION OF LABELS
11.1 CUSTOMER MODULE LABEL (ex.)
11.2 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
-
C P 1 3 5 4 4 8 - 0 1
01A
N141X5 - L03 Rev.XX
X X X X X X X Y M D L N N N N
(a) Model Name: N141XB - L07
(b) Revision: Rev. XX, for example: C1, C2 …etc.
(c) Serial ID: X X
X X X X X Y M D X N N N N
E207943
MADE IN TAIWAN
Lead Free
Serial No.
CMO Internal Use
Year, Month, Date
CMO Internal Use
Revision
CMO Internal Use
Serial ID includes the information as below:
(a) Manufactured Date: Year: 1~9, for 2001~2009
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1
st
to 31st, exclude I , O and U
(b) Revision Code: cover all the change
(c) Serial No.: Manufacturing sequence of product
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