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N141I1-L04
Specification
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Specification
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CMO N141I1-L04 Specification

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Model No.: N141I1 - L04
Tentative
- CONTENTS -
REVISION HISTORY
1. GENERAL DESCRIPTION
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
2.2.2 BACKLIGHT UNIT
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
4.2 BACKLIGHT UNIT
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
5.2 BACKLIGHT UNIT
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
5.4 COLOR DATA INPUT ASSIGNMENT
5.5 EDID DATA STRUCTURE
6. INVERTER SPECIFICATION
6.1 CONNECTOR TYPE
6.2 INPUT CONNECTOR PIN ASSIGNMENT
6.3 OUTPUT CONNECTOR PIN ASSIGNMENT
6.4 GENERAL ELECTRICAL SPECIFICATION
7. INTERFACE TIMING ------------------------------------------------------- 22
7.1 INPUT SIGNAL TIMING SPECIFICATIONS
7.2 POWER ON/OFF SEQUENCE
8. OPTICAL CHARACTERISTICS
8.1 TEST CONDITIONS
8.2 OPTICAL SPECIFICATIONS
9. PRECAUTIONS
9.1 HANDLING PRECAUTIONS
9.2 STORAGE PRECAUTIONS
9.3 OPERATION PRECAUTIONS
10. PACKING ------------------------------------------------------- 29
10.1 CARTON
10.2 PALLET
------------------------------------------------------- 3
------------------------------------------------------- 4
------------------------------------------------------- 5
------------------------------------------------------- 7
------------------------------------------------------- 11
------------------------------------------------------- 12
------------------------------------------------------- 16
------------------------------------------------------- 24
------------------------------------------------------- 28
2 / 35
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
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Model No.: N141I1 - L04
Tentative
11. DEFINITION OF LABELS ------------------------------------------------------- 31
11.1 CMO MODULE LABEL
11.2 CMO CARTON LABE
3 / 35
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Model No.: N141I1 - L04
Tentative
Version Date
0.0
0.1
Jun, 15,’05
Jul, 15, ‘05
Page
(New)
All
7
10
24
24
REVISION HISTORY
Section Description
All
Tentative specification was first issued.
2.2.2
3.2
8.1
8.2
Update lamp current
Update lamp current and operating frequency
Update test condition: inverter driving frequency
Update optical specification: contract ratio, white variation, color
chromaticity
4 / 35
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
N141I1 - L04 is a 14.1” TFT Liquid Crystal Display module with single CCFL Backlight unit and 30 pins
LVDS interface. This module supports 1280 x 800 WXGA mode and can display 262,144 colors. The
optimum viewing angle is at 6 o’clock direction. The inverter module for Backlight is built in.
1.2 FEATURES
- Thin and Light Weight
- WXGA (1280 x 800 pixels) resolution
- DE only mode
- 3.3V LVDS (Low Voltage Differential Signaling) interface with 1 pixel/clock
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Model No.: N141I1 - L04
Tentative
1.3 APPLICATION
- TFT LCD Notebook
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note Active Area 303.36(H) X 189.6(V) mm Bezel Opening Area 306.76 (H) x 192.8 (V) mm Driver Element a-si TFT active matrix - ­Pixel Number 1280 x R.G.B. x 800 pixel ­Pixel Pitch 0.237 (H) x 0.237 (V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 262,144 color ­Transmissive Mode Normally white - ­Surface Treatment Anti-glare , Haze 26,3H - -
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal(H) 319 319.5 320 mm
Module Size
Vertical(V) 205 205.5 206 mm
Depth(D) -- 5.0 5.3 mm Weight -- 400 415 g (2) Weight 410 425 g (3)
(1)
(1)
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions
(2) Weight without inverter
(3) Weight with inverter.
5 / 35
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
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2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1) Operating Ambient Temperature TOP 0 +50 ºC (1), (2) Shock (Non-Operating) S Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The ambient temperature means the temperature of panel surface.
Note (3) 2ms, half sine wave, 1 times for ± X, ± Y, ± Z.
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Model No.: N141I1 - L04
Tentative
Value
Min. Max.
- 200 G (3), (5)
NOP
- 1.5 G (4), (5)
NOP
Unit Note
Note (4) 10 ~ 500 Hz, Sweep rate 10min, 30min for X, Y, Z. The fixing condition is shown as below:
Side Mount Fixing Screw
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture.
gap=2mm
Bracket
LCD Module
Side Mount Fixing Screw
Stage
Relative Humidity (%RH)
100
90
80
60
Operating Range
2.2 ELECTRICAL ABSOLUTE RATINGS
40
20
Storage Range
5
Temperature (ºC)
6 / 35
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
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8060 -20 400 20-40
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2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage VCC -0.3 +4.0 V Logic Input Voltage VIN -0.3 VCC+0.3 V
2.2.2 BACKLIGHT UNIT
Item Symbol
Lamp Voltage VL - 2.5K V Lamp Current IL - 6.5 mA Lamp Frequency FL - 80 KHz
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
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Value
Min. Max.
Value
Min. Max.
Unit Note
Unit Note
Model No.: N141I1 - L04
Tentative
(1)
(1), (2), IL = 6.0 mA
RMS
RMS
(1), (2)
Note (2) Specified values are for lamp (Refer to 3.2 for further information).
7 / 35
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
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Model No.: N141I1 - L04
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max. Power Supply Voltage Vcc 3.0 3.3 3.6 V ­Ripple Voltage VRP - - 100 mV ­Rush Current I
Power Supply Current
Logical Input Voltage
White - 335 375 mA (3)a Black “H” Level VIL - - +100 mV ­“L” Level V
- - 1.5 A (2)
RUSH
lcc
-100 - - mV -
IH
- 400 450 mA (3)b
Terminating Resistor RT - 100 - Ohm ­Power per EBL WG P
- TBD - W (4)
EBL
Note (1) The module should be always operated within above ranges.
Value
Unit Note
Tentative
Note (2) Measurement Conditions:
+3.3V
R1
47K
(High to Low)
(Control Signal)
SW
+12V
C1
1uF
VR1
R2
1K
47K
Vcc rising time is 470us
Q1 2SK1475
C2
0.01uF
Q2
2SK1470
+3.3V
FUSE
C3
1uF
Vcc
(LCD Module Input)
0.9Vcc
0.1Vcc
GND
470us
Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, f
Hz, whereas a power dissipation check pattern below is displayed.
8 / 35
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
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= 60
v
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Model No.: N141I1 - L04
Tentative
Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input
a. White Pattern
Active Area
power. Test conditions are as follows.
(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f
(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file
“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.
(c) Luminance: 60 nits.
= 60 Hz,
v
b. Black Pattern
Active Area
9 / 35
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
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Model No.: N141I1 - L04
3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max. Lamp Input Voltage VL 603 670 737 V Lamp Current IL 2.0 6.0 6.5 mA
Lamp Turn On Voltage VS
--- --- 1360 (25
--- --- 1500 (0 Operating Frequency FL 50 --- 80 KHz (3) Lamp Life Time LBL 15,000 --- --- Hrs (5) Power Consumption PL --- 4.02 --- W (4), IL = 6.0 mA
Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:
Value
o
C) V
o
C) V
Unit Note
I
RMS
(1)
RMS
(2)
RMS
(2)
RMS
Tentative
= 6.0 mA
L
LCD
Module
HV (Pink)
LV (White)
1
2
Current Meter
Inverter
A
Note (2) The voltage shown above should be applied to the lamp for more than 1 second after startup.
Otherwise the lamp may not be turned on.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency from the
display, and this may cause line flow on the display. In order to avoid interference, the lamp
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.
Note (4) P
= IL VL
L
Note (5) The lifetime of lamp can be defined as the time in which it continues to operate under the condition
Ta = 25 2
o
C and IL = 6 mArms until one of the following events occurs:
(a) When the brightness becomes or lower than 50% of its original value.
(b) When the effective ignition length becomes or lower than 80% of its original value. (Effective
ignition length is defined as an area that has less than 70% brightness compared to the
brightness in the center point.)
Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the
inverter must have specifications for the modularized lamp. The performance of the Backlight,
such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for
the lamp. All the parameters of an inverter should be carefully designed to avoid producing too
much current leakage from high voltage output of the inverter. When designing or ordering the
inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the
inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module
should be operated in the same manners when it is installed in your instrument.
The output of the inverter must have symmetrical (negative and positive) voltage waveform and
symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter
10 / 35
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
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which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may
produce interface with horizontal synchronous frequency and as a result this may cause beat on the
display. Therefore lamp frequency shall be as away possible from the horizontal synchronous
frequency and from its harmonics in order to prevent interference.
Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its
leakage current.
a. The asymmetry rate of the inverter waveform should be 10% below.
b. The distortion rate of the waveform should be within Ѕ2 ± 10%.
c. The ideal sine wave form shall be symmetric in positive and negative polarities.
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Model No.: N141I1 - L04
Tentative
* Asymmetry rate:
I p
I -p
| I
* Distortion rate
I
– I –p | / I
p
(or I –p) / I
p
rms
rms
* 100%
11 / 35
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
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)
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
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Model No.: N141I1 - L04
Tentative
Rxin0(+/-)
Rxin1(+/-)
Rxin2(+/-)
(JAE-FI-XB30SRL-HF11)
CLK(+/-)
Vcc
GND
Data
EDID
CLK
EDID
V
EDID
VL
LAMP CONNECTOR
4.2 BACKLIGHT UNIT
TIMING CONTROLLER
INPUT CONNECTOR
DC/DC CONVERTER &
REFERENCE VOLTAGE
(JST-BHSR-02VS-1)
LVDS INPUT /
GENERATOR
EDID
EEPROM
SCAN DRIVER IC
TFT LCD PANEL
(1280xR.G.B.x800)
DATA DRIVER IC
BACKLIGHT UNIT
1 HV (Pink) 2 LV (White
12 / 35
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
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5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin Symbol Description Polarity Remark
1 Vss Ground 2 Vcc Power Supply +3.3 V (typical) 3 Vcc Power Supply +3.3 V (typical) 4 V 5 BIST Panel BIST enable 6 CLK 7 DATA 8 Rxin0- LVDS Differential Data Input Negative
9 Rxin0+ LVDS Differential Data Input Positive
10 Vss Ground 11 Rxin1- LVDS Differential Data Input Negative
12 Rxin1+ LVDS Differential Data Input Positive
13 Vss Ground 14 Rxin2- LVDS Differential Data Input Negative B2~B5, DE, Hsync, Vsync
15 Rxin2+ LVDS Differential Data Input Positive 16 Vss Ground 17 CLK- LVDS Clock Data Input Negative 18 CLK+ LVDS Clock Data Input Positive 19 Vss Ground 20 NC Non-Connection 21 NC Non-Connection 22 NC Non-Connection 23 NC Non-Connection 24 NC Non-Connection 25 NC Non-Connection 26 NC Non-Connection 27 NC Non-Connection 28 NC Non-Connection 29 NC Non-Connection 30 NC Non-Connection
Note (1) Connector Part No.: JAE-FI-XB30SL-HF10 or equivalent
DDC 3.3V Power DDC 3.3V Power
EDID
DDC Clock DDC Clock
EDID
DDC Data DDC Data
EDID
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Model No.: N141I1 - L04
Tentative
R0~R5,G0
-
G1~G5, B0, B1
-
LVDS Level Clock
Note (2) User’s connector Part No: FI-X30C2L or equivalent
Note (3) The first pixel is even.
5.2 BACKLIGHT UNIT
Pin Symbol Description Color
1 HV High Voltage Pink 2 LV Ground White
Note (1) Connector Part No.: JST- BHSR-02VS-1 or equivalent
Note (2) User’s connector Part No.: SM02B-BHSS-1-TB or equivalent
13 / 35
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5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
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Model No.: N141I1 - L04
Tentative
CLK+
Rxin2
Rxin1
Rxin0
T/7
IN20 IN19 IN18 IN17 IN16 IN15 IN14
DE B5 B4 B3 B2 Vsync Hsync
IN13 IN12 IN11 IN10 IN9 IN8 IN7
B1 G4 G3 G2 G1 B0 G5
IN6 IN5 IN4 IN3 IN2 IN1 IN0
G0 R3 R2 R1 R0 R5 R4
Signal for 1 DCLK Cycle (T)
14 / 35
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5.4 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for
the color. The higher the binary input, the brighter the color. The table below provides the assignment of
color versus data input.
Color
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0 Black Red Green
Basic Colors
Gray Scale Of Red
Gray Scale Of Green
Gray Scale Of Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue Cyan Magenta Yellow White Red(0)/Dark Red(1) Red(2)
:
: Red(61) Red(62) Red(63) Green(0)/Dark Green(1) Green(2)
:
: Green(61) Green(62) Green(63) Blue(0)/Dark Blue(1) Blue(2)
:
: Blue(61) Blue(62) Blue(63)
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0 : :
1
1
1
1
1
1
0
0
0
0
0
0 : :
0
0
0
0
0
0
0
0
0
0
0
0 : :
0
0
0
0
0
0
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Model No.: N141I1 - L04
Tentative
Data Signal
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
15 / 35
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
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5.5 EDID DATA STRUCTURE
The EDID (Extended Display Identification Data) data formats are to support displays as defined in the
VESA Plug & Display and FPDI standards.
TBD
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Model No.: N141I1 - L04
Tentative
16 / 35
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6. INVERTER SPECIFICATION
6.1 Connector type
Input connector type: LVC-D20SFYG (HONDA)
Output connector: JST SM02B-BHSS-1-TB (JST)
6.2 Input connector pin assignment
Input Connector pin assignment:
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Model No.: N141I1 - L04
Tentative
Input connector
HONDA LVC-D20SFYG
Pin Function
1 INV_SRC
2 INV_SRC
3 INV_SRC
4 INV_SRC
5 GND Ground 6 NC No Connection
7 5VALW
8 GND Ground
9 SMB_DAT
10 SMB_CLK
11 GND Ground
12 INV_PWM System side PWM input signal for brightness control
13 GND Ground
14 NC No Connection
15 ~ 20 NC No Connection
This power rail should be used as a power rail to drive the backlight DC-AC converter
This power rail should be used as a power rail to drive the backlight DC-AC converter
This power rail should be used as a power rail to drive the backlight DC-AC converter
This power rail should be used as a power rail to drive the backlight DC-AC converter
This should be used as power source that stores the brightness/contrast values & the circuit that interfaces with SMB_CLK & SMB_DAT
SMBus interface for sending brightness & contrast information to the inverter/panel
SMBus interface for sending brightness & contrast information to the inverter/panel
Comments
Absolute maximum ratings
Items Absolute max. ratings Unit
INV_SRC (Voltage) -1.0~23.5 V FPBACK/SMB_CLK/SMB_DAT (Voltage)
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
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-1.0~5.5 V
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6.3 Output connector pin assignment
Pin Name Description
1 CFL-High High-voltage output to the CCFL 2 CFL-Low Low-voltage output to the CCFL
Absolute maximum ratings
Items Absolute max. ratings Unit
INV_SRC (Voltage) -1.0~23.5 V FPBACK/SMB_CLK/SMB_DAT (Voltage)
6.4 General electrical specification:
6.4.1 Electrical characteristics:
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Model No.: N141I1 - L04
Tentative
-1.0~5.5 V
No. Item Symbol
1 Input Voltage INV_SRC 7.5 14.4 21 V
Input Signal Level for
2
Input Signal Level for
3
4 Input Power Pin(Max)
5 Lamp Power Po
6
5VSUS
5VALW
Backlight
ON/OFF Control
5VSUS 4.85 5 5.2 V
5VALW 4.85 5 5.2 V
FPBACK=O
N
FPBACK=O
FF
Condition
Vin=7.5V~21V
SMB_DAT=FFH
Vin=7.5V~21V
SMB_DAT=FFH
Enable the inverter 2.0 - 5.25 V
Disable the inverter -0.3 - 0.8 V
Min. Typ. Max. Uint
TBD TBD TBD W
TBD 4.02 4.6 W
Brightness Adjust (Lamp
7
8 Output Voltage Vout IL = 6.0mA(typ) (603) (670) (737) Vrms
9
10 Operation Frequency Freq Vin=7.5V~21V (45) - (65) KHz
Current Control)
Output Current
SMB_DAT
Iout (Min)
Iout (Max)
Control by SMBus(256 steps dimming control)
Vin=7.5V~21V SMB_DAT=00H Ta =25 к, after running 30 min.
Vin=7.5V~21V SMB_DAT=FFH Ta =25 к, after running 30 min.
00H - FFH -
2.0 2.3 2.6 mArms
5.7 6.0 6.3 mArms
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Model No.: N141I1 - L04
Tentative
11 Burst mode frequency fB Vin=7.5V~21V 200 - 220 Hz
12 Open Lamp Voltage Vopen No Load (1500) TBD (1800) Vrms
13 Striking Time Ts No Loadw 0.6 1 1.4 Sec
14
15 Start and Delay Time Vin=14.4V,
16 Start –up time
zInput Voltage
zOn/Off control
zQuiescent current
zOpen lamp voltage
Efficiency K
Vin=14.4V,
(Turn on delay time)
The operating input voltage of inverter shall be defined.
The inverter shall ignite the CCFL lamp at minimum input voltage at any environment conditions.
Enable: At “ON” condition (FPBACK=Hi), enable the inverter.
Disable: At “OFF” condition (FPBACK=Lo), disable the inverter.
At the inverter “OFF” condition, input quiescent should be less than 0.1mA.
Vin=7.5V, SMB_DAT=FFH
(80) - - %
(RES LOAD=100K ohm)
- 130 200 uS
SMB_DAT=00H
- - 0.1 Sec
SMB_DAT=FFH
The inverter start-up output voltage will be above “Vopen” for “Ts” minimum at any condition under specify
until lamp to be ignited. The inverter should be shutdown if lamp ignition was failed in “Ts” maximum. The
inverter shall be capable of withstanding the output connections open without component over-stress / fire /
smoke /arc.
zBurst mode frequency
The burst mode frequency should be in specification in any environment condition and electrical condition.
zBrightness control
SM-BUS values for panel luminance are to be included in the on LCD board EEDID ROM chip table. The
supplier will measure panel luminance in a system and define the SMBUS values for each of the 8 required
luminance levels. The panel luminance, for which SMBUS values will be provided in the EEDID from byte #
113(hex #71), to byte # 120, (hex # 78), is show in the table below. The inverter supplier should provide
these appropriate values to CMO.
Step Count Step 1 Step 2 Step3 Step 4 Step 5 Step 6 Step 7 Step 8
Address Byte
SM-Bus Data Value TBD TBD TBD TBD TBD TBD TBD TBD
Luminance (nits) 10 17 24 30 60 110 150 Max
113
Byte
114
Byte
115
Byte
116
Byte
117
Byte
118
Byte
119
Byte
120
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z Output ripple ratio
Ripple ratio = 2 * (Ipeak - Ivalley) / (Ipeak + Ivalley) * 100%
The Ripple ratio should be less than 5% and ripple frequency should be less than 200 Hz.
z Power up Overshoot & Undershoot
Overshoot & Undershoot at power up should not exceed the following limits.
Vin
0ШVin(min.)
0ШVin(typ.)
0ШVin(max.)
dI=Imax.-Io or dI=(Io-Imin.)/Io
Output current
Io(rms)
Io(max.)
Io(min.)
Io(max.)
Io(min.)
Io(max.)
Io(min.)
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Io (dI)
Overshoot/Undershoot
150% / 50% 5 ms max.
150% / 50% 5 ms max.
150% / 50% 5 ms max.
Model No.: N141I1 - L04
Tentative
Settling time
(dT)
z Output connections short protection
The inverter shall be capable of withstanding the output connections short without damage or over-stress.
And the inverter maximum input power shall be limited within 1W.
6.4.2 Mechanical Drawing
Please refer to CMO’s previous mechanical drawing of appendix (07N2737_mech.pdf)
6.4.3 Other Information
z Safety
x The inverter shall meet the requirement of “Limited current circuits” in paragraphs 2.4.1 in IEC60950.
There is no fire/smoke while simulating the component of the inverter open/short test.
x The Inverter AND panel must be UL certified with CB certificate and LCC (Limited Current Circuit) test
and test reports from UL. Inverter panel combo must pass Dell Safety requirements.
z EMI
The inverter must meet the radiated limitation requirement of CISPR22 class B, FCC-B and VCCI level II
with 6dB margin minimum while the inverter operating in the complete system.
z Environment Regulation
x Follow the RoHS requirement.
x Fill in CMO’s official document <<Environmentally Conscious Products Questionnaire for Suppliers of
Materials, Parts, and Products>> and turn in to CMO before CMO’s specification approval process.
z Dell’s other requirements
1. The inverter must not emit any audible noise.
2. Please refer to CMO’s official document. “General Inverter Specification for LCD Module” for other
general information such as reliability test, safety and etc..
20 / 35
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Model No.: N141I1 - L04
Tentative
3. Please also refer to DELL’s official document about inverter:
z DELL’s Generic Inverter Specification, Rev. X00-00 –4.
z DELL’s LCD Inverter Qualification Plan, Rev. X04.
Confidential Notice
Remind that all the information described in this document is confidential. Please don’t reveal to other people else
before getting CMO’s agreement.
21 / 35
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7. INTERFACE TIMING
7.1 INPUT SIGNAL TIMING SPECIFICATIONS
The specifications of input signal timing are as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
DCLK Frequency 1/Tc 50 71.1 80 MHz -
Vertical Total Time TV 810 823 2000 TH -
DE
Vertical Addressing Time TVD 800 800 800 TH -
Horizontal Total Time TH 1360 1440 1900 Tc -
Horizontal Addressing Time THD 1280 1280 1280 Tc -
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Model No.: N141I1 - L04
Tentative
DE
DCLK
TC
DE
DATA
7.2 POWER ON/OFF SEQUENCE
INPUT SIGNAL TIMING DIAGRAM
Power On
90%
Power Off
90%
HD
T
Restart
t7
Power Supply
for LCD, Vcc
- Interface Signal
(LVDS Signal of Transmitter), V
I
- Power for Lamp
0V
0V
10%
t1
Valid Data
10%
t4
t3 t2
t6 t5
50%50%
ONOFF OFF
10%
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Timing Specifications:
0.5< t1 Љ 10 msec
0 < t2 Љ 50 msec
0 < t3 Љ 50 msec
t4 Њ 500 msec
t5 Њ 200 msec
t6 Њ 200 msec
Note (1) Please avoid floating state of interface signal at invalid period.
Note (2) When the interface signal is invalid, be sure to pull down the power supply of LCD Vcc to 0 V.
Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the
interface signal is valid. The Backlight inverter power must be turned off before the power supply
for the logic and the interface signal is invalid.
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Model No.: N141I1 - L04
Tentative
Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To
avoid this phenomenon, we suggest that the Vcc falling time had better to follow
t7 Њ 5 msec
23 / 35
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8. OPTICAL CHARACTERISTICS
8.1 TEST CONDITIONS
Item Symbol Value Unit Ambient Temperature Ta Ambient Humidity Ha Supply Voltage VCC 3.3 V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" Inverter Current IL 6 mA Inverter Driving Frequency FL 61 KHz Inverter H05-4915
The relative measurement methods of optical characteristics are shown in 7.2. The following items
should be measured under the test conditions described in 7.1 and stable environment shown in Note (5).
8.2 OPTICAL SPECIFICATIONS
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR 300 400 - (2), (5)
Response Time
Average Luminance of White L White Variation
Red
Color Chromaticity
Viewing Angle
Green
Blue
White
Horizontal
Vertical
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Model No.: N141I1 - L04
Tentative
o
25r2
50r10
TR - 5 10 ms
- 11 16 ms
T
F
150 185 cd/m2(4), (5)
AVE
GW
Rx Ry Gx Gy Bx By
T
=0q, TY =0q
x
Viewing Normal
Angle
1.4 - (5), (6)
0.588
0.337
0.315
TYP
-0.03
0.534
0.152
TYP
+0.03
0.130 Wx 0.313 -
Wy
Tx+
T
-
x
TY+
T
Y
CRt10
-
0.329
40 45 40 45 15 20 40 45
C
%RH
(3)
-
-
-
-
-
­(1)
-
Deg.
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.67 ms
Note (1) Definition of Viewing Angle (Tx, Ty):
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Model No.: N141I1 - L04
Tentative
TX- = 90º
x-
6 o’clock
T
y- = 90º
y-
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L63 / L0
Normal
Tx = Ty = 0º
Ty- Ty
Tx
Tx
y+
12 o’clock direction
T
y+ = 90º
x+
TX+ = 90º
L63: Luminance of gray level 63
L 0: Luminance of gray level 0
CR = CR (5)
CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).
Note (3) Definition of Response Time (T
100%
90%
Optical
Response
10%
0%
R
T
R
66.67 ms
, TF):
66
Time
T
F
25 / 35
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Model No.: N141I1 - L04
Tentative
Note (4) Definition of Average Luminance of White (L
Measure the luminance of gray level 63 at 5 points
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
AVE
L (x) is corresponding to the luminance of the point X at Figure in Note (6)
Note (5) Measurement Setup:
The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting Backlight for 20 minutes in a windless room.
LCD Module
LCD Panel
Center of the Screen
Field of View = 2º
AVE
):
Photometer
(CA210, CS-1000T)
500 mm
Light Shield Room
(Ambient Luminance < 2 lux)
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Note (6) Definition of White Variation (GW):
Measure the luminance of gray level 63 at 5 points
GW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
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Model No.: N141I1 - L04
Tentative
W
W/4
W/2
3W/4
Vertical Line
Horizontal Line
D
D/4 D/2 3D/4
12
X
: Test Point
X=1 to 5
3
5
4
Active Area
27 / 35
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Model No.: N141I1 - L04
Tentative
9. PRECAUTIONS
9.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) To assemble or install module into user’s system can be only in clean working areas. The dust and oil
may cause electrical short or worsen the polarizer.
(3) It’s not permitted to have pressure or impulse on the module because the LCD panel and Backlight will
be damaged.
(4) Always follow the correct power sequence when LCD module is connecting and operating. This can
prevent damage to the CMOS LSI chips during latch-up.
(5) Do not pull the I/F connector in or out while the module is operating.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) It is dangerous that moisture come into or contacted the LCD module, because moisture may damage
LCD module when it is operating.
(9) High temperature or humidity may reduce the performance of module. Please store LCD module within
the specified storage conditions.
(10) When ambient temperature is lower than 10ºC may reduce the display quality. For example, the
response time will become slowly, and the starting voltage of CCFL will be higher than room
temperature.
9.2 SAFETY PRECAUTIONS
(1) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while
assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
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10. PACKAGING
9.1 CARTON
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Model No.: N141I1 - L04
Tentative
Figure. 9-1 Packing method
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9.2 PALLET
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Model No.: N141I1 - L04
Tentative
Figure. 9-2 Packing method
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Model No.: N141I1 - L04
Tentative
11. DEFINITION OF LABELS
11.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
E207943
MADE IN TAIWAN
01A
N141X5 - L03 Rev.XX
-
X X X X X X X Y M D L N N N N
C P 1 3 5 4 4 8 - 0 1
(a) Model Name: N141I1 - L04
(b) Revision: Rev. XX, for example: A1, …, C1, C2 …etc.
(c) Serial ID: X X
Serial ID includes the information as below:
(a) Manufactured Date: Year: 1~9, for 2001~2009
X X X X X Y M D X N N N N
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1
st
Serial No. CMO Internal Use
Year, Month, Date CMO Internal Use
Revision
CMO Internal Use
to 31st, exclude I , O and U
(b) Revision Code: cover all the change
(c) Serial No.: Manufacturing sequence of product
11.2 CMO CARTON LABEL
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