CMO N141C6-L01 Specification

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TFT LCD Preliminary Specification

MODEL NO.: N141C6 - L01

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Doc No.: 44082401

Issued Date: Aug. 08, 2008

Model No.: N141C6 - L01

Preliminary

Customer:

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Note:

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Doc No.: 44082401

Issued Date: Aug. 08, 2008

Model No.: N141C6 - L01

Preliminary

- CONTENTS -

REVISION HISTORY

1. GENERAL DESCRIPTION

1.1 OVERVIEW

1.2 FEATURES

1.3 APPLICATION

1.4 GENERAL SPECIFICATIONS

1.5 MECHANICAL SPECIFICATIONS

2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

2.2.2 BACKLIGHT UNIT

3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE

3.2 BACKLIGHT UNIT

4. BLOCK DIAGRAM

4.1 TFT LCD MODULE

4.2 BACKLIGHT UNIT

5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD MODULE

5.2 BACKLIGHT UNIT

5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL

5.4 COLOR DATA INPUT ASSIGNMENT

5.5 EDID DATA STRUCTURE

6. INTERFACE TIMING
6

.1 INPUT SIGNAL TIMING SPECIFICATIONS

6.2 POWER ON/OFF SEQUENCE

7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

7.2 OPTICAL SPECIFICATIONS

8. PRECAUTIONS

8.1 HANDLING PRECAUTIONS

8.2 STORAGE PRECAUTIONS

8.3 OPERATION PRECAUTIONS

9. PACKING ------------------------------------------------------- 26

9.1 CARTON

9.2 PALLET

10. DEFINITION OF LABELS

10.1 CMO MODULE LABEL

10.2 CMO CARTON LABEL

10.3 Dell CARTON LABEL

10.4 Dell PALLET LABEL

------------------------------------------------------- 3

------------------------------------------------------- 4

------------------------------------------------------- 5

------------------------------------------------------- 7

------------------------------------------------------- 10

------------------------------------------------------- 11

------------------------------------------------------- 18

------------------------------------------------------- 201

------------------------------------------------------- 205

------------------------------------------------------- 28

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Doc No.: 44082401

Issued Date: Aug. 08, 2008

Model No.: N141C6 - L01

Preliminary

REVISION HISTORY

Version Date

0.0

1.0

Jan 24,’08

Aug. 08, ‘08

Page

(New)

All

All

Section Description

Tentative specification was first issued.

All

Preliminary Specification was first issued.

All

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1 GENERAL DESCRIPTION

1.1 OVERVIEW

N141C6 - L01 is a 14.1” TFT Liquid Crystal Display module with single LED Backlight unit and 50 pins

LVDS interface. This module supports 1440 x (3 RGB) x 900 WXGA+ mode and can display 262,144 colors.

The optimum viewing angle is at 6 o’clock direction. The converter module for backlight is not built in.

1.2 FEATURES

- Thin and Light Weight

- WXGA+ (1440 x 900 pixels) resolution

- DE only mode

- 3.3V LVDS (Low Voltage Differential Signaling) interface with 2 pixel/clock

- RoHS compliance

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Doc No.: 44082401

Issued Date: Aug. 08, 2008

Model No.: N141C6 - L01

Preliminary

1.3 APPLICATION

- TFT LCD Notebook

1.4 GENERAL SPECIFICATI0NS

Item Specification Unit Note
Active Area 303.48(H) X 189.675(V) (14.1 inch Diagonal) mm
Bezel Opening Area 306.88 (H) x 193.075 (V) mm
Driver Element a-si TFT active matrix - ­Pixel Number 1440 x R.G.B. x 900 pixel ­Pixel Pitch 0.21075 (H) x 0.21075 (V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 262,144 color ­Transmissive Mode Normally white - ­Surface Treatment Anti-glare and Hard Coat , Haze 26, (3H min.) - -

1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal(H) 319 319.5 320 mm

Module Size

Vertical(V) 206 206.5 207 mm
Depth(D) -- 5.28 5.5 mm

Weight -- -- 375 g

(1)

(1)

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions

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A

2 ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 +50 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V

Note (1) (a) 90 %RH Max. (Ta 40 ºC).Љ

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The temperature of panel display surface area should be 0 ºC Min. and 60 ºC Max..

Relative Humidity (%RH)

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Doc No.: 44082401

Issued Date: Aug. 08, 2008

Model No.: N141C6 - L01

Preliminary

Value

Min. Max.

- 220/2 G/ms (3), (5)

NOP

- 1.5 G (4), (5)

NOP

Unit Note

100

90

80

60

Operating Range

40

20
10

Storage Range

Temperature (ºC)

Note (3) 1 time for ± X, ± Y, ± Z. for Condition (220G / 2ms) is half Sine Wave,.

Note (4) 10 ~ 500 Hz, 30 min / Cycle, 1 cycles for each X, Y, Z axis.

8060-20 400 20-40

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid

enough so that the module would not be twisted or bent by the fixture.

The fixing condition is shown as below:

t Room Temperature

Side Mount Fixing Screw

Gap=2mm

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LCD Module

Side Mount Fixing Screw

Stage

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2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

Item Symbol

Power Supply Voltage VCC -0.3 +4.0 V
Logic Input Voltage VIN -0.3 VCC+0.3 V

2.2.2 BACKLIGHT UNIT

Item Symbol

LED Light Bar Power Supply
Voltage
LED Light Bar Power Supply
Current

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Issued Date: Aug. 08, 2008

Value

Min. Max.

Value

Min. Max.

0 3.3 V

V

L

0 30 mA

I

L

Unit Note

Unit Note

Doc No.: 44082401

Model No.: N141C6 - L01

Preliminary

(1)

(1), (2)

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

Note (2) Specified values are for LED (Refer to 3.2 for further information).

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Doc No.: 44082401

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Model No.: N141C6 - L01

Preliminary

3 ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE Ta = 25 ± 2 ºC

Parameter Symbol

Min. Typ. Max.
Power Supply Voltage Vcc 3.0 3.3 3.6 V ­Permissive Ripple Voltage VRP 50 mV ­Rush Current I

1.5 A (2)

RUSH

Initial Stage Current IIS 1.0 A (2)

Power Supply Current

LVDS Differential Input High Threshold V

LVDS Differential Input Low Threshold V

White 370 mA (3)a
Black

Icc

TH(LVDS)

TL(LVDS)

480 mA (3)b

+100 mV

-100 mV

LVDS Common Mode Voltage VCM 1.125 1.375 V (5)
LVDS Differential Input Voltage |VID| 100 600 mV (5)
Terminating Resistor RT 100 Ohm
Power per EBL WG P

- 2.0223 - W (4)

EBL

Note (1) The ambient temperature is Ta = 25 ± 2 ºC.

Value

Unit Note

V

V

(5),

=1.2V

CM

(5)

=1.2V

CM

Note (2) I

I

: the maximum current when VCC is rising

RUSH

: the maximum current of the first 100ms after power-on

IS

Measurement Conditions: Shown as the following figure. Test pattern: black

(High to Low)

(Control Signal)

SW

+12V

0V

+3.3V

R1

47K

C1

1uF

VR1

R2

1K

47K

Q1 2SK1475

C2

0.01uF

Q2

2SK1470

FUSE

C3

1uF

Vcc rising time is 470us

0.9Vcc

470us

0.1Vcc

+3.3V

100ms

Vcc

(LCD Module Input)

VCC

I

RUSH

I

IS

ICC

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|

Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, fv = 60

Hz, whereas a power dissipation check pattern below is displayed.

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Doc No.: 44082401

Issued Date: Aug. 08, 2008

Model No.: N141C6 - L01

Preliminary

Note (4) The specified power are the sum of LCD panel electronics input power and the cnverter input

a. White Pattern

Active Area

power. Test conditions are as follows.

(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f

(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file

“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.

(c) Luminance: 60 nits.

(d) The inverter used is provided from TBD. Please contact them for detail information. CMO doesn’t

= 60 Hz,

v

b. Black Pattern

Active Area

provide the inverter in this product.

Note (5) The parameters of LVDS signals are defined as the following figures.

Single Ended

Differential

CM

V

0V

V

0V

V

VID|

VID|

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Doc No.: 44082401

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Model No.: N141C6 - L01

3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC

Parameter Symbol

LED Quantity 60 Pcs (1),
LED light bar Power
Supply Voltage
LED light bar Power
Supply Current
LED Life Time LBL 15,000 - - Hrs (4)
Power Consumption Po - 3.264 4.95 W (3), IL = 102.0 mA

Note (1) LED light bar configuration is shown as below:

30 32 33 Vdc

V

L

-- 102 150 mA

I

L

Min. Typ. Max.

Value

Unit Note

Preliminary

(1), (2)

Note (2) For better LED light bar driving quality, it is recommended to utilize the adaptive boost converter with

current balancing function to drive LED light-bar.

Note (3) PO = IL ×VL

Note (4) The lifetime of LED is defined as the time when it continues to operate under the conditions at Ta = 25

Light Bar Feedback

Channels

V

L, IL

LED

Light Bar

Parallel:6

SeriesΚ10

±2 oC and IL = 17 mA(Per EA) until the brightness becomes 50% of its original value.Љ

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4 BLOCK DIAGRAM

4.1 TFT LCD MODULE

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Doc No.: 44082401

Issued Date: Aug. 08, 2008

Model No.: N141C6 - L01

Preliminary

LVDS Display

Data & Clock

Vcc

GND

Data

EDID

CLK

EDID

V

EDID

LED Power & Signal

INPUT CONNECTOR

LVDS INPUT /

TIMING CONTROLLER

DC/DC CONVERTER &

REFERENCE VOLTAGE

GENERATOR

EDID

EEPROM

LED

Converter

SCAN DRIVER IC

TFT LCD PANEL

DATA DRIVER IC

BACKLIGHT UNIT

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5 INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD MODULE

Pin Symbol Description Polarity Remark

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21

22
23
24

25

26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50

Test Loop Test Loop (only to pin 30)

VEDID EDID 3.3V power

VSS Ground

CLKEDID EDID clock

DATAEDID EDID data

VSS Ground

RXO0- - LVDS differential data input (R0-R5, G0)

RXO0+ + LVDS differential data input (R0-R5, G0)

VSS Ground

RinO1- - LVDS differential data input (G1-G5, B0-B1) (Odd)

RinO1+ + LVDS differential data input (G1-G5, B0-B1) (Odd)

VSS Ground

RinO2- - LVDS differential data input (B2-B5, HS, VS, DE) (Odd)

RinO2+ + LVDS differential data input (B2-B5, HS, VS, DE) (Odd)

VSS Ground

RXOC- - LVDS differential clock input (Odd)

RXOC+ + LVDS differential clock input (Odd)

VSS Ground

RinE0- - LVDS differential data input (R0-R5, G0) (Even)

RinE0+ + LVDS differential data input (R0-R5, G0) (Even)

VSS Ground

RinE1- - LVDS differential data input (G1-G5, B0-B1) (Even)

RinE1+ + LVDS differential data input (G1-G5, B0-B1) (Even)

VSS Ground

RinE2-

RinE2+

VSS Ground

RXEC- - LVDS differential clock input (Even)

RXEC+ + LVDS differential clock input (Even)

Test Loop Test Loop (only to pin 1)

CONNTST Connector test (this pin connected to pin 50 only)

Vcc Power Supply +3.3 V (typical)
Vcc Power Supply +3.3 V (typical)

BIST Panel Self Test

NC no connect
VSS Ground
VSS Ground

PWM_BL PWM brightness control

VBL- Ground
VBL­VBL- Ground
VBL-

NC no connect

VBL+ 7V – 20V LED power
VBL+ 7V – 20V LED power
VBL+ 7V – 20V LED power
VBL+ 7V – 20V LED power

SMB_DATA SMBus data

SMB_CLK SMBus clock
CONNTST Connector test (this pin to be connected to pin 31 only)

- LVDS differential data input (B2-B5, HS, VS, DE)
(Even)
+ LVDS differential data input (B2-B5, HS, VS, DE)
(Even)

Ground

Ground

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Doc No.: 44082401

Issued Date: Aug. 08, 2008

Model No.: N141C6 - L01

Preliminary

Negative

Positive

Negative

Positive

Negative

Positive

Negative

Positive

Negative

Positive

Negative

Positive

Negative

Positive

Negative

Positive

1.

ΰ1α

LED Power

Input

ΰ1α

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Note (1) Connector Part No.: JAE-FI-VHP50S-A-HF11 or equivalent

Note (2) User’s connector Part No: JAE-FI-X30C2L or equivalent

Note (3) The first pixel is odd as shown in the following figure.

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Model No.: N141C6 - L01

Preliminary

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5.2 BACKLIGHT UNIT

Pin Symbol Description Color

1 HV High Voltage Pink
2 LV Ground White

Note (1) Connector Part No.: FCI-59453-091110EDLF or equivalent

Note (2) User’s connector Part No.: SM02B-BHSS-1-TB or equivalent

5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL

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Doc No.: 44082401

Issued Date: Aug. 08, 2008

Model No.: N141C6 - L01

Preliminary

RXOC+

RXO2+/-

RXO1+/-

RXO0+/-

RXEC+

RXE2+/-

RXE1+/-

RXE0+/-

T/7

IN20 IN19 IN18 IN17 IN16 IN15 IN14

DE OB5 OB4 OB3 OB2 Vsync Hsync

IN13 IN12 IN11 IN10 IN9 IN8 IN7

OB1 OG4 OG3 OG2 OG1 OB0 OG5

IN6 IN5 IN4 IN3 IN2 IN1 IN0

OG0 OR3 OR2 OR1 OR0 OR5 OR4

Signal for 1 DCLK Cycle (T)

T/7

IN20 IN19 IN18 IN17 IN16 IN15 IN14

DE EB5 EB4 EB3 EB2 Vsync Hsync

IN13 IN12 IN11 IN10 IN9 IN8 IN7

EB1 EG4 EG3 EG2 EG1 EB0 EG5

IN6 IN5 IN4 IN3 IN2 IN1 IN0

EG0 ER3 ER2 ER1 ER0 ER5 ER4

Signal for 1 DCLK Cycle (T)

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5.4 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for

the color. The higher the binary input, the brighter the color. The table below provides the assignment of

color versus data input.

Color

R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black
Red
Green

Basic
Colors

Gray
Scale
Of
Red

Gray
Scale
Of
Green

Gray
Scale
Of
Blue

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Blue
Cyan
Magenta
Yellow
White
Red(0)/Dark
Red(1)
Red(2)

:

:
Red(61)
Red(62)
Red(63)
Green(0)/Dark
Green(1)
Green(2)

:

:
Green(61)
Green(62)
Green(63)
Blue(0)/Dark
Blue(1)
Blue(2)

:

:
Blue(61)
Blue(62)
Blue(63)

0

0

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

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Doc No.: 44082401

Issued Date: Aug. 08, 2008

Model No.: N141C6 - L01

Preliminary

Data Signal

Red Green Blue

0

0

0

0

0

0

0

0

0

0

0
1
0
0
0
1
1
1
0
0
0

1
1
1
0
0
0

0
0
0
0
0
0

0
0
0

0

1

1

1

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

1

1

0

0

0

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

0

0

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

1

0

1

0

0

0

0

0

0

0

0

1

1

0

0

0

0

0

0

0

0

0

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

1

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

0

0

1

1

1

1

0

1

0

0

0

0

0

1

1

1

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

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0

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0

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0

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0

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1

0

0

0

0

0

0

0

0

0

1

1

0

0

0

0

0

0

0

0

0

1

1

0
0
0
1
1
1
0
1
0
0
0

0
0
0
0
0
0

0
0
0
0
0
0

1
1
1

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

0

0

0

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

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:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

1

0

:

:

:

:

:

:

:

:

1

0

1

1

1

0

1

1

1

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5.5 EDID DATA STRUCTURE

The EDID (Extended Display Identification Data) data formats are to support displays as defined in the

VESA Plug & Display and FPDI standards.

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Doc No.: 44082401

Issued Date: Aug. 08, 2008

Model No.: N141C6 - L01

Preliminary

Byte #

(decimal )

0 0 Header
1 1 Header
2 2 Header
3 3 Header
4 4 Header
5 5 Header
6 6 Header
7 7 Header
8 8 EISA ID manufacturer name (“CMO”)

9 9 EISA ID manufacturer name (Compressed ASCII)
10 0A ID product code (N141C6-L01) 36
11 0B ID product code (hex LSB first; N141C6-L01) 14
12 0C ID S/N (fixed “0”)
13 0D ID S/N (fixed “0”)
14 0E ID S/N (fixed “0”)
15 0F ID S/N (fixed “0”)
16 10 Week of manufacture
17 11 Year of manufacture
18 12 EDID structure version # (“1”)
19 13 EDID revision # (“3”)
20 14 Video I/P definition (“digital”)
21 15 Active area horizontal 30.348cm
22 16 Active area vertical 18.9675cm
23 17 Display Gamma (Gamma = ”2.2”)
24 18 Feature support (“Active off, RGB Color”)
25 19 Rx1 Rx0 Ry1 Ry0 Gx1 Gx0 Gy1 Gy0
26 1A Bx1 Bx0 By1 By0 Wx1 Wx0 Wy1 Wy0
27 1B Rx=0.580
28 1C Ry=0.340
29 1D Gx=0.310
30 1E Gy=0.550
31 1F Bx=0.155
32 20 By=0.155
33 21 Wx=0.313
34 22 Wy=0.329
35 23 Established timings 1
36 24 Established timings 2 (1440*900@60Hz)
37 25 Manufacturer’s reserved timings
38 26 Standard timing ID # 1
39 27 Standard timing ID # 1
40 28 Standard timing ID # 2
41 29 Standard timing ID # 2
42 2A Standard timing ID # 3
43 2B Standard timing ID # 3

Byte

(hex) Field Name and Comments

Value

(hex)

00 00000000
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
00 00000000
0D 00001101
AF 10101111

00 00000000
00 00000000
00 00000000
00 00000000
14 00010100
12 00010010
01 00000001
03 00000011
90 10010000
1E 00011110
13 00010011
78 01111000
0A 00001010
87 10000111
F5 11110101
94 10010100
57 01010111
4F 01001111
8C 10001100
27 00100111
27 00100111
50 01010000
54 01010100
00 00000000
00 00000000
00 00000000
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001

Value

(binary)

00110110

00010100

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Preliminary

44 2C Standard timing ID # 4
45 2D Standard timing ID # 4
46 2E Standard timing ID # 5
47 2F Standard timing ID # 5
48 30 Standard timing ID # 6
49 31 Standard timing ID # 6
50 32 Standard timing ID # 7
51 33 Standard timing ID # 7
52 34 Standard timing ID # 8
53 35 Standard timing ID # 8

Detailed timing description # 1 Pixel clock (“88.75MHz”,

54 36
55 37 # 1 Pixel clock (hex LSB first)
56 38 # 1 H active (“1440”)
57 39 # 1 H blank (“160”)
58 3A # 1 H active : H blank (“1440 : 160”)
59 3B # 1 V active (”900”)
60 3C # 1 V blank (”26”)
61 3D # 1 V active : V blank (”900 :26”)
62 3E # 1 H sync offset (”48”)
63 3F # 1 H sync pulse width (“32”)
64 40 # 1 V sync offset : V sync pulse width (”3 : 6”)

65 41
66 42 # 1 H image size (”303 mm”)
67 43 # 1 V image size (”190 mm”)
68 44 # 1 H image size : V image size (”303 : 190”)
69 45 # 1 H boarder (”0”)
70 46 # 1 V boarder (”0”)

71 47

72 48
73 49 # 2 Pixel clock (hex LSB first)
74 4A # 2 H active (“1440”)

According to VESA CVT Rev1.1)

# 1 H sync offset : H sync pulse width : V sync offset : V sync
width (”48: 32 : 3 : 6”)

# 1 Non-interlaced ; Normal display, no stereo ; Digital Separate ;
V sync POL is negative
; H sync POL is positive
Detailed timing description # 2 Pixel clock (“58.5MHz”, According
to VESA CVT Rev1.1)

01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001

AB 10101011

22 00100010
A0 10100000
A0 10100000
50 01010000
84 10000100
1A 00011010
30 00110000
30 00110000
20 00100000
36 00110110

00 00000000

2F 00101111
BE 10111110
10 00010000
00 00000000
00 00000000

1A 00011010

DA 11011010

16 00010110
A0 10100000

75 4B # 2 H blank (“160”)
76 4C # 2 H active : H blank (“1440 : 160”)
77 4D # 2 V active (”900”)
78 4E # 2 V blank (”17”)
79 4F # 2 V active : V blank (”900 :17”)
80 50 # 2 H sync offset (”48”)
81 51 # 2 H sync pulse width (“32”)
82 52 # 2 V sync offset : V sync pulse width (”3 : 6”)

# 2 H sync offset : H sync pulse width : V sync offset : V sync

83 53
84 54 # 2 H image size (”303 mm”)
85 55 # 2 V image size (”190 mm”)
86 56 # 2 H image size : V image size (”303 : 190”)
87 57 # 2 H boarder (”0”)

width (”48: 32 : 3 : 6”)

16 / 31

A0 10100000

50 01010000
84 10000100

11 00010001
30 00110000
30 00110000
20 00100000
36 00110110

00 00000000

2F 00101111

BE 10111110

10 00010000
00 00000000

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Preliminary

88 58 # 2 V boarder (”0”)

# 2 Non-interlaced ; Normal display, no stereo ; Digital Separate ;
V sync POL is negative

89 59
90 5A Detailed timing description # 3
91 5B # 3 Flag
92 5C # 3 Reserved

93 5D
94 5E # 3 Flag
95 5F # Dell P/N “NM050” 1st character (“N”)
96 60 # Dell P/N “NM050” 1st character (“M”)
97 61 # Dell P/N “NM050” 1st character (“0”)
98 62 # Dell P/N “NM050” 1st character (“5”)

99 63 # Dell P/N “NM050” 1st character (“0”)
100 64
101 65 Manufacturer P/N ( “N”)
102 66 Manufacturer P/N ( “1” )
103 67 Manufacturer P/N ( “4” )
104 68 Manufacturer P/N ( “1” )
105 69 Manufacturer P/N ( “C” )
106 6A Manufacturer P/N ( “6” )

107 6B
108 6C Flag
109 6D Flag
110 6E Flag

; H sync POL is positive

# 3 FE (hex) defines ASCII string (Model Name “N141C5”,
ASCII)

LCD Supplier EEDID Revision #: “02” 82 10000010

Manufacturer P/N (If <13 char, then terminate with ASCII code
0Ah, set remaining char = 20h)

00 00000000

1A 00011010

00 00000000
00 00000000
00 00000000

FE 11111110

00 00000000
4E 01001110

4D 01001101

30 00110000
35 00110101
30 00110000

4E 01001110
31 00110001
34 00110100
31 00110001
43 01000011
36 00110110

0A 00001010

00 00000000
00 00000000
00 00000000

111 6F Data Type Tag:
112 70 Flag
113 71 SMBUS value @ 10nits = 00 00
114 72 SMBUS value @ 17nits = 00 00
115 73 SMBUS value @ 24nits = 00 00
116 74 SMBUS value @ 30nits = 00 00
117 75 SMBUS value @ 60nits = 00 00
118 76 SMBUS value @ 110nits = 00 00
119 77 SMBUS value @ 160nits = 00 00
120 78 SMBUS value @ max nits = 00 00

Bit[1:0] 00:reserved , 01: single LVDS, 10: dual LVDS, 11:
reserved
Bit[2] 0: No RTC support , 1: RTC support

121 79
122 7A BIST Enable: Yes = ‘01’ No = ‘00’ (“Yes”)

123 7B

124 7C

125 7D
126 7E Extension flag
127 7F Checksum

Bit[7:3] Reserved

(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)
(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)
(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)

00 00000000

00 00000000

00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

02 00000010

01 00000001

0A 00001010

20 00100000

20 00100000

00 00000000
41 01000001

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Preliminary

6 INTERFACE TIMING

(9). . . . .!!!!!..!Γ IN

PUT SIGNAL TIMING SPECIFICATIONS

The specifications of input signal timing are as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

DCLK Frequency 1/Tc 25 44.5 60 MHz (2)

Vertical Total Time TV 910 926 1500 TH -

Vertical Active Display Period TVD 900 900 900 TH -

DE

Note (1) Because this module is operated by DE only mode, Hsync and Vsync are ignored.

(2) 2 channels LVDS input.

Vertical Active Blanking Period TVB TV-TVD 26 TV-TVD TH

Horizontal Total Time TH 760 800 880 Tc (2)

Horizontal Active Display Period THD 720 720 720 Tc (2)

Horizontal Active Blanking Period THB

TH-THD

80

TH-THD

Tc (2)

INPUT SIGNAL TIMING DIAGRAM

DE

DCLK

DE

DATA

TC

HD

T

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6.2 POWER ON/OFF SEQUENCE

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Doc No.: 44082401

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Model No.: N141C6 - L01

Preliminary

Power Supply

for LCD, Vcc

- LVDS Interface

- Power for Light Bar

Timing Specifications:

0.5< t1 Љ 10 msec

0 < t2 Љ 50 msec

0 < t3 Љ 50 msec

0V

0V

Power On

90%

10%

t1

Power Off

90%

Valid Data

t6 t5

50%

ONOFF OFF

Restart

t7

10%

t4

t3 t2

10%

t4 Њ 500 msec

t5 Њ 200 msec

t6 Њ 200 msec

Note (1) Please follow the power on/off sequence described above. Otherwise, the LCD module might be

damaged.

Note (2) Please avoid floating state of interface signal at invalid period. When the interface signal is invalid, be

sure to pull down the power supply of LCD Vcc to 0 V.

Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the

interface signal is valid. The Backlight inverter power must be turned off before the power supply

for the logic and the interface signal is invalid.

Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To

avoid this phenomenon, we suggest that the Vcc falling time is better to follow 5 t7 300 ms.ЉЉ

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Preliminary

7 OPTICAL CHARACTERISTICS

(9). . . . .!!!!!..!Γ TE

ST CONDITIONS

Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC 3.3 V
Input Signal According to typical value in “3. ELECTRICAL CHARACTERISTICS”
LED Light Bar Input Current IL (102) mA

25r2

50r10

The relative measurement methods of optical characteristics are shown in 7.2. The following items

should be measured under the test conditions described in 7.1 and stable environment shown in Note (6).

7.2 OPTICAL SPECIFICATIONS

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR 400 -- - - (2), (6)

Response Time

Average Luminance of White L

White Variation

Color Gamut C.G 42 45 % (6),(7)

Red

Color
Chromaticity

Viewing Angle

Green

Blue

White

Horizontal

Vertical

TR - 5 10 ms

- 11 16 ms

T

F

250 300 - cd/m2(4), (6)

AVE

GW5p

GW13p

T

=0q, TY =0q

x

Rx

Ry
Gx
Gy

Bx

By
Wx 0.313 -

Wy

Tx+

T

-

x

TY+

-

T

Y

Viewing Normal

Angle

CRt10

- - 20 %

35 %

0.580

0.340

0.310

TBD

0.550

0.155

0.155

0.329

40 45 ­40 45 ­15 20 ­40 45 -

TBD

o

C

%RH

-

-

-

-

-

-

-

Deg.

(3)

(5),(6)

(1), (6)

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.67 ms

Note (1) Definition of Viewing Angle (Tx, Ty):

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Preliminary

TX- = 90º

x-

6 o’clock

T

y- = 90º

y-

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) = L63 / L0

Normal

Tx = Ty = 0º

Ty- Ty

Tx

Tx

12 o’clock direction

y+

T

y+ = 90º

x+

TX+ = 90º

L63: Luminance of gray level 63

L 0: Luminance of gray level 0

CR = CR (5)

CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (5).

Note (3) Definition of Response Time (T

100%

90%

Optical

Response

10%

0%

R

T

R

66.67 ms

, TF):

66

Time

T

F

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Note (4) Definition of Average Luminance of White (L

Measure the luminance of gray level 63 at 5 points

L

= [L (33)+ L (37)+ L (55)+ L (73)+ L (77)] / 5

AVE

L (x) is corresponding to the luminance of the point X at Figure in Note (5)

Note (5) Definition of White Variation (GW

Measure the luminance of gray level 63 at 5, 13 points

GW

={1-{ Minimum [L (33)+ L (37)+ L (55)+ L (73)+ L (77)] / Maximum [L (33)+ L (37)+ L (55)+ L

5p

(73)+ L (77)]}} *100%

GW

={1-{ Minimum [L (11) ~ L (99)] / Maximum [L (11) ~ L (99)]}} *100%

13p

5p

, GW

13p

):

AVE

):

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500

Note (6) Measurement Setup:

The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt

temperature change during measuring. In order to stabilize the luminance, the measurement

should be executed after lighting Backlight for 20 minutes in a windless room.

LCD Module

LCD Panel

USB2000

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Model No.: N141C6 - L01

Preliminary

CS-1000T

Center of the Screen

Note (7) Definition of color gamut (C.G):

C.G= R G B / RΓΓ

R

R, G, B

RΓ

, G0, B0 : color coordinates of red, green, and blue defined by NTSC, respectively.

0

: color coordinates of module on 63 gray levels of red, green, and blue, respectively.

0 G0 B0

: area of triangle defined by R0, G0, B0

0 G0 B0

 R G B: area of triangle defined by R, G, BΓ

,*100%

˃ˁˌ

˃ˁˋ

˃ˁˊ

˃ˁˉ

˃ˁˈ

˃ˁˇ

˃ˁˆ

˃ˁ˅

˃ˁ˄

˃

˃ ˃ˁ˅ ˃ˁˇ ˃ˁˉ ˃ˁˋ

B

mm

G

0

0

G

B

˖˜˘ ʳ˄ˌ ˆ˄

Light Shield Room

(Ambient Luminance < 2 lux)

R

0

R

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8 PRECAUTIONS

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

(1) The module should be assembled into the system firmly by using every mounting hole. Be

careful not to twist or bend the module.

(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause

electrical short or damage the polarizer.

(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and

assembly process.

(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is

very soft and easily scratched.

(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use

Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might

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permanently damage the polarizer due to chemical reaction.

(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel for

a long time.

(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In

case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.

(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.

(9) Do not disassemble the module.

(10) Do not pull or fold the lamp wire.

(11) Pins of I/F connector should not be touched directly with bare hands.

(12) To avoid wireless noise interference, please keep the antenna away from LCD control board.

8.2 SAFETY PRECAUTIONS

(1) High temperature or humidity may reduce the performance of module. Please store LCD module within

the specified storage conditions.

(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may

damage LCD module when it is operating.

(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the

response time will become slowly, and the starting voltage of lamp will be higher than the room

temperature.

8.3 OPERATION PRECAUTIONS

(1) Do not pull the I/F connector in or out while the module is operating.

(2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This

can prevent the CMOS LSI chips from damage during latch-up.

(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while

assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.

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9 PACKAGING

9.1 CARTON

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Figure. 9-1 Packing method

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9.2 PALLET

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Preliminary

Figure. 9-2 Packing method

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10 DEFINITION OF LABELS

10.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

(a) Model Name: N141C6 - L01

(b) Revision: Rev. XX, for example: A1, …, C1, C2 …etc.

(c) Serial ID: X X

(d) Production Location: MADE IN XXXX. XXXX stands for production location.

(e) UL/CB logo: “LEOO” especially stands for panel manufactured by CMO Ningbo satisfying UL/CB

requirement. “LEOO” is the CMO’s UL factory code for Ningbo factory.

Serial ID includes the information as below:

(a) Manufactured Date: Year: 1~9, for 2001~2009

(b) Revision Code: cover all the change

(c) Serial No.: Manufacturing sequence of product

Dell PPID label contains information as below:

X X X X X Y M D X N N N N

Month: 1~9, A~C, for Jan. ~ Dec.

Day: 1~9, A~Y, for 1

st

Serial No.

CMO Internal Use

Year, Month, Date

CMO Internal Use

Revision

CMO Internal Use

to 31st, exclude I , O and U

(a) Serial ID: TW-0SSSSS-70896-YMD-XXXX

(b) Production location: Made in XXXX.

(c)Revision code: X00, X10, X20, A00..etc.

28 / 31

Serial Numbers

Production Year, Month, Date
Manufacturing ID

Part Number

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10.2 CMO CARTON LABEL

(a) Production location: Made In XXXX. XXXX stands for production location.

10.3 CARTON LABEL

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Preliminary

PKG ID (3S)124161241729112345609886C20

DP/N 03J849

BOX Qty 20 Made in Taiwan

REV.A06

Vendor ID Loc Id

12416 12416

Mfg Id
70896

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10.4 PALLET LABEL

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Model No.: N141C6 - L01

Preliminary

FROM :CMO Corporation

Tainan,
Taiwan 744 R.O.C

P.O.NUMBER

12345678

COUNTRY OF ORIGIN

TW

PACKING LIST QTY
654321

DESTINATION LOCATION

B4

PKG CNT
999 OF 999 12345

PART DESCRIPTION XXXXXXXXXXXXXXXXXXXXXXXXX

12345678901234567890123456789012345678901

BOX CNT REVISION

TO:DELL COMPUTER

DESTINATION MAS LOC

12345678901234567890

A00-00 Apr 29,2003

2128 West Braker
Austin TX

DELL P/N

12345

PACKING LIST#
1234567890123

60

AIRBILL NUMBER

SHIP DATE

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