CMO N141C3-L05 Specification

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Doc No.: 4407Y311

Issued Date: Nov 16, 2007

Model No.: N141C3 - L05

Approval

- CONTENTS -

REVISION HISTORY ------------------------------------------------------- 3

1. GENERAL DESCRIPTION

1.1 OVERVIEW

1.2 FEATURES

1.3 APPLICATION

1.4 GENERAL SPECIFICATIONS

1.5 MECHANICAL SPECIFICATIONS

------------------------------------------------------- X4X

2. ABSOLUTE MAXIMUM RATINGS ------------------------------------------------------- X5X

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

2.2.2 BACKLIGHT UNIT

3. ELECTRICAL CHARACTERISTICS ------------------------------------------------------- 7

3.1 TFT LCD MODULE

3.2 BACKLIGHT UNIT

4. BLOCK DIAGRAM ------------------------------------------------------- X11X

4.1 TFT LCD MODULE

4.2 BACKLIGHT UNIT

5. INPUT TERMINAL PIN ASSIGNMENT ------------------------------------------------------- X12X

5.1 TFT LCD MODULE

5.2 BACKLIGHT UNIT

5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL

5.4 COLOR DATA INPUT ASSIGNMENT

5.5 EDID DATA STRUCTURE

6. INTERFACE TIMING ------------------------------------------------------- X18X

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

6.2 POWER ON/OFF SEQUENCE

7. OPTICAL CHARACTERISTICS ------------------------------------------------------- X20X

7.1 TEST CONDITIONS

7.2 OPTICAL SPECIFICATIONS

8. PRECAUTIONS ------------------------------------------------------- X24X

8.1 HANDLING PRECAUTIONS

8.2 STORAGE PRECAUTIONS

8.3 OPERATION PRECAUTIONS

9. PACKING ------------------------------------------------------- X25X

9.1 CARTON

9.2 PALLET

10. DEFINITION OF LABELS

10.1 CMO MODULE LABEL

10.2 CMO CARTON LABE

------------------------------------------------------- X27X

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Doc No.: 4407Y311

Issued Date: Nov 16, 2007

Model No.: N141C3 - L05

Approval

UREVISION HISTORY

Version Date

3.0

3.1

Nov 07,’07

Nov 16,07

Page

(New)

All

25, 27

Section Description

All

Approval specification was first issued.

9, 10

Revise the description of Packing method & label

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1 GENERAL DESCRIPTION

1.1 OVERVIEW

N141C3 - L05 is a 14.1” TFT Liquid Crystal Display module with single CCFL Backlight unit and 30 pins

LVDS interface. This module supports 1440 x (3 RGB) x 900 WXGA+ mode and can display 262,144 colors.

The optimum viewing angle is at 6 o’clock direction. The inverter module for backlight is not built in.

1.2 FEATURES

- Thin and Light Weight

- WXGA+ (1440 x 900 pixels) resolution

- DE only mode

- 3.3V LVDS (Low Voltage Differential Signaling) interface with 2 pixel/clock

- RoHS compliance

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Doc No.: 4407Y311

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Model No.: N141C3 - L05

Approval

- Auto Recovery function

1.3 APPLICATION

- TFT LCD Notebook

1.4 GENERAL SPECIFICATI0NS

Item Specification Unit Note
Active Area 303.48(H) X 189.675(V) (14.1 inch Diagonal) mm
Bezel Opening Area 306.76 (H) x 193.0 (V) mm
Driver Element a-si TFT active matrix - ­Pixel Number 1440 x R.G.B. x 900 pixel ­Pixel Pitch 0.21075 (H) x 0.21075 (V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 262,144 color ­Transmissive Mode Normally white - ­Surface Treatment Anti-glare and Hard Coat , Haze 42, (3H min.) - -

1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal(H) 319 319.5 320 mm

Module Size

Vertical(V) 205 205.5 206 mm
Depth(D) -- 5.2 5.5 mm

Weight -- 425 440 g

(1)

(1)

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions

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A

2 ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature TB
Operating Ambient Temperature TB
Shock (Non-Operating) SB
Vibration (Non-Operating) VB

Note (1) (a) 90 %RH Max. (Ta Љ 40 ºC).

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The temperature of panel display surface area should be 0 ºC Min. and 50 ºC Max..

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Doc No.: 4407Y311

Issued Date: Nov 16, 2007

Model No.: N141C3 - L05

Approval

Value

Min. Max.

B -20 +60 ºC (1)

ST

B 0 +50 ºC (1), (2)

OP

B - 210/50 G/ms (3), (5)

NOP

B - 1.5 G (4), (5)

NOP

Unit Note

Relative Humidity (%RH)

100

95

80

60

Operating Range

40

20

8

5

Storage Range

8060-20 400 20-40

Temperature (ºC)

Note (3) 1 time for ± X, ± Y, ± Z. for Condition (210G / 3ms) is half Sine Wave, Condition (50G / 18ms) is

Rectangle Wave.

Note (4) 10 ~ 500 Hz, 30 min / Cycle, 1 cycles for each X, Y, Z axis.

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid

enough so that the module would not be twisted or bent by the fixture.

The fixing condition is shown as below:

U

t Room Temperature

Side Mount Fixing Screw

LCD Module

Side Mount Fixing Screw

Stage

Gap=2mm

Bracket

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2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

Item Symbol

Power Supply Voltage VB
Logic Input Voltage VB

2.2.2 BACKLIGHT UNIT

Item Symbol

Lamp Voltage VB
Lamp Current IB
Lamp Frequency FB

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

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Doc No.: 4407Y311

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Model No.: N141C3 - L05

Value

Min. Max.

B -0.3 +4.0 V

CC

B -0.3 VBCCB+0.3 V

IN

Value

Min. Max.

B - 2.5K VB

L

B 2.0 7 mAB

L

B 45 80 KHz

L

Unit Note

Unit Note

B (1), (2)

RMS

B

RMS

Approval

(1)

(1), (2)

should be restricted to the conditions described under Normal Operating Conditions.

Note (2) Specified values are for lamp (Refer to 3.2 for further information).

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Doc No.: 4407Y311

Issued Date: Nov 16, 2007

Model No.: N141C3 - L05

3 ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE Ta = 25 ± 2 ºC

Parameter Symbol

Min. Typ. Max.
Power Supply Voltage Vcc 3.0 3.3 3.6 V ­Permissive Ripple Voltage VB
Rush Current IB
Initial Stage Current IB

White - 380 430 mA (3)

Power Supply Current

Black
Win XP 400 440 mA (3)
1H2V

LVDS Differential Input High Threshold VB

LVDS Differential Input Low Threshold VB

LVDS Common Mode Voltage VB
LVDS Differential Input Voltage |VB
Terminating Resistor RB
Power per EBL WG PB

B - 50 - mV -

RP

B - - 1.5 A (2)

RUSH

B - - 1.0 A (2)

IS

Icc

Icc

B - - +100 mV

TH(LVDS)

B -100 - - mV

TL(LVDS)

B 1.125 - 1.375 V (5)

CM

B| 100 - 600 mV (5)

ID

B - 100 - Ohm -

T

B - 3.69 - W (4)

EBL

- 465 510 mA (3)

490 mA (3)

Note (1) The ambient temperature is Ta = 25 ± 2 ºC.

Value

Unit Note

Approval

(5),

B

B=1.2V

V

CM

(5)

B

B=1.2V

V

CM

Note (2) I

B

B: the maximum current when VCC is rising

RUSH

I

B

B: the maximum current of the first 100ms after power-on

IS

Measurement Conditions: Shown as the following figure. Test pattern: black.

(High to Low)

(Control Signal)

SW

+12V

+3.3V

R1

47K

R2

1K

47K

VR1

C1

1uF

UVcc rising time is 470us

Q1 2SK1475

C2

0.01uF

Q2

2SK1470

+3.3V

FUSE

C3

1uF

VCC

Vcc

(LCD Module Input)

100ms

BISB

I

0V

IB

RUSH

470us

0.1Vcc

B

ICC

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|

|

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Doc No.: 4407Y311

Issued Date: Nov 16, 2007

Model No.: N141C3 - L05

Approval

Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, fB

B = 60

v

Hz, whereas a power dissipation check pattern below is displayed.

Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input

power. Test conditions are as follows.

(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f

B

B = 60 Hz,

v

(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file

“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.

(c) Luminance: 60 nits.

(d) The inverter used is provided from

USumida (www.sumida.com.tw)U. Please contact Sumida for detail

information. CMO doesn’t provide the inverter in this product.

Note (5) The parameters of LVDS signals are defined as the following figures.

CM

V

VID

Single Ended

Differential

0V

VB

0V

VB

B

VID

B

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Doc No.: 4407Y311

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Model No.: N141C3 - L05

3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC

Parameter Symbol

Lamp Input Voltage VB
Lamp Current IB

B 612 680 748 VB

L

B 2.0 6.0 7 mAB

L

Min. Typ. Max.

Lamp Turn On Voltage Vs - - 1400 (0 P
Operating Frequency FB
Lamp Life Time LB
Power Consumption PB

B 45 - 80 KHz (3)

L

B 15,000 - - Hrs (5)

BL

B - 4.08 - W (4), IBLB = 6.0 mA

L

Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:

Value

o

P

C) VB

Unit Note

B IBLB = 6.0 mA

RMS

B (1)

RMS

B (2)

RMS

Approval

HV (Pink)

LCD

LV (White)

Module

1

Inverter

2

A

Current Meter

Note (2) The voltage that must be larger than Vs should be applied to the lamp for more than 1 second

after startup. Otherwise the lamp may not be turned on.

Note (3) The lamp frequency may produce interference with horizontal synchronous frequency from the

display, and this may cause line flow on the display. In order to avoid interference, the lamp

frequency should be detached from the horizontal synchronous frequency and its harmonics as far

as possible.

Note (4) P

B

B = IBLB VB

L

B

L

Note (5) The lifetime of lamp can be defined as the time in which it continues to operate under the condition

o

Ta = 25 2

P

P

C and IB

B = 6 mArms until one of the following events occurs:

L

(a) When the brightness becomes or lower than 50% of its original value.

(b) When the effective ignition length becomesЉ 80% of its original value. (Effective ignition

length is a scope that luminance is over 70% of that at the center point.)

Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the

inverter must have specifications for the modularized lamp. The performance of the Backlight,

such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for

the lamp. All the parameters of an inverter should be carefully designed to avoid producing too

much current leakage from high voltage output of the inverter. When designing or ordering the

inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the

inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module

should be operated in the same manners when it is installed in your instrument.

The output of the inverter must have symmetrical (negative and positive) voltage waveform and

symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter

which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may

produce interface with horizontal synchronous frequency and as a result this may cause beat on the

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display. Therefore lamp frequency shall be as away possible from the horizontal synchronous

frequency and from its harmonics in order to prevent interference.

Requirements for a system inverter design, which is intended to have a better display performance, a

better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its

leakage current.

a. The asymmetry rate of the inverter waveform should be 10% below.

b. The distortion rate of the waveform should be within Ѕ2 ± 10%.

c. The ideal sine wave form shall be symmetric in positive and negative polarities.

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Doc No.: 4407Y311

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Model No.: N141C3 - L05

Approval

* Asymmetry rate:

I p

I -p

| I

B

B – I B–pB | / IB

p

* Distortion rate

I

B

B (or I B–pB) / IB

p

rms

rms

B

B * 100%

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)

4 BLOCK DIAGRAM

4.1 TFT LCD MODULE

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Doc No.: 4407Y311

Issued Date: Nov 16, 2007

Model No.: N141C3 - L05

Approval

LVDS Display

Data & Clock

Vcc

GND

DataB

EDID

CLKB

EDID

VB

B

EDID

VL

B

B

INPUT CONNECTOR

LAMP CONNECTOR

4.2 BACKLIGHT UNIT

LVDS INPUT /

TIMING CONTROLLER

DC/DC CONVERTER &

REFERENCE VOLTAGE

GENERATOR

EDID

EEPROM

SCAN DRIVER IC

TFT LCD PANEL

DATA DRIVER IC

BACKLIGHT UNIT

1 HV (Pink)

2 LV (White

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5 INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD MODULE

Pin Symbol Description Polarity Remark

1 Vss Ground
2 Vcc Power Supply +3.3 V (typical)
3 Vcc Power Supply +3.3 V (typical)
4 VB
5 NC Non-Connection
6 CLKB
7 DATAB

8 RXO0- LVDS Differential Data Input (Odd) Negative

9 RXO0+ LVDS Differential Data Input (Odd) Positive
10 Vss Ground
11 RXO1- LVDS Differential Data Input (Odd) Negative
12 RXO1+ LVDS Differential Data Input (Odd) Positive
13 Vss Ground
14 RXO2- LVDS Differential Data Input (Odd) Negative
15 RXO2+ LVDS Differential Data Input (Odd) Positive
16 Vss Ground
17 RXOC- LVDS Clock Data Input (Odd) Negative
18 RXOC+ LVDS Clock Data Input (Odd) Positive
19 Vss Ground

20 RxE0- LVDS Differential Data Input (Even) Negative
21 RxE0+ LVDS Differential Data Input (Even) Positive

22 Vss Ground
23 RxE1- LVDS Differential Data Input (Even) Negative
24 RxE1+ LVDS Differential Data Input (Even) Positive
25 Vss Ground
26 RxE2- LVDS Differential Data Input (Even) Negative
27 RxE2+ LVDS Differential Data Input (Even) Positive
28 Vss Ground
29 RXEC- LVDS Clock Data Input (Even) Negative
30 RXEC+ LVDS Clock Data Input (Even) Positive

Note (1) Connector Part No.: JAE-FI-XB30SRL-HF11

B DDC 3.3V Power

EDID

B DDC Clock

EDID

B DDC Data -

EDID

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Doc No.: 4407Y311

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Model No.: N141C3 - L05

Approval

Note (2) User’s connector Part No: JAE-FI-X30C2L

Note (3) The first pixel is odd as shown in the following figure.

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5.2 BACKLIGHT UNIT

Pin Symbol Description Color

1 HV High Voltage Pink
2 LV Ground White

Note (1) Connector Part No.: JST- BHSR-02VS-1

Note (2) User’s connector Part No.: SM02B-BHSS-1-TB

5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL

RXOC+

T/7

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Doc No.: 4407Y311

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Model No.: N141C3 - L05

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RXO2+/-

RXO1+/-

RXO0+/-

RXEC+

RXE2+/-

RXE1+/-

RXE0+/-

IN20 IN19 IN18 IN17 IN16 IN15 IN14

DE OB5 OB4 OB3 OB2 Vsync Hsync

IN13 IN12 IN11 IN10 IN9 IN8 IN7

OB1 OG4 OG3 OG2 OG1 OB0 OG5

IN6 IN5 IN4 IN3 IN2 IN1 IN0

OG0 OR3 OR2 OR1 OR0 OR5 OR4

Signal for 1 DCLK Cycle (T)

T/7

IN20 IN19 IN18 IN17 IN16 IN15 IN14

DE EB5 EB4 EB3 EB2 Vsync Hsync

IN13 IN12 IN11 IN10 IN9 IN8 IN7

EB1 EG4 EG3 EG2 EG1 EB0 EG5

IN6 IN5 IN4 IN3 IN2 IN1 IN0

EG0 ER3 ER2 ER1 ER0 ER5 ER4

Signal for 1 DCLK Cycle (T)

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5.4 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for

the color. The higher the binary input, the brighter the color. The table below provides the assignment of

color versus data input.

Color

R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black
Red
Green

Basic
Colors

Gray
Scale
Of
Red

Gray
Scale
Of
Green

Gray
Scale
Of
Blue

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Blue
Cyan
Magenta
Yellow
White
Red(0)/Dark
Red(1)
Red(2)

:

:
Red(61)
Red(62)
Red(63)
Green(0)/Dark
Green(1)
Green(2)

:

:
Green(61)
Green(62)
Green(63)
Blue(0)/Dark
Blue(1)
Blue(2)

:

:
Blue(61)
Blue(62)
Blue(63)

0

0

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

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Doc No.: 4407Y311

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Model No.: N141C3 - L05

Approval

Data Signal

Red Green Blue

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

0

0

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

1

1

0

1

0

0

0

0

0

0

0

0

1

1

1

0

0

0

0

0

0

0

0

0

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

1

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

0

0

0

1

1

1

1

0

1

0

0

0

0

0

0

1

1

1

1

1

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

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0

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0

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0

1

1

0

0

0

0

0

0

0

0

0

0

1

1

0

0

0

0

0

0

0

0

0

0

1

1

1

1
1
1
0
1
0
0
0

:

:
0
0
0
0
0
0

:

:
0
0
0
0
0
0

:

:
1
1
1

1

1

1

1

1

1

1

1

0

0

0

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

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0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

1

0

:

:

:

:

:

:

1

0

1

1

1

0

1

1

1

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5.5 EDID DATA STRUCTURE

The EDID (Extended Display Identification Data) data formats are to support displays as defined in the

VESA Plug & Display and FPDI standards.

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Doc No.: 4407Y311

Issued Date: Nov 16, 2007

Model No.: N141C3 - L05

Approval

Byte

ʳ

(hex) Field Name and Comments

0 0 Header , Fixed 00 00000000
1 1 Header , Fixed FF 11111111
2 2 Header , Fixed FF 11111111
3 3 Header , Fixed FF 11111111
4 4 Header , Fixed FF 11111111
5 5 Header , Fixed FF 11111111
6 6 Header , Fixed FF 11111111
7 7 Header , Fixed 00 00000000
8 8 ID=Lenovo 30 00110000

9 9 ID=Lenovo AE 10101110
10 0A XGA ( Lenovo Unique ID) 33 00110011
11 0B XGA ( Lenovo Unique ID) 40 01000000
12 0C 32-bit serial # Unused(01h for VESA, 00h for SPWG) 00 00000000
13 0D 32-bit serial # Unused(01h for VESA, 00h for SPWG) 00 00000000
14 0E 32-bit serial # Unused(01h for VESA, 00h for SPWG) 00 00000000
15 0F 32-bit serial # Unused(01h for VESA, 00h for SPWG) 00 00000000
16 10 Week of manufacture 1 - 53 (unused: 00h) : 02h fixed by CMO 28 00101000

Year of manufacture year - 1990(unsed:00h) : 0Dh (Year 2003)

17 11
18 12 Version=1 01 00000001
19 13 Revision=3 03 00000011
20 14 Digital 80 10000000
21 15 Active area horizontal 30.348cm 1E 00011110
22 16 Active area vertical 18.9675cm 13 00010011
23 17 gamma * 100-100 = 2.2*100-100=120 78 01111000

24 18
25 19 Rx1 Rx0 Ry1 Ry0 Gx1 Gx0 Gy1 Gy0 0E 00001110
26 1A Bx1 Bx0 By1 By0 Wx1 Wx0 Wy1 Wy0 05 00000101
27 1B Rx=0.590 97 10010111
28 1C Ry=0.340 57 01010111
29 1D Gx=0.319 51 01010001
30 1E Gy=0.541 8A 10001010
31 1F Bx=0.152 27 00100111
32 20 By=0.125 20 00100000
33 21 Wx=0.313 50 01010000
34 22 Wy=0.329 54 01010100
35 23 Established timings 1 00 00000000
36 24 Established timings 2 (1440x900@60Hz) 00 00000000
37 25 No manufacturer's specific timing 00 00000000
38 26 Standard timing ID # 1 01 00000001
39 27 Standard timing ID # 1 01 00000001
40 28 Standard timing ID # 2 01 00000001
41 29 Standard timing ID # 2 01 00000001

fixed by CMO

Feature support (no DPMS, Active off, RGB, Preferred Timing
Mode)

Value

(hex)

11 00010001

EA 11101010

Value

(binary)

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42 2A Standard timing ID # 3 01 00000001
43 2B Standard timing ID # 3 01 00000001
44 2C Standard timing ID # 4 01 00000001
45 2D Standard timing ID # 4 01 00000001
46 2E Standard timing ID # 5 01 00000001
47 2F Standard timing ID # 5 01 00000001
48 30 Standard timing ID # 6 01 00000001
49 31 Standard timing ID # 6 01 00000001
50 32 Standard timing ID # 7 01 00000001
51 33 Standard timing ID # 7 01 00000001
52 34 Standard timing ID # 8 01 00000001
53 35 Standard timing ID # 8 01 00000001

Detailed timing description # 1 Pixel clock (“96.5MHz”, According

54 36
55 37 96.5MHz/10000 =9650=25B2H 25 00100101
56 38 HActive(D7-D0) = 1440 mod 256 A0 10100000
57 39 HBlank(D7-D0) = 266 mod 256 0A 00001010
58 3A HActive(D11-D8) : HBlank(D11-D8) = 1440/256 : 266/256 51 01010001
59 3B VActive(D7-D0) = 900 mod 256 84 10000100
60 3C VBlank(D7-D0) = 43 mod 256 2B 00101011
61 3D VActive(D11-D8) : VBlank(D11-D8) = 900/256 : 43/256 30 00110000
62 3E HSyncOffset(D7-D0) = HBorder+HFrontPorch = 82 52 01010010
63 3F HSyncWidth(D7-D0) = 54 36 00110110
64 40 VSyncOffset(D3-D0)=5 : VSyncWidth(D3-D0)=9 59 01011001

65 41
66 42 HImageSize(mm, D7-D0) = 303mod 256 2F 00101111
67 43 VImageSize(mm, D7-D0) = 190mod 256 BE 10111110

68 44
69 45 Horizontal Border=0 00 00000000
70 46 Vertical Border=0 00 00000000

71 47

72 48
73 49 80.44MHz/10000 =8044=1F6CH 1F 00011111
74 4A Horizontal Active =1440 mod 256 A0 10100000

to VESA CVT Rev1.1) B2 10110010

HSyncOffset(D9-D8) : HSyncWidth(D9-D8) :
VSyncOffset(D5-D4) : VSyncWidth(D5-D4) 00 00000000

HImageSize(D11-D8) : VImageSize(D11-D8) = 303/256 :
190/256

Non-interlaced, Normal Display, Digital separate, Positive Hsync,
Negative Vsync
Detailed timing description # 1 Pixel clock (“80.44MHz”,
According to VESA CVT Rev1.1)

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Doc No.: 4407Y311

Issued Date: Nov 16, 2007

Model No.: N141C3 - L05

Approval

10 00010000

18 00011000

6C 01101100

75 4B Horizontal Blanking =266 mod 256 0A 00001010
76 4C HActive(D11-D8) : HBlank(D11-D8) = 1440/256 : 266/256 51 01010001
77 4D Vertical Avtive =900 mod 256 84 10000100
78 4E Vertical Blanking =43 mod 256 2B 00101011
79 4F VActive(D11-D8) : VBlank(D11-D8) = 900/256 : 43/256 30 00110000
80 50 Horizontal Sync. Offset =82 52 01010010
81 51 Horizontal Sync Pulse Width =54 36 00110110
82 52 VSyncOffset(D3-D0)=5 : VSyncWidth(D3-D0)=9 59 01011001
83 53 Horizontal Vertical Sync Offset/Width upper 2bits = 0 00 00000000
84 54 HImageSize(mm, D7-D0) = 303mod 256 2F 00101111
85 55 VImageSize(mm, D7-D0) = 190mod 256 BE 10111110

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HImageSize(D11-D8) : VImageSize(D11-D8) = 303/256 :

86 56
87 57 Horizontal Border=0 00 00000000
88 58 Vertical Border=0 00 00000000

89 59
90 5A Flag 00 00000000
91 5B Flag 00 00000000
92 5C Flag 00 00000000
93 5D Data type tag :0F 0F 00001111
94 5E Flag 00 00000000
95 5F Low Refresh Rate #1 (Horizontal active pixels / 8 ) - 31=95 95 10010101
96 60 Low Refresh Rate #1 Image Aspect ratio(16 : 10) 0A 00001010
97 61 Low Refresh Rate #1 Refresh Rate=50Hz 32 00110010
98 62 Low Refresh Rate #2 (Horizontal active pixels / 8 ) - 31=95 95 10010101
99 63 Low Refresh Rate #2 Image Aspect ratio(16 : 10) 0A 00001010

100 64 Low Refresh Rate #2 Refresh Rate=40Hz 28 00101000
101 65 Brightness (1/10nit) , 200/10=20(=14h) 14 00010100
102 66 Feature Flags 01 00000001
103 67 Reserved 00 00000000
104 68 EISA manufacturer code(3 Character ID) -CMO 0D 00001101
105 69 Compressed ASCII AF 10101111
106 6A Panel Supplier Reserved - Product code -1434 34 00110100
107 6B (Hex, LSB first) 14 00010100
108 6C Flag 00 00000000
109 6D Flag 00 00000000
110 6E Flag 00 00000000

190/256

Non-interlaced,Normal display,no stereo,Digital separate
sync,H/V pol negatives 18 00011000

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Doc No.: 4407Y311

Issued Date: Nov 16, 2007

Model No.: N141C3 - L05

Approval

10 00010000

111 6F Data type tag : Feh FE 11111110
112 70 Flag 00 00000000
113 71 "N" 4E 01001110
114 72 "1" 31 00110001
115 73 "4" 34 00110100
116 74 "1" 31 00110001
117 75 "C" 43 01000011
118 76 "3" 33 00110011
119 77 "-" 2D 00101101
120 78 "L" 4C 01001100
121 79 "0" 30 00110000
122 7A "5" 35 00110101

(If <13 char, then terminate with ASCII code 0Ah, set remaining

123 7B

124 7C

125 7D
126 7E No extension 00 00000000
127 7F One-byte checksum of entire 128 bytes EDID equals 00h.

char = 20h)
(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)
(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h) 20 00100000

0A 00001010

20 00100000

4C

01001100

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6 INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

The specifications of input signal timing are as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

DCLK Frequency 1/Tc 25 44.5 60 MHz (2)(3)

Vertical Total Time TV 910 926 1500 TH -

Vertical Active Display Period TVD 900 900 900 TH -

DE

Note (1) Because this module is operated by DE only mode, Hsync and Vsync are ignored.

(2) 2 channels LVDS input.

(3) The module can be operated at 40Hz refresh rate. However, there might be some side effect like

Vertical Active Blanking Period TVB TV-TVD 26 TV-TVD TH

Horizontal Total Time TH 760 800 880 Tc (2)

Horizontal Active Display Period THD 720 720 720 Tc (2)

Horizontal Active Blanking Period THB

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TH-THD

80

Doc No.: 4407Y311

Issued Date: Nov 16, 2007

Model No.: N141C3 - L05

Approval

TH-THD

Tc (2)

flicker, brightness change or etc.

UINPUT SIGNAL TIMING DIAGRAM

DE

DCLK

TC

DE

DATA

HD

T

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6.2 POWER ON/OFF SEQUENCE

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Doc No.: 4407Y311

Issued Date: Nov 16, 2007

Model No.: N141C3 - L05

Approval

Power Supply

for LCD, Vcc

0V

- LVDS Interface

0V

- Power for Lamp

Timing Specifications:

t1 Љ 10 msec

0 < t2 Љ 50 msec

0 < t3 msec

t4 Њ 150 msec

t5 Њ 200 msec

UPower On

90%

10%

10%

URestart

10%

t4

UPower Off

t7

90%

t1

t3t2

Valid Data

t6t5

50%50%

ONOFF OFF

t6 Њ 0 msec

t7 Љ10 msec

Note (1) Please follow the power on/off sequence described above. Otherwise, the LCD module might be

damaged.

Note (2) Please avoid floating state of interface signal at invalid period. When the interface signal is invalid, be

sure to pull down the power supply of LCD Vcc to 0 V.

Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the

interface signal is valid. The Backlight inverter power must be turned off before the power supply

for the logic and the interface signal is invalid.

Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To

avoid this phenomenon, we suggest that the Vcc falling time is better to follow 5Љt7Љ300 ms.

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7 OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VB
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Inverter Current IB
Inverter Driving Frequency FB
Inverter Sumida H05-4915

The relative measurement methods of optical characteristics are shown in 7.2. The following items

should be measured under the test conditions described in 7.1 and stable environment shown in Note (6).

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Doc No.: 4407Y311

Issued Date: Nov 16, 2007

Model No.: N141C3 - L05

Approval

PoP

25r2

50r10

B 3.3 V

CC

B 6.0 mA

L

B 61 KHz

L

C

%RH

7.2 OPTICAL SPECIFICATIONS

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR 200 300 - - (2), (6)

TB

B - 5 10 ms

Response Time

Average Luminance of White LB

White Variation

Red

Green

Color
Chromaticity

Blue

White

Horizontal

Viewing Angle

Vertical

R

B

B - 11 16 ms

T

F

B 170 200 - cd/mP

AVE

5pts 80% - - - (5)

GW

2

P

13pts 60% - - - (5)
Rx
Ry
Gx
Gy
Bx
By

Wx

Wy

TB

B+

x

T

B

x

TB

Y

T

B

Y

T

B

B=0q, TBYB =0q

x

Viewing Normal

Angle

TYP

-0.03

TYP

-0.028
TYP

-0.02

B­B+

B-

CRt10

0.586

0.336

0.319

0.535

TYP

+0.03

0.152

0.125

0.313

0.329

TYP

+0.028

TYP

+0.02
40 45 ­40 45 ­15 20 ­40 45 -

-

-

-

-

-

-

-

-

Deg.

(3)

(4), (6)

(1), (6)

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.67 ms

Note (1) Definition of Viewing Angle (Tx, Ty):

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Doc No.: 4407Y311

Issued Date: Nov 16, 2007

Model No.: N141C3 - L05

Approval

Normal

Tx = Ty = 0º

Ty- Ty

TX- = 90º

6 o’clock

T

y- = 90º

x-

y-

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) = L63 / L0

L63: Luminance of gray level 63

L 0: Luminance of gray level 0

CR = CR (1)

CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (5).

Tx

Tx

y+

12 o’clock direction

T

y+ = 90º

x+

TX+ = 90º

Note (3) Definition of Response Time (T

100%

90%

Optical

Response

10%

0%

T

BRB

66.67 ms

B

B, TBFB):

R

66

Time

T

BFB

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Doc No.: 4407Y311

Issued Date: Nov 16, 2007

Model No.: N141C3 - L05

Approval

Note (4) Definition of Average Luminance of White (LB

Measure the luminance of gray level 63 at 5 points

L

B

B = [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5

AVE

L (x) is corresponding to the luminance of the point X at Figure in Note (5)

Note (5) Definition of White Variation (GW):

Measure the luminance of gray level 63 at 5 & 13 points

GW (5pt) = Minimum [L (1), L (2), L (3), L (4), L (5)] / Maximum [L (1), L (2), L (3), L (4), L (5)]

GW (13pt) = Minimum [L (1), L (2), L (3), L (4), L (5), L (6), L (7), L (8), L (9), L (10), L (11), L (12), L (13)]

/ Maximum [L (1), L (2), L (3), L (4), L (5), L (6), L (7), L (8), L (9), L (10), L (11), L (12), L (13)]

AVE

B):

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500

Note (6) Measurement Setup:

The LCD module should be stabilized at given temperature for 15 minutes to avoid abrupt

temperature change during measuring. In order to stabilize the luminance, the measurement

should be executed after lighting Backlight for 15 minutes in a windless room.

LCD Module

LCD Panel

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Doc No.: 4407Y311

Issued Date: Nov 16, 2007

Model No.: N141C3 - L05

Approval

USB2000

Center of the Screen

mm

CS-1000T

Light Shield Room

(Ambient Luminance < 2 lux)

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8 PRECAUTIONS

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

(1) The module should be assembled into the system firmly by using every mounting hole. Be

careful not to twist or bend the module.

(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause

electrical short or damage the polarizer.

(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and

assembly process.

(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is

very soft and easily scratched.

(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use

Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might

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Doc No.: 4407Y311

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Model No.: N141C3 - L05

Approval

permanently damage the polarizer due to chemical reaction.

(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel for

a long time.

(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In

case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.

(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.

(9) Do not disassemble the module.

(10) Do not pull or fold the lamp wire.

(11) Pins of I/F connector should not be touched directly with bare hands.

8.2 SAFETY PRECAUTIONS

(1) High temperature or humidity may reduce the performance of module. Please store LCD module within

the specified storage conditions.

(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may

damage LCD module when it is operating.

(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the

response time will become slowly, and the starting voltage of lamp will be higher than the room

temperature.

8.3 OPERATION PRECAUTIONS

(1) Do not pull the I/F connector in or out while the module is operating.

(2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This

can prevent the CMOS LSI chips from damage during latch-up.

(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while

assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.

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9 PACKAGING

9.1 CARTON

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Doc No.: 4407Y311

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Model No.: N141C3 - L05

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Figure. 9-1 Packing method

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9.2 QBMMFU

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Doc No.: 4407Y311

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Model No.: N141C3 - L05

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Figure. 9-2 Packing method

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10 DEFINITION OF LABELS

10.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

11S42T0452Z1ZDSFSSSSSS 601

(a) Model Name: N141C3 - L05

(b) Revision: Rev. XX, for example: A1, …, C1, C2 …etc.

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Doc No.: 4407Y311

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Model No.: N141C3 - L05

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P/N 42T0452
FRU42T0453
RoHS

(c) Serial ID:

UX XU UX XU UX X XU UY M DU UXU UN N N N

Serial No.

CMO Internal Use

Year, Month, Date

CMO Internal Use

Revision

CMO Internal Use

(d)UL/CB logo: LEOO especially stands for panel manufactured by CMO NingBo satisfying UL/CB

requirement.

Serial ID includes the information as below:

(a) Manufactured Date: Year: 1~9, for 2001~2009

Month: 1~9, A~C, for Jan. ~ Dec.

Day: 1~9, A~Y, for 1

st

P

st

P

P

to 31P

, exclude I , O and U

(b) Revision Code: cover all the change

(c) Serial No.: Manufacturing sequence of product

For Lenovo’s barcode content

11S PPPPPPP Z1Z HHH SSSSSS YMM

(a) 11S: Fixed characters.

(b) PPPPPPP (P/N): Customer part number 42T0452, fixed characters

(c) Z1Z: Fixed characters.

(d) HHH (Header Code): DSF

(e) SSSSSS: Series number.

(f) YMM: Y: The last character of year. MM: Month

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10.2 CMO CARTON LABEL

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Doc No.: 4407Y311

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Model No.: N141C3 - L05

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P/N 42T0452

N141C3-L05

20

06/04

Made in China

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