CMO N141C3-L02 Specification

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TFT LCD Approval Specification

MODEL NO.: N141C3 - L02

www.panelook.com

Doc No.: 1406X168

Issued Date: Apr. 18, 2007

Model No.: N141C3 - L02

Approval

Customer:

Approved by:

Note:



2007-05-04
10:53:39 CST





Approve by
Dept. Mgr.(QA
RA)



yuan_chan(᎓ঊෘ/52760/54760)



Department
Manager(QA RA)



Accept



2007-05-04
10:32:46 CST

2007-05-04
09:23:25 CST

2007-05-03
19:46:13 CST

Approve by
Director

Approve by
Director

Approve by
Director

tomy_chen(ຫةԫ
/52720/54140/43150)

wy_li(ޕޫ/44701)

kf_huang(႓഼୽
/56620/54380/14906/25075)



Director Accept

Director Accept

Director Accept

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- CONTENTS -

REVISION HISTORY

1. GENERAL DESCRIPTION

1.1 OVERVIEW

1.2 FEATURES

1.3 APPLICATION

1.4 GENERAL SPECIFICATIONS

1.5 MECHANICAL SPECIFICATIONS

2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

2.2.2 BACKLIGHT UNIT

3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE

3.2 BACKLIGHT UNIT

4. BLOCK DIAGRAM

4.1 TFT LCD MODULE

4.2 BACKLIGHT UNIT

5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD MODULE

5.2 BACKLIGHT UNIT

5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL

5.4 COLOR DATA INPUT ASSIGNMENT

5.5 EDID DATA STRUCTURE

6. INTERFACE TIMING
6

.1 INPUT SIGNAL TIMING SPECIFICATIONS

6.2 POWER ON/OFF SEQUENCE

7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

7.2 OPTICAL SPECIFICATIONS

8. PRECAUTIONS

8.1 HANDLING PRECAUTIONS

8.2 STORAGE PRECAUTIONS

8.3 OPERATION PRECAUTIONS

9. PACKING

9.1 CARTON

9.2 PALLET

10. DEFINITION OF LABELS

10.1 CMO MODULE LABEL

10.2 CMO CARTON LABE

Doc No.: 1406X168

Issued Date: Apr. 18, 2007

Model No.: N141C3 - L02

Approval

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3

5

24

25

28

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Doc No.: 1406X168

Issued Date: Apr. 18, 2007

Model No.: N141C3 - L02

Approval

Version Date

0.0

2.0

Oct 11,’06

Apr. 18,’07

Page

(New)

All

All

REVISION HISTORY

Section Description

All

Tentative specification was first issued.

All

Approval specification was first issued.

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1 GENERAL DESCRIPTION

1.1 OVERVIEW

N141C3 - L02 is a 14.1” TFT Liquid Crystal Display module with single CCFL Backlight unit and 30 pins

LVDS interface. This module supports 1440 x (3 RGB) x 900 WXGA+ mode and can display 262,144 colors.

The optimum viewing angle is at 6 o’clock direction. The inverter module for backlight is not built in.

1.2 FEATURES

- Thin and Light Weight

- WXGA+ (1440 x 900 pixels) resolution

- DE only mode

- 3.3V LVDS (Low Voltage Differential Signaling) interface with 2 pixel/clock

- RoHS compliance

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Doc No.: 1406X168

Issued Date: Apr. 18, 2007

Model No.: N141C3 - L02

Approval

1.3 APPLICATION

- TFT LCD Notebook

1.4 GENERAL SPECIFICATI0NS

Item Specification Unit Note
Active Area 303.48(H) X 189.675(V) (14.1 inch Diagonal) mm
Bezel Opening Area 306.76 (H) x 193.0 (V) mm
Driver Element a-si TFT active matrix - ­Pixel Number 1440 x R.G.B. x 900 pixel ­Pixel Pitch 0.21075 (H) x 0.21075 (V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 262,144 color ­Transmissive Mode Normally white - ­Surface Treatment Glare and Hard Coat (3H min.) - -

1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal(H) 319 319.5 320 mm

Module Size

Vertical(V) 205 205.5 206 mm
Depth(D) -- 5.2 5.5 mm

Weight -- 425 430 g

(1)

(1)

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions

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p

2 ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 +50 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V

Note (1) (a) 90 %RH Max. (Ta Љ 40 ºC).

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The temperature of panel display surface area should be 0 ºC Min. and 60 ºC Max..

Relative Humidity (%RH)

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Doc No.: 1406X168

Issued Date: Apr. 18, 2007

Model No.: N141C3 - L02

Approval

Value

Min. Max.

- 220/2 G/ms (3), (5)

NOP

- 1.5 G (4), (5)

NOP

Unit Note

100

90

80

60

Operating Range

40

20
10

Storage Range

Temperature (ºC)

Note (3) 1 time for ± X, ± Y, ± Z. for Condition (220G / 2ms) is half Sine Wave,.

Note (4) 10 ~ 200 Hz, 30 min / Cycle, 1 cycles for each X, Y, Z axis.

8060 -20 400 20-40

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid

enough so that the module would not be twisted or bent by the fixture.

The fixing condition is shown as below:

At Room Tem

Side Mount Fixing Screw

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Bracket

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LCD Module

Side Mount Fixing Screw

Stage

Version 2.0

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2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

Item Symbol

Power Supply Voltage VCC -0.3 +4.0 V
Logic Input Voltage VIN -0.3 VCC+0.3 V

2.2.2 BACKLIGHT UNIT

Item Symbol

Lamp Voltage VL - 2.5K V
Lamp Current IL 2.0 6.5 mA
Lamp Frequency FL 45 80 KHz

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

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Value

Min. Max.

Value

Min. Max.

Unit Note

Unit Note

Doc No.: 1406X168

Issued Date: Apr. 18, 2007

Model No.: N141C3 - L02

Approval

(1)

(1), (2)

RMS

RMS

(1), (2)

Note (2) Specified values are for lamp (Refer to 3.2 for further information).

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3 ELECTRICAL CHARACTERISTICS

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Doc No.: 1406X168

Issued Date: Apr. 18, 2007

Model No.: N141C3 - L02

Approval

3.1 TFT LCD MODULE

Parameter Symbol

Ta = 25 ± 2 ºC

Value

Min. Typ. Max.

Unit Note

Power Supply Voltage Vcc 3.0 3.3 3.6 V ­Permissive Ripple Voltage VRP - 50 - mV ­Rush Current I

- - 1.5 A (2)

RUSH

Initial Stage Current IIS - - 1.0 A (2)

Power Supply Current

LVDS Differential Input High Threshold V

LVDS Differential Input Low Threshold V

White - 380 430 mA (3)a
Black

Icc

TH(LVDS)

TL(LVDS)

- 465 510 mA (3)b

- - +100 mV

-100 - - mV

V

V

(5),

=1.2V

CM

(5)

=1.2V

CM

LVDS Common Mode Voltage VCM 1.125 - 1.375 V (5)
LVDS Differential Input Voltage |VID| 100 - 600 mV (5)
Terminating Resistor RT - 100 - Ohm ­Power per EBL WG P

- 3.61 - W (4)

EBL

Note (1) The ambient temperature is Ta = 25 ± 2 ºC.

Note (2) I

: the maximum current when VCC is rising

RUSH

I

: the maximum current of the first 100ms after power-on

IS

Measurement Conditions: Shown as the following figure. Test pattern: black.

+3.3V

R1

47K

Q1 2SK1475

FUSE

C3

1uF

Vcc

(LCD Module Input)

(High to Low)

(Control Signal)

SW

+12V

C1

1uF

VR1

R2

47K

1K

0.01uF

Q2

2SK1470

C2

Vcc rising time is 470us

+3.3V

VCC

100ms

0V

I

RUSH

470us

0.1Vcc

I

IS

ICC

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|

|

|

Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, fv = 60

Hz, whereas a power dissipation check pattern below is displayed.

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Doc No.: 1406X168

Issued Date: Apr. 18, 2007

Model No.: N141C3 - L02

Approval

Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input

a. White Pattern

Active Area

power. Test conditions are as follows.

(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f

(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file

“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.

(c) Luminance: 60 nits.

(d) The inverter used is provided from Sumida (www.sumida.com.tw)

= 60 Hz,

v

b. Black Pattern

Active Area

. Please contact Sumida for detail

information. CMO doesn’t provide the inverter in this product.

Note (5) The parameters of LVDS signals are defined as the following figures.

Single Ended

Differential

CM

V

0V

V

0V

V

V

ID

VID|

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Doc No.: 1406X168

Issued Date: Apr. 18, 2007

Model No.: N141C3 - L02

Approval

3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC

Parameter Symbol

Min. Typ. Max.
Lamp Input Voltage VL 612 680 748 V
Lamp Current IL 2.0 6.0 6.5 mA

Lamp Turn On Voltage VS

- - 1370 (25

- - 1520 (0
Operating Frequency FL 45 - 80 KHz (3)
Lamp Life Time LBL 15,000 - - Hrs (5)
Power Consumption PL - 4.08 - W (4), IL = 6.0 mA

Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:

LCD

Module

HV (Pink)

LV (White)

Note (2) The voltage that must be larger than Vs should be applied to the lamp for more than 1 second

after startup. Otherwise the lamp may not be turned on.

Note (3) The lamp frequency may produce interference with horizontal synchronous frequency from the

display, and this may cause line flow on the display. In order to avoid interference, the lamp

Value

1

2

Current Meter

Unit Note

IL = 6.0 mA

RMS

(1)

o

C) V

o

C) V

RMS

(2)

RMS

(2)

RMS

Inverter

A

frequency should be detached from the horizontal synchronous frequency and its harmonics as far

as possible.

Note (4) P

= IL VL

L

Note (5) The lifetime of lamp can be defined as the time in which it continues to operate under the condition

Ta = 25 2

o

C and IL = 6 mArms until one of the following events occurs:

(a) When the brightness becomes or lower than 50% of its original value.

(b) When the effective ignition length becomes or lower than 80% of its original value. (Effective

ignition length is defined as an area that has less than 70% brightness compared to the

brightness in the center point.)

Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the

inverter must have specifications for the modularized lamp. The performance of the Backlight,

such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for

the lamp. All the parameters of an inverter should be carefully designed to avoid producing too

much current leakage from high voltage output of the inverter. When designing or ordering the

inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the

inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module

should be operated in the same manners when it is installed in your instrument.

The output of the inverter must have symmetrical (negative and positive) voltage waveform and

symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter

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which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may

produce interface with horizontal synchronous frequency and as a result this may cause beat on the

display. Therefore lamp frequency shall be as away possible from the horizontal synchronous

frequency and from its harmonics in order to prevent interference.

Requirements for a system inverter design, which is intended to have a better display performance, a

better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its

leakage current.

a. The asymmetry rate of the inverter waveform should be 10% below.

b. The distortion rate of the waveform should be within Ѕ2 ± 10%.

c. The ideal sine wave form shall be symmetric in positive and negative polarities.

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Doc No.: 1406X168

Issued Date: Apr. 18, 2007

Model No.: N141C3 - L02

Approval

* Asymmetry rate:

I p

I

-p

| I

* Distortion rate

I

– I –p | / I

p

(or I –p) / I

p

rms

rms

* 100%

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)

4 BLOCK DIAGRAM

4.1 TFT LCD MODULE

LVDS Display

Data & Clock

INPUT CONNECTOR

Vcc

GND

Data

CLK

V

EDID

EDID

EDID

VL

LAMP CONNECTOR

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LVDS INPUT /

TIMING CONTROLLER

DC/DC CONVERTER &

REFERENCE VOLTAGE

GENERATOR

EDID

EEPROM

Doc No.: 1406X168

Issued Date: Apr. 18, 2007

Model No.: N141C3 - L02

SCAN DRIVER IC

TFT LCD PANEL

DATA DRIVER IC

BACKLIGHT UNIT

Approval

4.2 BACKLIGHT UNIT

1 HV (Pink)

2 LV (White

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5 INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD MODULE

Pin Symbol Description Polarity Remark

1 Vss Ground
2 Vcc Power Supply +3.3 V (typical)
3 Vcc Power Supply +3.3 V (typical)
4 V
5 NC Non-Connection
6 CLK
7 DATA

8 RXO0- LVDS Differential Data Input (Odd) Negative

9 RXO0+ LVDS Differential Data Input (Odd) Positive
10 Vss Ground
11 RXO1- LVDS Differential Data Input (Odd) Negative
12 RXO1+ LVDS Differential Data Input (Odd) Positive
13 Vss Ground
14 RXO2- LVDS Differential Data Input (Odd) Negative
15 RXO2+ LVDS Differential Data Input (Odd) Positive
16 Vss Ground
17 RXOC- LVDS Clock Data Input (Odd) Negative
18 RXOC+ LVDS Clock Data Input (Odd) Positive
19 Vss Ground

20 RxE0- LVDS Differential Data Input (Even) Negative
21 RxE0+ LVDS Differential Data Input (Even) Positive

22 Vss Ground
23 RxE1- LVDS Differential Data Input (Even) Negative
24 RxE1+ LVDS Differential Data Input (Even) Positive
25 Vss Ground
26 RxE2- LVDS Differential Data Input (Even) Negative
27 RxE2+ LVDS Differential Data Input (Even) Positive
28 Vss Ground
29 RXEC- LVDS Clock Data Input (Even) Negative
30 RXEC+ LVDS Clock Data Input (Even) Positive

Note (1) Connector Part No.: JAE-FI-XB30SRL-HF11 or equivalent

DDC 3.3V Power

EDID

DDC Clock

EDID

DDC Data -

EDID

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Doc No.: 1406X168

Issued Date: Apr. 18, 2007

Model No.: N141C3 - L02

Approval

Note (2) User’s connector Part No: JAE-FI-X30C2L or equivalent

Note (3) The first pixel is odd as shown in the following figure.

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5.2 BACKLIGHT UNIT

Pin Symbol Description Color

1 HV High Voltage Pink
2 LV Ground White

Note (1) Connector Part No.: JST- BHSR-02VS-1 or equivalent

Note (2) User’s connector Part No.: SM02B-BHSS-1-TB or equivalent

5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL

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Doc No.: 1406X168

Issued Date: Apr. 18, 2007

Model No.: N141C3 - L02

Approval

RXOC+

RXO2+/-

RXO1+/-

RXO0+/-

RXEC+

RXE2+/-

RXE1+/-

RXE0+/-

T/7

IN20 IN19 IN18 IN17 IN16 IN15 IN14

DE OB5 OB4 OB3 OB2 Vsync Hsync

IN13 IN12 IN11 IN10 IN9 IN8 IN7

OB1 OG4 OG3 OG2 OG1 OB0 OG5

IN6 IN5 IN4 IN3 IN2 IN1 IN0

OG0 OR3 OR2 OR1 OR0 OR5 OR4

Signal for 1 DCLK Cycle (T)

T/7

IN20 IN19 IN18 IN17 IN16 IN15 IN14

DE EB5 EB4 EB3 EB2 Vsync Hsync

IN13 IN12 IN11 IN10 IN9 IN8 IN7

EB1 EG4 EG3 EG2 EG1 EB0 EG5

IN6 IN5 IN4 IN3 IN2 IN1 IN0

EG0 ER3 ER2 ER1 ER0 ER5 ER4

Signal for 1 DCLK Cycle (T)

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5.4 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for

the color. The higher the binary input, the brighter the color. The table below provides the assignment of

color versus data input.

Color

R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black
Red
Green

Basic
Colors

Gray
Scale
Of
Red

Gray
Scale
Of
Green

Gray
Scale
Of
Blue

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Blue
Cyan
Magenta
Yellow
White
Red(0)/Dark
Red(1)
Red(2)

:

:
Red(61)
Red(62)
Red(63)
Green(0)/Dark
Green(1)
Green(2)

:

:
Green(61)
Green(62)
Green(63)
Blue(0)/Dark
Blue(1)
Blue(2)

:

:
Blue(61)
Blue(62)
Blue(63)

0

0

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

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Doc No.: 1406X168

Issued Date: Apr. 18, 2007

Model No.: N141C3 - L02

Approval

Data Signal

Red Green Blue

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

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0

0

0

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1

1

1

1

1

1

1

1

1

1

1

1

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0

1

1

1

1

0

1

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

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5.5 EDID DATA STRUCTURE

The EDID (Extended Display Identification Data) data formats are to support displays as defined in the

VESA Plug & Display and FPDI standards.

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Doc No.: 1406X168

Issued Date: Apr. 18, 2007

Model No.: N141C3 - L02

Approval

Byte

ʳ

0 0 Header
1 1 Header
2 2 Header
3 3 Header
4 4 Header
5 5 Header
6 6 Header
7 7 Header
8 8 EISA ID manufacturer name (“CMO”)

9 9 EISA ID manufacturer name (Compressed ASCII)
10 0A ID product code (N141C3-L02) 31
11 0B ID product code (hex LSB first; N141C3-L02) 14
12 0C ID S/N (fixed “0”)
13 0D ID S/N (fixed “0”)
14 0E ID S/N (fixed “0”)
15 0F ID S/N (fixed “0”)
16 10 Week of manufacture (fixed week code)
17 11 Year of manufacture (fixed year code)
18 12 EDID structure version # (“1”)
19 13 EDID revision # (“3”)
20 14 Video I/P definition (“digital”)
21 15 Active area horizontal 30.348cm 1E
22 16 Active area vertical 18.9675cm 13
23 17 Display Gamma (Gamma = ”2.2”)
24 18 Feature support (“Active off, RGB Color”)
25 19 Rx1 Rx0 Ry1 Ry0 Gx1 Gx0 Gy1 Gy0 09
26 1A Bx1 Bx0 By1 By0 Wx1 Wx0 Wy1 Wy0 05
27 1B Rx=0.590
28 1C Ry=0.340
29 1D Gx=0.319
30 1E Gy=0.541
31 1F Bx=0.152
32 20 By=0.125
33 21 Wx=0.313
34 22 Wy=0.329
35 23 Established timings 1
36 24 Established timings 2
37 25 Manufacturer’s reserved timings
38 26 Standard timing ID # 1
39 27 Standard timing ID # 1
40 28 Standard timing ID # 2
41 29 Standard timing ID # 2
42 2A Standard timing ID # 3
43 2B Standard timing ID # 3

(hex) Field Name and Comments

Value

(hex)

00 00000000
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
00 00000000
0D 00001101
AF 10101111

00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
01 00000001
03 00000011
80 10000000

78 01111000
0A 00001010

97 10010111
57 01010111
51 01010001
8A 10001010
27 00100111
20 00100000
50 01010000
54 01010100
00 00000000
00 00000000
00 00000000
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001

Value

(binary)

00110001
00010100

00011110

00010011

00001001
00000101

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44 2C Standard timing ID # 4
45 2D Standard timing ID # 4
46 2E Standard timing ID # 5
47 2F Standard timing ID # 5
48 30 Standard timing ID # 6
49 31 Standard timing ID # 6
50 32 Standard timing ID # 7
51 33 Standard timing ID # 7
52 34 Standard timing ID # 8
53 35 Standard timing ID # 8

Detailed timing description # 1 Pixel clock (“88.75MHz”,

54 36
55 37 # 1 Pixel clock (hex LSB first)
56 38 # 1 H active (“1440”)
57 39 # 1 H blank (“160”)
58 3A # 1 H active : H blank (“1440 : 160”)
59 3B # 1 V active (”900”)
60 3C # 1 V blank (”26”)
61 3D # 1 V active : V blank (”900 :26”)
62 3E # 1 H sync offset (”48”)
63 3F # 1 H sync pulse width ("32”)
64 40 # 1 V sync offset : V sync pulse width (”3 : 6”)

65 41
66 42 # 1 H image size (”303 mm”) 2F
67 43 # 1 V image size (”190 mm”) BE
68 44 # 1 H image size : V image size (”303 : 190”)
69 45 # 1 H boarder (”0”)
70 46 # 1 V boarder (”0”)

71 47
72 48 Detailed timing description # 2
73 49 # 2 Flag
74 4A # 2 Reserved

75 4B
76 4C # 2 Flag
77 4D # 2 1st character of name (“N”) 4E
78 4E # 2 2nd character of name (“1”) 31
79 4F # 2 3rd character of name (“4”) 34
80 50 # 2 4th character of name (“1”) 31
81 51 # 2 5th character of name (“C”) 43
82 52 # 2 6th character of name (“3”) 33
83 53 # 2 7th character of name (“-”) 2D
84 54 # 2 8th character of name (“L”) 4C
85 55 # 2 9th character of name (“0”)
86 56 # 2 9th character of name (“2”)
87 57 # 2 New line character indicates end of ASCII string
88 58 # 2 Padding with “Blank” character
89 59 # 2 Padding with “Blank” character

According to VESA CVT Rev1.1)

# 1 H sync offset : H sync pulse width : V sync offset : V sync
width (”48: 32 : 3 : 6”)

# 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol
Negatives

# 2 FE (hex) defines ASCII string (Model Name “N141C3-L02”,
ASCII)

01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001

AB 10101011

22 00100010
A0 10100000
A0 10100000
50 01010000
84 10000100
1A 00011010
30 00110000
30 00110000
20 00100000
36 00110110

00 00000000

10 00010000
00 00000000
00 00000000

18 00011000

00 00000000
00 00000000
00 00000000

FE 11111110

00 00000000

30 00110000
32 00110010
0A 00001010
20 00100000
20 00100000

00101111
10111110

01001110
00110001
00110100
00110001
01000011
00110011
00101101
01001100

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Doc No.: 1406X168

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90 5A Detailed timing description # 3

91 5B # 3 Flag
92 5C # 3 Reserved
93 5D # 3 FE (hex) defines ASCII string (Vendor “CMO”, ASCII)
94 5E # 3 Flag
95 5F # 3 1st character of string (“C”)
96 60 # 3 2nd character of string (“M”)
97 61 # 3 3rd character of string (“O”)
98 62 # 3 New line character indicates end of ASCII string
99 63 # 3 Padding with “Blank” character

100 64 # 3 Padding with “Blank” character
101 65 # 3 Padding with “Blank” character
102 66 # 3 Padding with “Blank” character
103 67 # 3 Padding with “Blank” character
104 68 # 3 Padding with “Blank” character
105 69 # 3 Padding with “Blank” character
106 6A # 3 Padding with “Blank” character
107 6B # 3 Padding with “Blank” character
108 6C Detailed timing description # 4
109 6D # 4 Flag
110 6E # 4 Reserved

# 4 FE (hex) defines ASCII string (Model Name“N141C3-L02”,

111 6F
112 70 # 4 Flag
113 71 # 4 1st character of name (“N”) 4E
114 72 # 4 2nd character of name (“1”) 31
115 73 # 4 3rd character of name (“4”) 34
116 74 # 4 4th character of name (“1”) 31
117 75 # 4 5th character of name (“C”) 43
118 76 # 4 6th character of name (“3”) 33
119 77 # 4 7th character of name (“-”) 2D
120 78 # 4 8th character of name (“L”) 4C
121 79 # 4 9th character of name (“0”)
122 7A # 4 9th character of name (“2”)
123 7B # 4 New line character indicates end of ASCII string
124 7C # 4 Padding with “Blank” character
125 7D # 4 Padding with “Blank” character
126 7E Extension flag
127 7F Checksum

ASCII)

00 00000000
00 00000000
00 00000000
FE 11111110
00 00000000
43 01000011
4D 01001101
4F 01001111
0A 00001010
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
00 00000000
00 00000000
00 00000000

FE 11111110

00 00000000

01001110
00110001
00110100
00110001
01000011
00110011
00101101

01001100
30 00110000
32 00110010
0A 00001010
20 00100000
20 00100000
00 00000000
35 00110101

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6 INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

The specifications of input signal timing are as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

DCLK Frequency 1/Tc 25 44.5 60 MHz (2)

Vertical Total Time TV 910 926 1500 TH -

Vertical Active Display Period TVD 900 900 900 TH -

DE

Vertical Active Blanking Period TVB TV-TVD 26 TV-TVD TH

Horizontal Total Time TH 760 800 880 Tc (2)

Horizontal Active Display Period THD 720 720 720 Tc (2)

Horizontal Active Blanking Period THB

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TH-THD

80

Doc No.: 1406X168

Issued Date: Apr. 18, 2007

Model No.: N141C3 - L02

Approval

TH-THD

Tc (2)

DE

DCLK

TC

DE

DATA

6.2 POWER ON/OFF SEQUENCE

Power Supply

for LCD, Vcc

- Interface Signal

(LVDS Signal of
Transmitter), V

I

- Power for Lamp

0V

0V

10%

INPUT SIGNAL TIMING DIAGRAM

Power On

90%

t1

Valid Data

ONOFF OFF

Power Off

90%

t6 t5

50%50%

T

HD

Restart

t7

10%

t4

t3 t2

10%

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Timing Specifications:

0.5< t1 Љ 10 msec

0 < t2 Љ 50 msec

0 < t3 Љ 50 msec

t4 Њ 500 msec

t5 Њ 200 msec

t6 Њ 200 msec

Note (1) Please follow the power on/off sequence described above. Otherwise, the LCD module might be

damaged.

Note (2) Please avoid floating state of interface signal at invalid period. When the interface signal is invalid, be

sure to pull down the power supply of LCD Vcc to 0 V.

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Model No.: N141C3 - L02

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Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the

interface signal is valid. The Backlight inverter power must be turned off before the power supply

for the logic and the interface signal is invalid.

Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To

avoid this phenomenon, we suggest that the Vcc falling time is better to follow 5Љt7Љ300 ms.

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7 OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC 3.3 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Inverter Current IL 6.0 mA
Inverter Driving Frequency FL 61 KHz
Inverter Sumida H05-4915

The relative measurement methods of optical characteristics are shown in 7.2. The following items

should be measured under the test conditions described in 7.1 and stable environment shown in Note (6).

7.2 OPTICAL SPECIFICATIONS

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR 350 500 - - (2), (6)

Response Time

Average Luminance of White L

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Model No.: N141C3 - L02

Approval

o

25r2

50r10

TR - 5 10 ms

- 11 16 ms

T

F

185 220 - cd/m2(4), (6)

AVE

C

%RH

(3)

White Variation

Color
Chromaticity

Viewing Angle

Red

Green

Blue

White

Horizontal

Vertical

5pts - - 1.4 - (6)

GW

=0q, TY =0q

T

Rx

Ry
Gx
Gy
Bx
By

Wx 0.313 ­Wy

Tx+

T

-

x

TY+

T

-

Y

x

Viewing Normal

Angle

TYP

-0.03

CRt10

0.590

0.340

0.319

0.541

0.152

0.125

0.329

40 45 ­40 45 ­15 20 ­40 45 -

TYP

+0.03

-

-

-

-

-

­(1), (6)

-

Deg.

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.67 ms

Note (1) Definition of Viewing Angle (Tx, Ty):

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Model No.: N141C3 - L02

Approval

TX- = 90º

x-

6 o’clock

T

y-

= 90º

y-

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) = L63 / L0

Normal

Tx = Ty = 0º

Ty- Ty

Tx

Tx

y+

12 o’clock direction

T

y+ = 90º

x+

TX+ = 90º

L63: Luminance of gray level 63

L 0: Luminance of gray level 0

CR = CR (5)

CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (5).

Note (3) Definition of Response Time (T

100%

90%

Optical

Response

10%

0%

R

T

R

66.67 ms

, TF):

66

Time

T

F

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Doc No.: 1406X168

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Note (4) Definition of Average Luminance of White (L

Measure the luminance of gray level 63 at 5 points

L

= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5

AVE

L (x) is corresponding to the luminance of the point X at Figure in Note (5)

Note (5) Definition of White Variation (GW):

Measure the luminance of gray level 63 at 5 points

GW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

D/4 D/2 3D/4

W

W/4

W/2

Vertical Line

3W/4

):

AVE

Horizontal Line

D

12

X

5

3

4

: Test Point

X=1 to 5

Active Area

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Note (6) Measurement Setup:

The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt

temperature change during measuring. In order to stabilize the luminance, the measurement

should be executed after lighting Backlight for 20 minutes in a windless room.

LCD Module

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Doc No.: 1406X168

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Model No.: N141C3 - L02

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LCD Panel

Center of the Screen

500 mm

Photometer

USB-2000, CS-1000T

(

Light Shield Room

(Ambient Luminance < 2 lux)

)

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8 PRECAUTIONS

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

(1) The module should be assembled into the system firmly by using every mounting hole. Be

careful not to twist or bend the module.

(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause

electrical short or damage the polarizer.

(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and

assembly process.

(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is

very soft and easily scratched.

(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use

Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might

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permanently damage the polarizer due to chemical reaction.

(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel for

a long time.

(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In

case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.

(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.

(9) Do not disassemble the module.

(10) Do not pull or fold the lamp wire.

(11) Pins of I/F connector should not be touched directly with bare hands.

8.2 SAFETY PRECAUTIONS

(1) High temperature or humidity may reduce the performance of module. Please store LCD module within

the specified storage conditions.

(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may

damage LCD module when it is operating.

(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the

response time will become slowly, and the starting voltage of lamp will be higher than the room

temperature.

8.3 OPERATION PRECAUTIONS

(1) Do not pull the I/F connector in or out while the module is operating.

(2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This

can prevent the CMOS LSI chips from damage during latch-up.

(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while

assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.

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9 PACKAGING

9.1 CARTON

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Figure. 9-1 Packing method

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9.2 3$//(7)256($)5(,*+7

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Figure. 9-2 Packing method

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9.3 PALLET FOR AIR FREIGHT

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Figure. 9-3 Packing method

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10 DEFINITION OF LABELS

10.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

N141C3 -L02

(a) Model Name: N141C3 - L02

(b) Revision: Rev. XX, for example: A1, …, C1, C2 …etc.

(c) Serial ID: X X

(d) Production Location: MADE IN XXXX. XXXX stands for production location.

(e) LEOO: UL compliance remarks for CMO NingBo site production. It won’t be available when production

location isn’t CMO NingBo.

Serial ID includes the information as below:

(a) Manufactured Date: Year: 1~9, for 2001~2009

(b) Revision Code: cover all the change

(c) Serial No.: Manufacturing sequence of product

X X X X X Y M D X N N N N

Month: 1~9, A~C, for Jan. ~ Dec.

Day: 1~9, A~Y, for 1

st

Serial No.
CMO Internal Use

Year, Month, Date
CMO Internal Use

Revision

CMO Internal Use

to 31st, exclude I , O and U

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10.2 CMO CARTON LABEL

(a) Production location: Made In XXXX. XXXX stands for production location.

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