CMO N141C2-L01 Specification

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

- CONTENTS -

REVISION HISTORY ------------------------------------------------------- 3

1. GENERAL DESCRIPTION

1.1 OVERVIEW

1.2 FEATURES

1.3 APPLICATION

1.4 GENERAL SPECIFICATIONS

1.5 MECHANICAL SPECIFICATIONS

2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

2.2.2 BACKLIGHT UNIT

2.3 MECHANICAL RATING

2.4 OTHER RATING

3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE

3.2 BACKLIGHT UNIT

4. BLOCK DIAGRAM

4.1 TFT LCD MODULE

4.2 BACKLIGHT UNIT

5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD MODULE

5.2 BACKLIGHT UNIT

5.3 MATERIAL LIST CONCERNING EMI REGULATIONS

5.4 TIMING DIAGRAM OF LVDS INPUT SIGNAL

5.5 COLOR DATA INPUT ASSIGNMENT

5.6 EDID DATA STRUCTURE

5.7 Hsync/Vsync CHART

6. INTERFACE TIMING
6

.1 INPUT SIGNAL TIMING SPECIFICATIONS

6.2 POWER ON/OFF SEQUENCE

6.3 VCC DIP CONDITION

7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

7.2 OPTICAL SPECIFICATIONS

8. PRECAUTIONS

8.1 HANDLING PRECAUTIONS

8.2 STORAGE PRECAUTIONS

8.3 OPERATION PRECAUTIONS

9. PACKING ------------------------------------------------------- 33

9.1 PACKING SPECIFICATION

9.2 PACKING METHOD

10. DEFINITION OF LABELS

10.1 CMO MODULE LABEL

10.2 CMO CARTON LABE

------------------------------------------------------- 4

------------------------------------------------------- 5

------------------------------------------------------- 11

------------------------------------------------------- 15

------------------------------------------------------- 16

------------------------------------------------------- 24

------------------------------------------------------- 26

------------------------------------------------------- 32

------------------------------------------------------- 35

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

Version Date

3.0

May 25,’06 All

Page

(New)

REVISION HISTORY

Section Description

All

Approval specification was first issued.

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1 GENERAL DESCRIPTION

1.1 OVERVIEW

N141C2 - L01 is a 14.1” TFT Liquid Crystal Display module with single CCFL Backlight unit and 30 pins

LVDS interface. This module supports 1440 x (3 RGB) x 900 WXGA+ mode and can display 262,144 colors.

The optimum viewing angle is at 6 o’clock direction. The inverter module for backlight is not built in.

1.2 FEATURES

- Thin and Light Weight

- WXGA+ (1440 x 900 pixels) resolution

- DE only mode

- 3.3V LVDS (Low Voltage Differential Signaling) interface with 2 pixel/clock

- RoHS compliance

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

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1.3 APPLICATION

- TFT LCD Notebook

1.4 GENERAL SPECIFICATIONS

Item Specification Unit Note
Active Area 303.48(H) X 189.675(V) (14.1 inch Diagonal) mm
Bezel Opening Area 308.08 (H) x 193.255 (V) mm
Driver Element a-si TFT active matrix - ­Pixel Number 1440 x R.G.B. x 900 pixel ­Pixel Pitch 0.21075 (H) x 0.21075 (V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 262,144 color ­Transmissive Mode Normally white - ­Surface Treatment

Glare, ReflectionІ2%, 3H

1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal(H) 319 319.5 320 mm

Module Size

Vertical(V) 205 205.5 206 mm
Depth(D) -- 7.2 7.5 mm

Weight -- 400 425 g

(1)

- -

(1)

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions

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2 ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol Min. Max. Unit Note
Operating Ambient Temperature TOP 0 +50
Operating Temperature for Panel - 0 +60
Storage Temperature T
Operating Ambient Humidity HOP 20 90 %RH (1)
Storage Humidity H
Air Pressure - 70.0 - kPa Operation
Air Pressure - 12.0 - kPa Non-Operation
Altitude - - 4572 m Operation
Altitude - - 15240 m Non-Operation

Note (1) (a) 90 %RH Max. (Ta Љ 40 ºC).

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

qC
qC

-20 +60

STG

10 90 %RH (1)

STG

qC

(2)

Approval

-

-

(c) No condensation.

Note (2) the temperature of panel display surface area should be 0 ºC Min. and 60 ºC Max.

Relative Humidity (%RH)

100

90

80

60

Operating Range

40

20
10

Storage Range

Temperature (ºC)

8060 -20 40020-40

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2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

Item Symbol

Power Supply Voltage VCC -0.3 +4.0 V
Logic Input Voltage VIN -0.3 VCC+0.3 V

2.2.2 BACKLIGHT UNIT

Item Symbol

Lamp Voltage VL - 2.5K V
Lamp Current IL 2.0 7.0 mA
Lamp Frequency FL 45 80 KHz

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

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Value

Min. Max.

Value

Min. Max.

Unit Note

Unit Note

Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

(1)

(1), (2)

RMS

RMS

(1), (2)

Note (2) Specified values are for lamp (Refer to 3.2 for further information).

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2.3 MECHANICAL RATINGS

Item Test Conditions Note

Mechanical
Vibration

Mechanical Shock

Pressure
Resistance

Strength of FL
Cable

Connector tension
test

Assured torque
value at side-mount
part

Re-screwed test 10 times under 245.0 mNm (2.5 kgfcm) Non Operation
Tapping test Test “ Ripple “ Phenomenon. Operation
Twist test Use force 1.5kgf, cycles 5000 times, frequency 1Hz(1cycle/sec.)

General definitions of failure for judgment shall be as follows:

Frequency Range ˄˃˅˃˃˛, 14.7m/s2 ( 1.5G) constant,

0.5Hrs each axis (X, Y, Z direction)

Frequency Range˄˃˅˃˃˛, 4.9m/s

0.5Hrs each axis (X, Y, Z direction)

2548m/s2 (260G), Pulse width 2ms, Half-Sine Wave, rX, rY, rZ
direction, each 1 time

686m/s
direction, each 3 times.

No Destruction with the force 196 N (20 kgf, 16 mm in diameter)
to the display surface at the vertical direction

No Destruction with the force 294.2 N (30 kgf, 30 mm in
diameter) to the back of the display surface at the vertical
direction

Strength of
rotation
force

Lead pull
test

Input connector: With 50 times of connector trial there must be
no damage to the shape and functional.

Back light connector: With 50 times of connector trial there must
be no damage to the shape and functional.

245 mNm (2.5 kgfcm) Non Operation

on panel four corners respectively.

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2

( 0.5G) constant,

2

(70G), Pulse width 11 ms, Half-Sine Wave, rX, rY, rZ

Cable: No disconnection of cable to the 5 trial of

o

rotation.

360
See a bent state of cable.
Connector: No disconnection of cable to 10 trial of

o

rotation.

180
See a bent state of cable.
Soldering portion: 14.7N (1.5kgf), 1min
Connector: 14.7N (1.5kgf), 1 sec

Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

Non Operation

Operation

Operation & Non
Operation

Non Operation

Non Operation
(1) Fig 2-3-1
(2) Fig 2-3-2
(3) Fig 2-3-3

Non Operation

FL

R2

Non Operation

Non Operation,
(4)

(1) Function of the module should be maintained.

(2) Current consumption should be smaller than the specified value.

(3) Appearance and display quality should not have distinguished degradation.

(4) Luminance should be larger than the minimum value specified in optical specification.

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Note (1) The compression condition of front side

(a) Compression point: 12 points ( refer to Fig 2-2-1)

(b) Compression condition: Time 3 sec, Tool diameter: 16 mm in diameter (refer to Fig 2-2-3)

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

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: COMPRESSION POINT

Fig 2-3-1

Note (2) The compression condition of rear side

(a) Compression point : 21 points ( refer to Fig 2-3-2 )

(b) Compression condition : Time 3 sec, Tool redius: 30 mm in diameter ( refer to Fig 2-2-3)

Flat plate

:COMPRESSION POINT

ABS natural 2.0t

Flat plate

LCD

LCD

Fig 2-2-2

Note (3) Dimension of the compression jig

(a) Compression jig for front side A = 16 mm in diameter

B = 16 mm in diameter

(b) Compression jig for rear side A = 30 mm in diameter

B = 28 mm in diameter

Rubber sheet

8 / 40

10 mm diameter

B
A

Fig 2-3-3

10

16

1.5

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X

Z

Note (4) the test starts as bellow, and 4 corners of module are tested respectively. One corner of module is

floating and fixed by the tester. The maximum displacement on Z direction of equipment is 100mm.

Judge criteria: cell crack

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

Y

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2.4 OTHER RATING

2.4.1 STATIC ELECTRICITY PRESSURE RESISTANCE

Items Testing conditions Operation Non Operation

Contact discharge 150pF, 330 ohm

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

r10 kV r10 kV

Air discharge 150pF, 330 ohm

ESD Acceptance Definition:

Temporary performance degradation. Recovery by operator is acceptable. No hardware failure.

r20 kV r20 kV

2.4.2 SOUND NOISE

There should be no uncomfortable noise.

Being used under whatever surrounds, when power on/off, the panel should not generate uncomfortable noise.

2.4.3 OPEN/SHORT

No smoke, no firery at any open/ short test

2.4.4 MTBF: 50000 Hours (except for backlight lamp)

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

3 ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE Ta = 25 ± 2 ºC

Parameter Symbol

Min. Typ. Max.

Power Supply Voltage Vcc 3.0 3.3 3.6 V

Ripple Voltage VRP - - 100 mV ­Rush Current I

- - 1.5 A (2)

RUSH

White - 380 430 mA (3)a

Power Supply Current

Logical Input Voltage

Black - 465 510 (3)b
2V1H

lcc

NONE 590
“H” Level VIL - - +100 mV ­“L” Level V

-100 - - mV -

IH

Terminating Resistor RT - 100 - Ohm ­Power per EBL WG P

- 3.19 - W (4)

EBL

Value

Unit Note

mA

Approval

Black

pattern

(3)c

3.2 MATERIAL LIST CONCERNING EMI REGULATIONS

(1) EMI Regulations: “N141C2-L01” which is assembled inside Toshiba’s Satellite model should be met to

the regulations as below:

CISPR: Pub.22 Class B

FCC: Part 15 Class B

VCCI: Class B

(2) Safety regulation (CMO TFT-LCD module only): UL 1950

1. EMI Filter Silk Product Code Rating Maker

Bead R3 MCB1608S601EA 0603,+-25%,600ohm,0.2 A NPAQ

2. DC/DC

Converter

PWM IC IC, PWM,FP5138AWR-LF Typ 1.2 MHz. Feeling

Note (1) The module should be always operated within above ranges.

Note (2) Measurement Conditions:

(High to Low)

(Control Signal)

SW

+12V

C1

1uF

Silk Osc. Freq. Maker

+3.3V

VR1

R1

47K

R2

1K

47K

Q1 2SK1475

C2

0.01uF

Q2

2SK1470

FUSE

C3

1uF

Vcc

(LCD Module Input)

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GND

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

Vcc rising time is 5ms

+3.3V

0.9Vcc

0.1Vcc

5ms

Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, f

Hz, whereas a power dissipation check pattern belo is displayed.

a. White Pattern

b. Black Pattern

Active Area

c. Maximum pattern (Zoom in)

RRGGBBRRGGB

RRGGBBRRGGB

B

B

BBR

R

BBR

R

…expend to whole active area

gray level =0

gray level = 63

Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input

= 60

v

power. Test conditions are as follows.

(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f

(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file

“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.

(c) Luminance: 60 nits.

(d) The inverter used is provided from Sumida (www.sumida.com.tw)

information. CMO doesn’t provide the inverter in this product.

= 60 Hz,

v

. Please contact Sumida for detail

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC

Approval

LAMP: West, K-CB311-K-101EH, 1.8ӽ

Parameter Symbol

Lamp Input Voltage VL 612 680 748 V
Lamp Current IL 2.0 6.0 6.5 mA

Lamp Turn On Voltage VS

Value

Min. Typ. Max.

--- --- 1370 (25

--- --- 1450 (0

o

o

Unit Note

C) V

C) V

I

RMS

RMS

(2)

RMS

(2)

RMS

= 6.0 mA

L

(1)

Operating Frequency FL 45 --- 80 KHz (3)
Lamp Life Time LBL 15,000 --- --- Hrs (5)
Power Consumption PL --- 4.08 --- W (4), IL = 6.0 mA

Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:

LCD

Module

HV (Pink)

LV (White)

1

2

Current Meter

Inverter

A

Note (2) The voltage that must be larger than Vs should be applied to the lamp for more than 1 second

after startup. Otherwise the lamp may not be turned on.

Note (3) The lamp frequency may produce interference with horizontal synchronous frequency from the

display, and this may cause line flow on the display. In order to avoid interference, the lamp

frequency should be detached from the horizontal synchronous frequency and its harmonics as far

as possible.

Note (4) P

= IL VL

L

Note (5) The lifetime of lamp can be defined as the time in which it continues to operate under the condition

Ta = 25 2

o

C and IL = 6 mArms until one of the following events occurs:

(a) When the brightness becomes or lower than 50% of its original value.

(b) When the effective ignition length becomes or lower than 80% of its original value. (Effective

ignition length is defined as an area that has less than 70% brightness compared to the

brightness in the center point.)

Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the

inverter must have specifications for the modularized lamp. The performance of the Backlight,

such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for

the lamp. All the parameters of an inverter should be carefully designed to avoid producing too

much current leakage from high voltage output of the inverter. When designing or ordering the

inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the

inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module

should be operated in the same manners when it is installed in your instrument.

The output of the inverter must have symmetrical (negative and positive) voltage waveform and

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symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter

which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may

produce interface with horizontal synchronous frequency and as a result this may cause beat on the

display. Therefore lamp frequency shall be as away possible from the horizontal synchronous

frequency and from its harmonics in order to prevent interference.

Requirements for a system inverter design, which is intended to have a better display performance, a

better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its

leakage current.

a. The asymmetry rate of the inverter waveform should be 10% below.

b. The distortion rate of the waveform should be within Ѕ2 ± 10%.

c. The ideal sine wave form shall be symmetric in positive and negative polarities.

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

* Asymmetry rate:

I p

-p

I

| I

* Distortion rate

I

– I –p | / I

p

(or I –p) / I

p

rms

rms

* 100%

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)

4 BLOCK DIAGRAM

4.1 TFT LCD MODULE

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

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Rxin0(+/-)

Rxin1(+/-)

Rxin2(+/-)

(JAE-FI-XB30SRL-HF11)

CLK(+/-)

Vcc

GND

Data

EDID

CLK

EDID

V

EDID

VL

LAMP CONNECTOR
(JST- BHTR-02VS-1)

4.2 BACKLIGHT UNIT

INPUT CONNECTOR

LVDS INPUT /

TIMING CONTROLLER

DC/DC CONVERTER &

REFERENCE VOLTAGE

GENERATOR

EDID

EEPROM

SCAN DRIVER IC

TFT LCD PANEL

(1440xR.G.B.x900)

DATA DRIVER IC

BACKLIGHT UNIT

1 HV (Pink)

2 LV (White

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5 INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD MODULE

Pin Symbol Description Polarity Remark

1 Vss Ground
2 Vcc Power Supply +3.3 V (typical)
3 Vcc Power Supply +3.3 V (typical)
4 V
5 NC Non-Connection
6 CLK
7 DATA

8 RXO0- LVDS Differential Data Input (Odd) Negative

9 RXO0+ LVDS Differential Data Input (Odd) Positive
10 Vss Ground
11 RXO1- LVDS Differential Data Input (Odd) Negative
12 RXO1+ LVDS Differential Data Input (Odd) Positive
13 Vss Ground
14 RXO2- LVDS Differential Data Input (Odd) Negative
15 RXO2+ LVDS Differential Data Input (Odd) Positive
16 Vss Ground
17 RXOC- LVDS Clock Data Input (Odd) Negative
18 RXOC+ LVDS Clock Data Input (Odd) Positive
19 Vss Ground

20 RxE0- LVDS Differential Data Input (Even) Negative
21 RxE0+ LVDS Differential Data Input (Even) Positive

22 Vss Ground
23 RxE1- LVDS Differential Data Input (Even) Negative
24 RxE1+ LVDS Differential Data Input (Even) Positive
25 Vss Ground
26 RxE2- LVDS Differential Data Input (Even) Negative
27 RxE2+ LVDS Differential Data Input (Even) Positive
28 Vss Ground
29 RXEC- LVDS Clock Data Input (Even) Negative
30 RXEC+ LVDS Clock Data Input (Even) Positive

Note (1) Connector Part No.: JAE-FI-XB30SRL-HF11

DDC 3.3V Power

EDID

DDC Clock

EDID

DDC Data -

EDID

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

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Note (2) User’s connector Part No: JAE-FI-X30C2L

Note (3) The first pixel is odd as shown in the following figure.

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5.2 BACKLIGHT UNIT

Pin Symbol Description Color

1 HV High Voltage Pink
2 LV Ground White

Note (1) Connector Part No.: JST- BHTR-02VS-1

Note (2) User’s connector Part No.: JST-SM02B-BHTS-B-TB

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5.4 TIMING DIAGRAM OF LVDS INPUT SIGNAL

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

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RXOC+

RXO2+/-

RXO1+/-

RXO0+/-

RXEC+

RXE2+/-

RXE1+/-

RXE0+/-

T/7

IN20 IN19 IN18 IN17 IN16 IN15 IN14

DE OB5 OB4 OB3 OB2 Vsync Hsync

IN13 IN12 IN11 IN10 IN9 IN8 IN7

OB1 OG4 OG3 OG2 OG1 OB0 OG5

IN6 IN5 IN4 IN3 IN2 IN1 IN0

OG0 OR3 OR2 OR1 OR0 OR5 OR4

Signal for 1 DCLK Cycle (T)

T/7

IN20 IN19 IN18 IN17 IN16 IN15 IN14

DE EB5 EB4 EB3 EB2 Vsync Hsync

IN13 IN12 IN11 IN10 IN9 IN8 IN7

EB1 EG4 EG3 EG2 EG1 EB0 EG5

IN6 IN5 IN4 IN3 IN2 IN1 IN0

EG0 ER3 ER2 ER1 ER0 ER5 ER4

Signal for 1 DCLK Cycle (T)

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5.5 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for

the color. The higher the binary input, the brighter the color. The table below provides the assignment of

color versus data input.

Color

R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black
Red
Green

Basic
Colors

Gray
Scale
Of
Red

Gray
Scale
Of
Green

Gray
Scale
Of
Blue

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Blue
Cyan
Magenta
Yellow
White
Red(0)/Dark
Red(1)
Red(2)

:

:
Red(61)
Red(62)
Red(63)
Green(0)/Dark
Green(1)
Green(2)

:

:
Green(61)
Green(62)
Green(63)
Blue(0)/Dark
Blue(1)
Blue(2)

:

:
Blue(61)
Blue(62)
Blue(63)

0

0

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0
:
:

1

1

1

1

1

1

0

0

0

0

0

0
:
:

0

0

0

0

0

0

0

0

0

0

0

0
:
:

0

0

0

0

0

0

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Model No.: N141C2 - L01

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Data Signal

Red Green Blue

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

1

1

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

0

0

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

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0

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0

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0

0

0

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1

0
0
0
1
1
1
0
1
0
0
0

0
0
0
0
0
0

0
0
0
0
0
0

1
1
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0

0

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5.6 EDID DATA STRUCTURE

The EDID (Extended Display Identification Data) data formats are to support displays as defined in the

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

VESA Plug & Display and FPDI standards.

Byte #

(decimal)
0 0 Header
1 1 Header
2 2 Header
3 3 Header
4 4 Header
5 5 Header
6 6 Header
7 7 Header
8 8 EISA ID manufacturer name (“CMO”)
9 9 EISA ID manufacturer name (Compressed ASCII)
10 0A ID product code (N141C2-L01) 22
11 0B ID product code (hex LSB first; N141C2-L01) 14
12 0C ID S/N (fixed “0”)
13 0D ID S/N (fixed “0”)
14 0E ID S/N (fixed “0”)
15 0F ID S/N (fixed “0”)
16 10 Week of manufacture (fixed week code)
17 11 Year of manufacture (fixed year code)
18 12 EDID structure version # (“1”)
19 13 EDID revision # (“3”)
20 14 Video I/P definition (“digital”)
21 15 Active area horizontal 30.348cm 1E
22 16 Active area vertical 18.9675cm 13
23 17 Display Gamma (Gamma = ”2.2”)
24 18 Feature support (“Active off, RGB Color”)
25 19 Rx1 Rx0 Ry1 Ry0 Gx1 Gx0 Gy1 Gy0 C0
26 1A Bx1 Bx0 By1 By0 Wx1 Wx0 Wy1 Wy0 05
27 1B Rx=0.597 98
28 1C Ry=0.340 57
29 1D Gx=0.320 52
30 1E Gy=0.535 89
31 1F Bx=0.152 27
32 20 By=0.125 20
33 21 Wx=0.313 50
34 22 Wy=0.329 54
35 23 Established timings 1
36 24 Established timings 2
37 25 Manufacturer’s reserved timings
38 26 Standard timing ID # 1
39 27 Standard timing ID # 1
40 28 Standard timing ID # 2
41 29 Standard timing ID # 2

Byte

#(hex)

Field Name and Comments Value

Value

(hex)

00 00000000
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
00 00000000
0D 00001101
AF 10101111

00 00000000
00 00000000
00 00000000
00 00000000
14 00010100
10 00010000
01 00000001
03 00000011
80 10000000

78 01111000
0A 00001010

00 00000000
00 00000000
00 00000000
01 00000001
01 00000001
01 00000001
01 00000001

(binary)

00100010
00010100

000 11110

00010011

11000000

00000101

10011000

01010111
01010010
10001001

00100111
00100000
01010000
01010100

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42 2A Standard timing ID # 3 01 00000001
43 2B Standard timing ID # 3
44 2C Standard timing ID # 4
45 2D Standard timing ID # 4
46 2E Standard timing ID # 5
47 2F Standard timing ID # 5
48 30 Standard timing ID # 6
49 31 Standard timing ID # 6
50 32 Standard timing ID # 7
51 33 Standard timing ID # 7
52 34 Standard timing ID # 8
53 35 Standard timing ID # 8

Detailed timing description # 1 Pixel clock (“88.75MHz”,

54 36
55 37 # 1 Pixel clock (hex LSB first)
56 38 # 1 H active (“1440”)
57 39 # 1 H blank (“160”)
58 3A # 1 H active : H blank (“1440 : 160”)
59 3B # 1 V active (”900”)
60 3C # 1 V blank (”26”)
61 3D # 1 V active : V blank (”900 :26”)
62 3E # 1 H sync offset (”48”)
63 3F # 1 H sync pulse width ("32”)
64 40 # 1 V sync offset : V sync pulse width (”3 : 6”)

65 41
66 42 # 1 H image size (”303 mm”) 2F
67 43 # 1 V image size (”190 mm”) BE
68 44 # 1 H image size : V image size (”303 : 190”)
69 45 # 1 H boarder (”0”)
70 46 # 1 V boarder (”0”)

71 47
72 48 Detailed timing description # 2
73 49 # 2 Flag
74 4A # 2 Reserved

75 4B
76 4C # 2 Flag
77 4D # 2 1st character of name (“N”) 4E
78 4E # 2 2nd character of name (“1”) 31
79 4F # 2 3rd character of name (“4”) 34
80 50 # 2 4th character of name (“1”) 31
81 51 # 2 5th character of name (“C”) 43
82 52 # 2 6th character of name (“2”) 32
83 53 # 2 7th character of name (“-”) 2D
84 54 # 2 8th character of name (“L”) 4C
85 55 # 2 9th character of name (“0”)
86 56 # 2 9th character of name (“1”)

According to VESA CVT Rev1.1)

# 1 H sync offset : H sync pulse width : V sync offset : V sync
width (”48: 32 : 3 : 6”)

# 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol
Negatives

# 2 FE (hex) defines ASCII string (Model Name “N141C2-L01”,
ASCII)

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Model No.: N141C2 - L01

Approval

01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001

AB 10101011

22 00100010
A0 10100000
A0 10100000

50 01010000

84 10000100
1A 00011010

30 00110000

30 00110000

20 00100000

36 00110110

00 00000000

00101111

10111110
10 00010000
00 00000000
00 00000000

18 00011000

00 00000000
00 00000000
00 00000000

FE 11111110

00 00000000

01001110
00110001
00110100
00110001
01000011
00110010
00101101

01001100
30 00110000
31 00110001

21 / 40

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

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87 57 # 2 New line character indicates end of ASCII string
88 58 # 2 Padding with “Blank” character 20 00100000

89 59 # 2 Padding with “Blank” character
90 5A Detailed timing description # 3
91 5B # 3 Flag
92 5C # 3 Reserved
93 5D # 3 FE (hex) defines ASCII string (Vendor “CMO”, ASCII)
94 5E # 3 Flag
95 5F # 3 1st character of string (“C”)
96 60 # 3 2nd character of string (“M”)
97 61 # 3 3rd character of string (“O”)
98 62 # 3 New line character indicates end of ASCII string
99 63 # 3 Padding with “Blank” character
100 64 # 3 Padding with “Blank” character
101 65 # 3 Padding with “Blank” character
102 66 # 3 Padding with “Blank” character
103 67 # 3 Padding with “Blank” character
104 68 # 3 Padding with “Blank” character
105 69 # 3 Padding with “Blank” character
106 6A # 3 Padding with “Blank” character
107 6B # 3 Padding with “Blank” character
108 6C Detailed timing description # 4
109 6D # 4 Flag
110 6E # 4 Reserved

# 4 FE (hex) defines ASCII string (Model Name“N141C2-L01”,

111 6F
112 70 # 4 Flag
113 71 # 4 1st character of name (“N”) 4E
114 72 # 4 2nd character of name (“1”) 31
115 73 # 4 3rd character of name (“4”) 34
116 74 # 4 4th character of name (“1”) 31
117 75 # 4 5th character of name (“C”) 43
118 76 # 4 6th character of name (“2”) 32
119 77 # 4 7th character of name (“-”) 2D
120 78 # 4 8th character of name (“L”) 4C
121 79 # 4 9th character of name (“0”)
122 7A # 4 9th character of name (“1”)
123 7B # 4 New line character indicates end of ASCII string
124 7C # 4 Padding with “Blank” character
125 7D # 4 Padding with “Blank” character
126 7E Extension flag
127 7F Checksum

ASCII)

0A 00001010

20 00100000
00 00000000
00 00000000
00 00000000

FE 11111110

00 00000000
43 01000011

4D 01001101

4F 01001111

0A 00001010

20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
00 00000000
00 00000000
00 00000000

FE 11111110

00 00000000

01001110

00110001

00110100

00110001

01000011

00110010

00101101

01001100
30 00110000
31 00110001

0A 00001010

20 00100000
20 00100000
00 00000000

6C 01101100

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5.7 Hsync/Vsync Chart

VSYNC

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

Vpw

HSYNC

DE

HSYNC

DE

DCLK

900

TVB

Hpw

THB

Vbp

Hbp

Vfp

TV

TVD

1

2

TH

THD

900

Hfp

DATA

Valid display data (1440 Tck)

Invalid

23 / 40

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6 INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

The specifications of input signal timing are as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

DCLK Frequency 1/Tc 25 44.5 60 MHz -

Vertical Total Time TV 910 926 1500 TH -

DE

Vertical Addressing Time TVD 900 900 900 TH -

Horizontal Total Time TH 760 800 880 Tc -

Horizontal Addressing Time THD 720 720 720 Tc -

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

DE

DCLK

TC

DE

DATA

6.2 POWER ON/OFF SEQUENCE

Power Supply

for LCD, Vcc

- Interface Signal

(LVDS Signal of
Transmitter), V

- Power for Lamp

0V

0V

I

10%

INPUT SIGNAL TIMING DIAGRAM

Power On

90%

t1

Valid Data

ONOFF OFF

Power Off

90%

t6 t5

50%50%

HD

T

Restart

t7

10%

t4

t3 t2

10%

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Timing Specifications:

0.5< t1 Љ 10 msec

0 < t2 Љ 50 msec

0 < t3 Љ 50 msec

t4 Њ 200 msec

t5 Њ 200 msec

t6 Њ 200 msec

Note (1) Please avoid floating state of interface signal at invalid period.

Note (2) When the interface signal is invalid, be sure to pull down the power supply of LCD Vcc to 0 V.

Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the

interface signal is valid. The Backlight inverter power must be turned off before the power supply

for the logic and the interface signal is invalid.

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To

avoid this phenomenon, we suggest that the Vcc falling time had better to follow

t7 Њ 5 msec

6.3 VCC DIP CONDITIONS

VCC

(1) 2.5VЉ VCC< 3.0V

TdЉ20 ms

(2) VCC< 2.5V

Vcc-Dip conditions also follow the power up/down conditions for supply voltage.

Td

2.5V

3.0 V

GND

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7 OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC 3.3 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Inverter Current IL 6.0 mA
Inverter Driving Frequency FL 61 KHz
Inverter Sumida H05-4915

The relative measurement methods of optical characteristics are shown in 7.2. The following items

should be measured under the test conditions described in 7.1 and stable environment shown in Note (6).

7.2 OPTICAL SPECIFICATIONS

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR 450 700 -- -- (2), (6)

Response Time

Average Luminance of White
( 5 points )
Cross Modulation D

13 Points White Variation

13 Points CR Variation C

White Variation dL -- -- 1.5 %/mm (6), (8)

Red

Color
Chromaticity

Viewing Angle

Viewing Angle

Green

Blue

White

Horizontal

Vertical

Horizontal

Vertical

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

o

25r2

50r10

TR -- 5 10 ms

-- 11 16 ms

T

F

L

185 230 -- cd/m2(4), (6)

AVE

-- -- 2 % (5), (6)

sha

ӬW

-- -- 3.5 -- (6), (7)

VER

T

=0q, TY =0q

x

-- -- 2.0 -- (6), (7)

Viewing Normal

Angle

Rx
Ry
Gx
Gy

Bx
By

TYP

-0.03

0.598

0.343

0.319

0.539

0.151

0.132

TYP

+0.03

Wx 0.313 -­Wy

Tx+

T

x

TY+

T

Y

Tx+

T

x

TY+

T

Y

60 70 --

­CRt10

-

60 70 -­50 60 -­50 60 -­70 80 --

-

CRt5

-

70 80 -­70 80 -­70 80 --

0.329

C

%RH

(3)

--

--

--

--

--

--

-­(1), (6)

Deg.

Deg.

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Item Symbol Conditions

63
60
56
52
48
44
40
36

Gamma

32
28
24

20
16
12

8
4
0

Viewing normal angle

T

= TY =0q

X

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Min. Typ. Max.

100

83.4

65.6

51.7

40.4

32.1

25.0

19.1

14.2

10.5

7.4

4.8

2.8

1.4

0.5

0.1
0

Specifications

100

89.8

77.2

65.6

55.0

45.4

36.8

29.2

22.5

16.8

12.0

8.0

4.9

2.6

1.1

0.2
0

100

96.9

91.3

83.6

74.8

66.4

57.5

48.4

39.4

31.4

23.6

16.4

10.1

5.3

1.9

0.4
0

Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

Unit Note

(1) (6)

%

at center of

Viewing area

center only

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.67 ms

Note (1) Definition of Viewing Angle (Tx, Ty):

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

TX- = 90º

x-

6 o’clock

T

y- = 90º

y-

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) = L63 / L0

Normal

Tx = Ty = 0º

Ty- Ty

Tx

Tx

y+

12 o’clock direction

T

y+ = 90º

x+

TX+ = 90º

L63: Luminance of gray level 63

L 0: Luminance of gray level 0

CR = CR (1)

CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (7).

Note (3) Definition of Response Time (T

100%

90%

Optical

Response

10%

0%

R

T

R

66.67 ms

, TF):

66

Time

T

F

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A

A

A

y

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

Note (4) Definition of Average Luminance of White (L

Measure the luminance of gray level 63 at 5 points

L

= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5

AVE

L (x) is corresponding to the luminance of the point X at Figure in Note (7)

Note (5) Definition of Cross Modulation (D

D

= | YB – YA | / YA u100 (%)

SHA

Where:

Y

= Luminance of measured location without gray level 0 pattern (cd/m2)

A

Y

= Luminance of measured location with gray level 0 pattern (cd/m2)

B

(0, 0)

ctive Area

Y

(D/8,W/2)

A, L

Gray 128

Y

(D/2,7W/8)

A, D

(D,W)

SHA

Y

(D/2,W/8)

A, U

Y

(7D/8,W/2)

A, R

):

AVE

)

ctive Area

Gray 0

Gra

128

Y

B, U

Y

B, R

(3D/4,3W/4)

(D,W)

(D/2,W/8)

(7D/8,W/2)

(D/4,W/4)

Y

(D/8,W/2)

B, L

Y

(D/2,7W/8)

B, D

(0, 0)

Note (6) Measurement Setup:

The LCD module should be stabilized at given temperature for 15 minutes to avoid abrupt

temperature change during measuring. In order to stabilize the luminance, the measurement

should be executed after lighting Backlight for 15 minutes in a windless room.

LCD Module

LCD Panel

Center of the Screen

Field of View = 2º

500 mm

TOPCON/BM-5A

MINOLTA /CA210

MINOLT

Light Shield Room

(Ambient Luminance < 2 lux)

/CS-1000T

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X

Note (7) Definition of White Variation (GW):

Measure the luminance of gray level 63 at 13 points

GW = Maximum [L (1) ~ L (13)] / Minimum [L (1) ~ L (13)]

C

= Maximum [CR (1) ~ CR (13)] / Minimum [CR (1) ~ CR (13)]

VER

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

˄˃

˛˂ˇ

ˉ

˛

ˌ

Vertical Line Number

˛˂ˇ ˛˂ˇ ˛˂ˇ

˄˄ ˄˅

˄˃

Horizontal Line Number

ˊ

˅

˄

ˇˈ

˄˃ ˄˃

˪˂ˇ ˪˂ˇ ˪˂ˇ ˪˂ˇ

˪

ˆ

ˋ

˄˃

˄ˆ

ΚTest Point
XЈ1 to 13

Note (8) Definition of Luminance Variation (dL):

Measure the luminance of gray level 63 along the 5 lines in Horizontal and Vertical direction

which is described in below picture. The distance between measured point to next point is 5mm.

dL = | B

– Bm | /δ5 u ( B1 + B2 Ξ B

m-1

+ Bn )/nεu100 %

n-1

Where:

B

= Luminance of measured location x , x =1~n

x

2 Љ m Љ n where n ,m is an integer.

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

56 points

W

34 points

10mm

10mm

5mm

H/4

H/4

H

H/4

H/4

W/4 W/4 W/4 W/4

5mm

B2

B1

Bn

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8 PRECAUTIONS

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

(1) The module should be assembled into the system firmly by using every mounting hole. Be

careful not to twist or bend the module.

(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause

electrical short or damage the polarizer.

(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and

assembly process.

(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is

very soft and easily scratched.

(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use

Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

permanently damage the polarizer due to chemical reaction.

(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel for

a long time.

(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In

case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.

(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.

(9) Do not disassemble the module.

(10) Do not pull or fold the lamp wire.

(11) Pins of I/F connector should not be touched directly with bare hands.

8.2 SAFETY PRECAUTIONS

(1) High temperature or humidity may reduce the performance of module. Please store LCD module within

the specified storage conditions.

(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may

damage LCD module when it is operating.

(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the

response time will become slowly, and the starting voltage of lamp will be higher than the room

temperature.

8.3 OPERATION PRECAUTIONS

(1) Do not pull the I/F connector in or out while the module is operating.

(2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This

can prevent the CMOS LSI chips from damage during latch-up.

(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while

assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.

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9 PACKAGING

9.1 PACKING SPECIFICATIONS

(1) 20 LCD modules / 1 Box

(2) Box dimensions: 520(L) X 285(W) X 345(H) mm

(3) Weight: approximately 10.5Kg (20 modules per box)

9.2 PACKING METHOD

(1)Carton Packing should have no failure in the following reliability test items.

Test Item Test Conditions Note

Frequency Range: 5 – 50 Hz, Degree of acceleration 9.8 m/s

Vibration

Dropping Test 1 Angle, 3 Edge, 6 Face, 60cm Non Operation

Sweep rate 3 minutes
Top & Bottom 60 minutes, Right & Left 15 minutes, Back & Forth
15 minutes

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

2

(1G).

Non Operation

9.2.1 CARTON

Figure. 9.2.1 Packing method

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9.2.2 PALLET

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

Figure. 9.2.2 Packing method

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G33C0003

0

10 DEFINITION OF LABELS

10.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following

explanation.

(a) Toshiba consigned product ID:

i. ES stage: G33C0003BA10

ii. CS stage: G33C0003BB10

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

B11

iii. MP stage: G33C0003B110

(b) Model Name: N141C2 - L01

(c) Revision: Rev. XX, for example: A1, …, C1, C2 …etc.

(d) Serial ID: X X

Serial ID includes the information as below:

(a) Manufactured Date: Year: 1~9, for 2001~2009

(b) Revision Code: cover all the change

(c) Serial No.: Manufacturing sequence of product

X X X X X Y M D X N N N N

Month: 1~9, A~C, for Jan. ~ Dec.

Day: 1~9, A~Y, for 1

Serial No.
CMO Internal Use

Year, Month, Date
CMO Internal Use

Revision

CMO Internal Use

st

to 31st, exclude I , O and U

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10.2 CMO CARTON LABEL

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Issued Date: May 25, 2006

Model No.: N141C2 - L01

Approval

G33C0003B110

N141C2-L01

The barcode nameplate is pasted on each module as illustration, and its definitions are as following

explanation.

(a) PO. NO.: Printed by customer request

(b) Part ID. : G33C0003B110 (Toshiba Part Number)

(c) Model Name: N141C2-L01

(d) Carton ID. : Packing sequence of product

(e) Quantity: Total shipping quantity by the order

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One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

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Global LCD Panel Exchange Center

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One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

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Global LCD Panel Exchange Center

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One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

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Global LCD Panel Exchange Center

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One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

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