CMO N133I6-P0A Specification

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TFT LCD Preliminary Specification
MODEL NO.: N133I6 - P0A
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Issued Date: Dec. 04, 2009
Model No.: N133I6 - P0A
Preliminary
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- CONTENTS -
REVISION HISTORY
1. GENERAL DESCRIPTION
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT (BASED ON CMO OPEN CELL)
2.2 ABSOLUTE RATINGS OF ENVIRONMENT (OPEN CELL)
2.3 ELECTRICAL ABSOLUTE RATINGS (OPEN CELL)
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD OPEN CELL
4. BLOCK DIAGRAM
4.1 TFT LCD OPEN CELL
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD OPEN CELL
5.2 TIMING DIAGRAM OF LVDS INPUT SIGNAL
5.3 COLOR DATA INPUT ASSIGNMENT
5.4 EDID DATA STRUCTURE
6. CONVERTER SPECIFICATION
6.1 ABSOLUTE MAXIMUM RATINGS
6.2 POWER ON/OFF SEQUENCE
7. INTERFACE TIMING
7.1 INPUT SIGNAL TIMING SPECIFICATIONS
7.2 POWER ON/OFF SEQUENCE
8. OPTICAL CHARACTERISTICS 8
.1 TEST CONDITIONS
8.2 OPTICAL SPECIFICATIONS
8.3 FLICKER ADJUSTMENT
9. PACKAGING
9.1 PACKING SPECIFICATIONS
9.2 PACKING METHOD
10. DEFINITION OF LABELS ----
10.1 CMO OPEN CELL LABEL
10.2 CMO CARTON LABEL
11. PRECAUTIONS ----
11.1 ASSEMBLY AND HANDLING PRECAUTIONS
11.2 SAFETY PRECAUTIONS
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Issued Date: Dec. 04, 2009
Model No.: N133I6 - P0A
Preliminary
4
5
6
8
11
18
20
23
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12
12. MECHANICAL DRAWING
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2 / 30
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Issued Date: Dec. 04, 2009
Model No.: N133I6 - P0A
Preliminary
Version Date
1.0
Dec, 04,’09 All
Page
(New)
REVISION HISTORY
Section Description
All Preliminary specification was first issued.
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
N133I6 - P0A is a 13.3” TFT Liquid Crystal Display open cell with a 40 pins LVDS interface. This open cell
supports 1280 x 800 WXGA mode and can display 262,144 colors. The optimum viewing angle is at 6
o’clock direction. The converter open cell for Backlight is built in.
1.2 FEATURES
- Thin and Light Weight
- WXGA (1280 x 800 pixels) resolution
- DE only mode
- 3.3V LVDS (Low Voltage Differential Signaling) interface with 1 pixel/clock
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1.3 APPLICATION
- TFT LCD Notebook
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note Active Area 286.08 (H) x 178.8 (V) mm Top Polarizer Area 289.48 (H) x 182.2 (V) mm Driver Element a-si TFT active matrix - ­Pixel Number 1280 x R.G.B. x 800 pixel ­Pixel Pitch 0.2235 (H) x 0.2235 (V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 262,144 color ­Transmissive Mode Normally white - ­Surface Treatment Anti Glare - -
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal (H) 294.24 294.44 294.64 mm
Module Size
Vertical (V) With PCB Vertical (V) W/o PCB Thickness (T) With PCB Thickness (T)
W/o PCB
Weight - -
200.9 201.9 202.9 mm
188.3 188.5 188.7 mm
3.45 3.6 3.75 mm
0.77 0.87 0.97 mm
175 mm
(1)
(1) (2)
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Note (2) Connector mounting position
+/- 0.5mm
4 / 30
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
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2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1) Operating Ambient Temperature TOP 0 +50 ºC (1), (2)
Note (1) Temperature and relative humidity range is shown in the figure below.
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Value
Min. Max.
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Issued Date: Dec. 04, 2009
Model No.: N133I6 - P0A
Preliminary
Unit Note
(a) 90 %RH Max. (Ta
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The temperature of panel surface should be 0 ºC Min. and 50 ºC Max.
Љ
40 ºC).
Relative Humidity (%RH)
100
90
80
60
Operating Range
40
20 10
Storage Range
80 60 -20 40 0 20 -40
Temperature (ºC)
2.2 ABSOLUTE RATINGS OF ENVIRONMENT (OPEN CELL)
High temperature or humidity may reduce the performance of panel. Please store LCD panel within
the specified storage conditions.
Storage Condition: With packing.
Storage temperature range: 25±5 ºC.
Storage humidity range: 50±10%RH.
Shelf life: 30days
6 / 30
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2.2 ELECTRICAL ABSOLUTE RATINGS
Item Symbol
Power Supply Voltage VCC -0.3 +4.0 V Logic Input Voltage VIN -0.3 VCC+0.3 V
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
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Value
Min. Max.
Unit Note
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(1)
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3. ELECTRICAL CHARACTERISTICS
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Model No.: N133I6 - P0A
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3.1 TFT LCD OPEN CELL
Parameter Symbol
Value
Min. Typ. Max.
Unit Note
Power Supply Voltage Vcc 3.0 3.3 3.6 V ­Permissive Ripple Voltage VRP - 50 - mV ­Rush Current I
- - 1.5 A (2)
RUSH
Initial Stage Current IIS - - 1.0 A (2)
Power Supply Current
LVDS Differential Input High Threshold V
LVDS Differential Input Low Threshold V
White - 200 230 mA (3)a Black
Icc
- - +100 mV
TH(LVDS)
-100 - - mV
TL(LVD S)
- 270 300 mA (3)b
V
CM
V
CM
LVDS Common Mode Voltage VCM 1.125 - 1.375 V (5) LVDS Differential Input Voltage |VID| 100 - 600 mV (5) Terminating Resistor RT - 100 - Ohm Power per EBL WG P
- 1.4 - W (4)
EBL
Note (1) The ambient temperature is Ta = 25 ± 2 ºC.
Note (2) I
I
: the maximum current when VCC is rising
RUSH
: the maximum current of the first 100ms after power-on
IS
Measurement Conditions: Shown as the following figure. Test pattern: black.
+3.3V
R1
VR1
47K
R2
1K
47K
(High to Low)
(Control Signal)
SW
+12V
C1
1uF
Q1 2SK1475
C2
0.01uF
Vcc
(LCD Module Input)
Q2
2SK1470
C3
1uF
FUSE
0V
Vcc rising time is 470us
0.9Vcc
470us
0.1Vcc
+3.3V
100ms
VCC
I
I
RUSH
IS
ICC
(5),
=1.2V
(5)
=1.2V
8 / 30
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|
|
)
)
Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, fv = 60
Hz, whereas a power dissipation check pattern below is displayed.
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a. White Pattern
b. Black Pattern
Active Area
Note (4) The parameters of LVDS signals are defined as the following figures.
V
CM
Single Ended
0V
Active Area
V
ID
Differential
V
TH(LVDS
0V
V
TL(LVDS
|VID|
Note (5) The specified power are the sum of LCD panel electronics input power and the converter input
power. Test conditions are as follows.
(a) VCCS = 3.3 V, Ta = 25 ± 2 ºC, f
= 60 Hz,
v
(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file “Flat
Panel Display Monitor Setup Patterns”, FPDMSU.ppt.
(c) Luminance: 60 nits.
9 / 30
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4. BLOCK DIAGRAM
4.1 TFT LCD OPEN CELL
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LVDS Display
Data & Clock
Vcc
GND
Data
CLK
V
Converter
Input Signals
EDID
EDID
EDID
LVDS INPUT /
TIMING CONTROLLER
INPUT CONNECTOR
DC/DC CONVERTER &
REFERENCE VOLTAGE
GENERATOR
EDID
EEPROM
LED CONVERTER
SCAN DRIVER IC
TFT LCD PANEL
DATA DRIVER IC
BACKLIGHT UNIT
10 / 30
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5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD OPEN CELL
Pin Symbol Description Polarity Remark 1 VSS Ground 2 NC no connect 3 VDD Logic power 3.3V 4 VDD Logic power 3.3V 5 VDD Logic power 3.3V 6 VEDID EDID 3.3V power DDC 3.3V Power 7 NC no connect 8 CLK EDID clock DDC Clock 9 DATA EDID data DDC Data
10 VSS Ground 11 VSS Ground
12
NC no connect
13
RIN0-
14
RIN0+
15 VSS0 Ground-LVDS0
16
RIN1-
17
RIN1+
18 VSS1 Ground-LVDS1
19
RIN2-
20
RIN2+ 21 VSS2 Ground-LVDS2 22 CLK- - LVDS differential clock input 23 CLK+ + LVDS differential clock input 24 VSS3 Ground-LVDS3
INV_PWM / 25
R_PWM PWM brightness control 26 LED_Enable Enable LED 27 VSS LED Ground 28 VSS LED Ground 29 VSS LED Ground 30 VSS LED Ground
31 NC no connect 32 VBL+ 7V - 20V LED power 33 VBL+ 7V - 20V LED power 34 VBL+ 7V - 20V LED power 35 VBL+ 7V - 20V LED power 36 VBL+ 7V - 20V LED power 37 NC no connect 38 NC no connect 39 NC no connect 40 VSS Ground
Note (1) Connector Part No.: 20347- 140E-02(I-PEX) or equivalent
- LVDS differential data input (R0-R5, G0) + LVDS differential data input (R0-R5, G0)
- LVDS differential data input (G1-G5, B0-B1) + LVDS differential data input (G1-G5, B0-B1)
- LVDS differential data input (B2-B5,HS,VS, DE) + LVDS differential data input (B2-B5,HS,VS, DE)
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Negative
Positive
Negative
Positive
Negative
B2~B5, DE, Hsync, Vsync
Positive
R0~R5,G0
G1~G5, B0, B1
LVDS Level Clock
Note (2) User’s connector Part No: 20345-040T-02 (I-PEX) or equivalent
11 / 30
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Note (3) The first pixel is odd as shown in the following figure.
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5.2 LED CONVERTER OUTPUT PIN ASSIGNMENT
Pin Symbol Description
1 CH1
LED converter feedback channel 1 2 NC No connection 3 CH2 LED converter feedback channel 2 4 NC No connection 5 NC No connection 6 NC No connection 7 VL LED converter output voltage
8 VL LED converter output voltage
Note (1) Connector Part No.: ???? or equivalent
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Issued Date: Dec. 04, 2009
Model No.: N133I6 - P0A
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5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
CLK+
Rxin2
Rxin1
Rxin0
T/7
IN20 IN19 IN18 IN17 IN16 IN15 IN14
DE B5 B4 B3 B2 Vsync Hsync
IN13 IN12 IN11 IN10 IN9 IN8 IN7
B1 G4 G3 G2 G1 B0 G5
IN6 IN5 IN4 IN3 IN2 IN1 IN0
G0
Signal for 1 DCLK Cycle (T)
R3 R2 R1 R0 R5 R4
13 / 30
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5.3 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for
the color. The higher the binary input, the brighter the color. The table below provides the assignment of
color versus data input.
Color
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0 Black Red Green
Basic Colors
Gray Scale Of Red
Gray Scale Of Green
Gray Scale Of Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue Cyan Magenta Yellow White Red(0)/Dark Red(1) Red(2)
:
: Red(61) Red(62) Red(63) Green(0)/Dark Green(1) Green(2)
:
: Green(61) Green(62) Green(63) Blue(0)/Dark Blue(1) Blue(2)
:
: Blue(61) Blue(62) Blue(63)
0 1 0 0 0 1 1 1 0 0 0
1 1 1 0 0 0
0 0 0 0 0 0
0 0 0
0 1 0 0 0 1 1 1 0 0 0
:
:
:
: 1 1 1 0 0 0
:
:
:
: 0 0 0 0 0 0
:
:
:
: 0 0 0
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Data Signal
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0 0
0 0 0 0 0 0
0 0 0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0 0 0
1 1 1
0
0
0
0
0
0
:
: :
1
1
1
:
:
: 1 1 1
0 0 0
0 0 0 0 0 1
0 1 1
0 0 0
:
:
:
: 0 0 0 0 1 0
:
:
:
: 1 0 1
14 / 30
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Preliminary
5.4 EDID DATA STRUCTURE
The EDID (Extended Display Identification Data) data formats are to support displays as defined in the VESA Plug &
Display and FPDI standards.
Byte # (decimal)
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37
38
39
Byte # (hex)
Field Name and Comments
0 Header 1 Header 2 Header 3 Header 4 Header 5 Header 6 Header 7 Header 8 EISA ID manufacturer name (“CMO”)
9 EISA ID manufacturer name (Compressed ASCII) 0A ID product code (N133I6-L0A) 13 0B ID product code (hex LSB first; N133I6-L0A) 13
0C ID S/N (fixed “0”) 0D ID S/N (fixed “0”)
0E ID S/N (fixed “0”) 0F ID S/N (fixed “0”) 10 Week of manufacture (fixed week code)
11 Year of manufacture (fixed year code) 12 EDID structure version # (“1”) 13 EDID revision # (“3”) 14 Video I/P definition (“digital”) 15 Active area horizontal 28.608cm 1D 16 Active area vertical 17.88cm 13 17 Display Gamma (Gamma = ”2.2”) 18 Feature support (“Active off, RGB Color”) 19 Red/Green (Rx1, Rx0, Ry1, Ry0, Gx1, Gx0, Gy1, Gy0) 1A Blue/White (Bx1, Bx0, By1, By0, Wx1, Wx0, Wy1, Wy0) 1B Red-x (Rx = “0.622”)
1C Red-y (Ry = “0.346”) 58 1D Green-x (Gx = ”0.333”)
1E Green-y (Gy = ”0.528”) 1F Blue-x (Bx = ”0.164”) 20 Blue-y (By = ”0.162”) 21 White-x (Wx = ”0.313”) 22 White-y (Wy = ”0.329”) 23 Established timings 1 24 Established timings 2 25 Manufacturer’s reserved timings
26 Standard timing ID # 1 27 Standard timing ID # 1
Value (hex)
Value
(binary) 00 00000000 FF 11111111 FF 11111111 FF 11111111 FF 11111111 FF 11111111
FF 11111111 00 00000000 0D 00001101 AF 10101111
00010011
00010011 00 00000000 00 00000000 00 00000000 00 00000000 23 00100011 12 00010010 01 00000001 03 00000011 80 10000000
00011101
00010011 78 01111000 0A 00001010 5C 01011100 80 10000000 98 10011000
01011000 51 01010001 8E 10001110 27 00100111 25 00100101 50 01010000 54 01010100 00 00000000 00 00000000 00 00000000
01 00000001
01 00000001
15 / 30
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40 41 42 43 44 45 46 47 48 49 50 51 52 53
54
55 56 57 58 59 60 61 62 63 64
65
66 67 68 69 70
71
72 73 74
75
76 77 78 79 80 81
82 52 # 2 6th character of name (“6”) 36 83 84
28 Standard timing ID # 2 29 Standard timing ID # 2 2A Standard timing ID # 3
2B Standard timing ID # 3 2C Standard timing ID # 4 2D Standard timing ID # 4
2E Standard timing ID # 5
2F Standard timing ID # 5
30 Standard timing ID # 6
31 Standard timing ID # 6
32 Standard timing ID # 7
33 Standard timing ID # 7
34 Standard timing ID # 8
35 Standard timing ID # 8
Detailed timing description # 1 Pixel clock (“71MHz”, According
36
to VESA CVT Rev1.1) 37 # 1 Pixel clock (hex LSB first) 38 # 1 H active (“1280”) 39 # 1 H blank (“160”) 3A # 1 H active : H blank (“1280 : 160”) 3B # 1 V active (”800”)
3C # 1 V blank (”23”) 3D # 1 V active : V blank (”800 :23”)
3E # 1 H sync offset (”48”) 3F # 1 H sync pulse width ("32”) 40 # 1 V sync offset : V sync pulse width (”3 : 6”)
# 1 H sync offset : H sync pulse width : V sync offset : V sync 41
width (”48: 32 : 3 : 6”) 42 # 1 H image size (”286 mm”) 1E 43 # 1 V image size (”179 mm”) B3 44 # 1 H image size : V image size (”286 : 179”) 45 # 1 H boarder (”0”) 46 # 1 V boarder (”0”)
# 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol 47
Negatives 48 Detailed timing description # 2 49 # 2 Flag 4A # 2 Reserved
# 2 FE (hex) defines ASCII string (Model Name “N133I6-L0A”, 4B
ASCII)
4C # 2 Flag 4D # 2 1st character of name (“N”) 4E
4E # 2 2nd character of name (“1”) 31 4F # 2 3rd character of name (“3”) 33 50 # 2 4th character of name (“3”) 33 51 # 2 5th character of name (“I”) 49
53 # 2 7th character of name (“-”) 2D 54 # 2 8th character of name (“L”) 4C
01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001
BC 10111100
1B 00011011 00 00000000 A0 10100000 50 01010000 20 00100000 17 00010111 30 00110000 30 00110000 20 00100000 36 00110110
00 00000000
10 00010000 00 00000000 00 00000000
19 00011001
00 00000000 00 00000000 00 00000000
FE 11111110
00 00000000
00011110 10110011
01001110 00110001 00110011 00110011
01001001
00110110 00101101 01001100
16 / 30
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
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Doc No.:
Issued Date: Dec. 04, 2009
Model No.: N133I6 - P0A
Preliminary
85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110
111
112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127
55 # 2 9th character of name (“0”) 56 # 2 9th character of name (“A”) 57 # 2 New line character indicates end of ASCII string 58 # 2 Padding with “Blank” character 59 # 2 Padding with “Blank” character 5A Detailed timing description # 3
5B # 3 Flag 5C # 3 Reserved 5D # 3 FE (hex) defines ASCII string (Vendor “CMO”, ASCII)
5E # 3 Flag
5F # 3 1st character of string (“C”)
60 # 3 2nd character of string (“M”)
61 # 3 3rd character of string (“O”)
62 # 3 New line character indicates end of ASCII string
63 # 3 Padding with “Blank” character
64 # 3 Padding with “Blank” character
65 # 3 Padding with “Blank” character
66 # 3 Padding with “Blank” character
67 # 3 Padding with “Blank” character
68 # 3 Padding with “Blank” character
69 # 3 Padding with “Blank” character
6A # 3 Padding with “Blank” character
6B # 3 Padding with “Blank” character 6C Detailed timing description # 4 6D # 4 Flag
6E # 4 Reserved
# 4 FE (hex) defines ASCII string (Model Name“N133I6-L0A”,
6F
ASCII) 70 # 4 Flag 71 # 4 1st character of name (“N”) 4E 72 # 4 2nd character of name (“1”) 31 73 # 4 3rd character of name (“3”) 33 74 # 4 4th character of name (“3”) 33 75 # 4 5th character of name (“I”) 49 76 # 4 6th character of name (“6”) 36 77 # 4 7th character of name (“-”) 2D 78 # 4 8th character of name (“L”) 4C 79 # 4 9th character of name (“0”) 7A # 4 9th character of name (“A”) 7B # 4 New line character indicates end of ASCII string
7C # 4 Padding with “Blank” character 7D # 4 Padding with “Blank” character
7E Extension flag 7F Checksum
30 00110000 41 01000001 0A 00001010 20 00100000 20 00100000 00 00000000 00 00000000 00 00000000
FE 11111110
00 00000000 43 01000011
4D 01001101
4F 01001111 0A 00001010 20 00100000 20 00100000 20 00100000 20 00100000 20 00100000 20 00100000 20 00100000 20 00100000 20 00100000 00 00000000 00 00000000 00 00000000
FE 11111110
00 00000000
01001110
00110001
00110011 00110011
01001001
00110110 00101101 01001100
30 00110000 41 01000001 0A 00001010 20 00100000 20 00100000 00 00000000
2D 00101101
17 / 30
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
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6 CONVERTER SPECIFICATION
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Issued Date: Dec. 04, 2009
Model No.: N133I6 - P0A
6.1 ABSOLUTE MAXIMUM RATINGS
Symbol Ratings
Vin 40.0V
Gnd +/-0.3V
PWM, EN -0.3V~6.0V
6.2 RECOMMENDED OPERATING RATINGS
Parameter Symbol
Converter Input power supply voltage Vin 7.0 12.0 21.0 V
EN Control Level
PWM Control Level
PWM Control Duty Ratio 20 100 % PWM Control Frequency f
Converter Input Current
Note (1) The specified LED power supply current is under the conditions at Vin = 7 V, Ta = 25 ± 2 ºC, f
200 Hz, Duty=100%.
Backlight on 2.0 --- 5.5 V Backlight off PWM High Level 2.0 --- 5.5 V PWM Low Level
Vin=7 V 600 650 mA (1) Vin=21V
PW M
IBL
Min. Typ. Max.
0 --- 0.8 V
0 --- 0.8 V
180 200 220 Hz
200 220 mA (2)
Value
Doc No.:
Preliminary
Unit Note
=
PW M
Note (2) The specified LED power supply current is under the conditions at Vin = 21V, Ta = 25 ± 2 ºC, f
= 200 Hz, Duty=100%.
PW M
18 / 30
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
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7. INTERFACE TIMING
7.1 INPUT SIGNAL TIMING SPECIFICATIONS
The specifications of input signal timing are as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
DCLK Frequency 1/Tc 50 71 80 MHz -
Vertical Total Time TV 803 823 1028 TH -
Vertical Addressing Time TVD 800 800 800 TH -
DE
Note (1) Because this open cell is operated by DE only mode, Hsync and Vsync are ignored.
Vertical Active Blanking Period TVB TV-TVD 23 TV-TVD TH
Horizontal Total Time TH 1362 1440 1800 Tc -
Horizontal Addressing Time THD 1280 1280 1280 Tc -
Horizontal Active Blanking Period THB
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TH-THD
160
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Issued Date: Dec. 04, 2009
Model No.: N133I6 - P0A
Preliminary
TH-THD
Tc
INPUT SIGNAL TIMING DIAGRAM
DE
DCLK
TC
DE
DATA
T
HD
19 / 30
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pply
p
7.2 POWER ON/OFF SEQUENCE
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Doc No.:
Issued Date: Dec. 04, 2009
Model No.: N133I6 - P0A
Preliminary
Restart Power On Power Off
- Power Su for LCD, Vcc
- LVDS Interface
- Power for Lam
Timing Specifications:
Љ
0.5
t1 Љ 10 ms
Љ
t2 Љ 50 ms
0
Љ
t3 Љ 50 ms
0
t4
t5
Њ
500 ms
Њ
200 ms
0V
0V
10%
90%
t1
90%
Valid Data
t6 t5
ON OFF OFF
t7
10%
t4
t3 t2
50% 50%
10%
Њ
200 ms
t6
Note (1) Please follow the power on/off sequence described above. Otherwise, the LCD open cell might be
damaged.
Note (2) Please avoid floating state of interface signal at invalid period. When the interface signal is invalid, be
sure to pull down the power supply of LCD Vcc to 0 V.
Note (3) The Backlight converter power must be turned on after the power supply for the logic and the
interface signal is valid. The Backlight converter power must be turned off before the power supply
for the logic and the interface signal is invalid.
Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To
Љt7Љ
avoid this phenomenon, we suggest that the Vcc falling time is better to follow 5
300 ms.
20 / 30
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8 OPTICAL CHARACTERISTICS
8.1 TEST CONDITIONS
Item Symbol Value Unit Ambient Temperature Ta Ambient Humidity Ha Supply Voltage VCC 3.4 V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
8.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown as below. The following items
should be measured under the test conditions described in 7.1 and stable environment shown in Note (6).
Item Symbol Condition Min. Typ. Max. Unit Note
Red
Color Chromaticity
Center Transmittance T% Contrast Ratio CR
Response Time
Transmittance uniformity
Viewing Angle
Green
Blue
White
Horizontal
Vertical
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Issued Date: Dec. 04, 2009
Model No.: N133I6 - P0A
Preliminary
o
25±2
50±10
Rcx 0.601 Rcy
0.329
Gcx 0.286
=0°, θY =0°
θ
Gcy
Bcx 0.141
Standard light source “C”
x
CS-1000T
Typ -
0.05
Bcy
0.547
0.176
Typ +
0.05
Wcx 0.303 Wcy
=0°, θY =0°
θ
x
CS-1000T, CMO BLU TR - 5 10 T
F
δT%
θ
=0°, θY =0°
x
=0°, θY =0°
θ
x
BM-5A
5.6 7 -
200 300
θx+
θ
-
x
θY+
θ
Y
-
CR10
BM-5A
0.350
-
- 11 16
80 90 -
40 45 ­40 15 40
45 ­20 ­45 -
C
%RH
-
-
-
­(0),(6)
-
-
-
-
(1), (8)
- (1), (3)
ms ms
(4)
- (1), (7)
Deg.
(1), (3)
(6)
Note (0) Light source is the standard light source “C” which is defined by CIE and driving voltages are
based on suitable gamma voltages. The calculating method is as following
Κ
1. Measure Module’s and BLU’s spectrums. White is without signal input and R, G, B are with signal
input. BLU is supplied by CMO.
2. Calculate cell’s spectrum.
3. Calculate cell’s chromaticity by using the spectrum of standard light source “C”
Note (1) Light source is the BLU which is supplied by CMO and driving voltages are based on suitable
gamma voltages. White is without signal input and R, G, B are with signal input. SPEC is judged
by CMO’s golden sample.
Note (2) Definition of Viewing Angle (θx, θy):
21 / 30
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T
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Doc No.:
Issued Date: Dec. 04, 2009
Model No.: N133I6 - P0A
Preliminary
θX- = 90º
x-
6 o’clock
y-
= 90º
θ
y-
Note (3) Definition of Contrast Ratio (CR):
= [CR(1)+ CR(2)+ CR(3)+ CR(4)+ CR(5)] / 5
CR
AVE
=Max value of CR at whole Viewing Angle
CR
max
CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).
Normal
θx = θy = 0º
θy- θy+
θx
θx+
12 o’clock direction
y+
y+
θ
= 90º
x+
θX+ = 90º
Luminance with all pixel white (Gmax)
CR =
Luminance with all pixel black (Gmin)
Gmax: Luminance of gray max at the center point of panel.
Gmin: Luminance of gray min at the center point of panel.
Note (4) Definition of Response Time (T
100%
90%
Optical
Response
10%
0%
Gray Level 255
T
, TF):
R
R
Gray Level 255
ime
T
F
m
m
22 / 30
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Note (5) Definition of Luminance of White (LC):
Measure the luminance of gray level 255 at center point
= L (5)
L
C
L (x) is corresponding to the luminance of the point X at Figure in Note (7).
Note (6) Measurement Setup:
The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting Backlight for 20 minutes in a windless room.
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Issued Date: Dec. 04, 2009
Model No.: N133I6 - P0A
Preliminary
Note (7) Definition of Transmittance Variation (δT%):
Measure the transmittance at 5 points
T% =
LCD Module
LCD Panel
USB2000
Center of the Screen
Minimum [T%(1), T%(2), … T%(5)]
Maximum [T%(1), T%(2), … T%(5)]
D/4 D/2 3D/4
CS-2000T
Field of View = 2º
Light Shield Room
(Ambient Luminance < 2 lux)
Horizontal Line
D
Vertical Line
W
W/4
W/2
3W /4
1 2
: Test Point
X
X=1 to 5
3
5
4
Active Area
23 / 30
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Note (8) Definition of Transmittance (T%):
Module is without signal input.
BLU is supplied by CMO.
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Doc No.:
Issued Date: Dec. 04, 2009
Model No.: N133I6 - P0A
Preliminary
Transmittance =
Luminance of LCD module
Luminance of backlight
Ϡ
100%
9. PRECAUTIONS
9.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the open cell during assembly.
(2) To assemble or install open cell into user’s system can be only in clean working areas. The dust and oil
may cause electrical short or worsen the polarizer.
(3) It’s not permitted to have pressure or impulse on the open cell because the LCD panel and Backlight
will be damaged.
(4) Always follow the correct power sequence when LCD open cell is connecting and operating. This can
prevent damage to the CMOS LSI chips during latch-up.
(5) Do not pull the I/F connector in or out while the open cell is operating.
(6) Do not disassemble the open cell.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) It is dangerous that moisture come into or contacted the LCD open cell, because moisture may
damage LCD open cell when it is operating.
(9) High temperature or humidity may reduce the performance of open cell. Please store LCD open cell
within the specified storage conditions.
(10) When ambient temperature is lower than 10ºC may reduce the display quality. For example, the
response time will become slowly, and the starting voltage of CCFL will be higher than room
temperature.
9.2 SAFETY PRECAUTIONS
(1) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while
assembling with converter. Do not disassemble the open cell or insert anything into the Backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the open cell’s end of life, it is not harmful in case of normal operation and storage.
9.3 OPERATION PRECAUTIONS
(1) Do not pull the I/F connector in or out while the open cell is operating.
24 / 30
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(2)
Always follow the correct power on/off sequence when LCD open cell is connecting and operating. This
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Doc No.:
Issued Date: Dec. 04, 2009
Model No.: N133I6 - P0A
Preliminary
can prevent the CMOS LSI chips from damage during latch-up.
10. PACKAGING
10.1 PACKING SPECIFICATIONS
(1) 56 open cells / 1 Box
(2) Box dimensions: 650mm(L) X 495mm(W) X 320mm(H)
(3) Weight: approximately 12.3Kg (56 open cells per box)
10.2 PACKING METHOD
(1) Carton Packing should have no failure in the following reliability test items
Test Item Test Conditions Note
ISTA STANDARD
Packing Vibration
(2) Packing method.
Random, Frequency Range: 1 – 200 Hz Top & Bottom: 30 minutes (+Z), 10 min (-Z), Right & Left: 10 minutes (X) Back & Forth 10 minutes (Y)
Non Operation
25 / 30
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10.2 Pallet:
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Doc No.:
Issued Date: Dec. 04, 2009
Model No.: N133I6 - P0A
Preliminary
ʳ
Figure. 10-2 Packing method
26 / 30
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11. DEFINITION OF LABELS
11.1 CMO OPEN CELL LABEL
The barcode nameplate is pasted on each OPEN CELL as illustration for CMO internal control.
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Doc No.:
Issued Date: Dec. 04, 2009
Model No.: N133I6 - P0A
Preliminary
N133I6-P0A RoHS Rev.XX
Barcode definition:
Serial ID: CM
Code Meaning Description
CM Supplier code CMO=CM
13I6A Model number N133I6-P0A=13I6A
X Revision code C1:1 ,C2:2……
X Source driver IC code
X Gate driver IC code
XX Cell location Tainan, Taiwan=TN
L Cell line # 0~12=1~C
XX Module location Tainan, Taiwan=TN
L Module line # 0~12=1~C
YMD
NNNN Serial number Manufacturing sequence of product
CM13I6AXXXXXLXXLYMDNNNN
-13I62-X-X-X-XX-L-XX-L-YMD-NNNN
Year, month, day Year: 2001=1, 2002=2, 2003=3, 2004=4…
ʳ
Century=1, CLL=2, Demos=3, Epson=4, Fujitsu=5, Himax=6, Hitachi=7, Hynix=8, LDI=9, Matsushita=A, NEC=B, Novatec=C, OKI=D, Philips=E, Renasas=F, Samsung=G, Sanyo=H, Sharp=I, TI=J, Topro=K, Toshiba=L, Windbond=M
Month: 1~12=1, 2, 3, ~, 9, A, B, C Day: 1~31= 1, 2, 3, ~, 9, A, B, C, ~, T, U, V
11.2 CMO CARTON LABEL
The barcode nameplate is pasted on each box as illustration, and its definitions are as following explanation
(a) Model Name: N133I6 –P0A
(b) Carton ID: CMO internal control
(c) Quantities: 56
ˡ˄ˆˆ˜ˉˀˣ˃˔ʳ
ˈˉʳ
27 / 30
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