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N121X5-L05
Specification
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CMO N121X5-L05 Specification

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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
- CONTENTS -
REVISION HISTORY
1. GENERAL DESCRIPTION
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
2.2.2 BACKLIGHT UNIT
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
4.2 BACKLIGHT UNIT
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
5.2 BACKLIGHT UNIT
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
5.4 COLOR DATA INPUT ASSIGNMENT
5.5 EDID DATA STRUCTURE
5.6 EDID SIGNAL SPECIFICATION
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
6.2 POWER ON/OFF SEQUENCE
7. INVERTER SPECIFICATION ------------------------------------------------------- 24
7.1 TYPE OF INVERTER CONNECTOR
7.2 BUILT-IN INVERTER INPUT PIN ASSIGNMENT
7.2 BUILT-IN INVERTER OUTPUT PIN ASSIGNMENT
7.4 GENERAL ELECTRICAL SPECIFICATION
8. OPTICAL CHARACTERISTICS
8.1 TEST CONDITIONS
8.2 OPTICAL SPECIFICATIONS
9. PRECAUTIONS
9.1 HANDLING PRECAUTIONS
9.2 STORAGE PRECAUTIONS
9.3 OPERATION PRECAUTIONS
10. PACKING ------------------------------------------------------- 33
10.1 CARTON
10.2 PALLET
------------------------------------------------------- 4
------------------------------------------------------- 5
------------------------------------------------------- 6
------------------------------------------------------- 8
------------------------------------------------------- 14
------------------------------------------------------- 15
------------------------------------------------------- 22
------------------------------------------------------- 28
------------------------------------------------------- 32
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
11. DEFINITION OF LABELS ------------------------------------------------------- 34
11.1 CMO MODULE LABEL
11.2 CARTON LABEL
11.3 CUSTOMER CARTON LABEL
11.4 CUSTOMER PALLET LABEL
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
Version Date
Ver 1.0
Ver1.1
Feb. 04. ‘05
Mar. 11. ‘05
Page
(New)
All
8
9
9
10
17
25
27
28
REVISION HISTORY
Section Description
Preliminary specification first issued.
All
3.1
3.1
3.2
3.2
5.5
7.4.2
7.4.2
8.2
Modify Power the value of per EBL WG
Delete item (d) of Note (4)
Modify the value of Max. Lamp Current, Max. Power Consumption, Min
Lamp Life Time
Modify Note (5): I
Modify EDID DATA STRUCTURE
Modify the value of No.7,8
Modify Brightness control
Modify Color Gamut (typ.):45%
= 5.0mA
L
RMS
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
N121X5 -L05 is a 12.1” TFT Liquid Crystal Display module with single CCFL Backlight unit and 20 pins
LVDS interface. This module supports 1024 x 768 XGA mode and can display 262,144 colors. The optimum
viewing angle is at 6 o’clock direction. The inverter module for Backlight is built in.
1.2 FEATURES
- Thin and light weight
- XGA (1024 x 768 pixels) resolution
- DE (Data Enable) only mode
- 3.3V LVDS (Low Voltage Differential Signaling) interface with 1 pixel/clock
- Support EDID Structure Version 1 Revision 3
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
1.3 APPLICATION
- TFT LCD Notebook
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note Active Area 245.76 (H) X 184.32 (V) mm Bezel Opening Area 250.5 (H) x 188.9 (V) mm Driver Element a-si TFT active matrix - ­Pixel Number 1024 x R.G.B. x 768 pixel ­Pixel Pitch 0.24 (H) x 0.24 (V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 262,144 color ­Transmissive Mode Normally white - ­Surface Treatment Hard coating (3H), Anti-glare (Haze 25 %) - -
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal(H) 260.5 261 261.5 mm
Module Size
Vertical(V) 197.5 198 198.5 mm
Depth(D) -- 4.7
Weight
-- 260 275 g (2)
-- 270 285 g (3)
5.0 (Panel Module)
5.2 (Inverter, follow Dell Spec.)
(1)
(1)
mm
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Note (2) Weight without inverter.
Note (3) Weight with inverter
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A
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1) Operating Ambient Temperature TOP 0 +50 ºC (1), (2) Shock (Non-Operating) S Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation .
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Min. Max.
- 220 G (3), (5)
NOP
- 1.5 G (4), (5)
NOP
Value
Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
Unit Note
Note (2) The temperature of panel surface should be 0 ºC Min. and 50 ºC Max.
Note (3) 2ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Relative Humidity (%RH)
100
90
80
60
Operating Range
40
20
Storage Range
5
Temperature (ºC)
8060 -20 400 20-40
Note (4) 10 ~ 200 Hz, 0.5 Hr / Cycle, 1 cycles for each X, Y, Z. The fixing condition is shown as below:
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
t Room Temperature
Side Mount Fixing Screw
Gap=2mm
so that the module would not be twisted or bent by the fixture.
Bracket
LCD Module
Side Mount Fixing Screw
Stage
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2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage Vcc -0.3 +4.0 V Logic Input Voltage VIN -0.3 Vcc+0.3 V
2.2.2 BACKLIGHT UNIT
Item Symbol
Lamp Voltage VL - 2.5K V Lamp Current IL - 6.5 mA Lamp Frequency FL - 80 KHz
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
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Value
Min. Max.
Value
Min. Max.
Unit Note
Unit Note
Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
(1)
(1), (2), IL = (6.0) mA
RMS
RMS
(1), (2)
should be restricted to the conditions described under Normal Operating Conditions.
Note (2) Specified values are for lamp (Refer to Section 3.2 for further information).
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max. Power Supply Voltage Vcc 3.0 3.3 3.6 V ­Ripple Voltage VRP - - 100 mV ­Rush Current I
Power Supply Current
White - (300) mA (3)a Black
- - 1.5 A (2)
RUSH
lcc
- (350) mA (3)b
“H” Level VIH - - +100 mV - Differential Input Voltage for
LVDS Receiver Threshold
“L” Level V
-100 - - mV -
IL
Terminating Resistor RT - 100 - Ohm ­Power per EBL WG P
- (2.71) - W (4)
EBL
Note (1) The module should be always operated within above ranges.
Value
Unit Note
Note (2) Measurement Conditions:
+3.3V
R1
47K
(High to Low)
(Control Signal)
SW
+12V
VR1
C1
1uF
Vcc rising time is 470us
R2
47K
2SK1475
Q
1
Q
2SK1470
1K
0.01uF
2
C
2
FUSE
C3
1u
F
Vcc
(LCD Module Input)
+3.3V
0.9Vcc
0.1Vcc
GND
470us
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Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, DC
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
Current and f
a. White Pattern
= 60 Hz, whereas a power dissipation check pattern below is displayed.
v
b. Black Pattern
Active Area
Active Area
Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input
power. Test conditions are as follows.
(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f
= 60 Hz,
v
(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file
“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.
(c) Luminance: 60 nits.
3.2 BACKLIGHT UNIT
Parameter Symbol
Min. Typ. Max. Lamp Input Voltage VL (540) (600) (660) V Lamp Current IL (3.0) 5.0 5.5 mA
Lamp Turn On Voltage VS
- - (1170) (25
- - (1340) (0 Operating Frequency FL (45) - (80) KHz (3) Power Consumption PL - (3.0) (3.3) W (4), IL = 5.0 mA Lamp Life Time LBL 15,000 - - Hrs (5)
Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:
LCD
Module
HV (White)
LV (Black)
Note (2) The voltage shown above should be applied to the lamp for more than 1 second after startup.
Otherwise the lamp may not be turned on.
Value
1
2
Current Meter
o
C) V
o
C) V
Inverter
A
Ta = 25 ± 2 ºC
Unit Note
I
RMS
RMS
(2)
RMS
(2)
RMS
= 5.0 mA
L
(1),(7)
Note (3) The lamp frequency may generate interference with horizontal synchronous frequency from the
display, and this may cause line flow on the display. In order to avoid interference, the lamp
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frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
Note (4) P
= IL VL
L
Note (5) The lifetime of lamp is defined as the time when it continues to operate under the conditions at Ta
= 25 2
o
C and IL = 5.0mA
until one of the following events occurs:
RMS
(a) When the brightness becomes Љ 50% of its original value.
(b) When the effective ignition length becomes Љ 80% of its original value. (Effective ignition
length is defined as an area that the brightness is less than 70% compared to the center point.)
Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the
inverter must have specifications for the modularized lamp. The performance of the Backlight,
such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for
the lamp. All the parameters of an inverter should be carefully designed to avoid generating too
much current leakage from high voltage output of the inverter. When designing or ordering the
inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the
inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module
should be operated in the same manners when it is installed in your instrument.
The output of the inverter must have symmetrical (negative and positive) voltage waveform and
symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter,
which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may
produce interface with horizontal synchronous frequency and as a result this may cause beat on the
display. Therefore lamp frequency shall be as away possible from the horizontal synchronous
frequency and from its harmonics in order to prevent interference.
Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its
leakage current.
a. The asymmetry rate of the inverter waveform should be 10% below;
b. The distortion rate of the waveform should be within Ѕ2 ± 10%;
c. The ideal sine wave form shall be symmetric in positive and negative polarities.
* Asymmetry rate:
I p
| I
– I –p | / I
p
* 100%
rms
I
-p
* Distortion rate
I
(or I –p) / I
p
rms
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Note (7) The lamp leakage current is measured by the current difference between in and out. And the
measurement condition is as below:
FG
Low
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
LCD Module
High
Lamp
Current Probe
GND
I
Low
Current Probe
Inverter
I
Leak(RMS)
= I
High(RMS)
- I
Low(RMS)
I
High
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Note (8) About operating current min 2.0mA , lamp maker has some advice as below
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
Explanation and comparison of the kind of tone light:
ʳ Lamp current wave-like by the adjustment of the current.
ྙ
ʳ Lamp current wave-like by the adjustment of the burst.
ྚ
(Reference) Light quantity adjustment method
P-P LEVEL DOWN
Tone light
P-P LEVEL =
Comparative table
Method
current Good ( 75 % Д 85% )
ྙ
burst Bad ( 65 % Д 75% )
ྚ
Method of case that Lamp current MIN2.0mA is controlled.
It is the setting of minimum 2.0mA (MIN) to Lamp current 6.0mA in the lamp specification. The burst is
excellent for circuitry. The marker proposes that pays attention to the following contents.
Backlight efficiency (INVЀLAMP)
OFF:20%
ON:80%
Tone light rate (%) Circuitry
58 Complicated 10 Easy
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The attention point of the light with a touch of the burst:
ʳ Do not to be SPARK at start.
ྙ
N G
SPARK
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
GOOD
ʳ PWM frequency does so that the frequency that is not able to divide the fixed number time, fixed
ྚ
number to lamp drive frequency is selected. (It is due to resonance noise occurrence prevention. )
Even the frequency that is using it for LCD avoids selecting it.
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)
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
Rxin0(+/-)
Rxin1(+/-)
Rxin2(+/-)
CLK(+/-)
(HIROSE DF19L-20P-1H)
INPUT CONNECTOR
Vcc
GND
Data
CLK
V
EDID
EDID
EDID
VL
LAMP CONNECTOR
(JST-BHSR-02VS-1)
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LVDS INPUT /
TIMING CONTROLLER
DC/DC CONVERTER &
REFERENCE VOLTAGE
GENERATOR
EDID
EEPROM
Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
SCAN DRIVER IC
TFT LCD PANEL
(1024xR.G.B.x768)
DATA DRIVER IC
BACKLIGHT UNIT
Preliminary
4.2 BACKLIGHT UNIT
1 HV (White)
2 LV (Black
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5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin Symbol Description Polarity Remark
1 Vss Ground 2 Vcc Power Supply +3.3 V (typical) 3 Vcc Power Supply +3.3 V (typical) 4 V 5 BIST Panel BIST enable pin 6 CLK 7 DATA 8 Rxin0- LVDS Differential Data Input Negative
9 Rxin0+ LVDS Differential Data Input Positive
10 Vss Ground 11 Rxin1- LVDS Differential Data Input Negative
12 Rxin1+ LVDS Differential Data Input Positive
13 Vss Ground 14 Rxin2- LVDS Differential Data Input Negative 15 Rxin2+ LVDS Differential Data Input Positive 16 Vss Ground 17 CLK- LVDS Clock Data Input Negative 18 CLK+ LVDS Clock Data Input Positive 19 Vss Ground 20 Vss Ground
Note (1) The first pixel is even.
DDC 3.3V Power
EDID
DDC Clock
EDID
DDC Data
EDID
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
R0~R5,G0
-
G1~G5,B0,B1
-
B2~B5,DE,Hsync,Vsync
LVDS Level Clock
Note (2) Connector Part No.: HIROSE DF19L-20P-1H or equivalent
Note (3) User’s connector Part No: HIROSE DF19G-20S-1C or equivalent
5.2 BACKLIGHT UNIT
Pin Symbol Description Color
1 HV High Voltage White 2 LV Ground Black
Note (1) Connector Part No.: JST-BHSR-02VS-1 or equivalent
Note (2) User’s connector Part No.: JST-SM02B-BHSS-1-TB or equivalent
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
CLK+
T/7
Rxin2
Rxin1
IN20 IN19 IN18 IN17 IN16 IN15 IN14
DE B5 B4 B3 B2 Vsync Hsync
IN13 IN12 IN11 IN10 IN9 IN8 IN7
B1
G4 G3 G2 G1 B0 G5
Rxin0
IN6 IN5 IN4 IN3 IN2 IN1 IN0
G0 R3 R2 R1 R0 R5 R4
Signal for 1 DCLK Cycle (T)
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5.4 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for
the color. The higher the binary input the brighter the color. The table below provides the assignment of
color versus data input.
Color
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0 Black Red Green
Basic Colors
Gray Scale Of Red
Gray Scale Of Green
Gray Scale Of Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue Cyan Magenta Yellow White Red(0)/Dark Red(1) Red(2)
:
: Red(61) Red(62) Red(63) Green(0)/Dark Green(1) Green(2)
:
: Green(61) Green(62) Green(63) Blue(0)/Dark Blue(1) Blue(2)
:
: Blue(61) Blue(62) Blue(63)
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0 : :
1
1
1
1
1
1
0
0
0
0
0
0 : :
0
0
0
0
0
0
0
0
0
0
0
0 : :
0
0
0
0
0
0
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
Data Signal
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
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:
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:
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
:
:
:
:
:
:
:
:
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0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
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5.5 EDID DATA STRUCTURE
The EDID (Extended Display Identification Data) data formats are to support displays as defined in the
VESA Plug & Display and FPDI standards.
Byte #
(decimal)
0 0 Header 00 00000000 1 1 Header FF 11111111 2 2 Header FF 11111111 3 3 Header FF 11111111 4 4 Header FF 11111111 5 5 Header FF 11111111 6 6 Header FF 11111111 7 7 Header 00 00000000 8 8
9 9 EISA ID manufacturer name (Compressed ASCII) AF 10101111 10 0A ID product code (N121X5) 04 00000100 11 0B ID product code (hex LSB first; N121X5) 12 00010010 12 0C 13 0D 14 0E 15 0F 16 10 17 11 18 12 19 13 20 14 21 15 22 16 23 17 24 18 25 19 26 1A 27 1B 28 1C 29 1D 30 1E 31 1F 32 20 33 21 White-x (Wx = “0.313”) 50 01010000 34 22 White-y (Wy = “0.329”) 54 01010100 35 23 Established timings 1 00 00000000 36 24 Established timings 2 (1024x768@60Hz) 08 00001000 37 25 Manufacturer’s reserved timings 00 00000000 38 26 Standard timing ID # 1 01 00000001 39 27 Standard timing ID # 1 01 00000001 40 28 Standard timing ID # 2 01 00000001 41 29 Standard timing ID # 2 01 00000001
Byte #
(hex)
Field Name and Comments
EISA ID manufacturer name (ϘCMOϙ)
ID S/N (fixed Ϙ0ϙ) ID S/N (fixed Ϙ0ϙ) ID S/N (fixed Ϙ0ϙ) ID S/N (fixed Ϙ0ϙ) Week of manufacture (fixed Ϙ50ϙ) Year of manufacture (fixed Ϙ2004ϙ) EDID structure version # (Ϙ1ϙ) EDID revision # (Ϙ3ϙ) Video I/P definition (Ϙdigitalϙ) Max H image size (Ϙ24.576 cmϙ) Max V image size (Ϙ18.432 cmϙ) Display Gamma (Gamma = ϙ2.2ϙ) Feature support (ϘRGB, preferred timingϙ)
Red/Green (Rx1, Rx0, Ry1, Ry0, Gx1, Gx0, Gy1, Gy0) Blue/White (Bx1, Bx0, By1, By0, Wx1, Wx0, Wy1, Wy0) Red-x (Rx = “0.585”) Red-y (Ry = “0.335”) Green-x (Gx = “0.32”) Green-y (Gy = “0.53”) Blue-x (Bx = “0.15”) Blue-y (By = “0.135”)
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
Value
(hex)
0D 00001101
00 00000000 00 00000000 00 00000000 00 00000000 32 00110010
0E 00001110
01 00000001 03 00000011 80 10000000 19 00011001 12 00010010
78 01111000 0A 00001010 FE 11111110
60 01100000
95 10010101
55 01010101
51 01010001
87 10000111
26 00100110
22 00100010
Value
(binary)
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42 2A Standard timing ID # 3 01 00000001 43 2B Standard timing ID # 3 01 00000001 44 2C Standard timing ID # 4 01 00000001 45 2D Standard timing ID # 4 01 00000001 46 2E Standard timing ID # 5 01 00000001 47 2F Standard timing ID # 5 01 00000001 48 30 Standard timing ID # 6 01 00000001 49 31 Standard timing ID # 6 01 00000001 50 32 Standard timing ID # 7 01 00000001 51 33 Standard timing ID # 7 01 00000001 52 34 Standard timing ID # 8 01 00000001 53 35 Standard timing ID # 8 01 00000001 54 36 55 37 # 1 Pixel clock (hex LSB first) 19 00011001 56 38 57 39 58 3A 59 3B 60 3C 61 3D 62 3E 63 3F 64 40 65 41 # 1 H sync offset: H sync pulse width : V sync offset : V sync
66 42 67 43 68 44 69 45 70 46 71 47 72 48 Detailed timing description # 2 Pixel clock (“52 MHz”, According
73 49 # 2 Pixel clock (hex LSB first) 14 00010100 74 4A # 2 H active (“1024”) 00 00000000 75 4B # 2 H blank (“288”) 20 00100000 76 4C # 2 H active : H blank (“1024 : 288”) 41 01000001 77 4D # 2 V active (“768”) 00 00000000 78 4E # 2 V blank (“25”) 19 00011001 79 4F # 2 V active : V blank (“768 : 25”) 30 00110000 80 50 # 2 H sync offset (“40”) 28 00101000 81 51 # 2 H sync pulse width (“104”) 68 01101000 82 52 # 2 V sync offset : V sync pulse width (“3 : 4”) 34 00110100 83 53 # 2 H sync offset : H sync pulse width : V sync width : V sync
84 54 # 2 H image size (“245.76 mm”) F6 11110110
85 55 # 2 V image size (“184.32 mm”) B8 10111000 86 56 # 2 H image size : V image size (“245 : 184”) 00 00000000
Detailed timing description # 1 Pixel clock (Ϙ65 MHzϙ)
# 1 H active (Ϙ1024ϙ) # 1 H blank (Ϙ320ϙ) # 1 H active: H blank (Ϙ1024 : 320ϙ) # 1 V active (ϙ768ϙ) # 1 V blank (ϙ38ϙ) # 1 V active: V blank (ϙ768 : 38ϙ) # 1 H sync offset (ϙ24ϙ) # 1 H sync pulse width (ϙ136ϙ) # 1 V sync offset: V sync pulse width (ϙ3 : 6ϙ)
width (ϙ24 : 136 : 3 : 6ϙ) # 1 H image size (ϙ245.76 mmϙ) # 1 V image size (ϙ184.32 mmϙ) # 1 H image size: V image size (ϙ245 : 184ϙ) # 1 H boarder (ϙ0ϙ) # 1 V boarder (ϙ0ϙ) # 1 Flags (ϙNon-Interlace, Non-Stereo, Digital Separateϙ)
to VESA CVT Rev. 1.1)
pulse width (“24 : 136 : 3 : 4”)
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
64 01100100
00 00000000
40 01000000
41 01000001
00 00000000
26 00100110
30 00110000
18 00011000
88 10001000
36 00110110
00 00000000
F6 11110110 B8 10111000
00 00000000
00 00000000
00 00000000
18 00011000
50 01010000
00 00000000
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87 57 # 2 H boarder (“0”) 00 00000000 88 58 # 2 V boarder (“0”) 00 00000000 89 59 Module “A” Revision= Example : 00, 01, 02, 03, etc. 00 00000000 90 5A Detailed timing description # 3 00 00000000 91 5B # 3 Flag 00 00000000 92 5C # 3 Reserved 00 00000000 93 5D
94 5E # 3 Flag 00 00000000 95 5F 96 60 97 61 98 62
99 63 100 64 101 65 # 3 New line character # 3 indicates end of ASCII string 20 00100000 102 66 103 67 104 68 105 69 106 6A 107 6B 108 6C Detailed timing description # 4 00 00000000 109 6D # 4 Flag 00 00000000 110 6E # 4 Reserved 00 00000000
111 6F # 4 Data Type Tag: 112 70 # 4 Flag 00 00000000 113 114 115 116 117 118 119 120 121 122 7A Numbers of LVDS Receiver chip = 0 (“Yes”) 00 00000000 123 7B (If < 13 char, then terminate with ASCII code 0Ah, set remaining
124 7C (If < 13 char, then terminate with ASCII code 0Ah, set remaining
125 7D (If < 13 char, then terminate with ASCII code 0Ah, set remaining
126 7E Extension flag 00 00000000 127 7F Checksum 25 00100101
# 3 FE (hex) defines ASCII string (Model Name ϘN121X5ϙ, ASCII)
# 3 1st character of string (ϘNϙ) # 3 2nd character of string (Ϙ1ϙ) # 3 3rd character of string (Ϙ2ϙ) # 3 4th character of string (Ϙ1ϙ) # 3 5th character of string (ϘXϙ) # 3 6th character of string (Ϙ5ϙ)
# 3 Padding with ϘBlankϙ character # 3 Padding with ϘBlankϙ character # 3 Padding with ϘBlankϙ character # 3 Padding with ϘBlankϙ character # 3 Padding with ϘBlankϙ character # 3 Padding with ϘBlankϙ character
SMBUS value= (10) nits
71
SMBUS value= (17) nits
72
SMBUS value= (24) nits
73
SMBUS value= (30) nits
74
SMBUS value= (60) nits
75
SMBUS value= (90) nits
76
SMBUS value= (120) nits
77
SMBUS value= (MAX) nits
78
Numbers of LVDS Receiver chip= 0
79
char = 20h)
char = 20h)
char = 20h)
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
FE 11111110
4E 01001110
31 00110001 32 00110010 31 00110001 58 01011000 35 00110101
20 00100000 20 00100000 20 00100000 20 00100000 20 00100000 20 00100000
FE
(E5) 11100101 (D1) 11010001 (C3) 11000011 (BA) 10111010
(91) 10010001
(6C) 01101100
(44) 01000100 (00) 00000000
00
0A 00001010
20 00100000
20 00100000
11111110
00000000
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5.6 EDID SIGINAL SPECIFICATION
(1) EDID Power
Parameter Symbol Conditions Min. Typ. Max. Unit
Power supply
voltage
Vcc Read Operation 2.2 — 5.5 V
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
(2) DC characteristics
SCL, SDA
terminal input voltage
Hysteresis Voltage VHYS 0.05 VCC — V
Output Voltage
Input Leak current
(Vin =0.1V~VCC)
Output Leak current ILO -10 10 uA
Terminal capacity(Input, Output) Cin, Cout — 10 pF
Operating current
Stillness current
(SDA=SCL=VCC)
(WP=VSS,A0,A1,A2=VSS)
Symbol Min. Max. Unit Index
High Voltage VIH 0.7 VΓ CC — V
Low Voltage VIL — 0.3 VΓ
CC V
VOL1 VOL2
ILI
ICC Write
ICC Read
ICCS —
—
-10
-10
—
0.4
0.6
10 50
3 1
30
100
V
uA
mA
uA
IOL=3mA, CC=2.5V IOL=6mA, CC=2.5V
WP=VSS WP=VCC
Vout =0.1V~VCC,
WP=VSS
VCC=5.0V
0
Ta=25
C, Fclk=1.0MHz
VCC=5.5V,
SCL=400KHz
VCC=3.0V VCC=5.5V
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(3) AC characteristics (VCC=2.5~5.5V standard operation mode)
Item Symbol
Clock frequency Fclk — 100 — 400 KHz
Clock High Time THIGH 4000 — 900 —
Clock Low Time TLOW 4700 — 1300 —
SDA, SCL falling time TR — 1000 — 300
SDA, SCL rising time TF — 300 — 300
START hold time
START setup time
Data input hold time
Data input setup time
STOP setup time
Output decision time from a
clock
Bus free time TBUF 4700 — 1300 —
Rising time of Min VIH, VIL TOF — 250 20 250
THD:
STA
TSU:
STA
THD:
Data
TSU:
Data
TSU:
STO
TAA — 3500 100 900
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VCC=2.5V-5.5V
(Standard operation
Min. Max. Min. Max. Unit Index
4000 — 600 —
4700 — 600 —
0 — 0 —
250 — 100 —
4700 — 600 —
mode)
Model No.: N121X5 -L05
VCC=4.5V-5.5V
(High-speed
operation
mode)
Issued Date: Mar. 11, 2005
Preliminary
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CBЉ100pF
Spike oppression TSP — 50 — 50 ns
A write-in cycle time TWR — 10 — 10 ms
The number of times of data
rewriting
Byte and page
— 1M — 1M — cycles
VCC=5.0V
Ta=25
mode
0
C,
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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
DCLK Frequency 1/Tc (50) 65 (68) MHz -
Vertical Total Time TV (771) 806 (850) TH -
DE
Vertical Addressing Time TVD (768) 768 (768) TH -
Horizontal Total Time TH (1200) 1344 (1500) Tc -
Horizontal Addressing Time THD (1024) 1024 (1024) Tc -
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
INPUT SIGNAL TIMING DIAGRAM
DE
DCLK
T
DE
DATA
TVD
C
v
T
T
H
HD
T
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6.2 POWER ON/OFF SEQUENCE
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
Power Supply
for LCD, Vcc
- Interface Signal
(LVDS Signal of Transmitter), V
- Power for Lamp
Timing Specifications:
0.5 Љ t1 Љ 10 msec
0 < t2 Љ 50 msec
0 < t3 Љ 50 msec
Restart Power On Power Off
t7
90%
0V
0V
I
10%
t1
Valid Data
ONOFF OFF
90%
t6 t5
t4
10%
t3 t2
10%
t4 Њ 500 msec
t5 Њ 200 msec
t6 Њ 200 msec
Note (1) Please avoid floating state of interface signal at invalid period.
Note (2) When the interface signal is invalid, be sure to pull down the power supply of LCD Vcc to 0 V.
Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the
interface signal is valid. The Backlight inverter power must be turned off before the power supply
for the logic and the interface signal is invalid.
Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To
avoid this phenomenon, we suggest that the Vcc falling time had better to follow
t7 Њ 5 msec
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7. INVERTER SPECIFICATION
7.1 TYPE OF INVERTER CONNECTOR
Input connector type: LVC-D20SFYG (HONDA)
Output connector: JST SM02B-BHSS-1-TB (JST)
7.2 BUILT-IN INVERTER INPUT PIN ASSIGNMENT
Input connector
HONDA
Pin Function
LVC-D20SF
YG
Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
Comments
1 INV_SRC
2 INV_SRC
3 INV_SRC
4 NC No Connection
5 GND Ground
6 5VSUS
7 5VALW
8 GND Ground
9 SMB_DAT
10 SMB_CLK
11 GND Ground
This power rail should be used as a power rail to drive the backlight DC-AC converter
This power rail should be used as a power rail to drive the backlight DC-AC converter
This power rail should be used as a power rail to drive the backlight DC-AC converter
This should be used as power source for the control circuitry on the inverter
This should be used as power source that stores the brightness/contrast values & the circuit that interfaces with SMB_CLK & SMB_DAT
SMBus interface for sending brightness & contrast information to the inverter/panel
SMBus interface for sending brightness & contrast information to the inverter/panel
12 FPBACK
13 GND Ground
14 LAMP_STAT
15 ~ 20 NC
7.3 BUILT-IN INVERTER OUTPUT PIN ASSIGNMENT
Control signal input into the inverter to turn the backlight ON & OFF (1 ­ON, 0 – OFF)
Lamp status (Feedback, Lamp On = 5v, Lamp Off 0v), from control chip
No Connection
Pin Name Description
1 CFL-High High-voltage output to the CCFL
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2 CFL-Low Low-voltage output to the CCFL
7.4 GENERAL ELECTRICAL SPECIFICATION
7.4.1 Absolute Maximum Ratings
Items Absolute max. ratings Unit
INV_SRC (Voltage) -1.0~23.5 V FPBACK/SMB_CLK/SMB_DAT (Voltage)
7.4.2 Electrical Characteristics
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
-1.0~5.5 V
No. Item Symbol
Condition
Min. Typ. Max. Uint
1 Input Voltage INV_SRC 7.5 14.4 21 V
Input Signal Level
2
3
for 5VSUS
Input Signal Level
for 5VALW
5VSUS 4.85 5 5.2 V
5VALW 4.85 5 5.2 V
Vin=7.5V~21V
4 Input Power Pin(Max)
TBD TBD TBD W
SMB_DAT=00H
Vin=7.5V~21V
CCFL Power Po
3.45 W
SMB_DAT=00H
Backlight
FPBACK=
ON
Enable the inverter 2.0 - 5.25 V
5
ON/OFF Control
FPBACK=
OFF
Disable the inverter -0.3 - 0.8 V
Brightness Adjust
6
(Lamp Current
Control)
SMB_DAT Control by SMBus FFH - 00H -
7 Output Voltage Vout IL = 5.0mA(typ) (540) (600) (660) Vrms
Vin=7.5V~21V
Iout (Min)
8 Output Current
Iout (Max)
9
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Operation
Frequency
Freq Vin=7.5V~21V (45) - (65) KHz
SMB_DAT=FFH Ta= 25
к, after running 30 min.
Vin=7.5V~21V SMB_DAT=00H Ta= 25 к,
min.
after running 30
25 / 36
2.0 2.3 2.6 mArms
4.7 5.0 5.3 mArms
Version 1.1
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
10
Burst mode
frequency
fB Vin=7.5V~21V 200 - 220 Hz
11 Open Lamp Voltage Vopen No Load 1220 TBD TBD Vrms
12 Striking Time Ts No Load 0.6 1 1.4 Sec
Vin=7.5V, SMB_DAT=00H
13 Efficiency K
(80) - - %
(RES LOAD=100K ohm)
14 Start and Delay
Time
15 Start –up time(Turn
Vin=14.4V,
- 130 200 uS
SMB_DAT=FFH
- - 0.1 Sec
on delay time)
Remarks:
zInput Voltage
The operating input voltage of inverter shall be defined.
The inverter shall ignite the CCFL lamp at minimum input voltage at any
environment conditions.
zOn/Off control
Enable: At “ON” condition (FPBACK=Hi), enable the inverter.
Disable: At “OFF” condition (FPBACK=Lo), disable the inverter.
zQuiescent current
At the inverter “OFF” condition, input quiescent should be less than 0.1mA.
zOpen lamp voltage
The inverter start-up output voltage will be above “Vopen ” for “Ts” minimum at any
condition under specify until lamp to be ignited. The inverter should be shutdown if
lamp ignition was failed in “Ts” maximum. The inverter shall be capable of
withstanding the output connections open without component over-stress / fire /
smoke /arc.
zBurst mode frequency
The burst mode frequency should be in specification in any environment condition
and electrical condition.
zBrightness control
SM-BUS values for panel luminance are to be included in the on LCD board
EEDID ROM chip table. The supplier will measure panel luminance in a system
and define the SMBUS values for each of the 8 required luminance levels. The
panel luminance, for which SMBUS values will be provided in the EEDID from
byte # 113(hex #71), to byte # 120, (hex # 78), is show in the table below. The
inverter supplier should provide these appropriate values to CMO.
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Step Count Step 1 Step 2 Step3 Step 4 Step 5 Step 6 Step 7 Step 8
Address Byte
SM-Bus Data
Value
Luminance (nits) 10 17 24 30 60 90 120 MAX
zOutput ripple ratio
Ripple ratio = 2 * (Ipeak - Ivalley) / (Ipeak + Ivalley) * 100%
The Ripple ratio should be less than 5% and ripple frequency should be less than
200 Hz.
zPower up Overshoot & Undershoot
Overshoot & Undershoot at power up should not exceed the following limits.
Vin
0ШVin(min.)
0ШVin(typ.)
0Ш Vin(max.)
dI=Imax.-Io or dI=(Io-Imin.)/Io
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
Byte
113
114
(E5) (D1) (C3) (BA) (91) (6C) (44) (00)
Output current Io(rms)
Io(max.)
Io(min.)
Io(max.)
Io(min.)
Io(max.)
Io(min.)
Byte
115
Byte
116
Byte
117
Io (dI)
Overshoot/Undersho
ot
150% / 50% 5 ms max.
150% / 50% 5 ms max.
150% / 50% 5 ms max.
Settling
time
(dT)
Byte
118
Byte
119
Byte
120
z Output connections short protection
The inverter shall be capable of withstanding the output connections short without
damage or over-stress. And the inverter maximum input power shall be limited
within 1W.
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8. OPTICAL CHARACTERISTICS
8.1 TEST CONDITIONS
Item Symbol Value Unit Ambient Temperature Ta 25r2 Ambient Humidity Ha 50r10 %RH Supply Voltage VCC 3.3 V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" Inverter Current IL Inverter Driving Frequency FL Inverter Sumida-H05-4915
The measurement methods of optical characteristics are shown in Section 7.2. The following items
should be measured under the test conditions described in Section 7.1 and stable environment shown in
Note (6).
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5.0
(55)
Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
o
C
mA
KHz
8.2 OPTICAL SPECIFICATIONS
Item Symbol Condition Min. Typ. Max. Unit Note
Red
Green
Color Chromaticity
Blue
White
Color Gamut C.G% 42 45 - % (8)
Average luminance of white L Contrast Ratio CR
Response Time
Cross Talk CT - - 4.0 % (5), (6) White Variation of 5 Points GW5p White Variation of 13 Points GW
Horizontal
Viewing Angle
Vertica l
Rx 0.590 ­Ry Gx Gy
Bx
T
=0q, TY =0q
By
Wx 0.313 -
x
Viewing Normal Angle
(CS-1000T)
TYP
-0.03
Wy
(145) (175) - cd/m2(4), (6)
AVE
0.335
0.320
0.530
0.150
0.135
0.329
TYP
+0.03
(250) (400) - - (2), (6)
TR - 5 10 ms
T
F
13p
Tx+
T
-
x
TY+
T
-
Y
T
=0q, TY =0q
x
T
=0q, TY =0q
x
(BM-5A)
CRt10
(BM-5A)
- 11 16 ms
80 - - % 55 - - % 40 - ­40 - ­10 - -
Deg. (1), (6)
30 - -
-
-
­(1), (6)
-
-
-
(3)
(6), (7)
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Note (1) Definition of Viewing Angle (Tx, Ty):
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
TX- = 90º
x-
6 o’clock
T
y- = 90º
y-
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Normal
Tx = Ty = 0º
Ty- Ty
Tx-
Tx+
12 o’clock direction
y+
T
y+ = 90º
x+
TX+ = 90º
Contrast Ratio (CR) = L63 / L0
L63: Luminance of gray level 63
L 0: Luminance of gray level 0
CR = CR (5)
CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (7).
Note (3) Definition of Response Time (T
100%
90%
Optical
Response
Gray Level 63
10%
0%
, TF) and measurement method:
R
Gray Level 0
T
R
Gray Level 63
Time
T
F
66.6ms
66.6ms
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A
A
www.panelook.com
Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
Note (4) Definition of Average Luminance of White (L
Measure the luminance of gray level 63 at 5 points
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
AVE
L (x) is corresponding to the luminance of the point X at Figure in Note (7).
Note (5) Definition of Cross Talk (CT):
CT = | Y
– YA | / YA u 100 (%)
B
Where:
Y
= Luminance of measured location without gray level 0 pattern (cd/m2)
A
Y
= Luminance of measured location with gray level 0 pattern (cd/m2)
B
(0, 0)
ctive Area
Y
(D/8,W/2)
A, L
Gray 32
Y
(D/2,7W/8)
A, D
(D,W)
Y
(D/2,W/8)
A, U
Y
(7D/8,W/2)
A, R
AVE
):
(D/4,W/4)
Y
(D/8,W/2)
B, L
Y
(D/2,7W/8)
B, D
(0, 0)
ctive Area
Gray 0
Gray 32
Y
B, U
Y
B, R
(3D/4,3W/4)
(D,W)
(D/2,W/8)
(7D/8,W/2)
Note (6) Measurement Setup:
The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting Backlight for 20 minutes in a windless room.
LCD Module
LCD Panel
Center of the Screen
500 mm
Photometer
(BM-5A, CS-1000)
Field of View = 2º
Light Shield Room
(Ambient Luminance < 2 lux)
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Note (7) Definition of White Variation (GW):
Measure the luminance of gray level 63 at 5 points
GW
= Minimum [L (1), L (2), L (3), L (4), L (5)] / Maximum [L (1), L (2), L (3), L (4), L (5)]
5p
GW
= Minimum [L (1) ~ L (13)] / Maximum [L (1) ~ L (13)]
13p
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
10mm
10mm
W/4
6
W/2
W
Vertical Line
3W/
10mm
9
11 1 1
Note (8) Definition of color gamut (C.G%):
C.G%= ΓR G B /ΓR
R
R, G, B
ΓR
, G0, B0 : color coordinates of red, green, and blue defined by NTSC, respectively.
0
: color coordinates of module on 63 gray levels of red, green, and blue, respectively.
0 G0 B0
0 G0 B0
: area of triangle defined by R0, G0, B0
,*100%
ΓR G B: area of triangle defined by R, G, B
Horizontal Line
D
D/4 D/2 3D/4
7
2 3
1
4
Active Area
5
10mm
8
1
X
: Test Point
X=1 to 13
˖˜˘ʳ˄ˌˆ˄
˃ˁˌ
˃ˁˋ
˃ˁˊ
˃ˁˉ
˃ˁˈ
˃ˁˇ
˃ˁˆ
˃ˁ˅
˃ˁ˄
˃
˃ ˃ˁ˅ ˃ˁˇ ˃ˁˉ ˃ˁˋ
G
0
G
R
0
R
B
B
0
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9. PRECAUTIONS
9.1 HANDLING PRECAUTIONS
(1) The module should be assembled into the system firmly by using every mounting hole. Be careful not
to twist or bend the module.
(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause
electrical short or damage the polarizer.
(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and
assembly process.
(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is
very soft and easily scratched.
(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use
Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might
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Model No.: N121X5 -L05
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permanently damage the polarizer due to chemical reaction.
(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel for
a long time.
(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.
(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.
(9) Do not disassemble the module.
(10) Do not pull or fold the lamp wire.
(11) Pins of I/F connector should not be touched directly with bare hands.
9.2 STORAGE PRECAUTIONS
(1) High temperature or humidity may reduce the performance of module. Please store LCD module within
the specified storage conditions.
(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may
damage LCD module when it is operating.
(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the
response time will become slowly, and the starting voltage of lamp will be higher than the room
temperature.
9.3 OPERATION PRECAUTIONS
(1) Do not pull the I/F connector in or out while the module is operating.
(2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This
can prevent the CMOS LSI chips from damage during latch-up.
(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while
assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.
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10. PACKING
10.1 CARTON
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
10.2 PALLET
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
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11. DEFINITION OF LABELS
11.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
E207943
MADE IN TAIWAN
01A
N141X5 - L03 Rev.XX
-
X X X X X X X Y M D L N N N N
C P 1 3 5 4 4 8 - 0 1
(a) Model Name: N121X5 - L05
(b) Revision: Rev. XX, for example: A1, …, C1, C2 …etc.
(c) Serial ID: X X
Serial ID includes the information as below:
(a) Manufactured Date: Year: 1~9, for 2001~2009
X X X X X Y M D X N N N N
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1
st
Serial No. CMO Internal Use
Year, Month, Date CMO Internal Use
Revision
CMO Internal Use
to 31st, exclude I , O and U
(b) Revision Code: cover all the change
(c) Serial No.: Manufacturing sequence of product
11.2 CARTON LABEL
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11.3 CUSTOMER CARTON LABEL
PKG ID (3S)124161241729112345609886C20
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Issued Date: Mar. 11, 2005
Model No.: N121X5 -L05
Preliminary
REV.A06
DP/N 03J849
BOX Qty 20 Made in Taiwan
11.4 CUSTOMER PALLET LABEL
FROM :CMO Corporation
Tainan, Taiwan 744 R.O.C
P.O.NUMBER
12345678
COUNTRY OF ORIGIN
TW
TO:DELL COMPUTER
2128 West Braker Austin TX
DELL P/N
12345
PACKING LIST# 1234567890123
Vendor ID Loc Id
12416 12416
Mfg Id 70896
PACKING LIST QTY 654321
DESTINATION MAS LOC
DESTINATION LOCATION
B4
12345678901234567890
PKG CNT 999 OF 999 12345
PART DESCRIPTION XXXXXXXXXXXXXXXXXXXXXXXXX
12345678901234567890123456789012345678901
BOX CNT REVISION
A00-00 Apr 29,2003
60
AIRBILL NUMBER
SHIP DATE
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