CMO N121I3-L07 Specification

Global LCD Panel Exchange Center

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

- CONTENTS -

REVISION HISTORY

1. GENERAL DESCRIPTION

1.1 OVERVIEW

1.2 FEATURES

1.3 APPLICATION

1.4 GENERAL SPECIFICATIONS

1.5 MECHANICAL SPECIFICATIONS

2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

2.2.2 BACKLIGHT UNIT

3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE

3.2 BACKLIGHT UNIT

4. BLOCK DIAGRAM

4.1 TFT LCD MODULE

4.2 BACKLIGHT UNIT

5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD MODULE

5.2 BACKLIGHT UNIT

5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL

5.4 COLOR DATA INPUT ASSIGNMENT

5.5 EDID DATA STRUCTURE

5.6 EDID SIGNAL SPECIFICATION

6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

6.2 POWER ON/OFF SEQUENCE

7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

7.2 OPTICAL SPECIFICATIONS

8. PRECAUTIONS

8.1 HANDLING PRECAUTIONS

8.2 STORAGE PRECAUTIONS

8.3 OPERATION PRECAUTIONS

9. PACKING ------------------------------------------------------- 26

9.1 CARTON

9.2 PALLET

10. DEFINITION OF LABELS

10.1 CMO MODULE LABEL

10.2 CARTON LABEL

------------------------------------------------------- 3

------------------------------------------------------- 4

------------------------------------------------------- 5

------------------------------------------------------- 7

------------------------------------------------------- 11

------------------------------------------------------- 12

------------------------------------------------------- 20

------------------------------------------------------- 22

------------------------------------------------------- 25

------------------------------------------------------- 28

2 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

Version Date

Ver 3.0

Jan. 16,’06

Page

(New)

Section Description

All

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

REVISION HISTORY

All Approval specification first issued.

3 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

1 GENERAL DESCRIPTION

1.1 OVERVIEW

N121I3 -L07 is a 12.1” TFT Liquid Crystal Display module with single CCFL Backlight unit and 20 pins

LVDS interface. This module supports 1280 x 800 Wide-XGA mode and can display 262,144 colors. The

optimum viewing angle is at 6 o’clock direction. The inverter module for Backlight is not built in.

1.2 FEATURES

- Thin and light weight

- WXGA (1280 x 800 pixels) resolution

- 3.3V LVDS (Low Voltage Differential Signaling) interface with 1 pixel/clock

- Meet RoHS requirement

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

1.3 APPLICATION

- TFT LCD Notebook

1.4 GENERAL SPECIFICATI0NS

Item Specification Unit Note
Active Area 261.12 (H) x 163.2 (V) (12.1” diagonal) mm
Bezel Opening Area 264.12 (H) x 166.2 (V) mm
Driver Element a-si TFT active matrix - ­Pixel Number 1280 x R.G.B. x 800 pixel ­Pixel Pitch 0.204 (H) x 0.204 (V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 262,144 color ­Transmissive Mode Normally white - ­Surface Treatment Hard coating (3H), glare type - -

1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal(H) 275.3 275.8 276.3 mm

Module Size

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

Vertical(V) 177.4 178 178.6 mm
Depth(D) - 4.9 5.2 mm

Weight - 260 275 g -

(1)

(1)

4 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

A

2 ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 +50 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V

Note (1) (a) 90 %RH Max. (Ta Љ 40 ºC).

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The temperature of panel display surface area should be 0 ºC Min. and 60 ºC Max.

Relative Humidity (%RH)

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

Value

Min. Max.

- 200/2 G/ms (3), (5)

NOP

- 1.5 G (4), (5)

NOP

Unit Note

100

90

80

60

Operating Range

40

20
10

Storage Range

Temperature (ºC)

Note (3) 1 time for ± X, ± Y, ± Z. for Condition (200G / 2ms) is half Sine Wave,.

Note (4) 10 ~ 500 Hz, 30 min/cycle,1cycles for each X, Y, Z axis.

8060 -20 400 20-40

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid

enough so that the module would not be twisted or bent by the fixture.

The fixing condition is shown as below:

t Room Temperature

Side Mount Fixing Screw

Gap=2mm

Bracket

LCD Module

Side Mount Fixing Screw

Stage

5 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

Item Symbol

Power Supply Voltage Vcc -0.3 +4.0 V
Logic Input Voltage VIN -0.3 Vcc+0.3 V

2.2.2 BACKLIGHT UNIT

Item Symbol

Lamp Voltage VL - 2.5K V
Lamp Current IL 3.0 6.5 mA
Lamp Frequency FL 45 80 KHz

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

www.panelook.com

Value

Min. Max.

Value

Min. Max.

Unit Note

Unit Note

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

(1)

(1), (2), IL = 6.0 mA

RMS

RMS

(1), (2)

should be restricted to the conditions described under Normal Operating Conditions.

Note (2) Specified values are for lamp (Refer to Section 3.2 for further information

6 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

3 ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE Ta = 25 ± 2 ºC

Parameter Symbol

Min. Typ. Max.
Power Supply Voltage Vcc 3.0 3.3 3.6 V ­Ripple Voltage VRP - 100 mV ­Rush Current I

Power Supply Current

Logical Input Voltage

White - 290 - mA (3)a
Black
“H” Level VIL - - +100 mV ­“L” Level V

- 1.2 1.5 A (2)

RUSH

lcc

-100 - - mV -

IH

- 350 - mA (3)b

Terminating Resistor RT - 100 - Ohm ­Power per EBL WG P

- 2.873 - W (4)

EBL

Note (1) The module should be always operated within above ranges.

Note (2) Measurement Conditions:

Value

Unit Note

Approval

+3.3V

R1

47K

Q1 2SK1475

FUSE

C3

1uF

Vcc

(LCD Module Input)

(High to Low)

(Control Signal)

SW

+12V

C1

1uF

VR1

R2

1K

47K

0.01uF

Q2

2SK1470

C2

Vcc rising time is 470us

+3.3V

0.9Vcc

0.1Vcc

GND

470us

Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, DC

Current and f

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

= 60 Hz, whereas a power dissipation check pattern below is displayed.

v

7 / 30

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input

a. White Pattern

Active Area

power. Test conditions are as follows.

(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f

(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file

“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.

(c) Luminance: 60 nits.

= 60 Hz,

v

b. Black Pattern

Active Area

(d) The inverter used is provided from O2Micro(www.o2micro.com). CMO doesn’t provide the

inverter in this product.

8 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC

Parameter Symbol

Min. Typ. Max.

Lamp Input Voltage VL 540 600 660 V

Lamp Current IL

Lamp Turn On Voltage VS

2.0 (1),(2)

3.0

- - 1,220 (25 deg C) V

- - 1,380 (0 deg C) V
Operating Frequency FL 45 - 80 KHz (5)
Lamp Life Time LBL 10,000 - - Hrs (7)
Power Consumption PL - 3.6 - W (4), IL = 6.0 mA

Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:

Value

Unit Note

6.0 6.5 mA

IL = 6.0 mA

RMS

RMS

(4)

RMS

(4)

RMS

(1),(3)

LCD

Module

HV (Pink)

LV (White)

1

2

Current Meter

Inverter

A

Note (2) for burst mode inverter design

Note (3) for continuous mode inverter design

Note (4) The voltage shown above should be applied to the lamp for more than 1 second after startup.

Otherwise the lamp may not be turned on.

Note (5) The lamp frequency may generate interference with horizontal synchronous frequency from the

display, and this may cause line flow on the display. In order to avoid interference, the lamp

frequency should be detached from the horizontal synchronous frequency and its harmonics as far

as possible.

Note (6) P

= IL ØVL

L

Note (7) The lifetime of lamp is defined as the time when it continues to operate under the conditions at Ta

= 25 ²2

o

C and IL = 6.0 mA

until one of the following events occurs:

RMS

(a) When the brightness becomes Љ 50% of its original value.

(b) When the effective ignition length becomes Љ 80% of its original value. (Effective ignition

length is defined as an area that the brightness is less than 70% compared to the center point.)

Note (8) The waveform of the voltage output of inverter must be area-symmetric and the design of the

inverter must have specifications for the modularized lamp. The performance of the Backlight,

such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for

the lamp. All the parameters of an inverter should be carefully designed to avoid generating too

much current leakage from high voltage output of the inverter. When designing or ordering the

inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the

inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module

should be operated in the same manners when it is installed in your instrument.

The output of the inverter must have symmetrical (negative and positive) voltage waveform and

symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter

9 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may

produce interface with horizontal synchronous frequency and as a result this may cause beat on the

display. Therefore lamp frequency shall be as away possible from the horizontal synchronous

frequency and from its harmonics in order to prevent interference.

Requirements for a system inverter design, which is intended to have a better display performance, a

better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its

leakage current.

a. The asymmetry rate of the inverter waveform should be 10% below;

b. The distortion rate of the waveform should be within Ѕ2 ± 10%;

c. The ideal sine wave form shall be symmetric in positive and negative polarities.

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

* Asymmetry rate:

I p

I -p

| I

* Distortion rate

I

– I –p | / I

p

(or I –p) / I

p

rms

rms

* 100%

10 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

)

4 BLOCK DIAGRAM

4.1 TFT LCD MODULE

Rxin0(+/-)

Rxin1(+/-)

Rxin2(+/-)

CLK(+/-)

Vcc

GND

Data

EDID

CLK

EDID

V

EDID

( DF19KR-20P-1H or equivalent )

INPUT CONNECTOR

www.panelook.com

LVDS INPUT /

TIMING CONTROLLER

DC/DC CONVERTER &

REFERENCE VOLTAGE

GENERATOR

EDID

EEPROM

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

SCAN DRIVER IC

TFT LCD PANEL

(1280x3x800)

DATA DRIVER IC

Approval

VL

LAMP CONNECTOR

(JST-BHSR-02VS-1)

4.2 BACKLIGHT UNIT

BACKLIGHT UNIT

1 HV (Pink)

2 LV (White

11 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

5 INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD MODULE

Pin Symbol Description Polarity Remark

1 VSS Ground ­2 VDD Power Supply +3.3 V ­3 VDD Power Supply +3.3 V ­4 V
5 TEST Panel Self Test
6 CLK
7 Data
8 Rxin0- LVDS Differential Data Input Negative

9 Rxin0+ LVDS Differential Data Input Positive
10 VSS Ground
11 Rxin1- LVDS Differential Data Input Negative
12 Rxin1+ LVDS Differential Data Input Positive
13 VSS Ground
14 Rxin2- LVDS Differential Data Input Negative
15 Rxin2+ LVDS Differential Data Input Positive
16 VSS Ground
17 CLK- LVDS Clock Data Input Negative
18 CLK+ LVDS Clock Data Input Positive
19 VSS Ground - ­20 VSS Ground - -

Note (1) Connector Part No.: DF19KR-20P-1H or equivalent

DDC +3.3 V

EDID

DDC Clock

EDID

DDC Data

EDID

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

R0~R5,G0-

G1~G5,B0,B1

-

B2~B5,Hsync,Vsync,DE

LVDS Level

Note (2) User’s connector Part No: DF19G-20S-1C or equivalent

5.2 BACKLIGHT UNIT

Pin Symbol Description Color

1 HV High Voltage Pink
2 LV Ground White

Note (1) Connector Part No.: JST-BHSR-02VS-1 or equivalent

Note (2) User’s connector Part No.: JST-SM02B-BHSS-1-TB or equivalent

5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL

CLK+

Rxin2

Rxin1

Rxin0

T/7

IN20 IN19 IN18 IN17 IN16 IN15 IN14

DE B5 B4 B3 B2 Vsync Hsync

IN13 IN12 IN11 IN10 IN9 IN8 IN7

B1 G4 G3 G2 G1 B0 G5

IN6 IN5 IN4 IN3 IN2 IN1 IN0

G0 R3 R2 R1 R0

R5

R4

Signal for 1 DCLK Cycle (T)

12 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

5.4 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for

the color. The higher the binary input the brighter the color. The table below provides the assignment of

color versus data input.

Color

R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black
Red
Green

Basic
Colors

Gray
Scale
Of
Red

Gray
Scale
Of
Green

Gray
Scale
Of
Blue

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Blue
Cyan
Magenta
Yellow
White
Red(0)/Dark
Red(1)
Red(2)

:

:
Red(61)
Red(62)
Red(63)
Green(0)/Dark
Green(1)
Green(2)

:

:
Green(61)
Green(62)
Green(63)
Blue(0)/Dark
Blue(1)
Blue(2)

:

:
Blue(61)
Blue(62)
Blue(63)

0

0

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0
:
:

1

1

1

1

1

1

0

0

0

0

0

0
:
:

0

0

0

0

0

0

0

0

0

0

0

0
:
:

0

0

0

0

0

0

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

Data Signal

Red Green Blue

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

1

1

0

1

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

0

0

0

1

1

1

1

0

1

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

1

1

1

1

0

1

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

13 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

5.5 EDID DATA STRUCTURE

The EDID (Extended Display Identification Data) data formats are to support displays as defined in the

VESA Plug & Display and FPDI standards.

Byte #
(decimal)

0 0
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
10 0A
11 0B
12 0C
13 0D
14 0E
15 0F
16 10
17 11
18 12
19 13
20 14
21 15
22 16
23 17
24 18
25 19
26 1A
27 1B
28 1C
29 1D
30 1E
31 1F
32 20
33 21
34 22
35 23
36 24
37 25

38 26

39 27
40 28
41 29

Byte #
(hex)

Field Name and Comments

Header
Header
Header
Header
Header
Header
Header
Header
EISA ID manufacturer name (“CMO”)
EISA ID manufacturer name (Compressed ASCII)
ID product code 16
ID product code 12
ID S/N (fixed “0”)
ID S/N (fixed “0”)
ID S/N (fixed “0”)
ID S/N (fixed “0”)
Week of manufacture (fixed week code)
Year of manufacture (fixed year code)
EDID structure version # (“1”)
EDID revision # (“3”)
Video I/P definition (“digital”)
Max H image size (“26cm”)
Max V image size (“16cm”)
Display Gamma (Gamma = ”2.2”)
Feature support (“Active off, RGB Color”)
Red/Green (Rx1, Rx0, Ry1, Ry0, Gx1, Gx0, Gy1, Gy0)
Blue/White (Bx1, Bx0, By1, By0, Wx1, Wx0, Wy1, Wy0)
Red-x (Rx = “0.573”)
Red-y (Ry = “0.339”)
Green-x (Gx = ”0.327”)
Green-y (Gy = ”0.566”)
Blue-x (Bx = ”0.151”)
Blue-y (By = ”0.125”)
White-x (Wx = ”0.313”)
White-y (Wy = ”0.329”)
Established timings 1
Established timings 2
Manufacturer’s reserved timings

Standard timing ID # 1
Standard timing ID # 1
Standard timing ID # 2
Standard timing ID # 2

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

Value
(hex)

Value

(binary)
00 00000000
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
00 00000000
0D 00001101
AF 10101111

00010110

00010010
00 00000000
00 00000000
00 00000000
00 00000000
01 00000001
10 00010000
01 00000001
03 00000011
80 10000000
1A 00011010
10 00010000
78 01111000
0A 00001010

FC 11111100
C5 11000101

92 10010010
56 01010110
53 01010011
91 10010001
26 00100110
20 00100000
50 01010000
54 01010100
00 00000000
08 00001000
00 00000000

01 00000001

01 00000001
01 00000001
01 00000001

14 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

42 2A
43 2B
44 2C
45 2D
46 2E
47 2F
48 30
49 31
50 32
51 33
52 34
53 35

54 36

55 37
56 38
57 39
58 3A
59 3B
60 3C
61 3D
62 3E
63 3F
64 40

65 41

66 42
67 43
68 44
69 45
70 46

71 47

72 48
73 49
74 4A

75 4B

76 4C
77 4D
78 4E
79 4F
80 50
81 51

82 52 # 2 6th character of name (“3”)
83 53

84 54
85 55

Standard timing ID # 3
Standard timing ID # 3
Standard timing ID # 4
Standard timing ID # 4
Standard timing ID # 5
Standard timing ID # 5
Standard timing ID # 6
Standard timing ID # 6
Standard timing ID # 7
Standard timing ID # 7
Standard timing ID # 8
Standard timing ID # 8

Detailed timing description # 1 Pixel clock (“71MHz”, According
to VESA CVT Rev1.1)

# 1 Pixel clock (hex LSB first)
# 1 H active (“1280”)
# 1 H blank (“160”)
# 1 H active : H blank (“1280 : 160”)
# 1 V active (”800”)
# 1 V blank (”23”)
# 1 V active : V blank (”800 :23”)
# 1 H sync offset (”48”)
# 1 H sync pulse width ("32”)
# 1 V sync offset : V sync pulse width (”3 : 6”)

# 1 H sync offset : H sync pulse width : V sync offset : V sync
width (”48: 32 : 3 : 6”)

# 1 H image size (”261 mm”)
# 1 V image size (”163 mm”)
# 1 H image size : V image size (”261 : 163”)
# 1 H boarder (”0”)
# 1 V boarder (”0”)

# 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol
Negatives, DE only note: LSB is set to “1” if panel is DE-timing
only. H/V can be ignored.

Detailed timing description # 2
# 2 Flag
# 2 Reserved

# 2 FE (hex) defines ASCII string (Model Name “N121I3-L07”,
ASCII)

# 2 Flag
# 2 1st character of name (“N”)
# 2 2nd character of name (“1”)
# 2 3rd character of name (“2”)
# 2 4th character of name (“1”)
# 2 5th character of name (“I”)

# 2 7th character of name (“-”) 2D
# 2 8th character of name (“L”) 4C
# 2 9th character of name (“0”)

01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001

BC 10111100

1B 00011011

00 00000000

A0 10100000

50 01010000
20 00100000
17 00010111
30 00110000
30 00110000
20 00100000
36 00110110

00 00000000

05 00000101

A3 10100011

10 00010000
00 00000000
00 00000000

18 00011000

00 00000000
00 00000000
00 00000000

FE 11111110

00 00000000

4E 01001110

31 00110001
32 00110010
31 00110001
49 01001001
33 00110011

00101101

01001100
30 00110000

15 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

(

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

86 56

87 57

88 58

89 59

90 5A
91 5B
92 5C
93 5D
94 5E
95 5F
96 60
97 61

98 62

99 63

100 64

101 65

102 66

103 67

104 68

105 69

106 6A

107 6B

108 6C
109 6D
110 6E

111 6F

112 70
113 71
114 72
115 73
116 74
117 75
118 76
119 77
120 78
121 79
122 7A
123 7B

# 2 10th character of name (“7”)
(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)
(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)
(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)

Detailed timing description # 3
# 3 Flag
# 3 Reserved
# 3 FE (hex) defines ASCII string (Vendor “CMO”, ASCII)
# 3 Flag
# 3 1st character of string (“C”)
# 3 2nd character of string (“M”)
# 3 3rd character of string (“O”)

(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)
(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)
(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)
(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)
(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)
(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)
(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)
(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)
(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)
(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)

Detailed timing description # 4
# 4 Flag
# 4 Reserved

# 4 FE (hex) defines ASCII string (Model Name“N121I3-L07”,
ASCII)

# 4 Flag
# 4 1st character of name (“N”) 4E
# 4 2nd character of name (“1”) 31
# 4 3rd character of name (“2”) 32
# 4 4th character of name (“1”) 31
# 4 5th character of name (“I”) 49
# 4 6th character of name (“3”) 33
# 4 7th character of name (“-”) 2D
# 4 8th character of name (“L”) 4C
# 4 9th character of name (“0”)
# 4 10th character of name (“7”)

If <13 char, then terminate with ASCII code 0Ah, set remaining

37 00110111

0A 00001010

20 00100000

20 00100000

00 00000000
00 00000000
00 00000000

FE 11111110

00 00000000
43 01000011

4D 01001101

4F 01001111

0A 00001010

20 00100000

20 00100000

20 00100000

20 00100000

20 00100000

20 00100000

20 00100000

20 00100000

20 00100000

00 00000000
00 00000000
00 00000000

FE 11111110

00 00000000

01001110

00110001

00110010

00110001

01001001

00110011

00101101

01001100
30 00110000
37 00110111

0A 00001010

16 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

char = 20h)

124 7C

125 7D

126 7E
127 7F

(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)
(If <13 char, then terminate with ASCII code 0Ah, set remaining
char = 20h)

Extension flag
Checksum

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

20 00100000

20 00100000

00 00000000

BB 10111011

17 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

5.6 EDID SIGINAL SPECIFICATION

(1) EDID Power

Parameter Symbol Test Condition Min. Typ. Max. Unit

Power supply

voltage

Vcc — 1.8 — 5.5 V

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

(2) DC characteristics

Parameter Symbol Test Condition Min Typ Max Unit

Supply current Vcc=5.0V Icc READ at 100kHz — 0.4 1.0 mA

Supply current Vcc=5.0V Icc WRITE at 100kHz — 2.0 3.0 mA

Standby Current ISB Vin=Vcc or Vss — 1.6 4.0 μA

Input Leakage Current ILI Vin=Vcc or Vss — 0.1 10 μA

Onput Leakage Current ILO Vout=Vcc or Vss — 0.1 10 μA

Input Low Level VIL — -1.0 — Vcc x 0.3 V

Input High Level VIH — Vcc x 0.7 — Vcc+0.5 V

Output Low Level Vcc=3.0V VOL1 IOL=3mA — — 0.4 V

Output Low Level Vcc=1.8V VOL2 IOL=1.5mA — — 0.5 V

18 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

(3) AC characteristics (VCC=1.8~5.5V standard operation mode)

Parameter Symbol Min Max Unit

Clock Frequency, SCL FSCL — 100 kHz

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

Clock Pulse Width Low TLOW 4.7 —

Clock Pulse Width High THIGH 4.0 —

Noise Suppression Time TI — 100 ns

Clock Low to Data Out Valid TAA 0.1 4.5

Time the bus must be free

BUF 4.7 —

before a new transmission

can start

Start Hold Time THD.STA 4.7 —

Start Set-up Time TSU.STA 4.7 —

Data in Hold Time THD.DAT 0 —

Data in Set-up Time TSU.DAT 200 — ns

Inputs Rise Time TR — 1.0

T

Ӵs

Ӵs

Ӵs

Ӵs

Ӵs

Ӵs

Ӵs

Ӵs

Inputs Fall Time TF — 300 ns

Stop Set-up Time TSU.STO 4.7 —

Data Out Hold Time TDH 100 — ns

Write Cycle Time TWR — 10 ms

Ӵs

19 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

6 INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

DCLK Frequency 1/Tc - 71 73 MHz -

Vertical Total Time TV 802 823 840 TH -

DE

Vertical Addressing Time TVD 800 800 800 TH -

Horizontal Total Time TH 1380 1440 1450 Tc -

Horizontal Addressing Time THD 1280 1280 1280 Tc -

INPUT SIGNAL TIMING DIAGRAM

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

DE

DCLK

TC

DE

DATA

6.2 POWER ON/OFF SEQUENCE

Power Supply

for LCD, Vcc

- Interface Signal

(LVDS Signal of
Transmitter), V

- Power for Lamp

0V

0V

I

Power On

90%

10%

t1

HD

T

Restart

t7

10%

10%

t4

Valid Data

ONOFF OFF

Power Off

90%

t3 t2

t6 t5

50%50%

20 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

Timing Specifications:

0.5ms <t1Љ10 msec

0 < t2 Љ 50 msec

0 < t3 Љ 50 msec

t4 Њ 500 msec

t5 Њ 200 msec

t6 Њ 200 msec

Note (1) Please avoid floating state of interface signal at invalid period.

Note (2) When the interface signal is invalid, be sure to pull down the power supply of LCD Vcc to 0 V.

Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the

interface signal is valid. The Backlight inverter power must be turned off before the power supply

for the logic and the interface signal is invalid.

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To

avoid this phenomenon, we suggest that the Vcc falling time had better to follow

t7 Њ 5 msec

21 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

7 OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC 3.3 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Inverter Current IL 6.0 mA
Inverter Driving Frequency FL 61 KHz
Inverter Sumida-H05-4915

The measurement methods of optical characteristics are shown in Section 7.2. The following items

should be measured under the test conditions described in Section 7.1 and stable environment shown in

Note (6).

www.panelook.com

25r2

50r10

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

o

C

%RH

7.2 OPTICAL SPECIFICATIONS

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR 300 500 - - (2), (5)

Response Time

Luminance of White L
White Variation

Color

Green

Chromaticity

White

Horizontal

Viewing Angle

Vertical

Red

Blue

TR - 5 10 ms

- 11 16 ms

T

F

170 200 - cd/m2(4), (5)

AVE

GW

Rx

Ry
Gx
Gy
Bx
By

=0q, TY =0q

T

x

Viewing Normal Angle

- - 1.25 - (5), (6)

0.572

0.336

0.328

Typ.-

0.03

0.570

0.154

Typ.+

0.03

0.139
Wx 0.313 ­Wy

Tx+

T

-

x

TY+

T

Y

CRt10

-

0.329

40 45 ­40 45 ­15 20 ­40 45 -

Deg. (1), (5)

(3)

-

-

-

­(1), (5)

-

-

-

22 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

Note (1) Definition of Viewing Angle (Tx, Ty):

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

TX- = 90º

x-

6 o’clock

T

y- = 90º

y-

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Normal

Tx = Ty = 0º

Ty- Ty

Tx-

Tx+

y+

12 o’clock direction

T

y+ = 90º

x+

TX+ = 90º

Contrast Ratio (CR) = L63 / L0

L63: Luminance of gray level 63

L 0: Luminance of gray level 0

CR = CR (5)

CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).

Note (3) Definition of Response Time (T

100%

90%

Optical

Response

Gray Level 63

10%

0%

R

T

R

, TF):

Gray Level 0

Gray Level 63

Time

T

F

66.67ms

66.67m

23 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

500

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

Note (4) Definition of Average Luminance of White (L

Measure the luminance of gray level 63 at 5 points

L

= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5

AVE

L (x) is corresponding to the luminance of the point X at Figure in Note (6).

Note (5) Measurement Setup:

The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt

temperature change during measuring. In order to stabilize the luminance, the measurement

should be executed after lighting Backlight for 20 minutes in a windless room.

LCD Module

LCD Panel

Center of the Screen

):

AVE

Field of View= 2º

CA210

CS-1000T

Note (6) Definition of White Variation (GW):

Measure the luminance of gray level 63 at 5 points

GW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

W

W/4

W/2

3W/

Vertical Line

mm

Horizontal Line

D

D/4 D/2 3D/4

1 2

5

3

4

Light Shield Room

(Ambient Luminance < 2 lux)

X

: Test Point

X=1 to 5

Active Area

24 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

8 PRECAUTIONS

8.1 HANDLING PRECAUTIONS

(1) The module should be assembled into the system firmly by using every mounting hole. Be careful not

to twist or bend the module.

(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause

electrical short or damage the polarizer.

(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and

assembly process.

(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is

very soft and easily scratched.

(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use

Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

permanently damage the polarizer due to chemical reaction.

(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel for

a long time.

(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In

case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.

(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.

(9) Do not disassemble the module.

(10) Do not pull or fold the lamp wire.

(11) Pins of I/F connector should not be touched directly with bare hands.

8.2 STORAGE PRECAUTIONS

(1) High temperature or humidity may reduce the performance of module. Please store LCD module within

the specified storage conditions.

(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may

damage LCD module when it is operating.

(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the

response time will become slowly, and the starting voltage of lamp will be higher than the room

temperature.

8.3 OPERATION PRECAUTIONS

(1) Do not pull the I/F connector in or out while the module is operating.

(2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This

can prevent the CMOS LSI chips from damage during latch-up.

(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while

assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.

25 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

9 PACKING

9.1 CARTON

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

26 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

9.2 PALLET

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

27 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

10 DEFINITION OF LABELS

10.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

-

X X X X X X X Y M D L N N N N

C P 1 3 5 4 4 8 - 0 1

01A

N141X5 - L03

(a) Model Name: N121I3 - L07

(b) Revision: Rev. XX, for example: C1, C2 …etc.

(c) Serial ID: X X

X X X X X Y M D L N N N N

E207943

Rev.XX

MADE IN TAIWAN

Serial No.

Product Line

Year, Month, Date

CMO Internal Use

Revision

CMO Internal Use

Serial ID includes the information as below:

(a) Manufactured Date: Year: 1~9, for 2001~2009

Month: 1~9, A~C, for Jan. ~ Dec.

Day: 1~9, A~Y, for 1

(b) Revision Code: cover all the change

(c) Serial No.: Manufacturing sequence of product

st

to 31st, exclude I , O and U

28 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

10.2 CARTON LABEL

www.panelook.com

Issued Date: Jan. 16, 2005

Model No.: N121I3 -L07

Approval

29 / 30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 3.0

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com