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Version Date
Ver 1.0
Oct. 14,’05
Page
(New)
Section Description
All
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Issued Date: Oct. 14, 2005
Model No.: N121I3 -L03
Preliminary
REVISION HISTORY
All Preliminary specification first issued.
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1 GENERAL DESCRIPTION
1.1 OVERVIEW
N121I3 -L03 is a 12.1” TFT Liquid Crystal Display module with single CCFL Backlight unit and 20 pins
LVDS interface. This module supports 1280 x 800 Wide-XGA mode and can display 262,144 colors. The
optimum viewing angle is at 6 o’clock direction. The inverter module for Backlight is built in.
1.2 FEATURES
- Thin and light weight
- WXGA (1280 x 800 pixels) resolution
- 3.3V LVDS (Low Voltage Differential Signaling) interface with 1 pixel/clock
- Meet RoHS requirement
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Issued Date: Oct. 14, 2005
Model No.: N121I3 -L03
Preliminary
1.3 APPLICATION
- TFT LCD Notebook
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note
Active Area 261.12 (H) x 163.2 (V) (12.1” diagonal) mm
Bezel Opening Area 263.12 (H) x 165.2 (V) mm
Driver Element a-si TFT active matrix - Pixel Number 1280 x R.G.B. x 800 pixel Pixel Pitch 0.204 (H) x 0.204 (V) mm Pixel Arrangement RGB vertical stripe - Display Colors 262,144 color Transmissive Mode Normally white - Surface Treatment Hard coating (3H), glare type - -
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal(H) 275.3 275.8 276.3 mm
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Vertical(V) 177.4 178 178.6 mm
Depth(D) - 4.9 5.2 mm
Weight
- 260 275 g (2)
- 275 290 g (3)
(1)
(1)
Note (2) Weight without inverter & inverter bracket.
Note (3) Weight with inverter & inverter bracket.
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p
g
p
)
2 ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 +50 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
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Issued Date: Oct. 14, 2005
Model No.: N121I3 -L03
Preliminary
Value
Min. Max.
- 200 G (3), (5)
NOP
- 1.5 G (4), (5)
NOP
Unit Note
Note (2) The temperature of panel surface should be 0 ºC Min. and 50 ºC Max.
Note (3) 2ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 500Hz, 0.5 Hr/cycle, 0.5hr each X, Y, Z,
Relative Humidity
100
90
80
60
O
erating Range
40
20
Stora
5
erature (ºC
Tem
e Range
8060 -20 40020-40
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture.
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2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage Vcc -0.3 +4.0 V
Logic Input Voltage VIN -0.3 Vcc+0.3 V
2.2.2 BACKLIGHT UNIT
Item Symbol
Lamp Voltage VL - 2.5K V
Lamp Current IL 3.0 6.5 mA
Lamp Frequency FL 45 80 KHz
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
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Value
Min. Max.
Value
Min. Max.
Unit Note
Unit Note
Issued Date: Oct. 14, 2005
Model No.: N121I3 -L03
Preliminary
(1)
(1), (2), IL = 6.0 mA
RMS
RMS
(1), (2)
should be restricted to the conditions described under Normal Operating Conditions.
Note (2) Specified values are for lamp (Refer to Section 3.2 for further information
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Issued Date: Oct. 14, 2005
Model No.: N121I3 -L03
Preliminary
3 ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max.
Power Supply Voltage Vcc 3.0 3.3 3.6 V Ripple Voltage VRP - 100 mV Rush Current I
Power Supply Current
Logical Input Voltage
White - (290) - mA (3)a
Black
“H” Level VIL - - +100 mV “L” Level V
- 1.2 1.5 A (2)
RUSH
lcc
-100 - - mV -
IH
- (350) - mA (3)b
Terminating Resistor RT - 100 - Ohm Power per EBL WG P
- TBD - W (4)
EBL
Note (1) The module should be always operated within above ranges.
Note (2) Measurement Conditions:
Value
Unit Note
+3.3V
R1
47K
Q1 2SK1475
FUSE
C3
1uF
Vcc
(LCD Module Input)
(High to Low)
(Control Signal)
SW
+12V
C1
1uF
VR1
R2
1K
47K
0.01uF
Q2
2SK1470
C2
Vcc rising time is 470us
+3.3V
0.9Vcc
0.1Vcc
GND
470us
Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, DC
Current and f
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= 60 Hz, whereas a power dissipation check pattern below is displayed.
v
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Issued Date: Oct. 14, 2005
Model No.: N121I3 -L03
Preliminary
Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input
a. White Pattern
Active Area
power. Test conditions are as follows.
(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f
(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file
(d) The inverter used is provided from O2Micro(www.o2micro.com). CMO doesn’t provide the
inverter in this product.
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Issued Date: Oct. 14, 2005
Model No.: N121I3 -L03
Preliminary
3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max.
Lamp Input Voltage VL 540 600 660 V
Lamp Current IL
Lamp Turn On Voltage VS
2.0 (1),(2)
3.0
- - 1,220 (25 deg C)V
- - 1,380 (0 deg C)V
Operating Frequency FL 45 - 80 KHz (5)
Lamp Life Time LBL 10,000 - - Hrs (7)
Power Consumption PL - 3.6 - W (4), IL = 6.0 mA
Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:
Value
Unit Note
6.0 6.5 mA
IL = 6.0 mA
RMS
RMS
(4)
RMS
(4)
RMS
(1),(3)
LCD
Module
HV (Pink)
LV (White)
1
2
Current Meter
Inverter
A
Note (2) for burst mode inverter design
Note (3) for continuous mode inverter design
Note (4) The voltage shown above should be applied to the lamp for more than 1 second after startup.
Otherwise the lamp may not be turned on.
Note (5) The lamp frequency may generate interference with horizontal synchronous frequency from the
display, and this may cause line flow on the display. In order to avoid interference, the lamp
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.
Note (6) P
= IL ØVL
L
Note (7) The lifetime of lamp is defined as the time when it continues to operate under the conditions at Ta
= 25 ²2
o
C and IL = 6.0 mA
until one of the following events occurs:
RMS
(a) When the brightness becomes Љ 50% of its original value.
(b) When the effective ignition length becomes Љ 80% of its original value. (Effective ignition
length is defined as an area that the brightness is less than 70% compared to the center point.)
Note (8) The waveform of the voltage output of inverter must be area-symmetric and the design of the
inverter must have specifications for the modularized lamp. The performance of the Backlight,
such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for
the lamp. All the parameters of an inverter should be carefully designed to avoid generating too
much current leakage from high voltage output of the inverter. When designing or ordering the
inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the
inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module
should be operated in the same manners when it is installed in your instrument.
The output of the inverter must have symmetrical (negative and positive) voltage waveform and
symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter
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which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may
produce interface with horizontal synchronous frequency and as a result this may cause beat on the
display. Therefore lamp frequency shall be as away possible from the horizontal synchronous
frequency and from its harmonics in order to prevent interference.
Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its
leakage current.
a. The asymmetry rate of the inverter waveform should be 10% below;
b. The distortion rate of the waveform should be within Ѕ2 ± 10%;
c. The ideal sine wave form shall be symmetric in positive and negative polarities.
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Issued Date: Oct. 14, 2005
Model No.: N121I3 -L03
Preliminary
* Asymmetry rate:
I p
I -p
| I
* Distortion rate
I
– I –p | / I
p
(or I –p) / I
p
rms
rms
* 100%
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)
4 BLOCK DIAGRAM
4.1 TFT LCD MODULE
Rxin0(+/-)
Rxin1(+/-)
Rxin2(+/-)
CLK(+/-)
Vcc
GND
Data
EDID
CLK
EDID
V
EDID
( DF19KR-20P-1H or equivalent )
INPUT CONNECTOR
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LVDS INPUT /
TIMING CONTROLLER
DC/DC CONVERTER &
REFERENCE VOLTAGE
GENERATOR
EDID
EEPROM
Issued Date: Oct. 14, 2005
Model No.: N121I3 -L03
SCAN DRIVER IC
TFT LCD PANEL
(1280x3x800)
DATA DRIVER IC
Preliminary
VL
LAMP CONNECTOR
(JST-BHSR-02VS-1)
4.2 BACKLIGHT UNIT
BACKLIGHT UNIT
1 HV (Pink)
2 LV (White
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5 INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin Symbol Description Polarity Remark
1 VSS Ground 2 VDD Power Supply +3.3 V 3 VDD Power Supply +3.3 V 4 V
5 TEST Panel Self Test
6 CLK
7 Data
8 Rxin0- LVDS Differential Data Input Negative
9 Rxin0+ LVDS Differential Data Input Positive
10 VSS Ground
11 Rxin1- LVDS Differential Data Input Negative
12 Rxin1+ LVDS Differential Data Input Positive
13 VSS Ground
14 Rxin2- LVDS Differential Data Input Negative
15 Rxin2+ LVDS Differential Data Input Positive
16 VSS Ground
17 CLK- LVDS Clock Data Input Negative
18 CLK+ LVDS Clock Data Input Positive
19 VSS Ground - 20 VSS Ground - -
Note (1) Connector Part No.: DF19KR-20P-1H or equivalent
DDC +3.3 V
EDID
DDC Clock
EDID
DDC Data
EDID
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Issued Date: Oct. 14, 2005
Model No.: N121I3 -L03
Preliminary
R0~R5,G0-
G1~G5,B0,B1
-
B2~B5,Hsync,Vsync,DE
LVDS Level
Note (2) User’s connector Part No: DF19G-20S-1C or equivalent
5.2 BACKLIGHT UNIT
Pin Symbol Description Color
1 HV High Voltage Pink
2 LV Ground White
Note (1) Connector Part No.: JST-BHSR-02VS-1 or equivalent
Note (2) User’s connector Part No.: JST-SM02B-BHSS-1-TB or equivalent
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
CLK+
Rxin2
Rxin1
Rxin0
T/7
IN20 IN19 IN18IN17IN16IN15 IN14
DE B5 B4 B3 B2 Vsync Hsync
IN13 IN12 IN11IN10IN9IN8 IN7
B1 G4 G3 G2 G1 B0 G5
IN6 IN5 IN4IN3IN2IN1 IN0
G0 R3 R2 R1 R0
R5
R4
Signal for 1 DCLK Cycle (T)
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5.4 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for
the color. The higher the binary input the brighter the color. The table below provides the assignment of
color versus data input.
Color
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black
Red
Green
Basic
Colors
Gray
Scale
Of
Red
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Yellow
White
Red(0)/Dark
Red(1)
Red(2)
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5.6 EDID SIGINAL SPECIFICATION
(1) EDID Power
Parameter Symbol Test Condition Min. Typ. Max. Unit
Power supply
voltage
Vcc — 1.8 — 5.5 V
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Issued Date: Oct. 14, 2005
Model No.: N121I3 -L03
Preliminary
(2) DC characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Supply current Vcc=5.0V Icc READ at 100kHz— 0.4 1.0 mA
Supply current Vcc=5.0V Icc WRITE at 100kHz— 2.0 3.0 mA
Standby Current ISB Vin=Vcc or Vss — 1.6 4.0 μA
Input Leakage Current ILI Vin=Vcc or Vss — 0.1 10 μA
Onput Leakage Current ILO Vout=Vcc or Vss— 0.1 10 μA
Input Low Level VIL — -1.0 — Vcc x 0.3 V
Input High Level VIH — Vcc x 0.7 — Vcc+0.5 V
Output Low Level Vcc=3.0V VOL1 IOL=3mA — — 0.4 V
Output Low Level Vcc=1.8V VOL2 IOL=1.5mA — — 0.5 V
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(3) AC characteristics (VCC=1.8~5.5V standard operation mode)
Parameter Symbol Min Max Unit
Clock Frequency, SCL FSCL — 100 kHz
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Issued Date: Oct. 14, 2005
Model No.: N121I3 -L03
Preliminary
Clock Pulse Width Low TLOW 4.7 —
Clock Pulse Width High THIGH 4.0 —
Noise Suppression Time TI — 100 ns
Clock Low to Data Out ValidTAA 0.1 4.5
Time the bus must be free
BUF 4.7 —
before a new transmission
can start
Start Hold Time THD.STA 4.7 —
Start Set-up Time TSU.STA 4.7 —
Data in Hold Time THD.DAT 0 —
Data in Set-up Time TSU.DAT 200 — ns
Inputs Rise Time TR — 1.0
T
Ӵs
Ӵs
Ӵs
Ӵs
Ӵs
Ӵs
Ӵs
Ӵs
Inputs Fall Time TF — 300 ns
Stop Set-up Time TSU.STO 4.7 —
Data Out Hold Time TDH 100 — ns
Write Cycle Time TWR — 10 ms
Ӵs
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6 INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item SymbolMin. Typ. Max. Unit Note
DCLK Frequency 1/Tc - 71 73 MHz -
Vertical Total Time TV 802 823 840 TH -
DE
Vertical Addressing Time TVD 800 800 800 TH -
Horizontal Total Time TH 138014401450 Tc -
Horizontal Addressing Time THD 128012801280 Tc -
INPUT SIGNAL TIMING DIAGRAM
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Issued Date: Oct. 14, 2005
Model No.: N121I3 -L03
Preliminary
DE
DCLK
TC
DE
DATA
6.2 POWER ON/OFF SEQUENCE
Power Supply
for LCD, Vcc
- Interface Signal
(LVDS Signal of
Transmitter), V
- Power for Lamp
0V
0V
I
Power On
90%
10%
t1
HD
T
Restart
t7
10%
10%
t4
Valid Data
ONOFF OFF
Power Off
90%
t3 t2
t6 t5
50%50%
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Timing Specifications:
0.5ms <t1Љ10 msec
0 < t2 Љ 50 msec
0 < t3 Љ 50 msec
t4 Њ 500 msec
t5 Њ 200 msec
t6 Њ 200 msec
Note (1) Please avoid floating state of interface signal at invalid period.
Note (2) When the interface signal is invalid, be sure to pull down the power supply of LCD Vcc to 0 V.
Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the
interface signal is valid. The Backlight inverter power must be turned off before the power supply
for the logic and the interface signal is invalid.
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Model No.: N121I3 -L03
Preliminary
Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To
avoid this phenomenon, we suggest that the Vcc falling time had better to follow
t7 Њ 5 msec
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7 OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC 3.3 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Inverter Current IL 6.0 mA
Inverter Driving Frequency FL 61 KHz
Inverter Sumida-H05-4915
The measurement methods of optical characteristics are shown in Section 7.2. The following items
should be measured under the test conditions described in Section 7.1 and stable environment shown in