One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Nov. 23, 2009
REVISION HISTORY
Version Date Section Description
Ver. 3.0 Nov.. 23, ’09 -M236H3-P02 Approval Specification was first issued.
Model No.: M236H3-P02
Approval
3 / 23
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Global LCD Panel Exchange Center
1. GENERAL DESCRIPTION
1.1 OVERVIEW
The M236H3-P02 is a 23.6-inch wide TFT LCD open cell with driver ICs and a 30-pins-2ch-LVDS
circuit board. The product supports 1920 x 1080 Full HD mode and can display up to 16.7M colors. The
backlight unit is not built in.
1.2 FEATURES
- Super wide viewing angle
- High contrast ratio
- Fast response time
- High color saturation
- Full HDTV (1920 x 1080 pixels) resolution
www.panelook.com
Issued Date: Nov. 23, 2009
Model No.: M236H3-P02
Approval
- DE (Data Enable) only mode
- LVDS (Low Voltage Differential Signaling) interface
- RoHS Compliance
1.3 APPLICATION
- TFT LCD Monitor
1.4 GENERAL SPECIFICATIONS
Item Specification Unit Note
Diagonal Size 23.547inch -
Active Area 521.28 (H) x 293.22 (V) mm (1)
Driver Element a-Si TFT active matrix - -
Pixel Number 1920 x R.G.B. x 1080 pixel -
Pixel Pitch 0.2715 (H) x 0.2715 (V) mm -
Pixel Arrangement RGB vertical stripe - -
Display Colors 16.7Mcolor -
Transmissive Mode Normally White - -
Surface Treatment Hard coating (3H), Anti-glare (Haze 25%) - -
Power Consumption 5.5Watt (3)
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Weight - -710gI/F connector mounting
position
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
(2) Connector mounting position
(3) Please refer to sec.3.1 for more information of power consumption.
The mounting inclination of the connector makes
the screen center within ±0.5mm as the horizontal.
+/- 0.5mm
- (2)
4 / 23
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Nov. 23, 2009
Model No.: M236H3-P02
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT (BASED ON CMO MODULE M236H3-L02)
Item Symbol
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 +50 ºC (1), (2)
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta 40 ºC)Љ
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC)
(c) No condensation.
Note (2) The temperature of panel display surface area should be 0 ºC Min. and 60 ºC Max.
Min. Max.
Value
Approval
Unit Note
2.2 ABSOLUTE RATINGS OF ENVIRONMENT (OPEN CELL)
High temperature or humidity may reduce the performance of panel. Please store LCD panel within the
specified storage conditions.
Storage Condition: With packing
Storage temperature range: 25±5 ºC
Storage humidity range: 50±10%RH
Shelf life: 30days
2.3 ELECTRICAL ABSOLUTE RATINGS (OPEN CELL)
Item Symbol
Power Supply Voltage VCC -0.3 +6.0 V (1)
Logic Input Voltage Vlogic -0.3 +3.6 --
Note (1) Permanent damage might occur if the module is operated at conditions exceeding the maximum
values.
Value
Min Max
Unit Note
5 / 23
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Nov. 23, 2009
Model No.: M236H3-P02
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD OPEN CELL Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max.
Power Supply Voltage Vcc 4.5 5.0 5.5 V Ripple Voltage VRP - - 300 mV Power On Rush Current I
- - 3 A (2)
RUSH
White - 0.50.6A(3)
Power Supply Current
Black - 1.11.32A(3)
Vertical Stripe
lcc
- 0.9 1.08 A (3)
Power Consumption PLCD - 5.5 6.6 Watt (4)
LVDS differential input voltage Vid 100 - 600 mV LVDS common input voltage Vic 1.0 1.2 1.4 V Logic High Input Voltage VIH 2.64 - 3.6 V Logic Low Input Voltage VIL 0 - 0.66 V -
Note (1) The product should be always operated within above ranges.
Value
Unit Note
Approval
Note (2) Measurement Conditions:
+5.0V
R1
47K
(High to Low)
(Control Signal)
SW
+12V
VR1
C1
1uF
R2
1K
47K
Q1 2SK1475
C2
0.01uF
Q2
2SK1470
FUSE
C3
Vcc
(LCD Module Input)
1uF
Vcc rising time is 470μs
Vcc
0.9Vcc
0.1Vcc
GND
470μs
6 / 23
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Global LCD Panel Exchange Center
≤≤≤
Note (3) The specified power supply current is under the conditions at Vcc = 5.0 V, Ta = 25 ± 2 ºC, Fv = 60
Hz, whereas a power dissipation check pattern below is displayed.
www.panelook.com
Issued Date: Nov. 23, 2009
Model No.: M236H3-P02
Approval
a. White Pattern
Active Area
c. Vertical Stripe Pattern
b. Black Pattern
Active Area
R
G
B
R
B
G
B
R
B
G
B
R
R
R
G
G
G
B
B
B
R
R
RR
G
Active Area
Note (4) The power consumption is specified at the pattern with the maximum current.
3.2 Vcc Power Dip Condition:
B
G
Vcc
4.5V
4.0V
Td
Dip condition:
msTdVVccV20,5.40.4
B
7 / 23
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Global LCD Panel Exchange Center
4. BLOCK DIAGRAM
4.1 TFT LCD OPEN CELL
RXO0(+/-)
RXO0(+/-)
RXO1(+/-)
RXO1(+/-)
RXO2(+/-)
RXO2(+/-)
RXO3(+/-)
RXO3(+/-)
RXOC(+/-)
RXOC(+/-)
RXE0(+/-)
RXE0(+/-)
RXE1(+/-)
RXE1(+/-)
RXE2(+/-)
RXE2(+/-)
RXE3(+/-)
RXE3(+/-)
RXEC(+/-)
RXEC(+/-)
AGMODE
NC
Vcc
Vcc
GND
GND
INPUT CONNECTOR
INPUT CONNECTOR
(FI-X30SSL-HF)
www.panelook.com
LVDS INPUT /
LVDS INPUT /
TIMING CONTROLLER
TIMING CONTROLLER
DC/DC CONVERTER &
DC/DC CONVERTER &
REFERENCE VOLTAGE
REFERENCE VOLTAGE
Issued Date: Nov. 23, 2009
Model No.: M236H3-P02
Approval
SCAN DRIVER IC
SCAN DRIVER IC
TFT LCD PANEL
TFT LCD PANEL
(1920x3x1200)
(1920x3x1080)
DATA DRIVER IC
DATA DRIVER IC
8 / 23
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
9 RXOC+ Positive LVDS differential clock input. (odd)
10 RXO3- Negative LVDS differential data input. Channel O3(odd)
11 RXO3+ Positive LVDS differential data input. Channel O3 (odd)
12 RXE0- Negative LVDS differential data input. Channel E0 (even)
13 RXE0+ Positive LVDS differential data input. Channel E0 (even)
14 GND Ground
15 RXE1- Negative LVDS differential data input. Channel E1 (even)
16 RXE1+ Positive LVDS differential data input. Channel E1 (even)
17 GND Ground
18 RXE2- Negative LVDS differential data input. Channel E2 (even)
19 RXE2+ Positive LVDS differential data input. Channel E2 (even)
20 RXEC- Negative LVDS differential clock input. (even)
21 RXEC+ Positive LVDS differential clock input. (even)
22 RXE3- Negative LVDS differential data input. Channel E3 (even)
23 RXE3+ Positive LVDS differential data input. Channel E3 (even)
24 GND Ground
25 NC Not connection, this pin should be open.
26 NC Not connection, this pin should be open.
Not connection, this pin should be open.
27 NC/Agmode
28 Vcc +5.0V power supply
29 Vcc +5.0V power supply
30 Vcc +5.0V power supply
Note (1) Connector Part No.: STM MSCKT2407P30HA or Starconn 093G30-B2001A
Note (2) The first pixel is odd.
Note (3) Input signal of even and odd clock should be the same timing.
Note (4) Permanent damage might occur if the Agmode is operated at conditions exceeding the maximum
When use Agmode pin, input voltage should be 3.30.1V, otherwise connected
to ground if not used.
www.panelook.com
Issued Date: Nov. 23, 2009
Model No.: M236H3-P02
Approval
values.
5.2 LVDS DATA MAPPING TABLE
LVDS Channel O0
LVDS Channel O1
LVDS Channel O2
LVDS Channel O3
LVDS Channel E0
LVDS output D7 D6 D4 D3 D2 D1 D0
Data order OG0 OR5 OR4 OR3 OR2 OR1 OR0
LVDS output D18 D15 D14 D13 D12 D9 D8
Data order OB1 OB0 OG5 OG4 OG3 OG2 OG1
LVDS output D26 D25 D24 D22 D21 D20 D19
Data order DE NA NA OB5 OB4 OB3 OB2
LVDS output D23 D17 D16 D11 D10 D5 D27
Data order NA OB7 OB6 OG7 OG6 OR7 OR6
LVDS output D7 D6 D4 D3 D2 D1 D0
Data order EG0 ER5 ER4 ER3 ER2 ER1 ER0
9 / 23
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Nov. 23, 2009
Model No.: M236H3-P02
Approval
LVDS Channel E1
LVDS Channel E2
LVDS Channel E3
LVDS output D18 D15 D14 D13 D12 D9 D8
Data order EB1 EB0 EG5 EG4 EG3 EG2 EG1
LVDS output D26 D25 D24 D22 D21 D20 D19
Data order DE NA NA EB5 EB4 EB3 EB2
LVDS output D23 D17 D16 D11 D10 D5 D27
Data order NA EB7 EB6 EG7 EG6 ER7 ER6
5.3 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input
for the color. The higher the binary input, the brighter the color. The table below provides the
assignment of color versus data input.
Data Signal
Basic
Colors
Gray
Scale
Of
Red
Color
Black
Red
Green
Blue
Cyan
Magenta
Yellow
White
Red(0) / Dark
Red(1)
Red(2)
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Green(2)
:
:
Green(253)
Green(254)
Green(255)
Blue(0) / Dark
Blue(1)
Blue(2)
:
:
Blue(253)
Blue(254)
Blue(255)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
10 / 23
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
1
1
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Global LCD Panel Exchange Center
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
SignalItemSymbolMin.Typ.Max.UnitNote
Frequency Fc 58.5474.2598 MHz Period Tc - 13.47- ns Input cycle to
cycle jitter
Spread spectrum
LVDS Clock
LVDS Data
Vertical Active Display Term
Horizontal Active Display
Te rm
Note: Because this module is operated by DE only mode, Hsync and Vsync input signals are ignored.
modulation range
Spread spectrum
modulation
frequency
High Time Tch - 4/7 - Tc Low Time Tcl - 3/7 - Tc Setup Time Tlvs 600 - - ps
Hold Time Tlvh 600 - - ps
Frame Rate Fr 50 60 75 Hz Tv=Tvd+Tvb
Total Tv 1115 112511 36 Th Display Tvd 1080 10801080 Th Blank Tvb 35 45 56 Th Total Th 105011001150 Tc Th=Thd+Thb
Display Thd 960 960 960 Tc Blank Thb 90
www.panelook.com
-0.02*Tc- 0.02*Tc ns (1)
T
rcl
clkin_mod
F
F
0.98*Fc- 1.02*Fc MHz
- - 200 KHz
SSM
Issued Date: Nov. 23, 2009
Model No.: M236H3-P02
Approval
(2)
(3)
140190Tc -
DE
DCLK
DE
DATA
INPUT SIGNAL TIMING DIAGRAM
Tv
T
C
Thb
TVb
T
h
hd
T
11 / 23
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Global LCD Panel Exchange Center
Note (1) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T1 – TI
Note (2) The SSCG (Spread spectrum clock generator) is defined as below figures.
www.panelook.com
Issued Date: Nov. 23, 2009
Model No.: M236H3-P02
Approval
T1T2
Note (3) The LVDS timing diagram and setup/hold time is defined and showing as the following figures.
LVDS RECEIVER INTERFACE TIMING DIAGRAM
Tc
RXCLK+/-
RXn+/-
Tlvs
Tlvh
1T
14
3T
14
5T
14
7T
14
9T
14
11T
14
13T
14
12 / 23
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Global LCD Panel Exchange Center
6.2 POWER ON/OFF SEQUENCE
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should follow the conditions
shown in the following diagram.
www.panelook.com
Issued Date: Nov. 23, 2009
Model No.: M236H3-P02
Approval
- Power Supply
for LCD, Vcc
- Interface Signal
(LVDS Signal of
Transmitter), V
I
- Power for Lamp
Timing Specifications:
0.5< t1 Љ 10 msec
0 < t2 Љ 50 msec
0 < t3 Љ 50 msec
t4 Њ 500 msec
0V
0V
Power On
90%
10%
10%
Restart
t4
10%
Power Off
90%
t1
Valid Data
ONOFF OFF
t7
t3t2
t6t5
50%50%
t5 Њ 450 msec
t6 Њ 90 msec
5 t7 ЉЉ 100 msec
Note:
(1) The supply voltage of the external system for the product input should be the same as the definition of Vcc.
(2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD
operation of the LCD turns off, the display may momentarily become abnormal screen.
(3) In case of VCC = off level, please keep the level of input signals on the low or keep a high impedance.
(4) T4 should be measured after the module has been fully discharged between power off and on period.
(5) Interface signal shall not be kept at high impedance when the power is on.
(6)
It is not guaranteed that product damage is caused by not following the Power Sequence.
(7) It is suggested that Vcc falling time follows t7 specification, else slight noise is likely to occur when LCD
turns off (even backlight is already off).
13 / 23
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Global LCD Panel Exchange Center
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC 7.0 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Inverter Current I
Inverter Driving Frequency F
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown as below. The following
items should be measured under the test conditions described in 7.1 and stable environment shown in