CML MX661 Service Manual
COMMUNICATION SEMICONDUCTORS
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CML Microcircuits
CMX661
PAIR GAIN DUAL
SPM DETECTOR
D/661/3 July 2002 Provisional Information
Features Applications
•• Two (12kHz/16kHz) SPM Detectors •• Pair-Gain Systems
•• Standard 3.579545MHz Xtal •• Out-of-Band Signalling Systems
•• Selectable Bandwidth Limits
•• Excellent Speech-Band Rejection
•• Low Power 3.0V to 5.0V Operation
•• Call Charge Applications in
PBX and PABX Line Cards
1.1 Brief Description
The CMX661 is a low power, Dual Subscriber Pulse Metering (SPM) Detector – two detectors on a single
chip – to indicate the presence on a telephone line of either 12kHz or 16kHz telephone call charge
frequencies. The detection frequency and bandwidth are common to both detectors and may be
externally selected. The detection sensitivity is set independently for each channel by external
components and the detector outputs can be set to a high impedance state for device multiplexing
requirements in PBX and PABX line card applications.
Flexibility of decode bandwidth settings allows the CMX661 to operate in systems where the SPM
generation is not necessarily perfectly accurate or stable. External hardwired selection of functionality
economises on the number of host µC I/O control lines required, whilst the rapid response and deresponse times of the CMX661 permit flexible tone length qualification by the host µC.
The CMX661 offers low (3.0V) operating voltage and power, consuming ≈750µA at 3V. It is available in
low-cost 16-pin plastic DIL and SOIC packages.
2002 CML Microsystems Plc
Pair Gain Dual SPM Detector CMX661
CONTENTS
Section Page
1.0 Features and Applications..................................................................1
1.1 Brief Description..................................................................................1
1.2 Block Diagram .....................................................................................3
1.3 Signal List............................................................................................ 4
1.4 External Components..........................................................................6
1.5 General Description.............................................................................7
1.5.1 Description of Blocks .............................................................7
1.5.2 Operating States .....................................................................7
1.6 Application Notes................................................................................9
1.6.1 Signal Input Configurations................................................... 9
1.6.2 Crystal/Clock Distribution ......................................................9
1.6.3 Channel 1 and Channel 2 Output Format..............................9
1.6.4 Setting Level Sensitivity via External Components............10
1.6.5 Aliasing..................................................................................10
1.7 Performance Specification................................................................12
1.7.1 Electrical Performance..........................................................12
1.7.2 Packaging..............................................................................15
2002 CML Microsystems Plc 2 D/661/3
Pair Gain Dual SPM Detector CMX661
1.2 Block Diagram
Figure 1 Block Diagram
2002 CML Microsystems Plc 3 D/661/3
Pair Gain Dual SPM Detector CMX661
1.3 Signal List
Package
D4
Pin No. Pin No. Name Type
1 1 XTAL I/P The input of the on-chip oscillator for use with a
2 2 XTALN O/P The inverted output of the on-chip oscillator.
3 3 CH2 OP O/P The digital output of the Channel 2 SPM
4 4 CH1 OP O/P The digital output of the Channel 1 SPM
Package
P3
Signal Description
3.579545MHz Xtal in conjunction with the
XTALN output; circuit components are on-chip.
detector, when enabled. Logic '0' (low) when
tone is detected.
detector, when enabled. Logic '0' (low) when
tone is detected.
5 5 CH1 AMP OUT O/P The output of the Channel 1 input amplifier.
See Figures 2 and 3.
6 6 CH1 AMP IN (-) I/P The negative input to the Channel 1 input
amplifier. See Figures 2 and 3.
7 7 CH1 AMP IN (+) I/P The positive input to the Channel 1 Input
amplifier. See Figures 2 and 3.
8 8 VSS POWER The negative supply rail (ground).
9 9 CH2 AMP IN (+) I/P The positive input to the Channel 2 input
amplifier. See Figures 2 and 3.
10 10 CH2 AMP IN (-) I/P The negative input to the Channel 2 input
amplifier. See Figures 2 and 3.
11 11 CH2 AMP OUT O/P The output of the Channel 2 input amplifier.
See Figures 2 and 3.
12 12 OP ENABLEN I/P For multi-chip output multiplexing; controls the
state of both Channel 1 and Channel 2 outputs.
When this input is placed high (logic ‘1’) both
outputs are set to a high impedance. When
placed at logic '0' (low) both outputs are
enabled.
13 13 D0 I/P
The LSB of the two bits which set the 'Will
Decode' bandwidth of the CMX661.
2002 CML Microsystems Plc 4 D/661/3
Pair Gain Dual SPM Detector CMX661
Package
D4
Package
P3
Signal Description
Pin No. Pin No. Name Type
14 14 D1 I/P
The MSB of the two bits which set the 'Will
Decode' bandwidth of the CMX661.
15 15 SYSTEM
SELECT
I/P
Selects the system frequency. High (logic ‘1’) =
12kHz; Low (logic ‘0’) = 16kHz. This signal has
an internal pullup resistor, so if left unconnected
the CMX661 will detect 12kHz by default.
16 16 VDD POWER The positive supply rail. Critical levels and
voltages within the CMX661 are dependent
upon this supply. This pin should be decoupled
to VSS by a capacitor mounted close to the
device pins.
Notes: I/P = Input
O/P = Output
BI = Bidirectional
2002 CML Microsystems Plc 5 D/661/3
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