CMED CMI9738 Datasheet

r

A

r

A

A

CMI 9738

Integrated Multi-channel AC‘97

CMI9738 4CH Audio Codec Preliminary Specification

1. Description and Overview

Versatility

CMI9738 is a 4CH AC97 CODEC, applicable fo
currently mainstream MB chipsets of Intel, VIA,

li, and SIS. CMI9738 is ideal fo
PC2001-compliant desktops, notebooks, and
home entertainment PCs where high-quality
audio is a must.

4CH Playback

The specially-designed 4CH hardware
architecture of CMI9738 allows all types of south
bridge to playback 4CH audio, thus helping
commonplace south bridge get rid of the
limitation of 2CH audio playback capability
(patent pending both in Taiwan and United
States).

Cost-effectiveness

s to the cost concern, CMI9738 integrates the
earphone buffer, analog CD differential interface,
and analog switch for rear channel audio to
Line-in. Simply by using 0.1uf decoupling
capacitor, CMI9738 meets PC2001 frequency
response requirements.

longside offering standard LQFP 48pin
packaging option, CMI9738 also offers SOP
24pin packaging, which helps to further cut the
cost.

More Audio Option

Last but not least, CMI9738 provides
Sensaura® 3D audio option. In that regard,
the audio quality of CMI9738 is fabulous
beyond general expectation.

Features

Intel AC’97 Rev 2.2 compatible
AC-Link Protocol compliance
Full-Duplex Codec
Earphone Buffer
Line-in/rear out share jack capability
4 channels DAC
48 LQFP Package and 24-Lead TSSOP

Package

 Meet Microsoft’s
 Sensaura® 3D Enhancement(optional)



PC2001 requirements

Pin Block Diagram

25

26

27

28

29

30

31

32

33

34

35

36

NC

NC

NC

NC

37

NC

38

AVdd2

39

REAR_OUT_L

40

TEST0#

41

REAR_OUT_R

42

AVss2

43

NC

44

NC

45

RESERVED

46

RESERVED

47

NC

48

NC

C-MEDIA Electronics Inc.

LINE_OUT_L

LINE_OUT_R

U2

CMI9738-LQFP-48

DVdd1

XTL_IN

XTL_OUT

DVss1

SDATA_OUT

1234567891011

AFILT1

AFILT2

BIT_CLK

DVss2

SDATA_IN

NC

Vrefout

DVdd2

SYNC

AVdd1

AVss1

LINE_IN_R

LINE_IN_L

CD_GND

AUX_IN_R

AUX_IN_L

RESET#

NC

12

NC

MIC1

CD_R

CD_L

NC
NC

NC

24
23
22
21
20
19
18
17
16
15
14
13

6F, 100, Sec. 4, Civil Boulevard, Taipei, Taiwan, R.O.C. 106
TEL: [phone] FAX: [phone] E-mail:[e-mail]

1

SDATA_IN

2

SYNC

3

RESET#

4

AUX_IN_L

5

AUX_IN_R

6

CD_L

7

CD_GND

8

CD_R

9

MIC1

10

LINE_IN_L

11

LINE_IN_R

12 13

VREF_OUT XADCHL

BIT_CLK

SDATA_OUT

XTL_OUT

XTL_IN

DVsdd

TEST0#

LINE_OUT_R

AVdd

LINE_OUT_L

XADCHR

Vss

24
23
22
21
20
19
18
17
16
15
14

Revision Date：Apr./2002
Revision ：1.1

PIN DESCRIPTIONS

48-Pin LQFP 24-Pin TSSOP

PIN # Signal Name PIN # Signal Name

1 DVdd1 25 AVdd1
2 XTL_IN 26 AVss1
3 XTL_OUT 27 NC
4 DVss1 28 Vrefout
5 SDATA_OUT 29 AFILT1
6 BIT_CLK 30 AFILT2
7 DVss2 31 NC
8 SDATA_IN 32 NC

9 DVdd2 33 NC
10 SYNC 34 NC
11 RESET# 35 LINE_OUT_L
12 NC 36 LINE_OUT_R
13 NC 37 NC
14 AUX_IN_L 38 AVdd2
15 AUX_IN_R 39 REAR_OUT_L
16 NC 40 TEST0#
17 NC 41 REAR_OUT_R
18 CD_L 42 AVss2
19 CD_GND 43 NC
20 CD_R 44 NC
21 MIC1 45 RESERVED
22 NC 46 RESERVED
23 LINE_IN_L 47 NC
24 LINE_IN_R 48 NC

PIN # Signal Name

1 SDATA_IN
2 SYNC
3 RESET#
4 AUX_IN_L
5 AUX_IN_R
6 CD_L
7 CD_GND
8 CD_R

9 MIC1
10 LINE_IN_L
11 LINE_IN_R
12 VREF_OUT
13 AFILT1
14 AFILT2
15 LINE_OUT_L
16 LINE_OUT_R
17 AVdd
18 TEST0#
19 Vss
20 DVsdd
21 XTL_IN
22 XTL_OUT
23 SDATA_OUT
24 BIT_CLK

CMI 9738

Integrated Multi-channel AC‘97

1
2
3
4
5
6
7
8
9
10
11
12

24
23
22
21
20
19
18
17
16
15
14
13

C-MEDIA Electronics Inc.
6F, 100, Sec. 4, Civil Boulevard, Taipei, Taiwan, R.O.C.
TEL: [phone] FAX: [phone] E-mail:[e-mail]

106

Revision Date：Apr./2002
Revision ：1.1

CMI 9738

Integrated Multi-channel AC‘97

CMI9738 Mixer Block Diagram

REAR OUT

FRONT OUT

SRC

SRC

Mixer Block Diagram

DAC

DAC

MUTE

M
U
X

BufMUTE

39, 41

REAR_OUT_L/R

CD_L/R

CD_GND

LINE_IN_L/

REAR OUT

AUX_INL/R

SYNC

BIT_CLK

DATA_OUT

S

SDATA_IN

RESET#

XTL_IN

XTL_OUT

MIC1

R

18, 20

(6, 8)

23, 24

(10, 11)

14, 15

(4, 5)

(24)
(23)

(21)
(22)

19

(7)

(LINE_IN/REAR_OUT)

21

(9)

10

(2)

6
5
8

(1)

11

(3)

2
3

Noise
Cancel

AC'97

Digital

Interface

OSC

BOOST
(+20dB)

PCM IN

VOL MUTE

M
U
X

VOL MUTE

MUTEVOL

MUTEVOL

M
U
X

Record

Gain

Control

ADC

MASTER

Σ

VOLUME

/ MUTE

MUTE

Earphone
Buffer

XX : LQFP-48

(XX) : SSOP-24

35, 36

(15, 16)

LINE_OUT_L/R

The CMI9738 mixer is designed to the AC’97 specification to manage playback and record
of all digital and analog audio sources in the PC environment. These include：

System audio：digital PCM input and output for business, games, and multimedia
CD/DVD：analog CD/DVD-ROM Redbook audio with internal connections to Codec mixer
Mono microphone：choice of desktop or headset mic, with programmable boost and gain
Speakerphone：use of system mic & speakers for telephony, DSVD, and video

conferencing

Stereo line in：analog external line level source from consumer audio, video camera, etc
AUX/synth：analog FM or wavetable synthesizer, or other internal source

SOURCE FUNCTION CONNECTION OUTPUT MIX SUPPORTS:

MIC1 desktop microphone from mic jack •stereo mix of all sources for LINE_OUT

LINE_IN external audio source from line in jack •stereo output for REAR_OUT

CD audio from CD-ROM drive cable from CD-ROM

AUX upgrade synth or other external source internal connector

PCM out digital audio output from AC '97 Controller AC-link

Mix out mix of all sources AC ‘97 internal •any mono or stereo source

LINE_OUT stereo mix of all sources (front channel) to output jack •mono or stereo mix of all sources

REAR_OUT stereo output of rear (surround) channel to output jack

PCM in digital audio input to AC '97 Controller AC-link

INPUT MUX SUPPORTS:

C-MEDIA Electronics Inc.
6F, 100, Sec. 4, Civil Boulevard, Taipei, Taiwan, R.O.C. 106
TEL: [phone] FAX: [phone] E-mail:[e-mail]

Revision Date：Apr./2002
Revision ：1.1

CMI 9738

Integrated Multi-channel AC‘97

2. ORDERING INFORMATION

Part Number Package Temperature Range Supply Range

CMI9738 48-Pin LQFP 9mm×7mm×1.6mm 0 o C to +70 o C DVdd = 3.3V, AVdd = 5V
CMI9738 24 Pin-TSSOP 7.9mm×6.5mm×1.1mm 0 o C to +70 o C DVdd = 3.3V, AVdd = 5V

Outline Dimensions

48-Lead Thin Plastic Quad Flatpack (LQFP) (ST-48)

Dimensions shown in inches and （mm）

24-Lead Plastic TSSOP (RU-24)

C-Media reserves the right to change specifications without notice.

C-MEDIA Electronics Inc.
6F, 100, Sec. 4, Civil Boulevard, Taipei, Taiwan, R.O.C. 106
TEL: [phone] FAX: [phone] E-mail:[e-mail]

Revision Date：Apr./2002
Revision ：1.1

CMI 9738

Integrated Multi-channel AC‘97

TABLE OF CONTENTS

1. DESCRIPTION AND OVERVIEW 1

2. ORDERING INFORMATION 4

3. PIN/SIGNAL DESCRIPTIONS 8

3.1 DIGITAL I/O 8

3.1 ANALOG I/O 8

3.2 FILTER AND REFERENCE PINS 8

3.3 POWER AND GROUND SIGNALS 9

4. DIGITAL INTERFACE 10

4.1 AC_LINK 10

4.2 CLOCKING 10

4.3 RESETTING 10

4.4 AC-LINK DIGITAL SERIAL INTERFACE PROTOCOL

4.5 AC-LINK AUDIO INPUT FRAME（SDATA_IN） 12

4.6 AC-LINK AUDIO OUTPUT FRAME（SDATA_OUT） 14

4.7 AC-LINK LOW POWER MODE 17

11

5. CMI9738 MIXER 19

5.1 MIXER INPUT 20

5.2 MIXER OUTPUT 20

6. REGISTER INTERFACE 21

6.1 REGISTER DESCRIPTIONS 22

6.2 PIN DESCRIPTIONS 28

7. AC-LINK TIMING CHARACTERISTICS 29

7.1 COLD RESET 29

7.2 WARM RESET 29

7.3 CLOCKS 29

7.4 DATA SETUP AND HOLD 30

7.5 SIGNAL RISE AND FALL TIMES 31

7.6 AC-LINK LOW POWER MODE TIMING 32

7.7 ATE TEST MODE 32

8. ELECTRICAL SPECIFICATIONS 33

8.1 DC CHARACTERISTICS 33

8.2 ABSOLUTE MAXIMUM RATINGS 33

8.3 RECOMMENDED OPERATING CONDITIONS 34

8.4 MIXER CHARACTERISTICS 34

8.5 POWER CONSUMPTION 35

8.6 ANALOG PERFORMANCE CHARACTERISTICS 35

C-MEDIA Electronics Inc.
6F, 100, Sec. 4, Civil Boulevard, Taipei, Taiwan, R.O.C. 106
TEL: [phone] FAX: [phone] E-mail:[e-mail]

Revision Date：Apr./2002
Revision ：1.1

CMI 9738

Integrated Multi-channel AC‘97

9. REFERENCES 37

10. LIST OF FIGURES

Figure 1. AC ‘97 connection to its companion controller
Figure 2. AC ‘97 Standard Bi-directional Audio Frame
Figure 3. AC-link Audio Input Frame 12
Figure 4. Start of an Audio Input Frame 13
Figure 5. AC-Link Audio Output Frame 14
Figure 6. Start of an Audio Output Frame 15
Figure 7. AC-link Powerdown Timing 17
Figure 8. CMI9738 Mixer Functional Diagram 19
Figure 9. Cold Reset timing diagram 29
Figure 10. Warm Reset 29
Figure 11. BIT_CLK to SYNC timing diagram 30
Figure 12. Data Setup and Hold 30
Figure 13. Signal rise and fall times diagram 31
Figure 14. AC-link low power mode timing diagram
Figure 15. ATE test mode timing diagram 32

11. LIST OF TABLES

Table 1. Digital Signal List 8

10
11

32

Table 2. Analog Signal List 8
Table 3. Filtering and Voltage References 9
Table 4. Power Signal List CMI9738 9
Table 5. Mixer Functional Connections 20
Table 6. Mixer Registers 22
Table 7. Cold Reset timing parameters 28
Table 8 Warm Reset 28
Table 9. Clocks 29
Table 10. Data setup and hold timing parameters
Table 11. Signal rise and fall times parameters 30
Table 12. AC-link low power mode timing parameters
Table 13. ATE test mode timing parameters 31
Table 14. DC Characteristics (relative to Vdd) 32
Table 15. DC Characteristics (3.3 V Operation as per PCI 2.2)
Table 16. Absolute Maximum Ratings 33
Table 17. Operating Conditions 33
Table 18. Mixer Characteristics 33

30

31

32

Table 19. Power Consumption 34
Table 20. Analog performance characteristics 35

C-MEDIA Electronics Inc.
6F, 100, Sec. 4, Civil Boulevard, Taipei, Taiwan, R.O.C. 106
TEL: [phone] FAX: [phone] E-mail:[e-mail]

Revision Date：Apr./2002
Revision ：1.1

CMI 9738

Integrated Multi-channel AC‘97

3. PIN/SIGNAL DESCRIPTIONS

3.1 DIGITAL I/O

These signals connect the CMI9738 to its AC’97 Controller counterpart, an external crystal,
multi-codec selection and external audio amplifier.

Table 1. Digital Signal List

Signal Name Type Description

RESET# I AC’97 Master H/W Reset
XTL_IN I 24.576 MHz Crystal

XTL_OUT O 24.576 MHz Crystal

SYNC I 48 kHz fixed rate sample sync

BIT_CLK O 12.288 MHz serial data clock

SDATA_OUT I Serial, time division multiplexed, AC’97 input stream

SDATA_IN O Serial, time division multiplexed, AC’97 output stream

# denotes active low

3.2 ANALOG I/O

These signals connect the CMI9738 to analog sources and sinks, including microphones and
speakers.
Table 2. Analog Signal List

Signal Name Type Description

AUX_IN_L I Aux Left Channel
AUX_IN_R I Aux Right Channel

CD_L I CD Audio Left Channel
CD_R I CD Audio Right Channel

CD_GND I CD Audio analog ground

MIC1 I Desktop Microphone Input
LINE_IN_L I Line In Left Channel
LINE_IN_R I Line In Right Channel

LINE_OUT_L O Line Out Left Channel

LINEOUT_R O Line Out Right Channel

REAR_OUT_L O Rear Out Left Channel

REAR_OUT_R O Rear Out Right Channel

3.3 FILTERAND REFERENCE PINS

These signals are connected to resistors, capacitors, or specific voltages, or provide general
purpose I/O.

Table3. Filtering and Voltage References

Signal Name Type Description

Vrefout O Reference Voltage out 5mA drive (intended for mic bias)
AFLIT1 O Anti-Aliasing Filter Cap - ADC channel & Sampling hold
AFLIT2 O Anti-Aliasing Filter Cap - ADC channel & Sampling hold

C-MEDIA Electronics Inc.
6F, 100, Sec. 4, Civil Boulevard, Taipei, Taiwan, R.O.C. 106
TEL: [phone] FAX: [phone] E-mail:[e-mail]

Revision Date：Apr./2002
Revision ：1.1

3.4 POWER AND GROUND SIGNALS

Table4. Power Signal List CMI9738

Signal Name Type Description

AVdd1 I

CMI 9738

Integrated Multi-channel AC‘97

Analog Vdd ＝ 5V

AVdd2 I

Analog Vdd ＝ 5V

Avss1 I Analog Gnd

Avss2 I Analog Gnd
DVdd1 I
DVdd2 I

Digital Vdd ＝ 3.3V
Digital Vdd ＝ 3.3V

DVss1 I Digital Gnd
DVss2 I Digital Gnd

C-MEDIA Electronics Inc.
6F, 100, Sec. 4, Civil Boulevard, Taipei, Taiwan, R.O.C. 106
TEL: [phone] FAX: [phone] E-mail:[e-mail]

Revision Date：Apr./2002
Revision ：1.1

CMI 9738

Integrated Multi-channel AC‘97

4. DIGITAL INTERFACE

4.1 AC-LINK

All digital audio streams, optional modem line Codec streams, and command/status information
are communicated over this AC-Link. A breakout of the signals connecting the two is shown in
Figure .

Figure1. AC ‘97 connection to its companion controller

Digital
DC’97

Controller

4.2 CLOCKING

SYNC

BIT_CLK

SDTA_OUT

SDATA_IN

RESET#

AC’97

Codec

XTAL_IN

XTAL_OUT

CMI9738 derives its clock internally from an externally connected 24.576 MHz crystal or an
oscillator through the XTAL_IN pin. Synchronization with the AC’97 controler is achieved
through the BIT_CLK pin at 12.288 MHz（half of crystal frequency）.

The beginning of all audio sample packets, or Audio Frames, transferred over AC-link is
synchronized to the rising edge of the “SYNC” signal. “SYNC” is driven by the AC ’97
Controller. Data is transitioned on AC-link on everyrising edge of BIT_CLK, and subsequently
sampled on the receiving side of AC-link on each immediately followingfalling edge of
BIT_CLK.

4.3 RESETTING

There are three types of reset as detailed under “Timing Characteristics”：

1. a cold reset where all CMI9738 logic (registers included) is initialized to its default state

2. a warm reset where the contents of the CMI9738 register set are left unaltered

3. a register reset which only initializes the CMI9738 registers to their default states

After signaling a reset to the CMI9738, the AC’97 Controller should not attempt to play or
capture audio data until it has sampled a “Codec Ready” indication via register 26h from the
CMI9738.

Notice：When the AC-link “Codec Ready” indicator bit (SDATA_IN slot 0, bit 15) is a 1 it

indicates that the AC-link and AC ‘97 control and status registers are in a fully
operational state.

C-MEDIA Electronics Inc.
6F, 100, Sec. 4, Civil Boulevard, Taipei, Taiwan, R.O.C. 106
TEL: [phone] FAX: [phone] E-mail:[e-mail]

Revision Date：Apr./2002
Revision ：1.1

CMI 9738

Integrated Multi-channel AC‘97

4.4 AC-LINK DIGITAL SERIAL INTERFACE PROTOCOL

The CMI9738 communicates to the AC'97 controller via a 5-pin digital serial AC-Link
interface,which is a bi-directional, fixed rate, serial PCM digital stream. All digital audio streams,
commandsand status information are communicated over this point-to-point serial interconnect.
The AC-Linkhandles multiple inputs, and output audio streams, as well as control register
accesses using a timedivision multiplexed (TDM) scheme. The AC'97 controller synchronizes all
AC-Link data transaction.The following data streams are available on the CMI9738：

· SDATA_OUT TAG

· SDATA_IN TAG

· Status (STATUS ADDR & DATA) read port

· PCM L & R DAC Playback

· PCM L & R ADC Record

1 output slot (0)
1 input slot (0)
2 input slots (1,2)
2 output slots (3,4)
2 input slots (3,4)

Figure2. AC ‘97 Standard Bi-directional Audio Frame

Synchronization of all AC-Link data transactions is handled by the AC'97 controller. The
CMI9738 drives the serial bit clock onto AC-Link. The AC'97 controller then qualifies with a
synchronization signal to construct audio frames.

SYNC, fixed at 48 kHz, is derived by dividing down the serial bit clock (BIT_CLK). BIT_CLK,
fixed at 12.288 MHz, provides the necessary clocking granularity to support 12, 20-bit outgoing
and incoming time slots. AC-Link serial data is transitioned on each rising edge of BIT_CLK. The
receiver of AC-Link data, CMI9738 for outgoing data and AC'97 controller for incoming data,
samples each serial bit on the falling edges of BIT_CLK.

The AC-Link protocol provides for a special 16-bit (13-bits defined, with 3 reserved trailing bit
positions) time slot (Slot 0) wherein each bit conveys a valid tag for its corresponding time slot
within the current audio frame. A “1” in a given bit position of slot 0 indicates that the
corresponding time slot within the current audio frame has been assigned to a data stream, and
contains valid data. If a slot is “tagged” invalid, it is the responsibility of the source of the data
(CMI9738 for the input stream, AC'97 controller for the output stream) to stuff all bit positions
with 0’s during that slot’sactive time.

C-MEDIA Electronics Inc.
6F, 100, Sec. 4, Civil Boulevard, Taipei, Taiwan, R.O.C. 106
TEL: [phone] FAX: [phone] E-mail:[e-mail]

Revision Date：Apr./2002
Revision ：1.1

CMI 9738

Integrated Multi-channel AC‘97

SYNC remains high for a total duration of 16 BIT_CLKs at the beginning of each audio frame.
Theportion of the audio frame where SYNC is high is defined as the “Tag Phase”. The remainder
of theaudio frame where SYNC is low is defined as the “Data Phase”.

Additionally, for power savings, all clock, sync, and data signals can be halted.

4.5 AC-LINK AUDIO INPUT FRAME（SDATA_IN）

The audio input frame data streams correspond to the multiplexed bundles of all digital input data
targeting the AC’97 Controller. As is the case for audio output frame, each AC-link audio input

frame consists of 12, 20-bit timeslots. Slot 0 is a special reserved time slot containing 16-bits
which are used for AC-link protocol infrastructure.

Within slot 0 the first bit is a global bit (SDATA_IN slot 0, bit 15) which flags whether CMI9738
is in the “CodecReady” state or not. If the “Codec Ready” bit is a 0, this indicates thatCMI9738 is
not ready for normal operation. This condition is normal following the deassertion of power on
reset for example, while CMI9738’s voltage references settle. When the AC-link “Codec Ready”
indicator bit is a 1 it indicates that the AC-link and CMI9738 control and status registers are in a
fully operational state. The AC ‘97 Controller must further probe the Powerdown Control/Status
Register (section 6.3) to determine exactly which subsections, if any, are ready.

Prior to any attempts at putting CMI9738 into operation the AC ’97 Controller should poll the
first bit in the audio input frame (SDATA_IN slot 0, bit 15) for an indication that CMI9738 has
gone “Codec Ready”. Once CMI9738 is sampled “Codec Ready”8 then the next 12 bit positions
sampled by the AC ’97 Controller indicate which of the corresponding 12 time slots are assigned
to input data streams, and that they contain valid data. The following diagram illustrates the time
slot-based AC-link protocol.

Figure3. AC-link Audio Input Frame

C-MEDIA Electronics Inc.
6F, 100, Sec. 4, Civil Boulevard, Taipei, Taiwan, R.O.C. 106
TEL: [phone] FAX: [phone] E-mail:[e-mail]

Revision Date：Apr./2002
Revision ：1.1