Clevo P150EM Schematics

Schematic Diagrams
(USB2)
USB3.0 PORT3
eSATA
USB3.0 PORT1
USB3.0 PORT2
SHEET 40
(USB1)
TOUCH PAD
(USB0)
LPC
CARD READER
SMART BATTERY
HP OUT
Front R
Function LED BOARD
Indicatory LED BOARD
P170 ODD & 2nd HDD BOARD
P150 2ND HDD
<=8"
PCIE
25x25mm 989 Ball FCBGA
480 Mbps
P150 LED BOARD for BL KB
SPI
1"~14"
DDRIII
INT MIC
25 MHz
Ivy Bridge
24 MHz
<12"
LINE IN
MIC IN
SO-DIMM*4
32.768 KHz
VCORE,VGFX_CORE
EC SMBUS
AZALIA LINK
SYSTEM SMBUS
SATA HDD
BIOS SPI
LAN
ITE 8518
GEN1 <12" GEN2,3 <6" mSATA <6" eSATA <12"
PantherPoint Controller Hub (PCH)
SPDIF OUT
INT. K/B
Azalia Codec
EC
AMP TI TPA2008D2
5V,3.3V,5VS,3VS,1.5VS
1.5V,VTT_MEM
USB 2.0
MXM 3.0
VDD3,VDD5
DMI*4
rPGA988B
G711
32.768 KHz
Realtek
1.05VS_VTT,1.8VS
SATA I/II/III 6.0Gb/s
1067/1333/1600 MHz DDR3 / 1.5V
P150EM-OPTIMUS
REALTEK ALC892
SHEET 35
33 MHz
THERMAL SENSOR
100 MHz
PROCESSOR
SMART FANx2
USB2.0 Audio BOARD
(RESERVE)
(USB9)
FDI
INT. Backlight K/B
3D IR
(USB8)
12 MHz
FingerPrint
FINGER PRINTER ON CLICK BOARD
P150
(Optional)
PCIE*16
(USB4)
P150
5 Gbps
USB 3.0
Mini PCIE SOCKET
(USB3)
WLAN
RTL8411
(Charging)
P150 ODD BOARD
P170 CLICK & F/P BOARD
P170 POWER LED BOARD
AUDIO BOARD
RJ-45 9IN1
SOCKET
0.85VS
AC_IN,CHARGER
INT SPKER
<=8"
<=5"
<10" <12"
<=4.3"
<=8"
3"~10"
USB PORT
eDP
DVI
LVDS
Display HDMI
TPA2008D2
AMP
APA2607
Front L
AMP
SUBWOOFER
JMICRO JMB380C
1394a PORT
(USB5)
CCD
P170 ODD& 2nd HDD BOARD
1.05VS
PHONE JACK x4, USB x1
AUDIO BOARD
SOCKET
Mini PCIE
ODD BOARD
mSATA
AC-IN
POWER LED BOARD
P150 CLICK & F/P BOARD
http://hobi-elektronika.net
System Block Diagram
B.Schematic Diagrams
B - 2 System Block Diagram
Sheet 1 of 61
System Block
Diagram
TPM
TPM_BADD
Asserted before entering S3 LPC r eset timing:
TPM 1.2
HI: 4E/ 4 F H LOW: 2E/ 2F H
HI: ACCESS LOW: NORMAL ( Internal P D )
TPM_PP
LPCPD# inactive to LRST# inactive 32~96us
C792 *18p_50V_NPO_04
X15 *1TJS125DJ4A420P_32.768KHz
14
3 2
XTALI
C791
*18p_50V_NPO_04
PCLK_TPM
R660 *10K_04
TPM_PP
R658 *10K_04 R659 *10K_04
R657 *33_04
LPC_AD220,35
LPC_AD120,35
PLT_RST#4,14,24
LPC_AD320,35
SUS_STAT#22
LPC_FRAME#20,35
PCLK_TPM24
PM_CLKRUN#22
SERIRQ20,35
LPC_AD020,35
C793 *10p_50V_04
3.3VS
C787 *0.1u_16V_Y5V_04
C786 *0.1u_16V_Y5V_04
VDD3
C788 *0.1u_16V_Y5V_04
3.3VS
C789 *1u_10V_06
C790 *0.1u_16V_Y5V_04
TPM_BADD
TPM
U49
*SLB9635TT
LAD3
17
LAD0
26
LAD1
23
LAD2
20
VDD1
10
XTALI
13
VDD3
24
VDD2
19
LFRAME#
22
LCLK
21
LRESET#
16
SERIRQ
27
CLKRUN#
15
GND_1
4
GND_2
11
GND_3
18
GND_4
25
GPIO
6
GPIO2
2
XTALO
14
TESTI
8
TESTBI/BADD
9
PP
7
NC_1
1
NC_2
3
NC_3
12
LPCPD#
28
VSB
5
TPM_PP
TPM Function ¤£¤W¥ó
TPM_BADD
XTALO
D04 DEL X16
3.3VS4,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,29,30,31,33,34,35,36,37,38,41,45,48
VDD320,30,35,37,38,40,41,47
R570 *10K_04
3.3VS
bug 45
D03 modify
http://hobi-elektronika.net
Schematic Diagrams
B.Schematic Diagrams
Sheet 2 of 61
TPM
TPM B - 3
Schematic Diagrams
6-17-10300-730
Q9
MTN7002 ZHS3
G
DS
R276 10K_1%_04
FDI_TXN1
FDI_TXP1
PEG_RXP8
PLACE NEAR U3
PEG_RXP9 PEG_RXP10
3
2
1
iGP_eDP_SCL15 iGP_eDP_ SDA15
PEG_RXP11
FDI_LSYNC022 FDI_LSYNC122
PEG_RXP12
PEG_RXP[0..15] 14
PEG_RXP3
PEG_RXP13
PEG_IRCOMP_R
3.3V
PEG_RXP4
C77 0.22u_10V_X5R_04
C464 0.22u_10V_X5R_04
FDI_FSYNC122
C460 0.22u_10V_X5R_04
C447 0.22u_10V_X5R_04
C86 0.22u_10V_X5R_04
C434 0.22u_10V_X5R_04
C76 0.22u_10V_X5R_04
C456 0.22u_10V_X5R_04
C448 0.22u_10V_X5R_04
C457 0.22u_10V_X5R_04
C85 0.22u_10V_X5R_04
C91 0.22u_10V_X5R_04
C440 0.22u_10V_X5R_04
C444 0.22u_10V_X5R_04
C459 0.22u_10V_X5R_04
C71 0.22u_10V_X5R_04
C441 0.22u_10V_X5R_04
C98 0.22u_10V_X5R_04
C70 0.22u_10V_X5R_04
C64 0.22u_10V_X5R_04
C443 0.22u_10V_X5R_04
C74 0.22u_10V_X5R_04
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
eDP
U32A
Iv y Br id ge_ rPG A_2 D PC _Rev 0p61
DMI_RX#[0]
B27
DMI_RX#[1]
B25
DMI_RX#[2]
A25
DMI_RX#[3]
B24
DMI_RX[0]
B28
DMI_RX[1]
B26
DMI_RX[2]
A24
DMI_RX[3]
B23
DMI_TX#[0]
G21
DMI_TX#[1]
E22
DMI_TX#[2]
F21
DMI_TX#[3]
D21
DMI_TX[0]
G22
DMI_TX[1]
D22
DMI_TX[3]
C21
DMI_TX[2]
F20
FDI0_TX#[0]
A21
FDI0_TX#[1]
H19
FDI0_TX#[2]
E19
FDI0_TX#[3]
F18
FDI1_TX#[0]
B21
FDI1_TX#[1]
C20
FDI1_TX#[2]
D18
FDI1_TX#[3]
E17
FDI0_TX[0]
A22
FDI0_TX[1]
G19
FDI0_TX[2]
E20
FDI0_TX[3]
G18
FDI1_TX[0]
B20
FDI1_TX[1]
C19
FDI1_TX[2]
D19
FDI1_TX[3]
F17
FDI0_FSYNC
J18
FDI1_FSYNC
J17
FDI_INT
H20
FDI0_LSYNC
J19
FDI1_LSYNC
H17
PEG_IC OMPI
J22
PEG_ICOMPO
J21
PEG_RC OMPO
H22
PEG_RX#[0]
K33
PEG_RX#[1]
M35
PEG_RX#[2]
L34
PEG_RX#[3]
J35
PEG_RX#[4]
J32
PEG_RX#[5]
H34
PEG_RX#[6]
H31
PEG_RX#[7]
G33
PEG_RX#[8]
G30
PEG_RX#[9]
F35
PEG_RX#[10]
E34
PEG_RX#[11]
E32
PEG_RX#[12]
D33
PEG_RX#[13]
D31
PEG_RX#[14]
B33
PEG_RX#[15]
C32
PEG_RX[0]
J33
PEG_RX[1]
L35
PEG_RX[2]
K34
PEG_RX[3]
H35
PEG_RX[4]
H32
PEG_RX[5]
G34
PEG_RX[6]
G31
PEG_RX[7]
F33
PEG_RX[8]
F30
PEG_RX[9]
E35
PEG_RX[10]
E33
PEG_RX[11]
F32
PEG_RX[12]
D34
PEG_RX[13]
E31
PEG_RX[14]
C33
PEG_RX[15]
B32
PEG_TX#[0]
M29
PEG_TX#[1]
M32
PEG_TX#[2]
M31
PEG_TX#[3]
L32
PEG_TX#[4]
L29
PEG_TX#[5]
K31
PEG_TX#[6]
K28
PEG_TX#[7]
J30
PEG_TX#[8]
J28
PEG_TX#[9]
H29
PEG_TX#[10]
G27
PEG_TX#[11]
E29
PEG_TX#[12]
F27
PEG_TX#[13]
D28
PEG_TX#[14]
F26
PEG_TX#[15]
E25
PEG_TX[0]
M28
PEG_TX[1]
M33
PEG_TX[2]
M30
PEG_TX[3]
L31
PEG_TX[4]
L28
PEG_TX[5]
K30
PEG_TX[6]
K27
PEG_TX[7]
J29
PEG_TX[8]
J27
PEG_TX[9]
H28
PEG_TX[10]
G28
PEG_TX[11]
E28
PEG_TX[12]
F28
PEG_TX[13]
D27
PEG_TX[14]
E26
PEG_TX[15]
D25
eDP_AUX
C15
eDP_AUX#
D15
eDP_TX[0]
C17
eDP_TX[1]
F16
eDP_TX[2]
C16
eDP_TX[3]
G15
eDP_TX#[0]
C18
eDP_TX#[1]
E16
eDP_TX#[2]
D16
eDP_TX#[3]
F15
eDP_COMPIO
A18
eDP_HPD
B16
eDP_ICO MPO
A17
C69 0.22u_10V_X5R_04
C431 0.22u_10V_X5R_04
PEG_TXN[0..15] 14
C87 0.22u_10V_X5R_04
C467 0.22u_10V_X5R_04
C65 0.22u_10V_X5R_04
C465 0.22u_10V_X5R_04
C78 0.22u_10V_X5R_04
C88 0.22u_10V_X5R_04
C68 0.22u_10V_X5R_04
PEG_RXP14
C94 0.22u_10V_X5R_04
C66 0.22u_10V_X5R_04
C63 0.22u_10V_X5R_04
C433 0.22u_10V_X5R_04
C453 0.22u_10V_X5R_04
C92 0.22u_10V_X5R_04
C466 0.22u_10V_X5R_04
R95 24.9_1%_04
C72 0.22u_10V_X5R_04
C451 *0.1u_10V _X7R_04
PEG_RXN2
C96 0.22u_10V_X5R_04
C462 0.22u_10V_X5R_04
C458 0.22u_10V_X5R_04
C437 0.22u_10V_X5R_04
PEG_RXP5
C95 0.22u_10V_X5R_04
Q20
*G711ST9U
OUT1VCC
2
GND
3
C454 0.22u_10V_X5R_04
C432 0.22u_10V_X5R_04
C446 0.22u_10V_X5R_04
C461 0.22u_10V_X5R_04
C80 0.22u_10V_X5R_04
C97 0.22u_10V_X5R_04
C442 0.22u_10V_X5R_04
C438 0.22u_10V_X5R_04
C452 *0.1u_10V_X7R_04
C89 0.22u_10V_X5R_04
C445 0.22u_10V_X5R_04
C90 0.22u_10V_X5R_04
C75 0.22u_10V_X5R_04
C79 0.22u_10V_X5R_04
C455 0.22u_10V_X5R_04
C439 0.22u_10V_X5R_04
C93 0.22u_10V_X5R_04
C73 0.22u_10V_X5R_04
C463 0.22u_10V_X5R_04
PEG_RXP15
C468 0.22u_10V_X5R_04
C67 0.22u_10V_X5R_04
3.3V
1.05VS_VTT
1.05VS_VTT
PEG_RXN3
DMI_TXP322
DMI_TXP222
DMI_TXP122
DMI_TXP022
DMI_TXN222
DMI_TXN122
DMI_TXN022
R35 100K_04
DMI_RXN122
DMI_RXN022
DMI_TXN322
DMI_RXP022
DMI_RXN322
DMI_RXN222
DMI_RXP322
DMI_RXP222
DMI_RXP122
PEG_TXP1
THERM _VOLT 35
3.3V4,7,15, 20,21,22, 24,25,26 ,27,30,31, 33,37,38 ,41,43, 44
FDI_TXP0
PEG_RXN0
1.05VS_VTT4,6,25, 26,27,44,4 5,48
PEG_RXN4
FDI_TXN[7..0]22
R44 1K_04
PEG_RXN5
PEG_TXP2
Analog Thermal Sensor
FDI_TXN2
FDI_TXP2
PEG_RXN6
D03 modify
PEG_TXP3
FDI_TXP[7..0]22
FDI_TXN0
FDI_TXN3
FDI_TXP3
PEG_RXN7
PEG_TXP4
FDI_TXN4
FDI_TXP4
PEG_RXN8
PEG_TXP5
CAD NOTE: PEG_ICOMPI and RCOMPO signals should be shorted and routed with
- max lengt h = 500 mil s
- typical impedance = 43 mohms PEG_ICOMPO signals should be routed with
- max lengt h = 500 mil s
- typical impedance = 14.5 mohms
20 mil
PEG_TXN1
FDI_TXN5
FDI_TXP5
PEG_RXN9
PEG_TXP6
PEG_RXN10
FDI_TXP6
FDI_TXN6
PEG_TXP7
PEG_TXP[0..15] 14
PEG_TXN2
PEG_RXN11
1:2 (4mils:8mils)
FDI_TXN7
FDI_TXP7
PEG_TXP8
PEG_RXP6
iGP_eDP_TX#015
FDI_INT22
PEG_TXN3
PEG_RXN12
PEG_TXP9
R315 24.9_1%_04
PEG_TXN4
RT5 10K_1%_NTC_06
1 2
PEG_RXN13
PEG_TXP10
PEG_TXN5
1.05VS_VTT
PEG_RXN14
CAD NOTE: DP_COMPIO and ICOMPO signals should be shorted near balls and routed with
- typical impedance < 25 mohms
iGP_eDP_TX#115
PEG_TXN0
iGP_eDP_TX115
PEG_TXP11
Ivy Bridge Processor 1/7 ( DMI,PEG,FDI )
DP Compensation Signal
PEG_TXN6
PEG_RXN15
PEG_TXP12
iGP_eDP_TX#215
iGP_eDP_TX215
PEG_TXN7
PEG_TXP13
iGP_eDP_CLK15
PEG_TXN8
PEG_TXP14
iGP_eDP_H PD15
PEG_TXN9
PEG_TXP15
add RT5, R276
D03 modify
PEG_TXN10
PEG_RXP0
PEG_TXN11
PEG_RXP7
PEG_TXP0
PEG_TXN12
FDI_FSYNC022
PEG_TXN13 PEG_TXN14
PEG_RXP1
PEG_TXN15
PEG_RXN[0..15] 14
PEG_RXP2
iGP_eDP_TX015
PEG_RXN1
PEG Compensation Signal
iGP_eDP_CLK#15
http://hobi-elektronika.net
Processor 1/7
Sheet 3 of 61
Processor 1/7
B.Schematic Diagrams
B - 4 Processor 1/7
Processor 2/7
R4910K_1%_04
C494
0.047u_10V_X7R_04
R409 140_1%_04
3.3VS
R331
4.99K_1%_04
R67 51_04
R4262_04
R333 25.5_1%_04
R329 1K_04
R51 *10mil_short
R308 51_04
R82 51_04
R52 56_1%_04
R41 *10mil_short
R309 51_04
R334 200_1%_04
R302 *10mil_s hort
Q24 MTN7002 ZHS3
G
DS
R84 *51_04
R327 *0_04
R50 *10mil_short
R76 51_04
BUF_CPU_RST#
1.5V
1.05VS_VTT 3, 6,25,2 6,27,44,45 ,48
1.05VS_VTT
1.05VS_VTT
3.3V 3,7,15,20,21,22, 24,25,26,27,30,31,33, 37,38,41,43,44
DRAMRST_CNTRL 7,21
DDR3_D RAMRST# 10,11,12, 13
1.5V 7,10, 11,12,13 ,27,31,41, 43
CLK_EXP_N 21
CLK_EXP_P 21
1.5VS_CPU 7,41
H_PROCHOT#45
CPUDRAMRST#
H_THRMTRIP#25
H_PECI25,35
H_PM_SYNC22
H_CPUPWRGD25
H_CPUPWRGD_R
XDP _D BR _ R
SKTOCC#
CAD Note: Capacitor need to be placed close to buffer out put pin
S
D
G
Q37A MTDN 700 2ZH S6 R
2
6
1
S
D
G
Q37B MTDN7002ZHS6R
5
3
4
C568 0.1u_16V_Y5V_04
R521 130_1%_04
PMSYS_PWRGD _BUF VDDPWRGOOD_R
R97 10K_04
SM_RCOMP_2
SM_RCOMP_1
SM_RCOMP_0
PLT_RST#2,14,24
XDP_TRST#
XDP _T CL K
H_PROCHOT#_D
H_CATERR#
XDP _T MS
CPUDRAMRST#
XDP_PREQ#
XDP _T DI _R XDP _T DO _R
R328 1K_04
3.3VS
XDP _D BR _R
R3011K_04
S3 circuit:- DRAM_RST# to memory should be high during S3
XDP _P RD Y #
H_CPUPWRGD_R
CLOCKS
MISCTHERMALPWR MANAGEMENT
DDR3
MISC
JTAG & BPM
U32B
Ivy Bridge_rPGA_2DPC_Rev0p61
SM_RCOMP[1]
A5
SM_RCOMP[2]
A4
SM_DRAMR ST#
R8
SM_RCOMP[0]
AK1
BCLK#
A27
BCLK
A28
DPLL_REF _CLK#
A15
DPLL_REF_ CLK
A16
CATERR#
AL33
PECI
AN33
PROCH OT#
AL32
THER MTRI P#
AN32
SM_DRAMPW ROK
V8
RESET#
AR33
PRDY #
AP29
PREQ#
AP27
TCK
AR26
TMS
AR27
TRST#
AP30
TDI
AR28
TDO
AP26
DBR#
AL35
BPM#[0]
AT28
BPM#[1]
AR29
BPM#[2]
AR30
BPM#[3]
AT30
BPM#[4]
AP32
BPM#[5]
AR31
BPM#[6]
AT31
BPM#[7]
AR32
PM_SYN C
AM34
SKTOCC#
AN34
PROC_S ELECT#
C26
UNCOREPWRGOOD
AP33
CLK_DP_P 21
DDR3 Compensation Signals
XDP _TD O_R
TRACE WIDTH 10MIL, LEN GTH <500MILS
PU/PD for JTAG signals
XDP _TMS
BUF_CPU _RST#
CLK_DP_N 21
Processor Pullups/Pull downs
XDP_TRST#
H_PROCHOT#
XDP _TC LK
XDP _PR EQ #
XDP _TD I_ R
SM_RCOMP_1
SM_RCOMP_0
SM_RCOMP_2
H_PROCHOT#_EC35
R34
100K_04
C60 68P_50V_NPO_04
R48 *750_1%_04
R38 *1.5K_1%_04
1.05VS_VTT
C306
*0. 1u_16V_Y5V_0 4
S3 circuit:- DRAM PWR GOOD logic
R193 0_04
U18
*MC74VHC 1G08DFT1G
1 2
5
4
3
PM_DRAM_PW RGD22
3.3V
1.8VS_PWR GD22,44
PMSYS_PW RGD_ BUF
R196
*200_04
R199
*100K_04
1.5VS_CPU
R322 200_1%_04
R325 *39_04
SUSB41,42,43,44
Q13
*MTN7002ZHS3
G
DS
3.3V
If PROCHOT# is not used, then it must be terminated with a 56-£[ +-5% pull-up resistor to 1.05VS_VTT .
Ivy Bridge Processor 2/7 ( CLK,MISC,JTAG )
R511
100K_04
BSS138 ( VGS 1.5V )
H_PROCHOT#
PROC_SELET
R40 43_1%_04
P150HM_D04A
Buffered reset to CPU
C82 47P_50V_NPO_04
3.3VS 2,10,11, 12,13,1 4,15,16, 17,18,19, 20,21,22, 23,24,25, 26,27,29, 30,31, 33,34,35,36 ,37,38, 41,45,48
Q6
MTN7002ZHS3
G
DS
H_SNB_IVB#25
R39 75_04
http://hobi-elektronika.net
Schematic Diagrams
B.Schematic Diagrams
Sheet 4 of 61
Processor 2/7
Processor 2/7 B - 5
Schematic Diagrams
M_A_D QS# 5 M_A_D QS# 6 M_A_D QS# 7
M_A_D QS# 0 M_A_D QS# 2
M_A_D QS# 1 M_A_D QS# 3
M_A_D QS# 4
DDR SYSTEM MEMORY B
U32D
Iv y Bridg e_r PGA_2 DP C _R ev 0p61
SB_BS[0]
AA9
SB_BS[1]
AA7
SB_BS[2]
R6
SB_CAS#
AA10
SB_RAS#
AB8
SB_WE#
AB9
SB_CK[ 0]
AE2
SB_CK[ 1]
AE1
SB_CLK#[0]
AD2
SB_CLK#[1]
AD1
SB_CKE[0]
R9
SB_CKE[1]
R10
SB_ODT[0]
AE4
SB_ODT[1]
AD4
SB_DQS[4]
AN6
SB_DQS#[4]
AN5
SB_DQS[5]
AP8
SB_DQS#[5]
AP9
SB_DQS[6]
AK11
SB_DQS#[6]
AK12
SB_DQS[7]
AP14
SB_DQS#[7]
AP15
SB_DQS[0]
C7
SB_DQS#[0]
D7
SB_DQS[1]
G3
SB_DQS#[1]
F3
SB_DQS[2]
J6
SB_DQS#[2]
K6
SB_DQS[3]
M3
SB_DQS#[3]
N3
SB_MA[0]
AA8
SB_MA[1]
T7
SB_MA[2]
R7
SB_MA[3]
T6
SB_MA[4]
T2
SB_MA[5]
T4
SB_MA[6]
T3
SB_MA[7]
R2
SB_MA[8]
T5
SB_MA[9]
R3
SB_MA[1 0]
AB7
SB_MA[1 1]
R1
SB_MA[1 2]
T1
SB_MA[1 3]
AB10
SB_MA[1 4]
R5
SB_MA[1 5]
R4
SB_DQ[0]
C9
SB_DQ[1]
A7
SB_DQ[2]
D10
SB_DQ[3]
C8
SB_DQ[4]
A9
SB_DQ[5]
A8
SB_DQ[6]
D9
SB_DQ[7]
D8
SB_DQ[8]
G4
SB_DQ[9]
F4
SB_DQ[10]
F1
SB_DQ[11]
G1
SB_DQ[12]
G5
SB_DQ[13]
F5
SB_DQ[14]
F2
SB_DQ[15]
G2
SB_DQ[16]
J7
SB_DQ[17]
J8
SB_DQ[18]
K10
SB_DQ[19]
K9
SB_DQ[20]
J9
SB_DQ[21]
J10
SB_DQ[22]
K8
SB_DQ[23]
K7
SB_DQ[24]
M5
SB_DQ[25]
N4
SB_DQ[26]
N2
SB_DQ[27]
N1
SB_DQ[28]
M4
SB_DQ[29]
N5
SB_DQ[30]
M2
SB_DQ[31]
M1
SB_DQ[32]
AM5
SB_DQ[33]
AM6
SB_DQ[34]
AR3
SB_DQ[35]
AP3
SB_DQ[36]
AN3
SB_DQ[37]
AN2
SB_DQ[38]
AN1
SB_DQ[39]
AP2
SB_DQ[40]
AP5
SB_DQ[41]
AN9
SB_DQ[42]
AT5
SB_DQ[43]
AT6
SB_DQ[44]
AP6
SB_DQ[45]
AN8
SB_DQ[46]
AR6
SB_DQ[47]
AR5
SB_DQ[48]
AR9
SB_DQ[49]
AJ11
SB_DQ[50]
AT8
SB_DQ[51]
AT9
SB_DQ[52]
AH11
SB_DQ[53]
AR8
SB_DQ[54]
AJ12
SB_DQ[55]
AH12
SB_DQ[56]
AT11
SB_DQ[57]
AN14
SB_DQ[58]
AR14
SB_DQ[59]
AT14
SB_DQ[60]
AT12
SB_DQ[61]
AN15
SB_DQ[62]
AR15
SB_DQ[63]
AT15
SB_CK[ 2]
AB2
SB_CLK#[2]
AA2
SB_CKE[2]
T9
SB_CK[ 3]
AA1
SB_CLK#[3]
AB1
SB_CKE[3]
T10
SB_CS# [0]
AD3
SB_CS# [1]
AE3
SB_CS# [2]
AD6
SB_CS# [3]
AE6
SB_ODT[2]
AD5
SB_ODT[3]
AE5
M_A_D QS4 M_A_D QS5 M_A_D QS6 M_A_D QS7
M_A_D QS0 M_A_D QS2
M_A_D QS1 M_A_D QS3
M_B_D QS# 5
M_B_D QS# 4 M_B_D QS# 6
M_B_B S012, 13
M_A_D Q[63 :0]10,11
M_B_D QS# 7
M_B_D QS# 0 M_B_D QS# 1 M_B_D QS# 2 M_B_D QS# 3
M_A_CKE1 10
M_B_DQ[63: 0]12,13
M_B_B S212, 13
M_B_B S112, 13
M_A_CS#0 10
M_A_A[15:0] 10,11
M_A_CLK_DDR#1 10
M_A_CLK_DDR1 10
M_A_CLK_DDR0 10 M_A_CKE0 10
M_A_DQS#[7:0] 10,11
M_A_CS#1 10
M_A_DQS[7: 0] 10,11
M_A _O DT0 10 M_A _O DT1 10
M_A_CLK_DDR#0 10
M_B_B 6
M_B_B 5
M_A_R AS#10,11
M_A_C AS#10,11
M_A_B S210, 11
M_A_B S110, 11
M_B_B 0 M_B_B 1 M_B_B 2 M_B_B 3 M_B_B 4
M_B_B[ 15: 0] 12 ,13
M_B_DQS#[7:0] 12,13
M_A_B S010, 11
M_A_W E#10,11
M_B_B 9 M_B_B 10 M_B_B 11
M_B_B 13
M_B_B 12
M_B_CAS#12,13 M_B_W E#12,13
M_B_RAS#12,13
M_B_DQS[7:0] 12,13
M_B_B 14 M_B_B 15
M_B_B 7 M_B_B 8
M_B_C KE0 13
M_B_CLK_DDR#1 13
M_B_CLK_DDR1 13 M_B_C KE1 13
M_B_O DT0 1 3 M_B_O DT1 1 3
M_B_CLK_DDR#0 13
M_B_CLK_DDR0 13
M_B_C S#1 13
M_B_C S#0 13
M_B_D QS6
M_B_D QS5
M_B_D QS2 M_B_D QS3 M_B_D QS4
M_B_D QS7
M_B_D QS0 M_B_D QS1
M_B_C KE3 12
M_B_C KE2 12
M_B_CLK_DDR#3 12
M_B_CLK_DDR3 12
M_B_CLK_DDR#2 12
M_B_CLK_DDR2 12
M_A_CS#2 11 M_A_CS#3 11
M_A_CLK_DDR2 11 M_A_CKE2 11
M_A_CLK_DDR#2 11
M_B_C S#3 12
M_B_C S#2 12
M_A _DQ1 M_A _DQ2 M_A _DQ3
M_A _DQ29
M_A _DQ4
M_A _DQ32
M_A _DQ31
M_A _DQ30
M_A _DQ37
M_A _DQ36
M_A _DQ35
M_A _DQ34
M_A _DQ33
M_A _DQ42
M_A _DQ41
M_A _DQ40
M_A _DQ39
M_A _DQ47
M_A _DQ46
M_A _DQ45
M_A _DQ44
M_A _DQ43
M_A _O DT2 11 M_A _O DT3 11
M_A _DQ51
M_A _DQ28
M_A _DQ50
M_A _DQ49
M_A _DQ38
M_A _DQ48
M_A _DQ55
M_A _DQ54
M_A _DQ53
M_A _DQ52
M_A _DQ5
M_A _DQ58
M_A _DQ57
M_A _DQ56
M_A _DQ6
M_A _DQ59
M_A _DQ63
M_A _DQ62
M_A _DQ61
M_A _DQ60
M_A _DQ7 M_A _DQ8 M_A _DQ9
M_A _DQ13
M_A _DQ12
M_A _DQ11
M_A _DQ19
M_A _DQ18
M_A _DQ17
M_A _DQ16
M_A _DQ15
M_A _DQ14
M_A _DQ10
M_A _DQ22
M_A _DQ21
M_A _DQ26
M_A _DQ25
M_A _DQ24
M_A _DQ23
M_A _DQ0
M_A _DQ20
M_A _DQ27
DDR SYSTEM MEMORY A
U32C
Iv y Bridge_rPGA_2DPC_Rev 0p61
SA_BS[0]
AE10
SA_BS[1]
AF10
SA_BS[2]
V6
SA_CAS#
AE8
SA_RAS#
AD9
SA_WE#
AF9
SA_CK[ 0]
AB6
SA_CK[ 1]
AA5
SA_CLK#[0]
AA6
SA_CLK#[1]
AB5
SA_CKE[0]
V9
SA_CKE[1]
V10
SA_CS#[0]
AK3
SA_CS#[1]
AL3
SA_ODT[0]
AH3
SA_ODT[1]
AG3
SA_DQS[0 ]
D4
SA_DQS#[0]
C4
SA_DQS[1 ]
F6
SA_DQS#[1]
G6
SA_DQS[2 ]
K3
SA_DQS#[2]
J3
SA_DQS[3 ]
N6
SA_DQS#[3]
M6
SA_DQS[4 ]
AL5
SA_DQS#[4]
AL6
SA_DQS[5 ]
AM9
SA_DQS#[5]
AM8
SA_DQS[6 ]
AR11
SA_DQS#[6]
AR12
SA_DQS[7 ]
AM14
SA_DQS#[7]
AM15
SA_MA[0]
AD10
SA_MA[1]
W1
SA_MA[2]
W2
SA_MA[3]
W7
SA_MA[4]
V3
SA_MA[5]
V2
SA_MA[6]
W3
SA_MA[7]
W6
SA_MA[8]
V1
SA_MA[9]
W5
SA_MA[10]
AD8
SA_MA[11]
V4
SA_MA[12]
W4
SA_MA[13]
AF8
SA_MA[14]
V5
SA_MA[15]
V7
SA_DQ[ 0]
C5
SA_DQ[ 1]
D5
SA_DQ[ 2]
D3
SA_DQ[ 3]
D2
SA_DQ[ 4]
D6
SA_DQ[ 5]
C6
SA_DQ[ 6]
C2
SA_DQ[ 7]
C3
SA_DQ[ 8]
F10
SA_DQ[ 9]
F8
SA_DQ[ 10]
G10
SA_DQ[ 11]
G9
SA_DQ[ 12]
F9
SA_DQ[ 13]
F7
SA_DQ[ 14]
G8
SA_DQ[ 15]
G7
SA_DQ[ 16]
K4
SA_DQ[ 17]
K5
SA_DQ[ 18]
K1
SA_DQ[ 19]
J1
SA_DQ[ 20]
J5
SA_DQ[ 21]
J4
SA_DQ[ 22]
J2
SA_DQ[ 23]
K2
SA_DQ[ 24]
M8
SA_DQ[ 25]
N10
SA_DQ[ 26]
N8
SA_DQ[ 27]
N7
SA_DQ[ 28]
M10
SA_DQ[ 29]
M9
SA_DQ[ 30]
N9
SA_DQ[ 31]
M7
SA_DQ[ 32]
AG6
SA_DQ[ 33]
AG5
SA_DQ[ 34]
AK6
SA_DQ[ 35]
AK5
SA_DQ[ 36]
AH5
SA_DQ[ 37]
AH6
SA_DQ[ 38]
AJ5
SA_DQ[ 39]
AJ6
SA_DQ[ 40]
AJ8
SA_DQ[ 41]
AK8
SA_DQ[ 42]
AJ9
SA_DQ[ 43]
AK9
SA_DQ[ 44]
AH8
SA_DQ[ 45]
AH9
SA_DQ[ 46]
AL9
SA_DQ[ 47]
AL8
SA_DQ[ 48]
AP11
SA_DQ[ 49]
AN11
SA_DQ[ 50]
AL12
SA_DQ[ 51]
AM12
SA_DQ[ 52]
AM11
SA_DQ[ 53]
AL11
SA_DQ[ 54]
AP12
SA_DQ[ 55]
AN12
SA_DQ[ 56]
AJ14
SA_DQ[ 57]
AH14
SA_DQ[ 58]
AL15
SA_DQ[ 59]
AK15
SA_DQ[ 60]
AL14
SA_DQ[ 61]
AK14
SA_DQ[ 62]
AJ15
SA_DQ[ 63]
AH15
SA_CK[ 2]
AB4
SA_CLK#[2]
AA4
SA_CK[ 3]
AB3
SA_CLK#[3]
AA3
SA_CKE[2]
W9
SA_CKE[3]
W10
SA_CS#[2]
AG1
SA_CS#[3]
AH1
SA_ODT[2]
AG2
SA_ODT[3]
AH2
M_A_CLK_DDR#3 11
M_A_CLK_DDR3 11 M_A_CKE3 11
Ivy Bridge Processor 3/7 ( DDR3 )
M_B_D Q48
M_B_D Q47
M_B_D Q54
M_B_D Q53
M_B_D Q52
M_B_D Q51
M_B_D Q50
M_B_D Q49
M_B_D Q58
M_B_D Q57
M_B_D Q56
M_B_D Q55
M_B_D Q61
M_B_D Q60
M_B_D Q59
M_B_D Q11
M_B_D Q63
M_B_D Q62
M_B_D Q12
M_B_D Q3
M_B_D Q2
M_B_D Q1
M_B_D Q4 M_B_D Q6
M_B_D Q5
M_B_D Q9
M_B_D Q8
M_B_D Q7
M_B_D Q0
M_B_D Q10
M_B_D Q13 M_B_D Q14
M_B_D Q18
M_B_D Q17
M_B_D Q16
M_B_D Q15
M_B_D Q23
M_B_D Q22
M_B_D Q21
M_B_D Q20
M_B_D Q19
M_B_D Q28
M_B_D Q27
M_B_D Q26
M_B_D Q25
M_B_D Q24
M_B_D Q34
M_B_D Q33
M_B_D Q32
M_B_D Q31
M_B_D Q30
M_B_D Q29
M_B_D Q39
M_B_D Q38
M_B_D Q37
M_B_D Q36
M_B_D Q35
M_B_D Q44
M_B_D Q43
M_B_D Q42
M_B_D Q41
M_B_D Q40
M_B_D Q46
M_B_D Q45
M_B_O DT2 1 2 M_B_O DT3 1 2
M_A_A 9
M_A_A 4 M_A_A 6
M_A_A 5 M_A_A 7
M_A_A 8
M_A_A 15
M_A_A 0 M_A_A 1 M_A_A 2 M_A_A 3
M_A_A 10 M_A_A 12
M_A_A 11 M_A_A 13
M_A_A 14
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Processor 3/7
Sheet 5 of 61
Processor 3/7
B.Schematic Diagrams
B - 6 Processor 3/7
Processor 4/7
SVID Signals
R118 75_04 R128 130_1%_04
R192 *54.9_1%_04
1.05VS_VTT
H_CPU_SVIDDAT
H_CPU_SVIDCLK
H_CPU_SV IDALRT#
C128
10u_6.3V_X5R_08
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES SVID
U32F
Iv y Bridge_rPGA_2DPC_ Rev 0p61
VCC_SEN SE
AJ35
VSS_SENSE
AJ34
VIDALERT#
AJ29
VIDSCL K
AJ30
VIDSOUT
AJ28
VSS_SENSE_VC CIO
A10
VCC1
AG35
VCC2
AG34
VCC3
AG33
VCC4
AG32
VCC5
AG31
VCC6
AG30
VCC7
AG29
VCC8
AG28
VCC9
AG27
VCC10
AG26
VCC11
AF35
VCC12
AF34
VCC13
AF33
VCC14
AF32
VCC15
AF31
VCC16
AF30
VCC17
AF29
VCC18
AF28
VCC19
AF27
VCC20
AF26
VCC21
AD35
VCC22
AD34
VCC23
AD33
VCC24
AD32
VCC25
AD31
VCC26
AD30
VCC27
AD29
VCC28
AD28
VCC29
AD27
VCC30
AD26
VCC31
AC35
VCC32
AC34
VCC33
AC33
VCC34
AC32
VCC35
AC31
VCC36
AC30
VCC37
AC29
VCC38
AC28
VCC39
AC27
VCC40
AC26
VCC41
AA35
VCC42
AA34
VCC43
AA33
VCC44
AA32
VCC45
AA31
VCC46
AA30
VCC47
AA29
VCC48
AA28
VCC49
AA27
VCC50
AA26
VCC51
Y35
VCC52
Y34
VCC53
Y33
VCC54
Y32
VCC55
Y31
VCC56
Y30
VCC57
Y29
VCC58
Y28
VCC59
Y27
VCC60
Y26
VCC61
V35
VCC62
V34
VCC63
V33
VCC64
V32
VCC65
V31
VCC66
V30
VCC67
V29
VCC68
V28
VCC69
V27
VCC70
V26
VCC71
U35
VCC72
U34
VCC73
U33
VCC74
U32
VCC75
U31
VCC76
U30
VCC77
U29
VCC78
U28
VCC79
U27
VCC80
U26
VCC81
R35
VCC82
R34
VCC83
R33
VCC84
R32
VCC85
R31
VCC86
R30
VCC87
R29
VCC88
R28
VCC89
R27
VCC90
R26
VCC91
P35
VCC92
P34
VCC93
P33
VCC94
P32
VCC95
P31
VCC96
P30
VCC97
P29
VCC98
P28
VCC99
P27
VCC100
P26
VCCIO1
AH13
VCCIO 12
J11
VCCIO 18
G12
VCCIO 19
F14
VCCIO 20
F13
VCCIO 21
F12
VCCIO 22
F11
VCCIO 23
E14
VCCIO 24
E12
VCCIO2
AH10
VCCIO3
AG10
VCCIO4
AC10
VCCIO5
Y10
VCCIO6
U10
VCCIO7
P10
VCCIO8
L10
VCCIO9
J14
VCCIO 10
J13
VCCIO 11
J12
VCCIO 13
H14
VCCIO 14
H12
VCCIO 15
H11
VCCIO 16
G14
VCCIO 17
G13
VCCIO 25
E11
VCCIO 32
C12
VCCIO 33
C11
VCCIO 34
B14
VCCIO 35
B12
VCCIO 36
A14
VCCIO 37
A13
VCCIO 38
A12
VCCIO 39
A11
VCCIO 26
D14
VCCIO 27
D13
VCCIO 28
D12
VCCIO 29
D11
VCCIO 30
C14
VCCIO 31
C13
VCCIO _SENSE
B10
VCCIO 40
J23
C473
22u_6.3V_X5R_08
C484
22u_6.3V_X5R_08
C482
10u_6.3V_X5R_08
C479
22u_6.3V_X5R_08
C151
10u_6.3V_X5R_08
C135
22u_6.3V_X5R_08
C472
22u_6.3V_X5R_08
C475
10u_6.3V_X5R_08
C167
22u_6.3V_X5R_08
C474
10u_6.3V_X5R_08
C136
22u_6.3V_X5R_08
C483
22u_6.3V_X5R_08
C144
22u_6.3V_X5R_08
C164
10u_6.3V_X5R_08
C165
22u_6.3V_X5R_08
R330 10_04
C476
22u_6.3V_X5R_08
C146
10u_6.3V_X5R_08
C471
22u_6.3V_X5R_08
C143
10u_6.3V_X5R_08
C166
10u_6.3V_X5R_08
R326 10_04
C470
10u_6.3V_X5R_08
C478
22u_6.3V_X5R_08
C145
22u_6.3V_X5R_08
C134
22u_6.3V_X5R_08
VCORE
VCORE
VCORE
1.05VS_VTT
VCORE 45,46
VCORE_VSS_SEN SE 45
VCORE_VCC _SENSE 4 5
VCCIO _SENSE 42 VSSIO_SEN SE 42
Ivy Bridge Processor 4/7 ( POWER )
1.05VS_VTT 3,4,2 5,26,27,44, 45,48
H_CPU_SVIDALRT# 45 H_CPU_SVIDDAT 45
H_CPU_SVIDCLK 45
R132 *15mil_sho rt_06
C236 22u_6.3V_X5R_08
C753 22u_6.3V_X5R_08
C256 *22u_6.3V_X5R_08
C198 *22u_6.3V_X5R_08
C257 22u_6.3V_X5R_08
C259 22u_6.3V_X5R_08
C258 *22u_6.3V_X5R_08
C754 *22u_6.3V_X5R_08
C775 *22u_6.3V_X5R_08
C777 22u_6.3V_X5R_08
C264 22u_6.3V_X5R_08
C795 22u_6.3V_X5R_08
C794 22u_6.3V_X5R_08
C799 22u_6.3V_X5R_08
C267 *22u_6.3V_X5R_08
C800 *22u_6.3V_X5R_08
C270 *22u_6.3V_X5R_08
C801 22u_6.3V_X5R_08
C277 *22u_6.3V_X5R_08
C273 22u_6.3V_X5R_08
C803 *22u_6.3V_X5R_08
C802 22u_6.3V_X5R_08
C449 22u_6.3V_X5R_08
C315 *22u_6.3V_X5R_08
C481 *22u_6.3V_X5R_08
C200 *22u_6.3V_X5R_08
C805 *22u_6.3V_X5R_08
C804 22u_6.3V_X5R_08
C487 22u_6.3V_X5R_08
1.05VS_VTT1.05VS_VTT
1.05VS_VTT
+
C806 *330u_6.3V_D_B
+
C807 330u_6.3V_D_B
1.05VS_VCCP_F
VSSIO_SENSE
8.5A
PROCESSOR UNCORE POWERPROCESSOR CORE POWER
CAD Note: H_CPU_SVIDALRT#_R,H_CPU_S VIDDAT_R Place the PU resistors clos e to CPU
H_CPU_SVIDDAT_R
CAD Note: H_CPU_SVIDCLK_R Place the PU resistors close to VR
R127 0_04
R117 43_1%_04
H_CPU_SVIDALRT#_R
R115 0_04
H_CPU_SVIDCLK_R
ICCMAX Maximum Processor SV 48
C147
22u_6.3V_X5R_08
VCCIO _SENSE
48A
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Schematic Diagrams
Sheet 6 of 61
Processor 4/7
Processor 4/7 B - 7
B.Schematic Diagrams
Schematic Diagrams
R410 *0_04
V_SM_VREF_CNTV_SM_VREF
3.3V 3,4, 15,20,21, 22,24,25, 26,27, 30,31,33, 37,38,41, 43,44
Ivy Bridge Processor 5/7 ( GRAPHICS POWER )
D05
C819
0.1u_10V_X5R _04
C811
0.1u_10V_X5R_04
C808
0.1u_10V_X5R_04
C820
0.1u_10V_X5R_04
R524 10K_04
R473 0_04
1.05VS 20,21,2 2,26,27,3 1,42,44
R536 *10K_04
+
C126
330u_6.3V_D_ B
12A
1.5VS_CPU
CAD Note: +V_SM_VREF should have 10 mil trace width
D05
C809 10u_6.3V_X5R_08
C812 10u_6.3V_X5R_08
C810 10u_6.3V_X5R_08
C813 10u_6.3V_X5R_08
C213
1u_6.3V_X5R_04
C212
1u_6.3V_X5R_04
C205
10u_6.3V_X5R_08
+
C239 330u_6.3V_D _B
1.8VS
1.5VS_CPU 4,41
1.8VS 16,26,4 4
1.5V 4,10, 11,12,13, 27,31,41 ,43
R353 * 0_04
VSS_GT_SENSE 45
VCC_GT_ SENSE 45
Q26 *AO3402L
G
DS
R362 1K_1%_04
Q25 *AO3402L
G
DS
R339 *1K_04
R370 *1K_04
R369 1K_1%_04
R332 1K_1%_04
1.5V
R382 1K_1%_04
DRAMRST_CNTRL 4,21
1.5V
DRAMRST_CNTRL 4,21
R375 *0_04
MVREF_ DQ_D IMMA 10,11 MVREF_DQ_DIMMB 12,13
R380 0_04
MVREF_CA_DIMMB 12
1.05VS
R374 * 0_04
R352 0_04 R360 * 0_04
MVREF_ CA_D IMMA 10
VREF_CH_B_DIMMVREF _CH _A_DI MM
6A
C168 *10u_6.3V_X5R_08
C154 10u_6.3V_X5R_06
C169 10u_6.3V_X5R_08
0.85VS
C181 22u_6.3V_X5R_08
C170 22u_6.3V_X5R_08
C537 22u_6.3V_X5R_08
C549 22u_6.3V_X5R_08
C538 22u_6.3V_X5R_08
C551 22u_6.3V_X5R_08
C186 22u_6.3V_X5R_08
C185 22u_6.3V_X5R_08
+
C552
220u_6.3V_6. 3*6.3* 4.2
C171 22u_6.3V_X5R_08
C187 22u_6.3V_X5R_08
C553 22u_6.3V_X5R_08
C188 22u_6.3V_X5R_08
C554 22u_6.3V_X5R_08
C189 22u_6.3V_X5R_08
C560 22u_6.3V_X5R_08
33A
VGFX_CORE
VGFX_CORE 46
¾aDIMMºÝÂ\©ñ & TRACE¥[¼e
VREF_CH_A_DIMM VREF_CH_B_DIMM
D04 DEL NET H_SNB_IVB#_PWRCT RL
0.85VS 48
VCCPLL 1.2A
0.9V or 0.8V
+
C814
330u_6.3V_D_ B
3.3V
R52010K_1%_04
1.5VS_CPU
POWER
GRAPHICS
DDR3 -1.5V RAILS
SENSE
LINES
1.8V RAIL
SA RAIL
VREFMISC
U32G
Iv y Bridge_rP GA_ 2D PC _ R ev 0p61
SM_VREF
AL1
VSSAXG_SENSE
AK34
VAXG_SENSE
AK35
VAXG1
AT24
VAXG2
AT23
VAXG3
AT21
VAXG4
AT20
VAXG5
AT18
VAXG6
AT17
VAXG7
AR24
VAXG8
AR23
VAXG9
AR21
VAXG10
AR20
VAXG11
AR18
VAXG12
AR17
VAXG13
AP24
VAXG14
AP23
VAXG15
AP21
VAXG16
AP20
VAXG17
AP18
VAXG18
AP17
VAXG19
AN24
VAXG20
AN23
VAXG21
AN21
VAXG22
AN20
VAXG23
AN18
VAXG24
AN17
VAXG25
AM24
VAXG26
AM23
VAXG27
AM21
VAXG28
AM20
VAXG29
AM18
VAXG30
AM17
VAXG31
AL24
VAXG32
AL23
VAXG33
AL21
VAXG34
AL20
VAXG35
AL18
VAXG36
AL17
VAXG37
AK24
VAXG38
AK23
VAXG39
AK21
VAXG40
AK20
VAXG41
AK18
VAXG42
AK17
VAXG43
AJ24
VAXG44
AJ23
VAXG45
AJ21
VAXG46
AJ20
VAXG47
AJ18
VAXG48
AJ17
VAXG49
AH24
VAXG50
AH23
VAXG51
AH21
VAXG52
AH20
VAXG53
AH18
VAXG54
AH17
VDDQ11
U4
VDDQ12
U1
VDDQ13
P7
VDDQ14
P4
VDDQ15
P1
VDDQ 1
AF7
VDDQ 2
AF4
VDDQ 3
AF1
VDDQ 4
AC7
VDDQ 5
AC4
VDDQ 6
AC1
VDDQ 7
Y7
VDDQ 8
Y4
VDDQ 9
Y1
VDDQ10
U7
VCCPLL1
B6
VCCPLL2
A6
VCCSA1
M27
VCCSA2
M26
VCCSA3
L26
VCCSA4
J26
VCCSA5
J25
VCCSA6
J24
VCCSA7
H26
VCCSA8
H25
VCCSA_SENSE
H23
VCCSA_VID[1]
C24
VCCPLL3
A2
VCCSA_VID[0]
C22
SA_DI MM_VRE FDQ
B4
SB_DI MM_VRE FDQ
D1
VCCI O_SEL
A19
R175 100_04
C245
0.1u_10V_X5R_04
V_SM_VREF_CNT
Q15 AO3402L
G
DS
V_SM_VREF
R178 100_04
PS_S3CNTR L_1.5S 41
VCCSA_ VID1 48
1.05VS
R311 *10K_04
R310 10K_04
VCCSA_ SENSE 48
H_SNB_IVB#_PWRCTRL_R
VCCSA_ VID0 48
VCCSA_SENSE
6/3 stuff R524, R3 10 ¤½¥Î½u¸ô default p ull down 10K
http://hobi-elektronika.net
Processor 5/7
B.Schematic Diagrams
B - 8 Processor 5/7
Sheet 7 of 61
Processor 5/7
Processor 6/7
VSS
U32H
Iv y Bridg e_rPGA_2DPC_R ev0p61
VSS1
AT35
VSS2
AT32
VSS3
AT29
VSS4
AT27
VSS5
AT25
VSS6
AT22
VSS7
AT19
VSS8
AT16
VSS9
AT13
VSS10
AT10
VSS11
AT7
VSS12
AT4
VSS13
AT3
VSS14
AR25
VSS15
AR22
VSS16
AR19
VSS17
AR16
VSS18
AR13
VSS19
AR10
VSS20
AR7
VSS21
AR4
VSS22
AR2
VSS23
AP34
VSS24
AP31
VSS25
AP28
VSS26
AP25
VSS27
AP22
VSS28
AP19
VSS29
AP16
VSS30
AP13
VSS31
AP10
VSS32
AP7
VSS33
AP4
VSS34
AP1
VSS35
AN30
VSS36
AN27
VSS37
AN25
VSS38
AN22
VSS39
AN19
VSS40
AN16
VSS41
AN13
VSS42
AN10
VSS43
AN7
VSS44
AN4
VSS45
AM29
VSS46
AM25
VSS47
AM22
VSS48
AM19
VSS49
AM16
VSS50
AM13
VSS51
AM10
VSS52
AM7
VSS53
AM4
VSS54
AM3
VSS55
AM2
VSS56
AM1
VSS57
AL34
VSS58
AL31
VSS59
AL28
VSS60
AL25
VSS61
AL22
VSS62
AL19
VSS63
AL16
VSS64
AL13
VSS65
AL10
VSS66
AL7
VSS67
AL4
VSS68
AL2
VSS69
AK33
VSS70
AK30
VSS71
AK27
VSS72
AK25
VSS73
AK22
VSS74
AK19
VSS75
AK16
VSS76
AK13
VSS77
AK10
VSS78
AK7
VSS79
AK4
VSS80
AJ25
VSS81
AJ22
VSS82
AJ19
VSS83
AJ16
VSS84
AJ13
VSS85
AJ10
VSS86
AJ7
VSS87
AJ4
VSS88
AJ3
VSS89
AJ2
VSS90
AJ1
VSS91
AH35
VSS92
AH34
VSS93
AH32
VSS94
AH30
VSS95
AH29
VSS96
AH28
VSS98
AH25
VSS99
AH22
VSS100
AH19
VSS101
AH16
VSS102
AH7
VSS103
AH4
VSS104
AG9
VSS105
AG8
VSS106
AG4
VSS107
AF6
VSS108
AF5
VSS109
AF3
VSS110
AF2
VSS111
AE35
VSS112
AE34
VSS113
AE33
VSS114
AE32
VSS115
AE31
VSS116
AE30
VSS117
AE29
VSS118
AE28
VSS119
AE27
VSS120
AE26
VSS121
AE9
VSS122
AD7
VSS123
AC9
VSS124
AC8
VSS125
AC6
VSS126
AC5
VSS127
AC3
VSS128
AC2
VSS129
AB35
VSS130
AB34
VSS131
AB33
VSS132
AB32
VSS133
AB31
VSS134
AB30
VSS135
AB29
VSS136
AB28
VSS137
AB27
VSS138
AB26
VSS139
Y9
VSS140
Y8
VSS141
Y6
VSS142
Y5
VSS143
Y3
VSS144
Y2
VSS145
W35
VSS146
W34
VSS147
W33
VSS148
W32
VSS149
W31
VSS150
W30
VSS151
W29
VSS152
W28
VSS153
W27
VSS154
W26
VSS155
U9
VSS156
U8
VSS157
U6
VSS158
U5
VSS159
U3
VSS160
U2
3.3VS2,4,10, 11,12,13, 14,15,16, 17,18,19,20, 21,22,23, 24,25,26, 27,29,30, 31,33,34,35 ,36,37,38 ,41,45,48
Ivy Bridge Processor 6/7 ( GND )
VSS
U32I
Iv y Bridge _rPGA_ 2D PC _R ev 0p61
VSS161
T35
VSS162
T34
VSS163
T33
VSS164
T32
VSS165
T31
VSS166
T30
VSS167
T29
VSS168
T28
VSS169
T27
VSS170
T26
VSS171
P9
VSS172
P8
VSS173
P6
VSS174
P5
VSS175
P3
VSS176
P2
VSS177
N35
VSS178
N34
VSS179
N33
VSS180
N32
VSS181
N31
VSS182
N30
VSS183
N29
VSS184
N28
VSS185
N27
VSS186
N26
VSS187
M34
VSS188
L33
VSS189
L30
VSS190
L27
VSS191
L9
VSS192
L8
VSS193
L6
VSS194
L5
VSS195
L4
VSS196
L3
VSS197
L2
VSS198
L1
VSS199
K35
VSS200
K32
VSS201
K29
VSS202
K26
VSS203
J34
VSS204
J31
VSS205
H33
VSS206
H30
VSS207
H27
VSS208
H24
VSS209
H21
VSS210
H18
VSS211
H15
VSS212
H13
VSS213
H10
VSS214
H9
VSS215
H8
VSS216
H7
VSS217
H6
VSS218
H5
VSS219
H4
VSS220
H3
VSS221
H2
VSS222
H1
VSS223
G35
VSS224
G32
VSS225
G29
VSS226
G26
VSS227
G23
VSS228
G20
VSS229
G17
VSS230
G11
VSS231
F34
VSS232
F31
VSS233
F29
VSS234
F22
VSS235
F19
VSS236
E30
VSS237
E27
VSS238
E24
VSS239
E21
VSS240
E18
VSS241
E15
VSS242
E13
VSS243
E10
VSS244
E9
VSS245
E8
VSS246
E7
VSS247
E6
VSS248
E5
VSS249
E4
VSS250
E3
VSS251
E2
VSS252
E1
VSS253
D35
VSS254
D32
VSS255
D29
VSS256
D26
VSS257
D20
VSS258
D17
VSS259
C34
VSS260
C31
VSS261
C28
VSS262
C27
VSS263
C25
VSS264
C23
VSS265
C10
VSS266
C1
VSS267
B22
VSS268
B19
VSS269
B17
VSS270
B15
VSS271
B13
VSS272
B11
VSS273
B9
VSS274
B8
VSS275
B7
VSS276
B5
VSS277
B3
VSS278
B2
VSS279
A35
VSS280
A32
VSS281
A29
VSS282
A26
VSS283
A23
VSS284
A20
VSS285
A3
1.5VS26, 37,41
http://hobi-elektronika.net
Schematic Diagrams
B.Schematic Diagrams
Sheet 8 of 61
Processor 6/7
Processor 6/7 B - 9
Schematic Diagrams
RESERVED
CFG
U32E
Iv y Bridge_rPGA_2DPC_Rev0p61
CFG[0]
AK28
CFG[1]
AK29
CFG[2]
AL26
CFG[3]
AL27
CFG[4]
AK26
CFG[5]
AL29
CFG[6]
AL30
CFG[7]
AM31
CFG[8]
AM32
CFG[9]
AM30
CFG[10]
AM28
CFG[11]
AM26
CFG[12]
AN28
CFG[13]
AN31
CFG[14]
AN26
CFG[15]
AM27
CFG[16]
AK31
CFG[17]
AN29
RSVD34
AM33
RSVD35
AJ27
RSVD38
J16
RSVD_NCTF42
AT34
RSVD39
H16
RSVD40
G16
RSVD_NCTF41
AR35
RSVD_NCTF43
AT33
RSVD_NCTF45
AR34
RSVD_NCTF56
AT2
RSVD_NCTF57
AT1
RSVD_NCTF58
AR1
RSVD_NCTF46
B34
RSVD_NCTF47
A33
RSVD_NCTF48
A34
RSVD_NCTF49
B35
RSVD_NCTF50
C35
RSVD51
AJ32
RSVD52
AK32
RSVD27
J15
RSVD16
C30
RSVD15
D23
RSVD17
A31
RSVD18
B30
RSVD20
D30
RSVD19
B29
RSVD22
A30
RSVD21
B31
RSVD23
C29
RSVD37
T8
RSVD8
F25
RSVD9
F24
RSVD11
D24
RSVD12
G25
RSVD13
G24
RSVD14
E23
RSVD32
W8
RSVD33
AT26
RSVD_NCTF44
AP35
RSVD10
F23
RSVD5
AJ26
VAXG_VAL_SENSE
AJ31
VSSAXG_VAL_SENSE
AH31
VCC_VAL_SENSE
AJ33
VSS_VAL_SENSE
AH33
KEY
B1
VCC_DIE_SENSE
AH27
BCLK_ITP
AN35
BCLK_ITP#
AM35
VSS_DIE_SENSE
AH26
RSVD31
AK2
RSVD30
AE7
RSVD29
AG7
RSVD28
L7
RSVD24
J20
RSVD25
B18
CFG7
PEG DEFER TRAINING
1: (Default) PEG Train immediately following xxRESETB de assertion 0: PEG Wait for BIOS for training
CFG4
CFG5
CFG7
D04 Add net PANEL_SEL
CFG Straps for Processor
R74 *1K_04
R73 *1K_04
R77 *1K_04
R83 *1K_04
Ivy Bridge Processor 7/7 ( RESERVED )
R81 1K_04
Display Port Presence Strap
1:(Default) Disa bled; No Physical Displa y Port attached to Em bedded Display P ort 0:Enabled; An external Display Port device is connected to t he Embedded Disp lay Port
CFG4
CFG2
H_CPU_RSVD2
CFG4
H_CPU_RSVD1 H_CPU_RSVD3
CFG5 CFG7
H_CPU_RSVD4
CFG0
CFG6
PANEL_SEL 23
CFG6
CFG2
1:(Default) Norm al Operation; Lane # definition mat ches socket pin map definition 0:Lane Reverse d
CFG2
PEG Static Lane Reversal - CFG2 is for the 16x
CFG[6:5]
PCIE Port Bifurcation Straps
11: (Default) x16 - Devic e 1 functions 1 and 2 disabled 10: x8, x8 - Device 1 functio n 1 enabled ; function 2 disab led 01: Reserved - (Device 1 functi on 1 disabled ; function 2 enabl ed) 00: x8,x4,x4 - Device 1 functio ns 1 and 2 enabl ed
Sheet 9 of 61
Processor 7/7
B.Schematic Diagrams
B - 10 Processor 7/7
Processor 7/7
http://hobi-elektronika.net
DDRIII CHA SO-DIMM_0
Sheet 10 of 61
DDRIII CHA SO-
DIMM _0
Channel A SO-DIMM 0
M_A_D Q3
M_A_D Q2
M_A_D Q1
M_A_D Q32
M_A_D Q31
M_A_D Q30
M_A_D Q29
M_A_D Q4
M_A_D Q39
M_A_D Q37
M_A_D Q36
M_A_D Q35
M_A_D Q34
M_A_D Q33
M_A_D Q44
M_A_D Q43
M_A_D Q42
M_A_D Q41
M_A_D Q40
M_A_D Q49
M_A_D Q38
M_A_D Q47
M_A_D Q46
M_A_D Q45
M_A_D Q54
M_A_D Q53
M_A_D Q52
M_A_D Q51
M_A_D Q28
M_A_D Q50
M_A_D Q56
M_A_D Q6
M_A_D Q5
M_A_D Q48
M_A_D Q55
C579
1u_6.3 V_X5R_04
M_A_D Q62
M_A_D Q61
M_A_D Q60
M_A_D Q58
M_A_D Q57
C664
0.1u_10V_X5R_04
C695
10u_6.3 V_X5R_06
M_A_D Q11
M_A_D Q9
M_A_D Q8
M_A_D Q7
M_A_D Q59
M_A_D Q63
C334
1u_6.3V_X5R_04
C323 1u_6.3 V_X5R_04
M_A_D Q16
M_A_D Q15
M_A_D Q14
M_A_D Q13
M_A_D Q12
M_A_D Q21
M_A_D Q10
M_A_D Q19
M_A_D Q18
M_A_D Q17
C594
0.1u_10V_X5R_04
C639
1u_6.3V_X5R_04
M_A_D Q26
M_A_D Q25
M_A_D Q24
M_A_D Q23
M_A_D Q0
M_A_D Q22
C576
0.1u_1 0V_X5R_04
+
C327
220u_4V_V_A
M_A_D Q20
M_A_D Q27
+
C709 220u_4V_V_A
footprint 08->06
JDIMM3B
DDR SK-2040 1-TR5B
VDD 1
75
VDD 2
76
VDD 3
81
VDD 4
82
VDD 5
87
VDD 6
88
VDD 7
93
VDD 8
94
VDD 9
99
VDD 10
100
VDD 11
105
VDD 12
106
VDD SPD
199
NC1
77
NC2
122
NCTEST
125
VREF _DQ
1
VSS1
2
VSS2
3
VSS3
8
VSS4
9
VSS5
13
VSS6
14
VSS7
19
VSS8
20
VSS9
25
VSS10
26
VSS11
31
VSS12
32
VSS13
37
VSS14
38
VSS15
43
VSS16
44
VSS17
48
VSS18
49
VSS19
54
VSS20
55
VSS21
60
VSS22
61
VSS23
65
VSS24
66
VSS25
71
VSS26
72
VSS27
127
VSS28
128
VSS29
133
VSS30
134
VSS31
138
VSS32
139
VSS33
144
VSS34
145
VSS35
150
VSS36
151
VSS37
155
VSS38
156
VSS39
161
VSS40
162
VSS41
167
VSS42
168
VSS43
172
VSS44
173
VSS45
178
VSS46
179
VSS47
184
VSS48
185
VSS49
189
VSS50
190
VSS51
195
VSS52
196
G2
GND2
G1
GND1
VTT2
204
VTT1
203
VREF _CA
126
RESET#
30
EVENT#
198
VDD 13
111
VDD 14
112
VDD 16
118
VDD 15
117
VDD 17
123
VDD 18
124
C638
0.1u_10V_X5R_04
C696 10u_6.3V_X5R_06
C663
0.1u_10V_X5R_04
C667
0.1u_ 10V_X5R_04
C575
0.1u_1 6V_Y5V_04
R442 * 10K_04
R440 1K_1%_04
C592 0.1u _16V_Y 5 V_04
C324
1u_6. 3V_X5R_04
R443 1K_1%_04
C330 0.1u _16V_Y 5 V_04
C328 10u_6.3V_X5R _06
C595
0.1u_1 0V_X5R_04
C333 1u_6.3V_X5R_04
JDIMM3A
DDRSK-20401-TR5B
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12/BC#
83
A13
119
A14
80
A15
78
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
BA0
109
BA1
108
RAS#
110
WE#
113
CAS#
115
S0#
114
S1#
121
CKE0
73
CKE1
74
CK0
101
CK0#
103
CK1
102
CK1#
104
SDA
200
SCL
202
SA1
201
SA0
197
DM0
11
DM1
28
DM2
46
DM3
63
DM4
136
DM5
153
DM6
170
DM7
187
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
ODT0
116
ODT1
120
BA2
79
C666
0.1u_1 0V_X5R_04
C665
0.1u_1 0V_X5R_04
C593
0.1u_1 0V_X5R_04
C580 1u_6.3V_X5R _04
C640
0.1u_ 10V_X5R_04
3.3VS
3.3VS
1.5V
1.5V
VTT_MEM
VTT_MEM
M_A_BS15,11
M_A_CLK_DDR15
1.5V
1.5V
DDR3_DRAMRST#4,11, 12,13
M_A_O DT15
M_A_RAS#5,11
M_A_CLK_DDR#15
SMB_CLK11,12,13,21
M_A_O DT05
M_A_BS05,11
M_A_WE#5, 11
M_A_CAS#5,11
M_A_C KE05
M_A_CLK_DDR05
1.5V4,7,11,12,13,27,31,41,43
VTT_MEM11,12,13,43
M_A_C S#15
M_A_DQ[63:0] 5,11
M_A_C KE15
M_A_BS25,11
TS#_DIMM0_111,12, 13
M_A_C S#05
M_A_CLK_DDR#05
M_A_DQS#[7:0]5,11
M_A_D QS[ 7:0 ]5,11
SMB_DATA11,12,13,21
M_A_A[15:0]5,11
CHANGE TO STANDARD
D03 modify
2.2u_16V_X5R_06 change to 1u_6.3V_Y5V_04
bug 76
CHA_SA1_DIM0
CHA_SA1_DIM1 11
CHA_SA0_DIM1
CHA_SA1_DIM1
CHA_SA0_DIM0
CHA_SA0_DIM1 11
RN4
10K_8P4R_04
1 2 3 4 5
6
7
8
3.3VS
CLOSE TO SO-DIMM
MVR EF_C A_D IMMA_ R
20mils
signal/space/signal:
Layout Note:
8 / 4 / 8
C694 10u_6.3V_X5R_06
M_A_DM6 M_A_DM7
M_A_DM0 M_A_DM2
M_A_DM1 M_A_DM3
M_A_DM4 M_A_DM5
R441 *0_04
MVREF_C A_DIMMA_R 11
MVREF_D Q_DIMMA7,11
MVREF_C A_DI MMA_R
MVR EF_C A_D IMMA7
D05 C709¤W¥ó
C574
1u_6.3V_X5R_04
D03 modify
C572 2.2u _6.3V_Y 5V_0 6
CHA _SA0_DIM0 CHA _SA1_DIM0
D05
M_A_A6
M_A_A5 M_A_A7
M_A_A8 M_A_A9
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4
M_A_A12
M_A_A11 M_A_A13
M_A_A14 M_A_A15
M_A_A10
M_A_DQS0 M_A_DQS1
C577
1u_6.3V_X5R_04
M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7
M_A_DQS#0
3.3VS2,4,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,29,30,31,33,34,35,36,37,38,41,45,48
M_A_DQS#1 M_A_DQS#2 M_A_DQS#3
C325 2.2u _6.3V_Y 5V_0 6
M_A_DQS#4
C578 1u_6. 3V_X5R_04
M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
http://hobi-elektronika.net
Schematic Diagrams
B.Schematic Diagrams
DDRIII CHA SO-DIMM_0 B - 11
Schematic Diagrams
Sheet 11 of 61
DDRIII CHA SO-
DIMM _1
C358 10u_6.3V_X5R_06
CHA_SA0_DIM1
M_A_DQS#3
M_A_DQS2
M_A_DQS1
M_A_DQS#7
M_A_DQS6
M_A_DQS#2
M_A_DQS5
M_A_DQS0
M_A_DQS7
CHA_SA1_DIM1
M_A_DQS#5
M_A_DQS#0
M_A_DQS#6
M_A_DQS#1
M_A_DQS3 M_A_DQS4
M_A_DQS#4
M_A_D Q31
M_A_D Q30
M_A_D Q29
M_A_D Q4
M_A_D Q3
M_A_D Q2
M_A_D Q1
M_A_D Q38
M_A_D Q47
M_A_D Q46
M_A_D Q45
M_A_D Q44
M_A_D Q43
M_A_D Q42
M_A_D Q41
M_A_D Q40
M_A_D Q39
M_A_D Q37
M_A_D Q36
M_A_D Q35
M_A_D Q34
M_A_D Q33
M_A_D Q32
M_A_D Q61
M_A_D Q60
M_A_D Q58
M_A_D Q57
M_A_D Q56
M_A_D Q6
M_A_D Q5
M_A_D Q48
M_A_D Q55
M_A_D Q54
M_A_D Q53
M_A_D Q52
M_A_D Q51
M_A_D Q28
M_A_D Q50
M_A_D Q49
M_A_D Q10
M_A_D Q19
M_A_D Q18
M_A_D Q17
M_A_D Q16
M_A_D Q15
M_A_D Q14
M_A_D Q13
M_A_D Q12
M_A_D Q11
M_A_D Q9
M_A_D Q8
M_A_D Q7
M_A_D Q59
M_A_D Q63
M_A_D Q62
M_A_D Q20
M_A_D Q27
M_A_D Q26
M_A_D Q25
M_A_D Q24
M_A_D Q23
M_A_D Q0
M_A_D Q22
M_A_D Q21
M_A_A15
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4
M_A_A6
M_A_A5 M_A_A7
M_A_A8 M_A_A9 M_A_A10
M_A_A12
M_A_A11 M_A_A13
M_A_A14
M_A_DM0 M_A_DM2
M_A_DM1 M_A_DM3
M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7
C590
0.1u_10V_X5R_04
C587
0.1u_10V_X5R_04
C606 0.1u_16V_Y 5V_04
C584
0.1u_10V_X5R_04
C571 2.2u _6.3V_ Y5V _06
C603
1u_6.3V_X5R_04
C581
0.1u_10V_X5R_04
C604 2.2u _6.3V_ Y5V _06
C585
0.1u_10V_X5R_04
C583
0.1u_10V_X5R_04
C607
0.1u _16V_Y 5V_04
C586
0.1u_10V_X5R_04
R453 * 10K_04
D03 modify
JDIMM1A
DDRRK-20401-TR4B
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12/BC#
83
A13
119
A14
80
A15
78
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
BA0
109
BA1
108
RAS#
110
WE#
113
CAS#
115
S0#
114
S1#
121
CKE0
73
CKE1
74
CK0
101
CK0#
103
CK1
102
CK1#
104
SDA
200
SCL
202
SA1
201
SA0
197
DM0
11
DM1
28
DM2
46
DM3
63
DM4
136
DM5
153
DM6
170
DM7
187
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
ODT0
116
ODT1
120
BA2
79
C573 0.1u_16V_Y 5V_04
C588
0.1u_10V_X5R_04
C582
0.1u_10V_ X5R_04
JD IMM1B
DDRRK-20401-TR4B
VDD 1
75
VDD 2
76
VDD 3
81
VDD 4
82
VDD 5
87
VDD 6
88
VDD 7
93
VDD 8
94
VDD 9
99
VDD 10
100
VDD 11
105
VDD 12
106
VDDSPD
199
NC1
77
NC2
122
NCTEST
125
VRE F_DQ
1
VSS1
2
VSS2
3
VSS3
8
VSS4
9
VSS5
13
VSS6
14
VSS7
19
VSS8
20
VSS9
25
VSS10
26
VSS11
31
VSS12
32
VSS13
37
VSS14
38
VSS15
43
VSS16
44
VSS17
48
VSS18
49
VSS19
54
VSS20
55
VSS21
60
VSS22
61
VSS23
65
VSS24
66
VSS25
71
VSS26
72
VSS27
127
VSS28
128
VSS29
133
VSS30
134
VSS31
138
VSS32
139
VSS33
144
VSS34
145
VSS35
150
VSS36
151
VSS37
155
VSS38
156
VSS39
161
VSS40
162
VSS41
167
VSS42
168
VSS43
172
VSS44
173
VSS45
178
VSS46
179
VSS47
184
VSS48
185
VSS49
189
VSS50
190
VSS51
195
VSS52
196
G2
GND2
G1
GND1
VTT2
204
VTT1
203
VRE F_CA
126
RESET#
30
EVENT#
198
VDD 13
111
VDD 14
112
VDD 16
118
VDD 15
117
VDD 17
123
VDD 18
124
C589
0.1u_10V_X5R_04
3.3VS
1.5V
3.3VS
VTT_MEM
1.5V
M_A_CLK_DDR35
M_A_O DT35
M_A_RAS#5,1 0
M_A_BS15,10
SMB_CLK10,12,13,21
DDR3_DRAMRST#4,10,12,13
M_A_WE#5,1 0
M_A_CAS#5,1 0
M_A_CLK_DDR#35
VTT_MEM10,12,13,43
M_A_O DT25
M_A_BS05,10
M_A_CLK_DDR25
1.5V4,7,10,12,13,27,31,41,43
M_A_CKE35
M_A_BS25,10
M_A_CKE25
M_A_CLK_DDR#25
M_A_C S#35
M_A_DQ[63:0] 5,10
TS#_ DIMM0 _110,12,1 3
M_A_C S#25
M_A_DQS#[7:0]5, 10
M_A_DQS[7:0]5,10
SMB_DATA10,12,13,21
3.3VS2,4,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,29,30,31,33,34,35,36,37,38,41,45,48
M_A_A[15:0]5,10
20mils
Channel A SO-DIMM 1
CHANGE TO STANDARD
20mils
8 / 4 / 8
Layout Note:
signal/space/signal:
D05
footprint 08->06
bug 76
2.2u_16V_X5R_06 change to 1u_6.3V_Y5V_04
MVREF_DQ_DIMMA7,10
MVRE F_C A_D IMMA _R10
CHA_SA1_DIM110
CHA_SA0_DIM110
D03 modify
C347 1u_6.3V_X5R_04
C349
1u_6. 3V_X5R_0 4
C367
1u_6.3V_X5R_04
C365 1u_6.3V_X5R_04
VTT_MEM
B.Schematic Diagrams
http://hobi-elektronika.net
DDRIII CHA SO-DIMM_1
B - 12 DDRIII CHA SO-DIMM_1
DDRIII CHB SO-DIMM_0
Sheet 12 of 61
DDRIII CHB SO-
DIMM _0
MVREF _CA_ DIMMB_R
R469 * 0_04
C391 2.2u_6. 3V_Y5V_06
C599 10u_6.3V_X5R_06
C677
1u_6.3V_X5R_04
MVRE F_C A_D IMMB_R
MVRE F_C A_D IMMB_R 13
Channel B SO-DIMM 0
CHANGE TO STANDARD
C678 1u_6.3V_X5R_04
M_B_D Q31
M_B_D Q46
M_B_D Q13
M_B_D Q24
M_B_D Q56
M_B_D Q28
M_B_D Q11
M_B_D Q23
M_B_D Q61 M_B_D Q62
M_B_D Q58
M_B_D Q50
M_B_D Q1
M_B_D Q16
M_B_D Q60
M_B_D Q2
M_B_D Q40
M_B_D Q54
M_B_D Q41
M_B_D Q57
M_B_D Q37
M_B_D Q25
M_B_D Q30
M_B_D Q27
M_B_D Q44
M_B_D Q3
M_B_D Q7 M_B_D Q9
M_B_D Q34
M_B_D Q5
M_B_D Q47
M_B_D Q43
M_B_D Q38
M_B_D Q17
M_B_D Q42
M_B_D Q8
M_B_D Q59
M_B_D Q35 M_B_D Q36
M_B_D Q4
M_B_D Q26
M_B_D Q63
M_B_D Q33
M_B_D Q45
M_B_D Q48
M_B_D Q55
M_B_D Q29
M_B_D Q15
M_B_D Q10
M_B_D Q52 M_B_D Q53
M_B_D Q6
M_B_D Q19
M_B_D Q18
M_B_D Q0
M_B_D Q12
M_B_D Q20
M_B_D Q39
M_B_D Q49 M_B_D Q51
M_B_D Q21
M_B_D Q32
M_B_D Q14
M_B_D Q22
C610
0.1u_16V_Y 5V_04
C601
1u_6.3V_X5R_04
C598
1u_6.3V_X5R_04
C697 10u_6.3V_X5R_06
C674
1u_6.3V_X5R_04
C651
0.1u_10V_X5R_04
C676
0.1u_10V_X5R_0 4
C647
0.1u_10V_X5R_04
C646
0.1u_10V_X5R_04
C650
0.1u_10V_X5R_04
C654
1u_6.3V_X5R_04
C675
0.1u_10V_X5R_04
D03 modify
R463 1K_1%_04
JDIMM2A
DDRS K-20401-TR4B
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12/BC#
83
A13
119
A14
80
A15
78
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
BA0
109
BA1
108
RAS#
110
WE#
113
CAS#
115
S0#
114
S1#
121
CKE0
73
CKE1
74
CK0
101
CK0#
103
CK1
102
CK1#
104
SDA
200
SCL
202
SA1
201
SA0
197
DM0
11
DM1
28
DM2
46
DM3
63
DM4
136
DM5
153
DM6
170
DM7
187
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
ODT0
116
ODT1
120
BA2
79
C648
0.1u_10V_X5R_04
C652
0.1u_10V_X5R_04
SO-DIM M _1 is placed fa rthe r fr om the GMCH than S O -DIMM_0
C653
0.1u_10V_X5R_04
C615 1u_6.3V_X5R_04
C649
0.1u_10V_X5R_04
C673 1u_6.3V_X5R_04
C596 1u_6.3V_X5R_04
C699 10u_6.3V_X5R_06
M_B_CLK_DDR#35
M_B_CLK_DDR35
M_B_CS# 25
M_B_C KE35
M_B_CLK_DDR25
M_B_C KE25
M_B_OD T25
M_B_CS# 35
M_B_CLK_DDR#25
M_B_OD T35
JDIMM2B
DDR SK-20401-TR4B
VDD1
75
VDD2
76
VDD3
81
VDD4
82
VDD5
87
VDD6
88
VDD7
93
VDD8
94
VDD9
99
VDD10
100
VDD11
105
VDD12
106
VDDS PD
199
NC1
77
NC2
122
NCTEST
125
VREF_ DQ
1
VSS1
2
VSS2
3
VSS3
8
VSS4
9
VSS5
13
VSS6
14
VSS7
19
VSS8
20
VSS9
25
VSS10
26
VSS11
31
VSS12
32
VSS13
37
VSS14
38
VSS15
43
VSS16
44
VSS17
48
VSS18
49
VSS19
54
VSS20
55
VSS21
60
VSS22
61
VSS23
65
VSS24
66
VSS25
71
VSS26
72
VSS27
127
VSS28
128
VSS29
133
VSS30
134
VSS31
138
VSS32
139
VSS33
144
VSS34
145
VSS35
150
VSS36
151
VSS37
155
VSS38
156
VSS39
161
VSS40
162
VSS41
167
VSS42
168
VSS43
172
VSS44
173
VSS45
178
VSS46
179
VSS47
184
VSS48
185
VSS49
189
VSS50
190
VSS51
195
VSS52
196
G2
GND2
G1
GND1
VTT2
204
VTT1
203
VREF_ CA
126
RESET#
30
EVENT#
198
VDD13
111
VDD14
112
VDD16
118
VDD15
117
VDD17
123
VDD18
124
C698
10u_6.3V_X5R_06
R460 1K_1%_0 4
CHA_DIMM0=00
CHA_DIMM1=01
CHB_DIMM0=10
CHB_DIMM1=11
3.3VS
1.5V
1.5V
1.5V
1.5V
VTT_ME M
VTT_MEM
DDR3_DRAMRST#4,10,11, 13
1.5V4,7,10,11, 13,27, 31,41,43
CHB_SA0_DIM1
CHB_SA1_DIM1
TS#_DIMM0_110,11,13
SMB_CLK10,11,13,2 1 SMB_DATA10,11,13,21
VTT_ME M10,11,13,43
3.3VS
RN14 10K_8P4R_0 4
1 2 3 4 5
6
7
8
M_B_BS15,13
M_B_B[15:0]5,13 M_B_ DQ [6 3: 0] 5 ,1 3
M_B_W E#5,13
M_B_CA S#5,13 M_B_RA S#5,13
M_B_BS25,13
M_B_BS05,13
M_B_DQS[7:0]5,13
M_B_D QS#[ 7: 0]5, 13
M_B_B4 M_B_B6
M_B_B5
M_B_B13
M_B_B12
M_B_B0 M_B_B1 M_B_B2 M_B_B3
M_B_B7 M_B_B8 M_B_B9 M_B_B10 M_B_B11
M_B_B14
20mils
Layout Note:
C633 2.2u_6. 3V_Y5V_06
CHB_SA1_DIM0
MVREF _DQ_D IMMB7, 13
MVREF_CA_DIMMB7
CLOSE TO SO-DIMM
M_B_B15
M_B_DQ S0
M_B_DQ S6
M_B_DQ S5
M_B_DQ S4
M_B_DQ S3
M_B_DQ S2
M_B_DQ S1
M_B_DQ S#3
M_B_DQ S#2
M_B_DQ S#1
M_B_DQ S#0
M_B_DQ S7
C609
1u_6.3V_X5R_ 04
M_B_DQ S#7
M_B_DQ S#6
M_B_DQ S#5
M_B_DQ S#4
M_B_DM7
M_B_DM1 M_B_DM3
M_B_DM4 M_B_DM5 M_B_DM6
M_B_DM0 M_B_DM2
2.2u_16V_X5R _06 change to 1u_6.3V_ Y5V_04
bug 76
D03 modify
C657§ï±µ1.05VS
3.3VS2,4,10, 11,13,14, 15,16, 17,18,19, 20,21,22, 23,24, 25,26,27, 29,30,31, 33,34,35 ,36,37,3 8,41,45, 48
CHB_SA0_DIM0 CHB_SA1_DIM0
CHB_ SA1_DI M1 13 CHB_ SA0_DI M1 13
D05
page 42
C656 0.1u_16V _Y5V_04
C390 0.1u_16V _Y5V_04
CHB_SA0_DIM0
http://hobi-elektronika.net
Schematic Diagrams
B.Schematic Diagrams
DDRIII CHB SO-DIMM_0 B - 13
Schematic Diagrams
Sheet 13 of 61
DDRIII CHB SO-
DIMM _1
D05
C362
1u_6.3V_X5R_04
CHB_SA1_DIM1
CHB_SA0_DIM1 M_B _DQ 31
M_B_D Q46
M_B_D Q40
M_B_D Q54
M_B_D Q62
M_B_D Q58
M_B_D Q50
M_B_D Q1
M_B_D Q16
M_B_D Q23
M_B_D Q61
M_B_D Q13
M_B_D Q24
M_B_D Q56
M_B_D Q28
M_B_D Q11
M_B_D Q17
M_B_D Q3
M_B_D Q7 M_B_D Q9
M_B_D Q34
M_B_D Q5
M_B_D Q25
M_B_D Q30
M_B_D Q27
M_B_D Q44
M_B_D Q41
M_B_D Q57
M_B_D Q37
M_B_D Q60
M_B_D Q2
M_B_D Q15
M_B_D Q4
M_B_D Q26
M_B_D Q63
M_B_D Q33
M_B_D Q42
M_B_D Q8
M_B_D Q59
M_B_D Q35 M_B_D Q36
M_B_D Q47
M_B_D Q43
M_B_D Q38
M_B_D Q51
M_B_D Q21
M_B_D Q6
M_B_D Q19
M_B_D Q18
M_B_D Q0
M_B_D Q12
M_B_D Q10
M_B_D Q52 M_B_D Q53
M_B_D Q45
M_B_D Q48
M_B_D Q55
M_B_D Q29
M_B_B11 M_B_B13
M_B_B12
M_B_B0 M_B_B1 M_B_B2 M_B_B3 M_B_B4
M_B_B6
M_B_B5
M_B_D Q32
M_B_D Q14
M_B_D Q22
M_B_D Q20
M_B_D Q39
M_B_D Q49
M_B_B14
M_B_B7 M_B_B8 M_B_B9 M_B_B10
M_B_DQS#5
M_B_DQS#4
M_B_DQS#3
M_B_DQS#2
M_B_DQS#1
M_B_DQS#0
M_B_DQS7
M_B_DQS6
M_B_DQS5
M_B_DQS4
M_B_DQS3
M_B_DQS2
M_B_DQS1
M_B_DQS0
M_B_B15
M_B_DQS#7
M_B_DQS#6
M_B_D M0 M_B_D M2
M_B_D M1 M_B_D M3
M_B_D M4 M_B_D M5 M_B_D M6 M_B_D M7
C632 1u_6.3V_X5R_04
C645
0.1u_10 V_X5R_04
JD IMM4B
DDR SK-2040 1-TR9D
VDD1
75
VDD2
76
VDD3
81
VDD4
82
VDD5
87
VDD6
88
VDD7
93
VDD8
94
VDD9
99
VDD10
100
VDD11
105
VDD12
106
VDDSPD
199
NC1
77
NC2
122
NCTEST
125
VREF_DQ
1
VSS1
2
VSS2
3
VSS3
8
VSS4
9
VSS5
13
VSS6
14
VSS7
19
VSS8
20
VSS9
25
VSS10
26
VSS11
31
VSS12
32
VSS13
37
VSS14
38
VSS15
43
VSS16
44
VSS17
48
VSS18
49
VSS19
54
VSS20
55
VSS21
60
VSS22
61
VSS23
65
VSS24
66
VSS25
71
VSS26
72
VSS27
127
VSS28
128
VSS29
133
VSS30
134
VSS31
138
VSS32
139
VSS33
144
VSS34
145
VSS35
150
VSS36
151
VSS37
155
VSS38
156
VSS39
161
VSS40
162
VSS41
167
VSS42
168
VSS43
172
VSS44
173
VSS45
178
VSS46
179
VSS47
184
VSS48
185
VSS49
189
VSS50
190
VSS51
195
VSS52
196
G2
GND2
G1
GND1
VTT2
204
VTT1
203
VREF_CA
126
RESET#
30
EVENT#
198
VDD13
111
VDD14
112
VDD16
118
VDD15
117
VDD17
123
VDD18
124
C659 2.2u _6.3V_Y5V_ 06
JDIMM4A
DDR SK-2040 1-TR9D
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12/BC#
83
A13
119
A14
80
A15
78
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
BA0
109
BA1
108
RAS#
110
WE#
113
CAS#
115
S0#
114
S1#
121
CKE0
73
CKE1
74
CK0
101
CK0#
103
CK1
102
CK1#
104
SDA
200
SCL
202
SA1
201
SA0
197
DM0
11
DM1
28
DM2
46
DM3
63
DM4
136
DM5
153
DM6
170
DM7
187
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
ODT0
116
ODT1
120
BA2
79
C672
0.1u_10V_X5R_04
C670
0.1u_10V_X5R_04
C668
0.1u_10 V_X5R_04
C642
0.1u_1 0V_X5R_04
C641
0.1u_10 V_X5R_04
C644
0.1u_1 0V_X5R_0 4
C669
0.1u_1 0V_X5R_04
C629
1u_6.3V_X5R_04
C643
0.1u_1 0V_X5R_04
C618 2.2u _6.3V_Y5V_ 06
C591
0.1u_16V_Y5V_04
C630 1u_6.3V_X5R_04
C631
1u_6.3 V_X5R_04
C628 0.1u _16V_Y 5V_04
C621 0.1u _16V_Y 5V_04
C671
0.1u_1 0V_X5R_0 4
3.3VS
1.5V
1.5V
VTT_MEM
VTT_MEM
1.5V4,7,10,11,12,27,31,41,43
VTT_MEM10,11,12,43
DDR3_DRAMRST#4,10,1 1,12
TS#_DI MM0 _110,11,12
SMB_CLK10,11,12,21 SMB_DATA10,11,12,21
M_B_B[15:0]5,12 M_B_DQ[63:0] 5,12
M_B_RAS#5,12
M_B_BS15,12
M_B_WE#5,12
M_B_CAS#5,12
M_B_BS05,12 M_B_BS25,12
M_B_DQS[7:0]5, 12
3.3VS2,4,10,11,12,14,15,16,17,18,19,20,21,22,23,24,25,26,27,29,30,31,33,34,35,36,37,38,41,45,48
M_B_DQS#[7:0]5,12
CHANGE TO STANDARD
20mils
Layout Note :
SO-DIMM_1 is pla ced farthe r fro m the GMCH th an SO-D IMM_ 0
Channel B SO-DIMM 1
C662 10u_6.3 V_X5R_06
M_B_CKE05
M_B_CLK_DDR#15
M_B_CLK_DDR15
M_B_CLK_DDR#05
M_B_C S#05
M_B_CLK_DDR05
M_B_O DT15
M_B_O DT05
M_B_CKE15
M_B_C S#15
2.2u_16V_X5R_06 change to 1u_6.3V_Y5V_04
bug 76
D03 modify
CHB_SA1_DIM112
CHB_SA0_DIM112
MVRE F_C A_D IMMB _R12
MVRE F_D Q_D IMMB7, 12
http://hobi-elektronika.net
DDRIII CHB SO-DIMM_1
B.Schematic Diagrams
B - 14 DDRIII CHB SO-DIMM_1
MXM PCI-E
AC/BATL # 47
D03 modify C99, C44 10U->4.7U
R80 0_04
C129 2200p_50V_X7 R_04
3V3_RUN3.3VS
SYS15V
dGPU_PWR_EN#
dGPU_PWR_EN
NMOS
ON
2A
R25 1M_04
R55 100_04
S
D
G
Q39B MTDN7002ZHS6R
5
34
S
D
G
Q39A
MTDN 700 2Z HS6 R
2
61
Q38 P2703BAG
3
2 4 1
5
6
C22
4.7u_6.3V_X5R_06
3V3_RUN
S
D
G
Q53A
MTDN7002ZHS6R
2
61
D03 modify
SMC_VGA_THERM 35
R47 0_04
3V3_RUN
3.3V S
SMD_VGA_THERM_R SMC_VGA_THERM_R
3.3VS
R195 *10m il_short
PEG_RXN13
C99
4.7u_25V_X5R_08
PEG_TXP5
PEG_RXP15
Max: 0.5inch
PEG_RXP6
SYS15V1 5,40,41, 44
PEG_RXN4
U21 MC74VHC1G08DFT2G
1 2
5
4
3
PEG_RXN5
PEG_TXN9
PEG_RXN12
PEG_RXN10
PEG_TXN12
R346 0_04
PEG_TXP12
PEG_TXP14
PEX_STD_SW#1
PEG_TXP8
TH_OVE RT#1
PEG_RXP5
PEG_RXP10
PEG_TXP13
PLT_RST# 2,4,24
PEG_TXN14
PEG_RXN11
PEG_RXP12
PEG_TXN8
PEG_TXN11
PEG_RXN14
PEG_RXP13
PEG_RXN9
PEG_TXN10
PEG_TXP9
PEG_TXN3
PEG_TXN4
Q23
MTN7002ZHS3
G
DS
R99 *100K_04
R112 22_04
C426
0.01u_50V_X7R_04
C435
0.1u_50V_Y5V_06
C59
*0.01u_50V_X7R_04
R16 *10K_04
PEG_RXP3
R29 *33_04
R306 *33_04
PEG_RXN3
R119 20K_04
R184 100K_04
PEG_TXN13
PEG_TXN6
14A
Battery m od e ®É,ÁקK±a ¹q´¡©Þ L CD ca bl e and VGA card§@·~, ®e©ö¿NÃaMXM VGA ¥d.
PWR_SR C
VIN
PEG_TXP3
14A
PEG_TXP11
PQ13 MEP4435Q8
4
62 5731
8
PQ14
MEP4435Q8
4
62 5731
8
MXM 3.0 MODULE BOARD CONNECTOR
J_MXM1A
91782-3140M-NV-01
GND
E3-10
5V
1
5V
3
5V
5
5V
7
5V
9
GND
11
GND
13
GND
15
GND
17
PEX_STD_SW#
19
VGA_DISABLE#
21
PNL_PWR _EN
23
PNL_BL_EN
25
PNL_BL_PWM
27
HDMI_CEC
29
DVI_HPD
31
LVDS_DDC_DAT
33
LVDS_DDC_CLK
35
GND
37
OEM
39
OEM
41
OEM
43
OEM
45
GND
47
PEX_RX15#
49
PEX_RX15
51
GND
53
PEX_RX14#
55
PEX_RX14
57
GND
59
PEX_RX13#
61
PEX_RX13
63
GND
65
PEX_RX12#
67
PEX_RX12
69
GND
71
PEX_RX11#
73
PEX_RX11
75
GND
77
PEX_RX10#
79
PEX_RX10
81
GND
83
PEX_RX9#
85
PEX_RX9
87
GND
89
PEX_RX8#
91
PEX_RX8
93
GND
95
PEX_RX7#
97
PEX_RX7
99
GND
101
PEX_RX6#
103
PEX_RX6
105
GND
107
PEX_RX5#
109
PEX_RX5
111
GND
113
PEX_RX4#
115
PEX_RX4
117
GND
119
PEX_RX3#
121
PEX_RX3
123
GND
125
PWR_SRC
E2-5
GND
E4-10
PRSNT_R#
2
WAKE#
4
PWR_G OOD
6
PWR_EN
8
RSVD
10
RSVD
12
RSVD
14
RSVD
16
PWR_LEVEL
18
TH_OVERT#
20
TH_ALE RT#
22
TH_PW M
24
GPIO0
26
GPIO1
28
GPIO2
30
SMB_DAT
32
SMB_CLK
34
GND
36
OEM
38
OEM
40
OEM
42
OEM
44
GND
46
PEX_TX15#
48
PEX_TX 15
50
GND
52
PEX_TX14#
54
PEX_TX 14
56
GND
58
PEX_TX13#
60
PEX_TX 13
62
GND
64
PEX_TX12#
66
PEX_TX 12
68
GND
70
PEX_TX11#
72
PEX_TX 11
74
GND
76
PEX_TX10#
78
PEX_TX 10
80
GND
82
PEX_TX 9#
84
PEX_TX9
86
GND
88
PEX_TX 8#
90
PEX_TX8
92
GND
94
PEX_TX 7#
96
PEX_TX7
98
GND
100
PEX_TX 6#
102
PEX_TX6
104
GND
106
PEX_TX 5#
108
PEX_TX5
110
GND
112
PEX_TX 4#
114
PEX_TX4
116
GND
118
PEX_TX 3#
120
PEX_TX3
122
GND
124
GND
133
PEX_RX2#
135
PEX_RX2
137
GND
139
PEX_RX1#
141
PEX_RX1
143
GND
145
PEX_RX0#
147
PEX_RX0
149
GND
134
PEX_TX 2#
136
PEX_TX2
138
GND
140
PEX_TX 1#
142
PEX_TX1
144
GND
146
PEX_TX 0#
148
PEX_TX0
150
GND
152
GND
151
PWR_SRC
E2-1
PWR_SRC
E2-2
PWR_SRC
E2-3
PWR_SRC
E2-4
PWR_SRC
E2-6
PWR_SRC
E2-7
PWR_SRC
E2-8
PWR_SRC
E2-9
PWR_SRC
E2-10
GND
E4-1
GND
E4-2
GND
E4-3
GND
E4-4
GND
E4-5
GND
E4-6
GND
E4-7
GND
E4-8
GND
E4-9
PWR_SRC
E1-1
PWR_SRC
E1-2
PWR_SRC
E1-3
PWR_SRC
E1-4
PWR_SRC
E1-5
PWR_SRC
E1-6
PWR_SRC
E1-7
PWR_SRC
E1-8
PWR_SRC
E1-9
PWR_SRC
E1-10
GND
E3-1
GND
E3-2
GND
E3-3
GND
E3-4
GND
E3-5
GND
E3-6
GND
E3-7
GND
E3-8
GND
E3-9
R31 2.2K_04
C100 *4.7u_25V_0 8
C430
0.01u_50V_X7R_04
add R47
MXM 3.0
MXM 3 .0 MODULE B OARD CONNECTOR
J_MXM1B
91782-3140M-NV-01
PEX_REFCLK#
153
PEX_REFCLK
155
GND
157
RSVD
159
RSVD
161
RSVD
163
RSVD
165
RSVD
167
LVDS_UCLK#
169
LVDS_UCLK
171
GND
173
LVDS_UTX3#
175
LVDS_UTX3
177
GND
179
LVDS_UTX2#
181
LVDS_UTX2
183
GND
185
LVDS_UTX1#
187
LVDS_UTX1
189
GND
191
LVDS_UTX0#
193
LVDS_UTX0
195
GND
197
DP_C_L0#
199
DP_C_L0
201
GND
203
DP_C_L1#
205
DP_C_L1
207
GND
209
DP_C_L2#
211
DP_C_L2
213
GND
215
DP_C_L3#
217
DP_C_L3
219
GND
221
DP_C_AUX#
223
DP_C_AUX
225
RSVD
227
RSVD
229
RSVD
231
RSVD
233
RSVD
235
RSVD
237
RSVD
239
RSVD
241
RSVD
243
RSVD
245
RSVD
247
RSVD
249
GND
251
DP_A_L0#
253
DP_A_L0
255
GND
257
DP_A_L1#
259
DP_A_L1
261
GND
263
DP_A_L2#
265
DP_A_L2
267
GND
269
DP_A_L3#
271
DP_A_L3
273
GND
275
DP_A_AUX#
277
DP_A_AUX
279
PRSNT_L#
281
CLK_REQ#
154
PEX_RST#
156
VGA_DDC_DAT
158
VGA_DDC_CLK
160
VGA_VSYNC
162
VGA_HSYN C
164
GND
166
VGA_RED
168
VGA_GREEN
170
VGA_BLUE
172
GND
174
LVDS_LCLK#
176
LVDS_LCLK
178
GND
180
LVDS_LTX3#
182
LVDS_LTX3
184
GND
186
LVDS_LTX2#
188
LVDS_LTX2
190
GND
192
LVDS_LTX1#
194
LVDS_LTX1
196
GND
198
LVDS_LTX0#
200
LVDS_LTX0
202
GND
204
DP_D_L0#
206
DP_D_L0
208
GND
210
DP_D_L1#
212
DP_D_L1
214
GND
216
DP_D_L2#
218
DP_D_L2
220
GND
222
DP_D_L3#
224
DP_D_L3
226
GND
228
DP_D_AUX#
230
DP_D_AUX
232
DP_C_HPD
234
DP_D_HPD
236
RSVD
238
RSVD
240
RSVD
242
GND
244
DP_B_L0#
246
DP_B_L0
248
GND
250
DP_B_L1#
252
DP_B_L1
254
GND
256
DP_B_L2#
258
DP_B_L2
260
GND
262
DP_B_L3#
264
DP_B_L3
266
GND
268
DP_B_AUX#
270
DP_B_AUX
272
DP_B_HPD
274
DP_A_HPD
276
3V3
278
3V3
280
C34
4.7u_25V_X5R_08
C62
4.7u_25V_X5R_08
R319 2.2K_04
C81
4.7u_25V_X5R_08
R32 2.2K_04
R307 *33_04
R24 *47K_04
C52 *4.7u_25V_08
R323 2.2K_04
C436
0.1u_50V_Y5V_06
R30 *33_04
R33 10K_04
C425
0.1u_50V_Y5V_06
C58
4.7u_25V_X5R_08
R28 *33_04
C101
10u_6.3V_X5R_08
PWR_SR C
3V3_RUN
5V_RUN 3V3_RUN
3V3_RUN
5V_RUN
PWR_SRC
3V3_RUN
PWR_SRC PWR_SRC
3V3_RUN
3V3_RUN
CLK_PCIE_MXM21
CLK_PCIE_MXM#21
PEG_TXP7
PEG_RXN7
PEG_TXP[0..15] 3
PEG_RXN[0..15]3 PEG_RXP[0..15]3
PEG_TXN[0..15] 3
DGPU_PRSNT# 21
3V3_RUN(1A)- -3. 3V
SPDIFO30,33
HDA_SDIN120
PEG_RXP9
3.3VS2, 4,10,11,12,13,15,16, 17,18,19,20,21,22,23, 24,25,26,27,29,30,31,33, 34,35,36,37,38,41, 45,48 VIN15,40,41,42,43, 45,46,47,48
5VS15,17,19,20,23,26, 27,30,31,33,34,36,37, 41,45,46,48
3.3V3,4,7,15,20, 21,22,24,25,26,27,30,31, 33,37,38,41,43,44
HDA_SYNC 20,33
HDA_BITCLK 20,33
HDA_RST#20,33
HDA_SDOUT 20,33
DP_D_SDA 15 DP_D_SCL 15
DP_DHPD 15
DP_DCLK 15
DP_D#2 15 DP_D2 15
PWR_SRC(10A)--7-20V
DP_DCLK# 15
PEG_TXN5
PEG_RXP7
PEG_RXP11
PEG_TXP6
EX_VGA_BKLPWM15
5V_RUN
S
D
G
Q53B MTDN7002ZH S6R
5
34
dGPU_PWR_EN#35
SYS15V
dGPU_PWR_EN#
5VS
dGPU_PWR_EN
NMOS
PEG_RXN8
ON
3A
S
D
G
Q51B MTDN7002ZHS6R
5
34
PEG_TXP4
R528 100_04
R527 1M_04
C48 2200p_50V_X7 R_04
S
D
G
Q51A
MTDN 700 2Z HS6 R
2
61
Q52 P2703BAG
3
2 4 1
5
6
S
D
G
Q22B MTDN 7002 ZHS 6R
5
34
C49
4.7u_6.3V_X5R_06
5V_RUN(2.5A)--5V
5V_RUN
PEG_RXP14
PEG_TXN7
PEG_RXP8
PEG_RXN15
PEG_RXN6
PEG_RXP4
PEG_TXP15
PEG_TXN15
H23 H7_0D4_1
GND
PEG_TXP10
CLOSE TO MXM CONN.
U20
MC74 VH C1G 08D FT2 G
1 2
5
4
3
R19 10K_04
CLOSE TO MXM PIN E1 CLOSE TO MXM PIN E2 CL OSE T O M XM C ONN.
5V27,29,30,33,39,41,42,43, 44,48
3V3_RUN25
C44
4.7u_25V_X5R_08
R57 *0_04
R120 100K_04
SMD_VGA_THERM_R
SMC_VGA_THERM_R
5V_RUN
S
D
G
Q48B MTDN7002ZHS6R
5
34
S
D
G
Q48A MTDN 700 2Z HS6 R
2
61
3.3VS
R6652.2 K_04
R6662.2K_04
D05 NV sugges tion
C310 *0.1u_16V_Y5V_04
DP_D#1 15 DP_D1 15
DGPU_RST# 24,35
Q29
MTN7002ZHS3
G
D S
5V_RUN
S
D
G
Q22A MTDN7002ZHS6R
2
61
R185 10K_04
R17 10K_04
3.3VS
PEG_RXN2
DP_D#0 15 DP_D0 15
MXM_RS T#
MXM_RST#
D05 Add C722
VGA_PWR GD1
SMD_VGA_THERM 35
5V_RUN
DGPU_PWRGD 25,35
PEG_RXP2
bug 62
stuff R112, Q23
D03 modify
PEG_RXN1
C83 *4.7u_25V_08
C309 *0.1u_16V_Y5V_04
PEG_RXP1
5V
PEG_RXN0
TH_ALE RT#1
PEG_RXP0
PWR_SRC
3V3_RUN
H24 H7_0D4_1
GND
PEG_TXP2 PEG_TXN1
PEG_TXP1
PEG_TXP0
PEG_TXN0
PEG_TXN2
VGA_TH ROTTLE 35
C722
0.01u_50V_X7R_04
5V_RUN
dGPU_PWR_EN#
Q28
MTN7002ZHS3
G
DS
C150
*10u_6.3V_X5R_06
MXM_C LKR EQ#21
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Schematic Diagrams
B.Schematic Diagrams
Sheet 14 of 61
MXM PCI-E
MXM PCI-E B - 15
Schematic Diagrams
LVDS_U2N 23
LVDS_U 2P
LVDS_U 2N
LVDS_U 2P 23
Q33
MEP4435Q8
4
62 5731
8
LVDS_UC LKN23
LVDS_UCLKN
LVDS_L2N 23 LVDS_L2P 23
R190 *0_08
BKL_EN
INV_BLON
VGA_BKLTEN
U8A 74LVC08PW
1 2
3
147
R96 *1 00K_04
R87 *1 00K_04
C429 *100p_50V_ NPO_04
U8B 74LVC08PW
4 5
6
147
R92 *1 00K_04
del R303
R98 100K_04
U8D 74LVC08PW
12 13
11
147
U8C 74LVC08 PW
9
10
8
147
D05 R78, R79¤W ¥ó
3.3V
3.3V
3.3V
BKL_EN35
3.3V
SB_BLON25
LID_SW #30,35,37
ALL_SY S_PWRGD22,3 5,45
VGA_BKLTEN23
C157 10u_10V_Y 5V_08
5VS
LVDS_L 1N
BRIGH TNESS_R
PLVDD
LVDS_L 1P
LVDS_LCLKP
INV_BLON
LVDS_LCLKN
5VS_LCD
EX_VGA_BKLPWM_R
R662 1M_04
R661
100_04
Q43B
MTNN 20N 03Q 8
6
5
4
R68 *0_04
Q44
MTN7002ZHS3
G
DS
C796 2200p_50V_X7R_ 04
SYS15 V
NMOS
LVDS_D DC_DAT LVDS_D DC_CLK
R89
2.2K_04
LVDS_DDC_CLK 23
LVDS_D DC_DA T 23
R85
2.2K_04
3.3VS
EX_VGA_BKLPWM_S
VIN
R37
*1M_04
VGA_ENAVDD23
R194 *100K_04
R36 *220_04
C61
0.1u_50V _Y5V_06
Q21
*P2003EVG
4
6 2 5
7 3
1
8
Q49
*MTN7002Z HS3
G
DS
R189 *10K_04
VLED
3.3V
S
D
G
Q50B *MTDN7002ZHS6R
5
34
S
D
G
Q50A *MTDN7002ZHS6R
2
61
LVDD_ EN#
C53 * 0.1u_50V_Y 5V_06
iGP_eDP_TX23
iGP_eDP_TX#23
iGP_eDP_C LK3
iGP_eDP_C LK#3
iGP_eDP_S DA3
iGP_eD P_SCL3
BRIGH TNESS_R
Q40
AO3415
G
D S
R86
*0_04
R93 10K_04
D6
*BAV99 RECTIFIER
A
C
AC
BRIGHTNESS35
PLVDD
3.3V
iGP_eDP_H PD3
J_LCD2
88107-4000 1
111112
12
131314
14
151516
16
171718
18
191920
20
212122
22
232324
24
252526
26
272728
28
292930
30
313132
32
333334
34
353536
36
373738
38
393940
40
1
1
3
3
5
5
7
7
9
9
2
2
4
4
6
6
8
8
10
10
J_LCD1
*88107-30 001
112
2
334
4
556
6
778
8
9910
10
111112
12
131314
14
151516
16
171718
18
191920
20
212122
22
232324
24
252526
26
272728
28
292930
30
eDP_CLK #
D03 modify
5VS_LCD
LVDS_LC LKN23 LVDS_LC LKP23
LVDS_L0P
VLED
LVDS_L0N
LVDS_D DC_DA T
LVDS_L2P
LVDS_D DC_CL K
LVDS_L2N
3.3VS
VGA_ENA VDD
D03 modify
LVDS_U CLKP 23
LVDS_U CLKP
LVDS_L1N
LVDS_DDC_DAT LVDS_L0N
LVDS_L1P
PLVDD
LVDS_L0P LVDS_L2N
LVDS_L2P
LVDS_DD C_CLK
3.3VS
INV_BLON
VGA_ENAVD D
LVDS_LCL KN LVDS_LCL KP
40Pin & 30Pin Conn Co-layout ©T©wPin »P Pin7,9 -«Å|¿ù¶}, Pin7,9 Åܦ¨NC Pin.
SYS15 V 14, 40,41,44
BRIGH TNESS_R
PANEL_SEL_ R23,25
PLVDD _SEL
eDP_SDA
J_DP1
88107-30001
112
2
334
4
556
6
778
8
9910
10
111112
12
131314
14
151516
16
171718
18
191920
20
212122
22
232324
24
252526
26
272728
28
292930
30
Q34
*MEP4435Q8
4
6 2 5
7 3
1
8
VIN 14,40 ,41,42, 43,45,4 6,47,48
eDP_SCL
INV_ BLON
eDP_CLK
SYS15 V
R519 1M_04
R667 *0_04
VGA_ENAVD D23
R663 10K_04
3.3V
Q45 MTN7002ZH S3
G
DS
ON
VGA_ENA VDD
eDP_TX#1
eDP_TX#2
bug 47
5VS 14 ,17,19 ,20,23, 26,27,30, 31,33,34 ,36,37, 41,45,4 6,48
>100 mil
PLVDD POWER
>100 mil
>100mil>100 mil
C152
0.1u_16 V_Y5V_04
D03 modify
R94
*100K_04
C156
10u_10V_Y5V _08
5VS
PLVDD
R509 *10K_04
PLVDD LVDS:3.3V 2A eDP 3D:5V 3A
eDP_TX1
SYS15V
PLVDD _SEL
R507 1M_04
3.3VS
eDP_TX2
C84
0.1u_16 V_Y5V_04
LVDS_U 0P 23
LVDS_U 0N 23
LVDS_U 0P
LVDS_U 0N
Q35 MTN7002ZHS3
G
DS
LVDS_L0N 23 LVDS_L0P 23
R91
*0_04
bug 41
stuff R661, Q44
EX_VGA_BKLPW M14
eDP_TX#0
3.3V 3,4,7 ,20,21, 22,24,2 5,26,27, 30,31, 33,37,38, 41,43,4 4
C153
0.1u_16V_ Y5V_04
eDP_TX0
eDP
PANEL
3.3VS 2,4,10,11,12 ,13,14, 16,17,1 8,19,20, 21,22,23 ,24,25, 26,27,2 9,30,31, 33,34,35, 36,37, 38,41,4 5,48
Q43A MTNN20N 03Q8
137
28
LVDS_L1N23
LVDS_L1P23
LVDS_U 1P23
LVDS_U 1P
LVDS_U1N23
LVDS_U 1N
EX_VGA_BKLPWM_S
D03 modify
VLED
EX_VGA_BKLPWM_R
R58 0_04
D7
*RB751V
A C
C39 0.1u_10V_X7R_04
C36 0. 1u_10V_X7R_04
R79 100K_04
iGP_eDP_TX0 3
iGP_eDP_TX1 3
iGP_eDP_TX#1 3
iGP_eDP_TX#0 3
Q46
MTN7002Z HS3
G
DS
C42 0. 1u_10V_X7R_04
C104 0.1u_10V_X7R _04
.
L17
FCM1608K- 121T06
R78 100K_04
DP_DCLK14
DP_DCLK#14
C102
220p_50V_N PO_04
DP_D_SDA14
DP_D _SCL14
DP_D214
DP_D#214
VLED
R56
10K_04
eDP_CLK #
C46 * 0.1u_10V_ X7R_04
eDP_SCL
eDP_SDA
eDP_TX2
eDP_TX#2
eDP_CLK
C105 *0.1u_10V_X7R_04
C50 * 0.1u_10V_ X7R_04
C137 *0.1u_10V_X7R_04
C130 *0.1u_10V_X7R_04
C139 *0.1u_10V_X7R_04
C40 0.1u_10V_X7R_04
C37 0. 1u_10V_X7R_04
C43 0. 1u_10V_X7R_04
D3 BAV99N3
A
C
AC
C41 0.1u_10V_X7R_04
C103 0.1u_10V_X7R _04
C38 0.1u_10V_X7R_04
3.3VS
PJ39
OPEN_2A
1 2
VLED
PLVDD
3.3VS
D04 Add net PANE L_SEL_R
DP_DHPD14
DP_D0 14
DP_D1 14
DP_D#1 14
DP_D#0 14
eDP_TX1
eDP_TX#1
C45 * 0.1u_10V_X7R_0 4
eDP_TX0
eDP_TX#0
C138 *0.1u_1 0V_X7R_04 C51 * 0.1u_10V_X7R_0 4
C141 *0.1u_1 0V_X7R_04
Sheet 15 of 61
Panel, Inverter,
CRT
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Panel, Inverter, CRT
B.Schematic Diagrams
B - 16 Panel, Inverter, CRT
1394_JMB380C
U38
JMB380-QGAZ0C
XRSTN1XTEST2APCLKN3APCLKP4APVDD5APGND6APREXT7APRXP8APRXN9APV1810APTXN11APTXP
12
SEECLK
14
CR1_CD1N
15
CR1_CD0N
16
CR1_PCTLN
17
DV18
18
REG_CTRL
19
DV33
20
CR_LEDN
21
MDI O14
22
MDI O13
23
TCP S
24
SEEDAT
13
DV18
37
TXIN
38
TXOUT
39
MDI O7
40
MDI O6
41
MDI O5
42
MDI O4
43
DV33
44
MDI O3
45
MDI O2
46
MDI O1
47
MDI O0
48
TREXT
36
TPBIAS_1
35
TPA1P
34
TPA1N
33
TPB1P
32
TPB1N
31
TAV33
30
MDIO829MDIO9
28
MDIO1027MDIO1126MDIO12
25
GND_M
49
1394_TPBIAS0
R491 10K_04
C746
0.1u_16V_Y5V_04
.
L71
*HCB2012KF-500T40
.
L69
HCB2012KF-500T40
R486 12K_1%_04
C715 *0.1u_16V_04
CLK_PCIE_1394#21 CLK_PCIE_139421
PCIE_TXN4_1394 21 PCIE_TXP4_1394 21
1394_TPA0+
TCPS
C747 0.1u_16V_Y5V_04
C748 0.1u_16V_Y5V_04
3.3VS
1.8VS
1394_XI 1394_XO
BUF _PLT_RST#24,30,35,38
12mil
1394_TPB0-
1394_TPB0+
C744 10u_10V_Y5V_08
C735
0.1u_16V_Y5V_04
C710
0.1u_16V_Y5V_04
C705
0.1u_16V_Y5V_04
3.3VS_CARD
C724
0.1u_16V_Y5V_04
PCIE_RXN4_1394 21
PCIE_RXP4_1394 21
3.3VS_CARD
DV1.8V
QFN-48
3.3VS_CARD
C720
*0.1u_16V_04
DV1.8V
C727
1000p_50V_X7R_04
C711 *0.1u_16V_04
JMB380C 6-03-00380-032
40mil
VIN 14,15,40,41,42,43,45,46,47,48
5VS 14,15,17,19,20,23,26,27,30,31,33,34,36,37,41,45,46,48
3.3V 3,4,7,15,20,21,22,24,25,26,27,30,31,33,37,38,41,43, 44
3.3VS 2,4,10,11,12,13,14,15,17,18,19,20,21,22,23,24,25,26,27, 29,30,31,33,34,35,36,37,38,41,45,48
Note: Close to Pin36
1394_TPA0-
Note: Close to Pin7
1.8VS 7,26,44
1394_TPBIAS0
Note: Close to CON
IEEE1394a
Note: Close to JMB380
C692 220p_50V_NPO_04
R490 56_04
R487 56_04 R488 56_04
1394_TPB0+
R489 56_04
C693 0.33u_16V_Y5V_06
R478 4.99K_1%_04
1394_TPA0+
J1394PORT1
MIE-04R H4G
TPA+
4
TPA-
3
TPB+
2
TPB-
1
GND
GND2
GND
GND1
1394_XO
L23 WCM2012F2S-161T03
1 4
4 1
L24 WCM2012F2S-161T03 R449 *0_04 R450 *0_04 R451 *0_04 R452 *0_04
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2 3
3 2
1394_TPB0-
Schematic Diagrams
B.Schematic Diagrams
1394_XI
X14
12
R496
*1M_04
FSX-8L_24.576MHz
Note: Close to JMB380
C716 20p_50V_NPO_04
X13
12
*24.576MHz
3 4
C729 20p_50V_NPO_04
0.1u_16V_Y5V_04
DV1.8V
C730
10u_10V_Y5V_08
Note:Close to Pin5
12mil
C739
1394_TPA0-
JMB380
R505 12K_04
Note: Close to Pin18
Note: Close to Pin10
DV1.8V
C745
0.1u_16V_Y5V_04
C743
10u_10V_Y5V_08
Sheet 16 of 61
1394_JMB380C
1394_JMB380C B - 17
Schematic Diagrams
D04 R529¤W¥ó
R600 *4.7K_04
C3
10p_50V_NPO_04
TMDS_D VI_D 1P
TMDS_D VI_D 1N
TMDS_D VI_D 0N
TMDS_D VI_D 2N
TMDS_D VI_D 0P
TMDS_D VI_C LKP
TMDS_D VI_D 2P
TMDS_D VI_C LKN
R596 *4.7K_04
DVI_HPD_C
R726 0_04
R725 0_04
R593 *4.7K_04
R598 *4.7K_04
TMDS_DVI_CLKP_R
TMDS_DVI _D1N_ R
D2
RB751V-40(lision)
AC
TMDS_DVI _D0N_ R
R732 0.2_06
PLEASE CLOSE TO CONNECTOR
TMDS_DVI _CLKN_R
DVI_SDA23
DVI_SCL23
DVI_HPD23
DVI_SCL_R
DVI_SDA_R
TMDS_DVI _D1P_R
.
L8
FCM1608K-121T06
DDCDATA
R729 0_04
C1
12p_50V_NPO_04
R730 0_04
FGRN
FRED
R597 *4.7K_04
R22 0_04
FBLUE VSYNC
HSYNC
R23 0_04
TMDS_DVI _D0P_R
R594 *4.7K_04
TMDS_DVI _D2N _R
TMDS_DVI _D2P_R
DVI_SDA_R
TMDS_DVI _CLKN_R
TMDS_DVI _D0P_R TMDS_DVI _D0N _R
TMDS_DVI _D1N _R
TMDS_DVI _D1P_R
5VS
DVI_SCL_R
TMDS_DVI _CLKP_R
.
L9
FCM1608K-121T06
TMDS_DVI _D2N_ R
C2
12p_50V_NPO_04
TMDS_DVI_D0P
TMDS_DVI_CLKP
TMDS_DVI_D1N
TMDS_DVI_D1P
R716 0.2_06
TMDS_DVI_CLKN
TMDS_DVI_D2P
TMDS_DVI_D0N
TMDS_DVI_D2N
TMDS_DVI _D2P_R
R60 *499_1%_04
LP4
*DVI 2012F2SF -900T05_08
1
4
2
3
Y5V -> X7R
D03 modify
bug 48
DVI_CLKP23
DVI_D2P23 DVI_D2N23
DVI_D1P23
DVI_CLKN23
LP7
*DVI 2012F2SF -900T05_08
1
4
2
3
DVI_D0P23 DVI_D0N23
DVI_D1N23
C123 0.1u_10V_X7R_04
C122 0.1u_10V_X7R_04
C108 *5p_50V_NPO_04
C120 0.1u_10V_X7R_04
C118 0.1u_10V_X7R_04
C195 0.1u_10V_X7R_04
C121 0.1u_10V_X7R_04
C197 0.1u_10V_X7R_04
C119 0.1u_10V_X7R_04
LP6
*DVI 2012F2SF -900T05_08
1
4
2
3
R544 4.7K_04
C110 *5p_50V_NPO_04
R65 *499_1%_04
Q1
*MTN7002Z HS3
G
DS
C106 *5p_50V_NPO_04
R62 *499_1%_04
C111 *5p_50V_NPO_04
5VS_DVI
R61 *499_1%_04
C112 *5p_50V_NPO_04
R63 *499_1%_04
D SUB
DVI
J_DVI1
D7510-2 9A-1B0R
TMD S D AT A 2-
1
TMD S D AT A 2+
2
TMDS 2/ 4 Sh ie ld
3
TMD S D AT A 4-
4
TMD S D AT A 4+
5
DDC Clk
6
DDC Data
7
V SYN C
8
TMD S D AT A 1-
9
TMD S D AT A 1+
10
TMD S D AT A 1/ 3 S h ie l d
11
TMD S D AT A 3-
12
TMD S D AT A 3+
13
+5V POWER
14
GND (ANALOG)
15
HOT PLUG DETECT
16
TMD S D AT A 0-
17
TMD S D AT A 0+
18
TMD S D AT A 0/ 5 S h ie l d
19
TMD S D AT A 5-
20
TMD S D AT A5+
21
TMDS CLK Shield
22
TMD S C L K +
23
TMD S C lk -
24
CASE
M1
RED
C1
GREEN
C2
BLUE
C3
H SYNC
C4
CASE
M2
GND
C5
GND
C6
C16
0.1u_16V _Y5V_ 04
C113 *5p_50V_NPO_04
C107 *5p_50V_NPO_04
R64 *499_1%_04
C109 *5p_50V_NPO_04
TMDS_DVI _D2N TMDS_DVI _D2P
R66 *499_1%_04
3.3VS
DVI_APD
DVI_CEXT
TMDS_DVI _D1P
DVI_ASQ1
TMDS_DVI _D1N
C255
0.1u_16V _Y5V_0 4
LP5
*DVI 2012F2SF -900T05_08
1
4
2
3
DVI_EMI1
C469 2.2u_6. 3V_Y5V _06
R59 *499_1%_04
DVI_APD
3.3VS
DVI_EMI1
3.3VS
DVI_ASQ0
C251
0.1u_16V _Y5V_ 04
DVI_EMI0
TMDS_DVI _CLKP TMDS_DVI _CLKN
TMDS_DVI _D0P
C280
0.1u_16V _Y5V_ 04
5VS14,15,19,20,23,26,27,30,3 1,33,3 4,36,37, 41,45, 46,48
3.3VS2,4,10 ,11,12 ,13,14,15,16, 18,19, 20,21, 22,23,24 ,25,26 ,27,29, 30,31, 33,34,3 5,36,3 7,38,4 1,45,48
TMDS_DVI _D0N
R354 *100K_04
Parade PS8171
DVI_PC0
DVI_REXT
DVI_PC1
DVI_PC0
DVI_PC1
DVI_DCC_EN#
DVI_DCC_EN#
DVI_HPD_C
DVI_OE#
R530 *4.7K_04
R529 4.7K_04
R541 *0_04
R543 *4.7K_04
R542 *4.7K_04
R545 4.7K_04
C253
0.1u_16V _Y5V_0 4
3.3VS
3.3VS
R546 *4.7K_04
R591 *4.7K_04
U2
PS8171
IN_D1+
39
IN_D1-
38
IN_D2+
42
IN_D2-
41
IN_D3+
45
IN_D3-
44
IN_D4+
48
IN_D4-
47
SCL
9
SDA
8
HPD/HPDX
7
OE#
25
DCC_EN#
32
CEXT/RT_EN#
10
PEQ/PC0
3
PIO/PC1
4
REXT
6
EMI0/GND[6]
27
PRE/QE_2
35
DDCBUF/OE_1
34
OUT_D1+
22
OUT_D1-
23
OUT_D2+
19
OUT_D2-
20
OUT_D3+
16
OUT_D3-
17
OUT_D4+
13
OUT_D4-
14
SCL_SINK
28
SDA_ SIN K
29
HPD_SINK
30
VCC[1]
2
APD/VCC [2]
11
VCC[3]
15
VCC[4]
21
VCC[5]
26
EMI1/VCC[6]
33
VCC[7]
40
VCC[8]
46
ASQ0/GND[ 1]
1
GND[2]
5
ASQ1/GND[ 3]
12
GND[4]
18
GND[5]
24
GND[7]
31
GND[8]
36
GND[9]
37
GND[10]
43
GND
49
3.3VS
C248
0.1u_16V _Y5V_0 4
PIN 49=GND
DVI_EMI0
R595 *4.7K_04
R717 0_04
R592 *4.7K_04
R532, R533 10K->2.2K
D03 modify
For Safe ty LPS .
R718 0_04
Close to DVI PORT
R5322.2K_04
3.3VS 5VS_DVI
R5342.2K_04
R5332.2K_04
R5352.2K_04
C19
0.22u_10V_Y5V_04
C17
0.22u_10V_Y5V_04
DDCLK
HSYNC
R13 33_04
DDCDATA
C13
0.22u_10 V_Y5V_04
DDC_DATA23
DAC_HSYNC23 DAC_VSYNC23
R15 33_04
FGRN
3.3VS
FRED
FBLUE
DDC_CLK23
VSYNC
5VS_DVI
FBLUE
FGRN
DDCLK
PLEASE CLOSE TO CONNECTOR
U1
IP4772CZ16
VCC_SYNC
1
VCC_VIDEO
2
VIDEO_1
3
VIDEO_2
4
VIDEO_3
5
GND
6
VCC_DDC
7
BYP
8
DDC_OUT1
9
DDC_IN1
10
DDC_IN211DDC_OUT2
12
SYNC_IN113SYNC_OUT1
14
SYNC_IN215SYNC_OUT2
16
FRED
.
L3 F CM100 5MF-600 T01
.
L2 F CM100 5MF-600 T01
.
L1 F CM100 5MF-600 T01
.
L7 FCM100 5MF-600T01
C10
10p_50V_NPO_04
.
L6 FCM100 5MF-600T01
C8
10p_50V_NPO_04
.
L5 FCM100 5MF-600T01
C11
10p_50V_NPO_04
C6
20p_50V_NPO_04C920p_50V_NPO_04C420p_50V_NPO_04
R721 0_04
C5
10p_50V_N PO_04
R2
150_1%_04
C12
10p_50V_N PO_04
R722 0_04
R1
150_1%_04
DAC_B23
DAC_G23
R3
150_1%_04
DAC_R23
D04 R545¤W¥ó
R335 499_1% _04
http://hobi-elektronika.net
DVI
Sheet 17 of 61
B.Schematic Diagrams
DVI
B - 18 DVI
Display Port
DP_B123
DP_B#123
DP_B#223 DP_B223
DP_B323
DP_B#323
D03 modify
D_DP_B#2 D_DP_B2
R734 0_04 R735 0_04
LP14
*DVI2012F2SF-900T05_08
142
3
C162 0.1u_10V_X7R_04 C173 0.1u_10V_X7R_04
D_DP_B#3 D_DP_B3
D_DP_B#1 D_DP_B1
5VS 14,15, 17,19,20,23,26,27,30,31,33,34,36,37,41,45,46,48
3.3VS 2,4,10,11,12,13,14,15,16,17,19,20,21,22,23,24,25,26,27,29,30,31,33, 34,35,36,37,38,41,45,48
dGPU DISPLAY PORT
3.3VS_FUSE
R737 100K_1%_04
C23 0.1u_10V_X7R_04
3.3VS
DP_AUX#_R
R736 100K_1%_04
DP_B_AUX#23
DP_B_AUX23
DP_D_AUX
DP_D_AUX#
DP_AUX_R
G_DP_C EC
DP_AUX#_R
D_DP_B#0 D_DP_B0
DP_DHPD_R
G_DP_MOD E
C852
*220p_50V_NPO_04
D04 C852¤£¤W, R740¤W0¼Ú©i, L18§ï¬°R774¤W0¼Ú©i
3.3VS
C851 10u_6.3V_X5R_08
3.3VS_FUSE
C850 *10u_6.3V_X5R_08
R345 0.2_06 R272 0.2_06 R355 0.2_06
D31 BAV99N3
A
C
AC
R129 1M_04
R388 0.2_06
For Safety LPS.
D_DP_B0
D_DP_B#0
12
20
13
15
10
8
4
3
16
2
6
14
18
1
5
7
9
11
19
17
3V11211-SBAHH-8H
J_DP2
1
LANE_0P
2
GND
3
LANE_0N
4
PIN_TEXT = LANE_1P5GND
6
LANE_1N
7
LANE_2P
8
GND
9
LANE_2N
10
LANE_3P
11
GND
12
LANE_3N
13
MODE
14
CEC
15
AUXP
16
GND
17
AUXN
18
HPD
19
PWR_RET
20
PWR
GND4
SHIELD6
GND3
SHIELD5
GND2
SHIELD2
GND1
SHIELD1
D05 LP11~14¤£¤W¥ó, R719,R720,R723,R724,R727,R728,R734,R735¤W¥ó(0_04)
R741 *100K_04
3.3VS_FUSE
3.3VS
3.3VS_FUSE
add R742, R743
D_DP_B#2 D_DP_B2
D03 modify Y5V -> X7R
DP_B#023 DP_B023
D_DP_B#3 D_DP_B3
DP_B_HPD23
R728 0_04
R727 0_04
PLEASE CLOSE TO CONNEC TOR
C132 0.1u_10V_X7R_04
C131 0.1u_10V_X7R_04
LP11
*DVI2012F2SF-900T05_08
142
3
LP12
*DVI2012F2SF-900T05_08
142
3
C140 0.1u_10V_X7R_04
C148 0.1u_10V_X7R_04
LP13
*DVI2012F2SF-900T05_08
142
3
C160 0.1u_10V_X7R_04
C155 0.1u_10V_X7R_04
R719 0_04 R720 0_04
Close to Display PORT
R724 0_04
R723 0_04
D04 DEL R743, R742, Q7, Q8, R738, R739, Q11
R740 0_04
DP_AUX_R
inductor for EMI
D_DP_B1
D_DP_B#1
C149 0.1u_10V_X7R_04
R744 0_04
bug 49
C
A
A
D30 BAT54CW(lision)
1
2
3
http://hobi-elektronika.net
Schematic Diagrams
B.Schematic Diagrams
Sheet 18 of 61
Display Port
Display Port B - 19
Schematic Diagrams
HDMI_SDA23
3.3VS
TMDS_DATA2#-R
TMDS_DATA2-R
ASQ1
APD
CEXT
C254
0.1u_1 6V_Y5V_ 04
HDMI_CCLKN23
HDMI_CCLKP23
HDMI_HPD23
EMI1
HDMI_C2P23
HDMI_C2N23
HDMI_C1P23
HDMI_C0N23
HDMI_C1N23
HDMI_C0P23
C424 2.2u_6.3V_X5R_04
C30 0.1u_10V_X7R_ 04 C31 0.1u_10V_X7R_ 04
C32 0.1u_10V_X7R_ 04
C28 0.1u_10V_X7R_ 04
R232 499_1%_04
C33 0.1u_10V_X7R_ 04
C26 0.1u_10V_X7R_ 04
R613 * 4.7K_04
C29 0.1u_10V_X7R_ 04
C27 0.1u_10V_X7R_ 04
APD
3.3VS
TMDS_DATA1-R
EMI1
C250
0.1u_1 6V_Y5V_ 04
TMDS_DATA1#-R TMDS_DATA0-R
TMDS_DATA0#-R
C279
0.1u_1 6V_Y5V_ 04
EMI0
R251 *100K_04
Parade PS8 171
PEQ
PIO
C276
*0.1u_16V_Y5V_04
REXT
DCC_EN#
PEQ
DDCBUF
HDMI_HPD-C
PIO
DCC_EN#
OE#
HDMI_SDA-C
HDMI_SCL-C
TMDS_CLOCK-R TMDS_CLOC K#-R
R274 *4.7K_04
R261 *4.7K_04
R455 *4.7K_04
R447 * 0_04
R484 *4.7K_04
R513 4. 7K_04
C252
0.1u_16V_Y5V_04
3.3VS
3.3VS
D05 HDMI conn´« ®Æ6-21-14K40-01 9
5VS
R14 1_04
3.3VS R316 *4.7K_04
D17 BAV99N3
A
C
AC
D04 (1)R513, R448 ¤W4.7K (2)R485 §ï±µ¨ìDDCBUF (3)PIN1ª½±µµu¸ô
R428 *4.7K_04
D05 For TI1442
R590 *4.7K_04
D05 L10~13¤£¤W¥ó, R502,R508,R517,R518,R401,R403,R411,R437¤W¥ó(0_04)
HDMI_SCL-C
HDMI_SDA-C
HDMI_HPD-C
R485 *4.7K_04
R476 *4.7K_04
R599 *4.7K_04
J_HDMI1
116G-1A001-21B
SHIELD2
2
TMDS DATA1+
4
TMDS DATA1-
6
SHIELD0
8
TMDS CLOC K+
10
TMDS CLOC K-
12
RESERVED
14
SDA
16
+5V
18
TMDS DA TA2+
1
TMDS DATA2-
3
SHIELD1
5
TMDS DA TA0+
7
TMDS DATA0-
9
CLK SHIELD
11
CEC
13
SCL
15
DDC/CEC GND
17
HOT PLUG DETECT
19
GND
GND1
GND
GND2
GND
GND3
GND
GND4
R448 4. 7K_04
D5
RB551V-30S2
A C
D05 (1)Add R218(*2.2K_04), R316(*4.7K_04), R613(*4.7K_04), R614(*0_04) (2)C424 2.2u_6.3V_Y5V_06 -> 2.2u_6.3V_X5R_04
HDMI CONNECTOR
5VS_HDMI
R303 4.7K_04
D04 R18, R43 change to 1.5K
R321 *4.7K_04
R614 * 0_04
3.3VS 2,4,10 ,11,12, 13,14, 15,16, 17,18, 20,21, 22,23, 24,25, 26,27, 29,30, 31,33, 34,35, 36,37, 38,41, 45,48 5VS 14,15, 17,20 ,23,26 ,27,30, 31,33, 34,36 ,37,41, 45,46, 48
R537 *4.7K_04
R18
1.5K_04
PIN GND1~4=GND
PRE
R43
1.5K_04
D19 BAV99N3
A
C
AC
R459 *4.7K_04
R218 *2.2K_04
TMDS_DATA1TMDS_DATA1-R
R411 0_ 04
TMDS _CL OCK -R
R437 0_ 04
R508 0_04
R502 0_04
R517 0_04
R518 0_04
L13 *WC M2012F2S-161T03
1
4
2
3
L10 *WC M2012F2S-161T03
1
4
2
3
TMDS_DATA0-R
TMDS_CLOC K
TMDS_DATA2#- R
TMDS_DATA0#- R
5VS_HDMI
TMDS_DATA2#
HDMI_CEC
TMDS_DATA0#
HDMI_HPD-C
HDMI_SCL-C
TMDS_DATA0
HDMI_SDA-C
R7*499_1%_04
R9*499_1%_04
R10*499_1%_04
TMDS_CLOC K#
R8*499_1%_04
TMDS_DATA1#
C15 22u_6.3V _X5R_08
R11*499_1%_ 04
R12*499_1%_ 04
R5* 499_1%_04
R6*4 99_1%_04
HDMI_C_PD
TMDS_CLOC K#-R
5VS
Q2 *MTN7002ZHS3
G
DS
C14 22u_6.3 V_X5R_08
R401 0_ 04
L11 *WCM20 12F2S-1 61T03
1 4
2 3
L12 *WCM20 12F2S-1 61T03
1 4
2 3
R403 0_ 04
TMDS _DA TA2 TMDS_DATA2-R
TMDS_DATA1#-R
R589 *4.7K_04
D18 BAV99N3
A
C
AC
U24
PS8171
IN_D1+
39
IN_D1-
38
IN_D2+
42
IN_D2-
41
IN_D3+
45
IN_D3-
44
IN_D4+
48
IN_D4-
47
SCL
9
SDA
8
HPD/HPDX
7
OE#
25
DCC_EN#
32
CEXT/RT_EN#
10
PEQ/P C0
3
PIO/ PC1
4
REXT
6
EMI0/GND[6]
27
PRE/ QE_2
35
DDCBUF/OE_1
34
OUT_D1+
22
OUT_D1-
23
OUT_D2+
19
OUT_D2-
20
OUT_D3+
16
OUT_D3-
17
OUT_D4+
13
OUT_D4-
14
SCL_SINK
28
SDA_S INK
29
HPD_SINK
30
VCC[1]
2
APD/ VCC [2]
11
VCC[3]
15
VCC[4]
21
VCC[5]
26
EMI1/VCC[6]
33
VCC[7]
40
VCC[8]
46
ASQ0/ GND[ 1]
1
GND[2]
5
ASQ1/ GND[ 3]
12
GND[4]
18
GND[5]
24
GND[7]
31
GND[8]
36
GND[9]
37
GND[ 10]
43
GND
49
PIN 49=GND
3.3VS
C243
0.1u_16V_Y5V_04
HDMI_SCL23
EMI0
Sheet 19 of 61
B.Schematic Diagrams
HDMI
HDMI
http://hobi-elektronika.net
B - 20 HDMI
PCH 1/9 - RTC, HDA, SATA
HDA_RST#14,33
Q36
MTN7002Z HS3
G
DS
D11 R B751V-40(lis ion)
A C
R421
*10K_04
P170EM
3.3VS
R141 10K_04
3.3VS
INTVRMEN- Integrated SUS
1.05V VRM Enable High - Enable Internal VRs Low - Enable External VRs
SATA_RXN2 37
SATA_TXP2 37
SATA_TXN2 37
SATA_RXP2 37
5V14,27,29,30,33,39,41,42, 43,44,48
1.05VS
1.05VS7,21, 22,26,27 ,31,42, 44
SPI_CS1#
Zo= 50£[¡Ó15%
D05 ¬°½Õ¾ãlayout¨« ½u, ±Nport0 & 1¤¬´«
SPI_CS0#
HDA_SDIN033
D03 modify °Ñ¦Ò¦@¥Î½u¸ô, -קïNET¦WºÙ
RTC CLEAR
JOPEN2 *OPEN_10mil-1MM
12
R525 1K_04
SATA HDD
3.3V
SATARXP3 SATATXN3 SATATXP3
SATARXN3
R522 1K_04
SATA3COMP
P150EM
eSATA
HSPI_CE#35
R204 0_04
HSPI_MSI35
R240 *0_04
SPI_SI
R245 0_04
SPI_SCLK
R205 0_04
SPI_SO
HSPI_SCLK35
HSPI_MSO35
R238 0_04
SPI_CS1#
SPI_CS0#
HDA_BITCLK14,33
PantherPoint - M (HDA,JTAG,SPI,SATA)
5VS14,15, 17,19,23, 26,27, 30,31,33, 34,36, 37,41,45, 46,48
BBS_BIT0
SSPI_CS0#
HDA_SYNC_R
3.3VS
bug 66
RBIAS_SATA3
mSATATXN4 37 mSATATXP4 37
mSATARXN4 37 mSATARXP4 37
SSPI_SI
D05 C322, C505, C523 0603->0402
SATA_RXN1 37
SATA_TXP1 37
SATA_TXN1 37
SATA_RXP1 37
Board ID
NC2 SHORT
BIOS ROM
SPI_W P#
SSPI_SI
SSPI_SC LK
SPI_VD D
SSPI_C S0#
16Mbit
SSPI_SO
SPI_H OLD#
R203
4.7K_04
SPI_* = 1.5"~6.5"
U25
MX25L1606E M2I-12G
CE#
1
SO
2
WP#
3
VSS
4
SI
5
SCK
6
HOLD#
7
VDD
8
R678 *10K_04
C295
0.1u_10V_X5R_04
R233 1K_04
3.3VS
20mils
RTC CLEAR
20mils
10mils
SSPI_SO
°Ñ¦Ò¦@¥Î½u¸ô, -קïNET¦WºÙ
D03 modify
D05 C620 1u_10V_Y5V_06 ->1u_6.3V_X5R_04
SATA_LED# 31,37
PCH_INTVRMEN
RTC_X1
SRTC_R TC#
SATARXP0
SATARXN0
PCH_JTAG_TDI
PCH_JTAG_TMS
5VS
SATA_TXN0
SATA_RXP0
SATA_RXN0
SATATXP0
SATATXN0
RTC_X2
HDA_ SPKR
SM_INTRUDER#
C623 0.01u_16V_X7R_04
SATA_TXP0
C625 0.01u_16V_X7R_04 C626 0.01u_16V_X7R_04
SPI_SI
C624 0.01u_16V_X7R_04
SSPI_SCLK
SATATXN3 29 SATATXP3 29
SATARXN3 29 SATARXP3 29
SPI_SCLK
SATA ODD
X3
QTFM 28-32768K125P20R
14
3 2
R176 change to 1.5 M, C261,C244 cha nge to 10p
D03 modify
BBS_BIT0 - BIOS BOOT STRAP BIT 0
R422 *10K_04
SATA_LED#
R149 *1K_04
J_CBAT3
85204-0200N
1 2
R161 10K_04
C261
10p_50V_N PO_04
C322 1u_6.3V_X5R_04
C523 1u_6.3V_X5R_04
R239 1K_04
R408 1M_04
R383 49. 9_1%_04
C244
10p_50V_N PO_04
R169 330K_04
R386 37. 4_1%_04
R137 7 50_1%_04
SATAICO MP
RTC_VBAT_1
RTCIHDA
SATA
LPC
SPI
JTAG
SATA 6G
U19A
CPT_ PPT_ Rev _0 p5
RTCX1
A20
RTCX2
C20
INTVRMEN
C17
INTRUDER#
K22
HDA_BCLK
N34
HDA_SYNC
L34
HDA_RST#
K34
HDA_SDIN0
E34
HDA_SDIN1
G34
HDA_SDIN2
C34
HDA_SDO
A36
SATALED#
P3
FWH0 / LAD0
C38
FWH1 / LAD1
A38
FWH2 / LAD2
B37
FWH3 / LAD3
C37
LDRQ1# / GPI O23
K36
FWH4 / LFRAME#
D36
LDRQ0#
E36
RTCRST#
D20
HDA_SDIN3
A34
HDA_DOCK_EN# / GPIO33
C36
HDA_DOCK_RST# / GPIO13
N32
SRTCRST#
G22
SATA0RXN
AM3
SATA0RXP
AM1
SATA0TXN
AP7
SATA0TXP
AP5
SATA1RXN
AM10
SATA1RXP
AM8
SATA1TXN
AP11
SATA1TXP
AP10
SATA2RXN
AD7
SATA2RXP
AD5
SATA2TXN
AH5
SATA2TXP
AH4
SATA3RXN
AB8
SATA3RXP
AB10
SATA3TXN
AF3
SATA3TXP
AF1
SATA4RXN
Y7
SATA4RXP
Y5
SATA4TXN
AD3
SATA4TXP
AD1
SATA5RXN
Y3
SATA5RXP
Y1
SATA5TXN
AB3
SATA5TXP
AB1
SATAICOMPI
Y10
SPI_CLK
T3
SPI_CS0#
Y14
SPI_CS1#
T1
SPI_MOSI
V4
SPI_MISO
U3
SATA0GP / GPIO21
V14
SATA1GP / GPIO19
P1
JTAG_TCK
J3
JTAG_TMS
H7
JTAG_TDI
K5
JTAG_TDO
H1
SERIRQ
V5
SPKR
T10
SATAICO MPO
Y11
SATA3COMPI
AB13
SATA3RCO MPO
AB12
SATA3RBI AS
AH1
R414
20K_1%_04
R389
20K_1%_04
R176
1.5M_04
1.05VS
C505 1u_6.3V_X5R_04
JOPEN1 *OPEN_10mil-1MM
12
R358 10K_04
3.3A_1.5A_HDA_IO
SERIR Q
NO REBOOT STRAP
NO REBOOT STRAP: HDA_SPKR High Enable
3.3VS
HDA_SPKR
R416 *1K_04
RTCVCC
VDD3
R121 0_04
SERIRQ
R138 0_04
R122 0_04 R385 0_04
HDA_SPKR33
LPC_AD3 2,35
LPC_AD2 2,35
LPC_AD1 2,35
LPC_AD0 2,35
HDA_SDIN114
SERIRQ 2,3 5
LPC_FRAME# 2,35
Board ID
RTCVCC22, 27
1.05VS_VTT3,4,6,25, 26,27,44,45,48
3.3VS2,4,10,11,12,13,14,15,16,17,18,19,21,22,23,24,25,26,27,29,30,31,33,34,35,36,37,38,41,45,48
VDD32,30,3 5,37,38, 40,41,47
3.3V3,4,7, 15,21,22,24,25, 26,27,30,31,33,37, 38,41,43,44
3.3A_1.5A_HDA_IO27
PCH_JTAG_TDO
PCH_JTAG_TCK_BUF
PCH_JTAG_TDI
PCH_JTAG_TMS
R125 51_04
NO REBOOT STRAP: HDA_SPK R High Enable
R113 210_1%_06
R338 210_1%_06
R351 210_1%_06
R361 100_1%_04
R145
100_1%_04
3.3V
R359
100_1%_04
D05 Del R671 & net USB30_SMI#
PCH_JTAG_TDO
PCH_JTAG_TCK_BUF
SPI_SO
D04 DEL X4
RTC_RST#
C
A
A
D14
BAT54CW (lision )
1 2
3
Flash Descriptor Security Overide Low = Disabled-(Default) High = Enabled
JOPEN3 *OPEN_10mil-1MM
1 2
R606 1K_04
R602 * 910_04
R603 0_04
ME_W E#35
HDA_SDOUT14,33
3.3A_1.5A _HDA_IO
RTCVCC
HDD_NC3
HDD_NC1 HDD_NC2
HDD_NC0
SATA_TXN0
PIN GND1~2=GND
SATA_RXN0
SATA_TXP0
SATA_RXP0
+
C393 100u_6.3V_B_A
C620 1u_6.3V_X 5R_04
C622
*0.1u_16V_04
3.3VS
HDA_SYNC14,33
J_HDD1
SAT-22SY0B
S1 S2 S3 S4 S5 S6 S7
P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15
5VS
Sheet 20 of 61
PCH 1/9 - RTC,
HDA, SATA
http://hobi-elektronika.net
Schematic Diagrams
B.Schematic Diagrams
PCH 1/9 - RTC, HDA, SATA B - 21
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