CLEVO M520N Schematics

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M520N SCHEMATIC
A A
ICS9LPR310BGLF Clocking
PG4
Thermal sensor
PG 2
CPU FAN
PG 14
Intel
Pentium 4
Yonah / Merom
479 uFC-BGA
PG 2,3
BUSMASTERDEVICE PCI INT IDSEL
GNT#2
TI 7412
SERIRQPREQ2#
INT#A/B/C/D
AD23
PAGE1-BLOCK DIAGRAM PAGE2-Yonah CPU 1/2 PAGE3-Yonah CPU 2/2 PAGE4-CLOCK GENERATOR PAGE5-Calistoga GMCH 1/4 PAGE6-Calistoga GMCH 2/4 PAGE7-Calistoga GMCH 3/4
LVDS
PG 10
B B
USB Port0
USB Port1
USB Port2
Bluetooth
C C
CCD
D-SUB
PG 16
PG 16
PG 20 & 29
PG 20
PG 20
PG 10
TV OUT
PG 10
CRT
PG 10
Calistoga
1466ball m- FCBGA
USB 2.0 PCI-E I/F
Mini Card GOLAN WIRELESS
PG 16
SATA INTERFACE
HDD
D D
IDE INTERFACE
CD-ROM/DVD-ROM
1
PG 14
PG 14
2
MDC
HD-MODEM
PG 27
SATA I/F
IDE I/F
AUDIOCODEC
ALC883
PG 18
FWH I/F
FlashROM
PG 12
3
533/667MHz
Intel
945GM
PG 5,6,7,8
DMI x2 or x4 100MHz
Intel
ICH7-M
652 BGA
PG 11,12,13
IN. K/B
EX. K/B
33MHz, 3.3V PCI 2.2 I/F
33MHz, 3.3V LPC I/F
KBC H8
H8S-2111
TOUCH PAD
4
DDR2 DRAM CHANNEL A
DDR2 DRAM CHANNEL B
PCI-E I/F
TI 7412 Ultra Media
PG 19
5
PG 15
SODIMM0
SODIMM1
Realtek
RTL8111B
PG 9
PG 9
PG 17
CARDBUS
PG 16
IEEE 1394
PG 15
Card reader
PG 15
6
PAGE8-Calistoga GMCH 4/4 PAGE9-DDR2 SO-DIMM PAGE10-LVDS & CRT & TV OUT PAGE11-ICH7-M 1/3 PAGE12-ICH7-M 2/3 PAGE13-ICH7-M 3/3 PAGE14-HDD & CDROM & FAN & ROM PAGE15-TI 7412 PAGE16-CARDBUS & MINCARD & USB PAGE17-PCIE GLAN RTL8111B PAGE18-AUDIO CODEC ALC883 PAGE19-H8 2111 PAGE20-BD CON & LED & CCD & BT PAGE21-+VCORE PAGE22-+1.5V,+1.05V PAGE23-Memory power +1.8V,+0.9V PAGE24-SYSTEM POWER 1 PAGE25-ACIN & CHARGER PAGE26-RJ11 & TV OUT & MDC BOARD PAGE27-SWITCH & LED BOARD PAGE28-USB & PHONE JACK BOARD PAGE29-CLICK BOARD
2006-03-15
藍 天 電 腦 CLEVO CO.
Title
Size Document Number Rev Custom
Date: Sheet of
BLOCK DIAGRAM
7
71-M52N0-D03
1 29Friday, May 19, 2006
8
1.0
PDF created with pdfFactory Pro trial version www.pdffactory.com
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R256 2K_1%
AD26
E22 F24 E26 H22 F23 G25 E25 E23 K24 G24 J24 J23 H26 F26 K22 H25 H23 G22 J26
N22 K25 P26 R23 L25 L22 L23 M23 P25 P22 P23 T24 R24 L26 T25 N24 M24 N25 M26
C26 D25 B22
B23 C21
JSKT1B
D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10 D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#
D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#
TEST1 TEST2 BSEL[0]
BSEL[1] BSEL[2]
GTLREF
1-1674770-2
6
DATA GRP 0 DATA GRP 1
MISC
D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]#
DATA GRP 2
D[42]# D[43]# D[44]# D[45]# D[46]#
D[47]# DSTBN[2]# DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
DATA GRP 3
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]# DSTBN[3]# DSTBP[3]#
DINV[3]# COMP[0]
COMP[1] COMP[2] COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
1.05VS
3VS
H_D#33H_D#1
AB24
H_D#34
V24
H_D#35
V26
H_D#36
W25 U23
H_D#38
U25
H_D#39
U22
H_D#40
AB25
H_D#41
W22
H_D#42
Y23
H_D#43
AA26
H_D#44
Y26
H_D#45
Y22
H_D#46
AC26
H_D#47
AA24 W24 Y25 V23
H_D#48
AC22
H_D#49
AC23
H_D#50
AB22
H_D#51
AA21
H_D#52
AB21
H_D#53
AC25
H_D#54
AD20
H_D#55
AE22
H_D#56
AF23
H_D#57
AD24
H_D#58
AE21
H_D#59
AD21
H_D#60
AE25
H_D#61
AF25
H_D#62
AF22
H_D#63
AF26 AD23 AE24 AC20
HCOMP0
R26
HCOMP1
U26
HCOMP2
U1
HCOMP3
V1 E5
B5 D24 D6 D7 AE6
PSI#
If PROCHOT# is routed between CPU, IMVP and MCH, pull-up resistor has to be 75 ohm ± 5%
R253 56_04 R32 54.9_1% R18 68
R30 39 R27 150_1%_04
R34 27 R31 680
R242 150_1%_04
Layout Note: COMP0, COMP2: 0.5" Max, Zo=27.4 Ohms COMP1, COMP3: 0.5" Max, Zo=55 Ohms Best estimate is 18 mils wide trace for outer layers and 14 mils wide trace if on internal layers.
HCOMP0 HCOMP1 HCOMP2 HCOMP3
藍 天 電 腦 CLEVO CO.
Title
Size Document Number Rev Custom
Date: Sheet of
7
H_D#32
AA23
H_D#[63:0] [5]
H_DSTBN#2 [5] H_DSTBP#2 [5] H_DINV#2 [5]
H_D#[63:0] [5]
H_DSTBN#3 [5] H_DSTBP#3 [5] H_DINV#3 [5]
H_DPRSTP# [11,21] H_DPSLP# [11] H_DPWR# [5] CPUPWRGD [11] H_CPUSLP# [5,11] PSI# [21]
H_IERR# H_PREQ# H_PROCHOT#
H_TMS H_TDI
H_TCK H_TRST#
ITP_DBRST#
R255 27.4_1%_04 R257 54.9_1%_04 R24 27.4_1%_04 R28 54.9_1%_04
CPU 1/2
71-M52N0-D03
Layout Note:
Within 2.0" of the CPU
2 29Friday, May 19, 2006
8
1.0
H_A#[31:3][5]
A A
H_ADSTB#0[5] H_REQ#[4:0][5]
H_A#[31:3][5]
B B
C C
D D
Layout Note: Route H_THERMDA and H_THERMDC on same layer. 10 mil trace on 10 mil spacing.
H_ADSTB#1[5]
H_A20M#[11]
H_FERR#[11]
H_IGNNE#[11]
H_STPCLK#[11]
H_INTR[11]
H_NMI[11]
H_SMI#[11] CPUCLK# [4]
VDD3
THERM_RST#[19]
1
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_TRST# H_A#30 H_A#31
Q2
NDS352AP
G
R3 100K_04
DS
Q1
G
2N7002W
JSKT1A
J4
A[3]#
L4
A[4]#
M3
A[5]#
K5
A[6]#
M1
A[7]#
N2
A[8]#
J1
A[9]#
N3
A[10]#
P5
A[11]#
P2
A[12]#
L1
A[13]#
P4
A[14]#
P1
A[15]#
R1
A[16]#
L2
ADSTB[0]#
K3
REQ[0]#
H2
REQ[1]#
K2
REQ[2]#
J3
REQ[3]#
L5
REQ[4]#
Y2
A[17]#
U5
A[18]#
R3
A[19]#
W6
A[20]#
U4
A[21]#
Y5
A[22]#
U2
A[23]#
R4
A[24]#
T5
A[25]#
T3
A[26]#
W3
A[27]#
W5
A[28]#
Y4
A[29]#
W2
A[30]#
Y1
A[31]#
V4
ADSTB[1]#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
AA1
RSVD[01]#
AA4
RSVD[02]#
AB2
RSVD[03]#
AA3
RSVD[04]#
M4
RSVD[05]#
N5
RSVD[06]#
T2
RSVD[07]#
V3
RSVD[08]#
B2
RSVD[09]#
C3
RSVD[10]#
B25
RSVD[11]#
1-1674770-2
5/16
R10 0_1%_04
DS
R4
100K_04
H_THERMDC
C328 2200P
Near to ADM1032
ADDR GROUP 0
10 MILE 10 MILE
2
CONTROL
XDP/ITP SIGNALSTHERMH CLK
THERMTRIP#
RESERVED
THM_VDD
C5
1U_04
H1
ADS#
E2
BNR#
G5
BPRI#
H5
DEFER#
F21
DRDY#
E1
DBSY#
F1
BR0#
IERR#
INIT#
LOCK#
RESET#
RS[0]# RS[1]# RS[2]#
TRDY#
HITM#
BPM[0]# BPM[1]# BPM[2]# BPM[3]#
PRDY# PREQ#
TRST#
DBR#
PROCHOT THERMDA THERMDC
BCLK[0] BCLK[1]
RSVD[12]#
RSVD[13]# RSVD[14]# RSVD[15]# RSVD[16]# RSVD[17]# RSVD[18]# RSVD[19]# RSVD[20]#
20 MILE
1 2 3
R8 0_04(R) R7 10K_04
H_IERR#
D20 B3
H4 B1
F3 F4 G3 G2
G6
HIT#
E4
H_BPM0#
AD4
H_BPM1#
AD3
H_BPM2#
AD1
H_BPM3#
AC4
H_PRDY#
AC2
H_PREQ#
AC1
H_TCK
AC5
TCK
H_TDI
AA6
TDI
H_TDO
AB3
TDO
H_TMS
AB5
TMS
AB6
ITP_DBRST#
C20
H_PROCHOT#
D21
H_THERMDA
A24
H_THERMDC
A25 C7
A22 A21
T22
D2 F6 D3 C1 AF1 D22 C23 C24
U1
VDD
SDATA
D+
ALERT#
D-
ADT1032ARM
1.05VS [3,4,5,6,8,11,13,22] VDD3 [10,11,14,19,20,23,24,25] 3VS [4,5,6,9,10,11,12,13,14,15,16,18,20,21,24]
SCLK
GNDTHERM#
PM_THRMTRIP# [5,11] PM_THRMTRIP# [5,11]
VDD3
R11
20K_04
8 7 6 54
PM_THRM#
THM_VDD
H_ADS# [5] H_BNR# [5] H_BPRI# [5]
H_DEFER# [5] H_DRDY# [5] H_DBSY# [5]
H_BR0# [5]
H_INIT# [11] H_LOCK# [5] H_CPURST# [5]
H_RS#0 [5] H_RS#1 [5] H_RS#2 [5] H_TRDY# [5]
H_HIT# [5] H_HITM# [5]
CPUCLK [4]
VDD3
R5
R6
4.7K_04
D2 SCS751
3
4.7K_04
AC
SMC_THERM SMD_THERMH_THERMDA PM_THRM#
Layout Note:
0.5" max, Zo= 55 Ohms
R254 1K_1%
1.05VS
SMC_THERM [19] SMD_THERM [19] PM_THRM# [12]
THERM_ALERT# [19]
4
C349
1U_X7R
5
H_D#[63:0][5]
H_DSTBN#0[5] H_DSTBP#0[5]
H_DINV#0[5]
H_D#[63:0][5]
H_DSTBN#1[5] H_DSTBP#1[5]
H_DINV#1[5]
CPU_BSEL0[4] CPU_BSEL1[4] CPU_BSEL2[4]
C347 .1U_X7R_04
H_D#0 H_D#2
H_D#3 H_D#4 H_D#5 H_D#37 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15
H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31
R243 1K_04(R) R244 51.1_1%_04
CPU_GTLREF
C348 .01U_04
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JSKT1D
A4
VSS[001]
A8 A11 A14 A16 A19 A23 A26
B6
B8 B11 B13 B16 B19 B21 B24
C5
C8 C11 C14 C16 C19
C2 C22 C25
D1
D4
D8 D11 D13 D16 D19 D23 D26
E3
E6
E8 E11 E14 E16 E19 E21 E24
F5
F8 F11 F13 F16 F19
F2 F22 F25
G4
G1 G23 G26
H3
H6 H21 H24
J2
J5 J22 J25
K1
K4 K23 K26
L3
L6 L21 L24
M2
M5 M22 M25
N1
N4 N23 N26
P3
VSS[002] VSS[003] VSS[004] VSS[005] VSS[006] VSS[007] VSS[008] VSS[009] VSS[010] VSS[011] VSS[012] VSS[013] VSS[014] VSS[015] VSS[016] VSS[017] VSS[018] VSS[019] VSS[020] VSS[021] VSS[022] VSS[023] VSS[024] VSS[025] VSS[026] VSS[027] VSS[028] VSS[029] VSS[030] VSS[031] VSS[032] VSS[033] VSS[034] VSS[035] VSS[036] VSS[037] VSS[038] VSS[039] VSS[040] VSS[041] VSS[042] VSS[043] VSS[044] VSS[045] VSS[046] VSS[047] VSS[048] VSS[049] VSS[050] VSS[051] VSS[052] VSS[053] VSS[054] VSS[055] VSS[056] VSS[057] VSS[058] VSS[059] VSS[060] VSS[061] VSS[062] VSS[063] VSS[064] VSS[065] VSS[066] VSS[067] VSS[068] VSS[069] VSS[070] VSS[071] VSS[072] VSS[073] VSS[074] VSS[075] VSS[076] VSS[077] VSS[078] VSS[079] VSS[080] VSS[081]
1-1674770-2
VCC[68] VCC[69] VCC[70] VCC[71] VCC[72] VCC[73] VCC[74] VCC[75] VCC[76] VCC[77] VCC[78] VCC[79] VCC[80] VCC[81] VCC[82] VCC[83] VCC[84] VCC[85] VCC[86] VCC[87] VCC[88] VCC[89] VCC[90] VCC[91] VCC[92] VCC[93] VCC[94] VCC[95] VCC[96] VCC[97] VCC[98] VCC[99]
VCC[100] VCCP[01]
VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]
VCCA
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20
V6 G21 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21
B26
AD6 AF5 AE5 AF4 AE3 AF2 AE2
AF7 AE7
VCORE
H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6
VCORE
2.5A
H_VID[6:0]
VCCSENSE VSSSENSE
R262 100_1%
1.05VS
1.5VS
130mA
C330
C329
.01U_04
10U/10V_08
H_VID[6:0] [21]
VCCSENSE [21] VSSSENSE [21]
R261
Layout note:
100_1%
Route VCCSENSE and VSSSENSE traces at 27.4Ohm with 50 mil spacing. Place PU and PD within 1 inch of CPU.
Layout note:
Near pin B26
VCORE
AA10 AA12 AA13 AA15 AA17 AA18 AA20
AC10 AB10 AB12 AB14 AB15 AB17 AB18
A7
A9 A10 A12 A13 A15 A17 A18 A20
B7
B9 B10 B12 B14 B15 B17 B18 B20
C9 C10 C12 C13 C15 C17 C18
D9 D10 D12 D14 D15 D17 D18
E7
E9 E10 E12 E13 E15 E17 E18 E20
F7
F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9
AB9
JSKT1C
VCC[001] VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009] VCC[010] VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018] VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064] VCC[065] VCC[066] VCC[067]
1-1674770-2
VCCSENSE VSSSENSE
A A
B B
C C
VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162]
P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 AF3 AF6 AF8 AF11 AF13 AF16 AF19 AF21 AF24
VCORE
VCORE
VCORE
VCORE
VCORE
1.05VS
1.05VS
C352 10U/10V_08
C368 22U_08
C16 1U_X7R
C340 1U_X7R
C26 .1U_X7R_04
C339 10U/10V_08
C367 22U_08
C25 1U_X7R
C341 1U_X7R
C33 .1U_X7R_04
C353 10U/10V_08
C366 22U_08
C17 1U_X7R
C350 1U_X7R
C27 .1U_X7R_04
C356 10U/10V_08
C365 22U_08
C28 1U_X7R
C343 1U_X7R
C355 10U/10V_08
C364 22U_08
C19 1U_X7R
C344 1U_X7R
C24 .1U_X7R_04
PLACE NEAR CPU
C335
+
220U/4V_V
C345 .1U_X7R_04
C333 .1U_X7R_04
C346 .1U_X7R_04
C334 .1U_X7R_04
C336 .1U_X7R_04
C20 .1U_X7R_04
C15 .1U_X7R_04
+VCCP = 1.05V (0.997V~1.102V)
C342 10U/10V_08
C363 22U_08
C18 1U_X7R
C351 1U_X7R
C32 .1U_X7R_04
C21 .1U_X7R_04
C23 .1U_X7R_04
C13 10U/10V_08
C362 22U_08
C31 .1U_X7R_04
C29 .1U_X7R_04
C10 10U/10V_08
C361 22U_08
C11 10U/10V_08
C360 22U_08
C12 10U/10V_08
C354 22U_08
D D
1
2
3
4
5
6
1.05VS [2,4,5,6,8,11,13,22] VCORE [21]
1.5VS [6,11,13,16,24]
藍 天 電 腦 CLEVO CO.
Title
Size Document Number Rev Custom
Date: Sheet of
7
CPU 2/2
71-M52N0-D03
3 29Friday, May 19, 2006
8
1.0
PDF created with pdfFactory Pro trial version www.pdffactory.com
1
L19 HCB1608KF-121T25
3VS
C210
C152
10U/10V_08
A A
B B
C C
3VS
CLK48_CARDBUS[15]
CLK48_USB[12]
CLK14.3M_I/O[20]
CLK14.3M_ICH[12]
PM_STPCPU#[12] PM_STPPCI#[12]
PCLK_FWH[14]
PCLK_SI/O[20]
KBC_PCLK[19]
PCLK_CARDBUS[15]
PCLK_ICH[12]
SMB_ICHCLK[9,12,16]
SMB_ICHDATA[9,12,16]
CLKEN#[12,21]
1U_06
L18 HCB1608KF-121T25
C209
10U/10V_08
CLK_BSEL0
CLK14.3M_I/O
CLK_BSEL1 CLK_BSEL2
PCLK_FWH PCLK3
PCLK_SI/O PCLK2_2X
KBC_PCLK PCLK1_2X
PCLK_CARDBUS PCLK0_2X
3VS
C448 22P_04
C447 22P_04
C192
C193
1U_06
.1U_X7R_04
.1U_X7R_04
R310 2.2K_04 R322 33_04 R323 33_04
R131 33_04 R317 2.2K_04 R137 2.2K_04 R329 33_04
R319 33_04
R321 33_04
R320 33_04
R330 33_04
R129 10K_04(R) R308 33_04
R128 0_04
12
X2
14.318MHz
C191
1U_06
2
C153
.1U_X7R_04
R318
1M(R)
C207
C208
.1U_X7R_04
FS_A
FS_B FS_C
PCLK0PCLK_ICH
11
VDD_48
45
VDDA
12
FSLA/USB_48MHz_2X
60
REF0/FSLB
61
REF1/FSLC
62
CPU_STOP#
63
PCI/PCIEX_STOP#
5
PCICLK3
4
PCICLK2_2X
3
PCICLK1_2X
64
PCICLK0_2X
9
*SELDOT/PCICLK_F1
8
PCICLK_F0
54
SCLK
55
SDATA
10
VTT_PWRGD#/PD
58
X1
57
X2
42
28
VDDPCIEX
VREF
2
47
R121
4.3K_1%_04
VDD PCIEX
GND
GND
6
3
7
VDD_PCI1
GND
GND
132137
50
129
VDD_PCI0GND
GND
46
56
VDDREF
VDDCPU
LCDCLK/PCIEX0
LCDCLK#/PCIEX0#
27FIX/DOT96
27SS/DOT96#
GND
GNDA
GND
ICS9LPR310BGLF
53
59
4
U16
CPUCLK1
CPUCLK1#
CPUCLK0
CPUCLK0#
PCIEX8
PCIEX8#
PCIEX7
PCIEX7#
PCIEX6
PCIEX6#
PCIEX5
PCIEX5#
PCIEX4
PCIEX4#
SATACLK
SATACLK#
PCIEX3
PCIEX3#
PEREQ4#
PCIEX2
PCIEX2#
PEREQ3#
PCIEX1
PCIEX1#
PEREQ2#
PEREQ1#
PEREQ1#: PCIECLK 0, 6 PEREQ2#: PCIECLK 1, 8 PEREQ3#: PCIECLK 2, 4 PEREQ4#: PCIECLK 3, 5, 7 PEREQ[1..4]# have internal pull up
CPUCLK1
49
CPUCLK1#
48
CPUCLK0
52
CPUCLK0#
51
SRCCLK_8
44
SRCCLK_#8
43
SRCCLK_7
41
SRCCLK_#7
40
SRCCLK_6
39
SRCCLK_#6
38
SRCCLK_5
36
SRCCLK_#5
35
SRCCLK_4
30
SRCCLK_#4
31 26
SRCCLK_#9
27
SRCCLK_3
24
SRCCLK_#3
25 33
SRCCLK_2 CLK_PCIE_GLAN
22
SRCCLK_#2
23 32
SRCCLK_1
19
SRCCLK_#1
20 34
SRCCLK_0
17
SRCCLK#0
18 16
DREF_CLK
14
DREF_CLK#
15
23
4P2R_33_04
1
4
4
4
4
4
R300 10K_04(R)
4
R301 10K_04(R)
4
R299 10K_04(R)
4
R120 10K_04(R)
4
RN31
23
4P2R_33_04
1
RN27
23
4P2R_33_04
1
RN23
23
4P2R_33_04
1
1
4P2R_33_04
23
RN25
1
4P2R_33_04
23
RN29
1
4P2R_33_04
23
RN30
1
4P2R_33_04
23
RN32
1
4P2R_33_04
23
RN24
3VS
3VS
3VS
3VS
5
MCHCLK MCHCLK#
CPUCLK CPUCLK#
CLK_PCIE_MINI CLK_PCIE_MINI#
ICH7PCIE_CLK ICH7PCIE_CLK#
SATACLKSRCCLK_9 SATACLK#
CLK_PCIE_GLAN#
945GMCLK 945GMCLK#
DREFSSCLK DREFSSCLK#
DREFCLK DREFCLK#
6
MCHCLK [5] MCHCLK# [5]
CPUCLK [2] CPUCLK# [2]
CLK_PCIE_MINI [16] CLK_PCIE_MINI# [16]
ICH7PCIE_CLK [11] ICH7PCIE_CLK# [11]
SATACLK [11] SATACLK# [11]
WLAN_CLKREQ# [16] CLK_PCIE_GLAN [17]
CLK_PCIE_GLAN# [17]
945GMCLK [5] 945GMCLK# [5]
MCH_CLKREQ# [5] DREFSSCLK [5]
DREFSSCLK# [5]
DREFCLK [5] DREFCLK# [5]
7
MCHCLK
MCHCLK#
CPUCLK
CPUCLK#
ICH7PCIE_CLK
ICH7PCIE_CLK#
SATACLK
SATACLK#
CLK_PCIE_MINI
CLK_PCIE_MINI#
DREFSSCLK
DREFSSCLK#
DREFCLK
DREFCLK#
CLK_PCIE_GLAN
CLK_PCIE_GLAN#
945GMCLK
945GMCLK# CLK48_CARDBUS CLK48_USB KBC_PCLK PCLK_ICH PCLK_CARDBUS CLK14.3M_ICH PCLK_FWH PCLK_SI/O
8
C172 10P_04(R)
C171 10P_04(R)
C195 10P_04(R)RN28
C194 10P_04(R)
C155 10P_04(R)
C154 10P_04(R)
C149 10P_04(R)
C141 10P_04(R)
C170 10P_04(R)
C156 10P_04(R)
C188 10P_04(R)
C169 10P_04(R)
C190 10P_04(R)
C189 10P_04(R)
C151 10P_04(R)
C150 10P_04(R)
C168 10P_04(R)
C167 10P_04(R) C203 10P_04(R) C204 10P_04(R) C452 10P_04(R) C205 10P_04(R) C212 10P_04(R) C450 10P_04(R) C206 10P_04(R) C451 10P_04(R)
Layout note:
Place terminationclose to
1.05VS1.05VS
R309
1.05VS
R315 1K_04
R313 1K_04
56_04
R127 1K_04
CLK_BSEL1
MCH_BSEL0 [5]
MCH_BSEL1 [5]
4
CPU_BSEL2[2]
R134 0_04
R132 0_04(R)
5
CPU_BSEL0[2]
Host Clock Frequency
100 MHz
D D
166 MHz
1.05VS [2,3,5,6,8,11,13,22] 3VS [2,5,6,9,10,11,12,13,14,15,16,18,20,21,24]
1
FSLC
FSLB
FS_A
BSEL0BSEL1BSEL2
0 0133 MHz 1 1 1
1
10 1
CPU_BSEL1[2]
2
1 0
1200 MHz
R119 0_04
3/8
R130 1K_04
R314 0_04
R316 0_04(R)
3
3/8
R133 1K_04
CLK_BSEL2CLK_BSEL0
R135 1K_04
MCH_BSEL2 [5]
6
CK410M
藍 天 電 腦 CLEVO CO.
Title
Size Document Number Rev Custom
Date: Sheet of
CLOCK GENERATOR
71-M52N0-D03
7
4 29Friday, May 19, 2006
8
1.0
PDF created with pdfFactory Pro trial version www.pdffactory.com
1
H_D#0
F1
H_D#1
J1
H_D#2
H1
H_D#3
J6
H_D#4
H3
H_D#5
K2
H_D#6
G1
H_D#7
A A
B B
C C
PLT_RST#[12,14,20]
D D
CLOSE TO GMCH
Layout Notice: 10 mils wide, 20 mils spacing
HXSCOMP
R267 54.9_1%_04
HYSCOMP
R266 54.9_1%_04 C48
HXRCOMP
R268 24.9_1%_04
HYRCOMP
R265 24.9_1%_04
HXRCOMP HXSCOMP HXSWING
HYRCOMP HYSCOMP HYSWING
MCHCLK[4] MCHCLK#[4]
R124 100_04
1.05VS
1
H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
G2 K9 K1 K7 J8 H4 J3
K11
G4
T10
W11
T3 U7
U9 U11 T11
W9
T1
T8
T4
W7
U5
T9
W6
T5
AB7 AA9
W4 W3
Y3
Y7
W5
Y10
AB8
W2 AA4 AA7 AA2 AA6
AA10
Y8 AA1 AB4 AC9
AB11 AC11
AB3 AC2 AD1 AD9 AC1 AD7 AC6 AB5
AD10
AD4 AC8
E1
E2
E4
Y1
U1
W1
AG2 AG1
NB_RSTIN#
2
H_D#[0..63] [2]
U15A
H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63
H_XRCOMP H_XSCOMP H_XSWING
H_YRCOMP H_YSCOMP H_YSWING
H_CLKIN H_CLKIN#
CALISTOGA
1.05VS 1.05VS
H_ADSTB#_0 H_ADSTB#_1
H_CPURST#
HOST
H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3
H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3
H_SLPCPU#
R40
221_1%_04
HYSWING
R41
.1U_04 R67 2.2K_04(R)
100_1%_04
2
H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8
H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31
H_ADS#
H_VREF_0
H_BNR#
H_BPRI#
H_BREQ#0
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_VREF_1
H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3
H_HIT#
H_HITM#
H_LOCK#
H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4
H_RS#_0 H_RS#_1 H_RS#_2
H_TRDY#
1.8V
H9 C9 E11 G11 F11 G12 F9 H11 J12 G14 D9 J14 H13 J15 F14 D12 A11 C11 A12 A13 E13 G13 F12 B12 B14 C12 A14 C14 D14
E8 B9 C13 J13 C6 F6 C7 B7 A7 C3 J9 H8 K13
J7 W8 U3 AB10
K4 T7 Y5 AC4
K3 T6 AA5 AC5
D3 D4 B3
D8 G8 B8 F8 A8
B4 E6 D6
E3 E7
R57 80.6_1% R56 80.6_1%
R51
221_1%_04
HXSWING
R52
C66 .1U_04
100_1%_04
3
H_A#[3..31] [2]
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
HVREF
HVREF
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
Layout note: MCH_HXSWING and MCH_HYSWING should be 10 mils traces and 20 mils spacing
3VS
H_RS#0 [2] H_RS#1 [2] H_RS#2 [2]
H_CPUSLP# [2,11] H_TRDY# [2]
M_RCOMPN M_RCOMPP
3
H_ADS# [2] H_ADSTB#0 [2] H_ADSTB#1 [2]
H_BNR# [2] H_BPRI# [2] H_BR0# [2] H_CPURST# [2] H_DBSY# [2] H_DEFER# [2] H_DPWR# [2] H_DRDY# [2]
H_DINV#0 [2] H_DINV#1 [2] H_DINV#2 [2] H_DINV#3 [2]
H_DSTBN#0 [2] H_DSTBN#1 [2] H_DSTBN#2 [2] H_DSTBN#3 [2]
H_DSTBP#0 [2] H_DSTBP#1 [2] H_DSTBP#2 [2] H_DSTBP#3 [2]
H_HIT# [2] H_HITM# [2] H_LOCK# [2]
H_REQ#[0..4] [2]
R97 10K_04 R106 10K_04
PM_EXTTS1#[9]
PM_DPRSLPVR[12,21]
1.05VS
R70
100_1%_04
HVREF
C87
R69
.1U_04
200_1%_04
4
PM_EXTTS0# PM_EXTTS1#
R96 0_04(R)
R95 0_04 R107 0_04
MCH_BSEL0[4] MCH_BSEL1[4] MCH_BSEL2[4]
PM_EXTTS1#_R
PM_EXTTS0# PM_EXTTS1#_R
5
R68 0_04 R291 0_04 R290 0_04
MCH_BSEL[2..0] 001 = PSB533 011 = PSB667 Others = Reserved
PM_BMBUST#[12]
PM_EXTTS0#[9]
PM_THRMTRIP#[2,11]
DELAY_PWRGD[12,21]
MCH_ICH_SYNC#[12] MCH_CLKREQ#[4]
CFG[17:3] have internal pullup resistors CFG[20:18] have internal pulldown resistors
DMI Select
[CFG5]
Low = DMI x 2 High = DMI x 4
CPU Strap
[CFG7]
Low = Reserved High = Intel Pentium M
PCIE Graphics Lane
[CFG9]
Low = Lane Reverse Enable High = Normal operation
PSB 4X CLK ENABL
[CFG11]
Low = Reserved High = 8X Enable
FSB Dynamic ODT
[CFG16]
Low = Dynamic ODT Disabled High = Dynamic ODT Enabled
GMCH CORE VCC Select
[CFG18]
Low = 1.05V High = 1.5V
DMI LANE REVERSAL
[CFG19]
Low = Normal High = Lanes Reversed
PCIE backward interpoerability mode
[CFG20]
Low = Only SVDO or PCIE *1 is operational
High = SDVO and PCIE *1 are operating simultaneously via the PEG port
4
(Default)
(Default)
(Default)
(Default)
(Default)
(Default)
(Default)
5
PM_EXTTS0# PM_EXTTS1#_R
DELAY_PWRGD NB_RSTIN#
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20
(Default)
AG11 AF11
AH33 AH34
BA41 BA40 BA39
AY41
AW41
AW1
T32 R32
F3 F7
H7 J19 K30 J29 A41 A35 A34 D28 D27
K16 K18 J18 F18 E15 F15 E18 D19 D16 G16 E16 D15 G15 K15 C15 H16 G18 H15 J25 K27 J26
G28 F25 H26
G6
H28 H27 K28 H32
D1 C41
C1
BA3 BA2 BA1 B41
B2 AY1
A40
A4 A39
A3
6
U15B
RSVD_1 RSVD_2 RSVD_3 RSVD_4 RSVD_5 RSVD_6 RSVD_7 RSVD_8 TV_DCONSEL0 TV_DCONSEL1 RSVD_11 RSVD_12 RSVD_13 RSVD_14 RSVD_15
CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20
PM_BMBUSY# PM_EXTTS#_0 PM_EXTTS#_1 PM_THRMTRIP# PWROK RSTIN#
SDVO_CTRLCLK SDVO_CTRLDATA ICH_SYNC# CLK_REQ0#
NC0 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18
CALISTOGA
CFG5
R65 2.2K_04(R)
CFG7
R294 2.2K_04(R)
CFG9
R64 2.2K_04(R)
CFG11
R283 2.2K_04(R)
CFG16
R76 2.2K_04(R)
CFG18
R296 1K_04(R)
CFG19
R108 1K_04(R)
CFG20
R99 1K_04(R)
CFG12 CFG13
R66 2.2K_04(R)
6
7
AY35
SM_CK_0
AR1
SM_CK_1
AW7
SM_CK_2
AW40
SM_CK_3
AW35
SM_CK#_0
AT1
SM_CK#_1
AY7
SM_CK#_2
AY40
SM_CK#_3
AU20
SM_CKE_0
AT20
SM_CKE_1
BA29
SM_CKE_2
AY29
SM_CKE_3
AW13
SM_CS#_0
AW12
SM_CS#_1
AY21
SM_CS#_2
AW21
SM_CS#_3
SM_OCDCOMP_0 SM_OCDCOMP_1
CFGRSVD
DDR MUXINGCLKDMI
PM
D_REFCLKIN#
D_REFSSCLKIN#
D_REFSSCLKIN
MISC
NC
3VS
3VS
3VS
AL20 AF10
BA13
SM_ODT_0
BA12
SM_ODT_1
AY20
SM_ODT_2
AU21
SM_ODT_3
SM_RCOMP#
SM_RCOMP SM_VREF_0
SM_VREF_1
G_CLKIN#
G_CLKIN
D_REFCLKIN
DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3
DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3
DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3
DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3
Title
Size Document Number Rev Custom
Date: Sheet of
M_RCOMPN
AV9
M_RCOMPP
AT9
M_VREF_MCH
AK1 AK41
1U_X7R
AF33 AG33 A27 A26 C40 D41
AE35 AF39 AG35 AH39
AC35 AE39 AF35 AG39
AE37 AF41 AG37 AH41
AC37 AE41 AF37 AG41
VCCPGD [12,22] 3VS [2,4,6,9,10,11,12,13,14,15,16,18,20,21,24]
2.5VS [6,10,22]
1.8V [8,9,23]
1.05VS [2,3,4,6,8,11,13,22]
C444
C443
.01U_04
DDRCLK_A0
DDRCLK_A0# DDRCLK_A1
DDRCLK_A1# DDRCLK_B0
DDRCLK_B0# DDRCLK_B1
DDRCLK_B1#
R311 1K_1%
1K_1%
藍 天 電 腦 CLEVO CO.
Calistoga GMCH 1/4
71-M52N0-D03
7
DDRCLK_A0 [9] DDRCLK_A1 [9] DDRCLK_B0 [9] DDRCLK_B1 [9]
DDRCLK_A0# [9] DDRCLK_A1# [9] DDRCLK_B0# [9] DDRCLK_B1# [9]
SCKE_A0 [9,10] SCKE_A1 [9,10] SCKE_B0 [9,10] SCKE_B1 [9,10]
SCS_A0# [9,10] SCS_A1# [9,10] SCS_B0# [9,10] SCS_B1# [9,10]
SODT_A0 [9,10] SODT_A1 [9,10] SODT_B0 [9,10] SODT_B1 [9,10]
R312
945GMCLK# [4] 945GMCLK [4] DREFCLK# [4] DREFCLK [4] DREFSSCLK# [4] DREFSSCLK [4]
DMI_TXN0 [11] DMI_TXN1 [11] DMI_TXN2 [11] DMI_TXN3 [11]
DMI_TXP0[11] DMI_TXP1[11] DMI_TXP2[11] DMI_TXP3[11]
DMI_RXN0 [11] DMI_RXN1 [11] DMI_RXN2 [11] DMI_RXN3 [11]
DMI_RXP0 [11] DMI_RXP1 [11] DMI_RXP2 [11] DMI_RXP3 [11]
C158 10P_04 C49 10P_04 C69 10P_04 C196 10P_04
8
1.8V
Layout note: Close to MCH
5/16
5 29Friday, May 19, 2006
8
1.0
PDF created with pdfFactory Pro trial version www.pdffactory.com
1
+1.5VS_AUX
R337 0_08
1.5VS
A A
1.5VS
L48 HCB1608KF-121T25
B B
C C
D D
L16 HCB1608KF-121T25
L41 HCB1608KF-121T25
L7 HCB1608KF-121T25
L15 HCB1608KF-121T25
2.5VS
L49 HCB1608KF-121T25
1.5VS
R87 10
L14HCB1608KF-121T25
5/16
1.5VS
1
.1U_X7R_04
.1U_X7R_04
C424 1U_X7R
C217 330U/3V
D13 SCS551V
C106
C130
10U/10V_08
C138
.1U_X7R_04
.1U_X7R_04
C146
.1U_X7R_04
.1U_X7R_04
C412 1U_X7R
C411 .1U_X7R_04 C174 1U_X7R C175
C370 1U_X7R
C371 .1U_X7R_04 C43 1U_X7R C42
C423 .1U_X7R_04
2.5VS
+1.5VS_PCIE
C446
C445
10U/10V_08
AC
Within 250 mils
10U/10V_08
.1U_X7R_04
.1U_X7R_04
Within 200 mils
2.5VS
1.05VS2.5VS
10U/10V_08
C137
C91
C133,C135,C137,C139 must within 200 miles
+2.5VS_TXLVDS
+
10U/10V_08
L17 HCB1608KF-121T25
C124
.1U_X7R_04
C145
C105
10U/10V_08
C104
C107
.1U_X7R_04
C103
.1U_X7R_04
1.5VS
1.5VS
Within 200 mils
+1.5VS_3GPLL
C177
10U/10V_08
3VS
+2.5VS_CRTDAC
2.5VS
.1U_X7R_04
2
+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL
C425 .1U_X7R_04
Within 200 mils
C173 .1U_X7R_04
Within 200 mils
C176 .1U_X7R_04
C157
.1U_X7R_04
C125
2
AH22
AJ21
AH21
AJ20 AH20 AH19
AH15 AH14
AG14 AF14 AE14
AF13 AE13 AF12 AE12 AD12
AJ41 AB41
AC33
P19 P16
P15
Y14
AH1 AH2
B26
C39
AF1
AF2
A28 B28 C28
C30 B30 A30
A38 B39
Y41 V41 R41 N41
L41
G41 H41
A23 B23 B25
F21 E21 G21
H22
U15H
VCCAUX21 VCCAUX22 VCCAUX23 VCCAUX24 VCCAUX25 VCCAUX26 VCCAUX27 VCCAUX28 VCCAUX29 VCCAUX30 VCCAUX31 VCCAUX32 VCCAUX33 VCCAUX34 VCCAUX35 VCCAUX36 VCCAUX37 VCCAUX38 VCCAUX39 VCCAUX40
VCCD_HMPLL0 VCCD_HMPLL1
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2
VCC_TXLVDS0 VCC_TXLVDS1 VCC_TXLVDS2
VCCA_LVDS VSSA_LVDS
VCC3G0 VCC3G1 VCC3G2 VCC3G3 VCC3G4 VCC3G5 VCC3G6
VCCA_3GBG VSSA_3GBG
VCCA_3GPLL
VCC_HV0 VCC_HV1 VCC_HV2
VCCA_CRTDAC0 VCCA_CRTDAC1 VSSA_CRTDAC
VCCSYNC
CALISTOGA
AF28
AE28
VCCAUX 20
AD29
AC29
AG28
VCCAUX 17
VCCAUX 18
VCCAUX 19
3
AE30
AD30
AC30
AG29
AF29
AE29
VCCAUX11
VCCAUX 12
VCCAUX 13
VCCAUX 14
VCCAUX 15
VCCAUX 16
POWER
3
4
AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AC14
VTT_0
AB14
VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8
VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25 VTT_26 VTT_27 VTT_28 VTT_29 VTT_30 VTT_31 VTT_32 VTT_33 VTT_34 VTT_35 VTT_36 VTT_37 VTT_38 VTT_39 VTT_40 VTT_41 VTT_42 VTT_43 VTT_44 VTT_45 VTT_46 VTT_47 VTT_48 VTT_49 VTT_50 VTT_51 VTT_52 VTT_53 VTT_54 VTT_55 VTT_56 VTT_57 VTT_58 VTT_59 VTT_60 VTT_61 VTT_62 VTT_63 VTT_64 VTT_65 VTT_66 VTT_67 VTT_68 VTT_69 VTT_70 VTT_71 VTT_72 VTT_73 VTT_74 VTT_75 VTT_76
VCCA_TVDACA1 VCCA_TVDACA0
VCCA_TVDACB1 VCCA_TVDACB0
VCCA_TVDACC1 VCCA_TVDACC0
VSSA_TVBG VCCA_TVBG
VCCDQ_TVDAC
VCCD_TVDAC
W14 V14 T14 R14 P14 N14 M14 L14 AD13 AC13 AB13 AA13 Y13 W13 V13 U13 T13 R13 N13 M13 L13 AB12 AA12 Y12 W12 V12 U12 T12 R12 P12 N12 M12 L12 R11 P11 N11 M11 R10 P10 N10 M10 P9 N9 M9 R8 P8 N8 M8 P7 N7 M7 R6 P6 M6 A6 R5 P5 N5 M5 P4 N4 M4 R3 P3 N3 M3 R2 P2 M2 D2 AB1 R1 P1 N1 M1
F19 E19
D20 C20
F20 E20
G20 H20
+1.5VS_QTVDAC
H19 D21
.1U_X7R_04
Within 250 mils
4
C99
1.05VS
C373
C377
10U/10V_08
.1U_X7R_04
.1U_X7R_04
VTTLF_CAP3
VTTLF_CAP2 VTTLF_CAP1
C378
10U/10V_08
10U/10V_08
C376
C90
C375
.1U_X7R_04
.1U_X7R_04
C88
C77
C67
.1U_X7R_04
.1U_X7R_04
C381 .47U
C379
C372
.22U
.47U
+3VS_TVDACA
+3VS_TVDACB
+3VS_TVDACC
+3VS_ATVBG
L13 HCB1608KF-121T25
C142
.1U_X7R_04
.1U_X7R_04
10U/10V_08
.1U_X7R_04
.1U_X7R_04
C78
C374
C89
3/20
C123
C37
+
220U/4V
C47
1U_X7R
C79
.1U_X7R_04
.1U_X7R_04
1.5VS
5
C136
1U_X7R
C68
5
C121 22P_04(R) C122 22P_04(R) C402 22P_04(R)
+3VS_ATVBG
+3VS_TVDACA
5/18
+3VS_TVDACB
+3VS_TVDACC
BLON[10]
ENAVDD[10]
LVDS-LCLKN[10] LVDS-LCLKP[10]
LVDS-L0N[10] LVDS-L1N[10] LVDS-L2N[10]
LVDS-L0P[10] LVDS-L1P[10] LVDS-L2P[10]
TVDAC_A[20] TVDAC_B[20] TVDAC_C[20]
R63 150_1%_04 R75 150_1%_04 R282 150_1%_04 R77 4.99K_04
B[10] G[10] R[10]
VGADDCCLK[10]
VGADDCDATA[10]
HSY[10] VSY[10]
C393
10U_08
C86
10U_08
C98
10U_08
C397
10U_08
R110 10K_04
3VS
R109 10K_04 R98 10K_04
3VS
R295 10K_04 R122 1.5K_04C102
R118 100K_04
R86 150_1%_04 R85 150_1%_04 R289 150_1%_04
R100 39.2_1% R101 39.2_1% R88 255_1%
L45 HCB1608KF-121T25
C101
.1U_X7R_04
L11 HCB1608KF-121T25
C100
.1U_X7R_04
L12 HCB1608KF-121T25
C120
.1U_X7R_04
L46 HCB1608KF-121T25
C401
.1U_X7R_04
Within 250 mils
6
U15C
D32
L_BKLTCTL
J30
L_BKLTEN
H30
L_CLKCTLA
H29
L_CLKCTLB
G26
L_DDC_CLK
G25
L_DDC_DATA
B38
L_IBG
C35
L_VBG
F32
L_VDDEN
C33
L_VREFH
C32
L_VREFL
A33
LA_CLK#
A32
LA_CLK
E27
LB_CLK#
E26
LB_CLK
C37
LA_DATA#_0
B35
LA_DATA#_1
A37
LA_DATA#_2
B37
LA_DATA_0
B34
LA_DATA_1
A36
LA_DATA_2
G30
LB_DATA#_0
D30
LB_DATA#_1
F29
LB_DATA#_2
F30
LB_DATA_0
D29
LB_DATA_1
F28
LB_DATA_2
A16
TV_DACA_OUT
C18
TV_DACB_OUT
A19
TV_DACC_OUT
J20
TV_IREF
B16
TV_IRTNA
B18
TV_IRTNB
B19
TV_IRTNC
E23
CRT_BLUE
D23
CRT_BLUE#
C22
CRT_GREEN
B22
CRT_GREEN#
A21
CRT_RED
B21
CRT_RED#
C26
CRT_DDC_CLK
C25
CRT_DDC_DATA
G23
CRT_HSYNC
H23
CRT_VSYNC
J22
CRT_IREF
CALISTOGA
1.5VS
C611 330U/6.3V
AC
D10
SCS551V
R55 10
6
7
EXP_A_COMPI
EXP_A_COMPO
EXP_A_RXN_0 EXP_A_RXN_1 EXP_A_RXN_2 EXP_A_RXN_3 EXP_A_RXN_4 EXP_A_RXN_5 EXP_A_RXN_6 EXP_A_RXN_7 EXP_A_RXN_8
EXP_A_RXN_9 EXP_A_RXN_10 EXP_A_RXN_11 EXP_A_RXN_12
LVDS
EXP_A_RXN_13 EXP_A_RXN_14 EXP_A_RXN_15
EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9 EXP_A_RXP_10 EXP_A_RXP_11 EXP_A_RXP_12 EXP_A_RXP_13 EXP_A_RXP_14 EXP_A_RXP_15
EXP_A_TXN_0 EXP_A_TXN_1 EXP_A_TXN_2 EXP_A_TXN_3 EXP_A_TXN_4
TV
VGA
3VS
+
5/18
+1.5VS_AUX [8] 3VS [2,4,5,9,10,11,12,13,14,15,16,18,20,21,24]
1.05VS [2,3,4,5,8,11,13,22]
1.5VS [3,11,13,16,24]
1.8V [5,8,9,23]
2.5VS [10,22]
藍 天 電 腦 CLEVO CO.
Title
Size Document Number Rev Custom
Date: Sheet of
Calistoga GMCH 2/4
7
EXP_A_TXN_5 EXP_A_TXN_6 EXP_A_TXN_7 EXP_A_TXN_8
EXP_A_TXN_9 EXP_A_TXN_10 EXP_A_TXN_11 EXP_A_TXN_12 EXP_A_TXN_13 EXP_A_TXN_14
PCI-EXPRESS GRAPHICS
EXP_A_TXN_15
EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
EXP_A_TXP_9 EXP_A_TXP_10 EXP_A_TXP_11 EXP_A_TXP_12 EXP_A_TXP_13 EXP_A_TXP_14 EXP_A_TXP_15
71-M52N0-D03
D40 D38
F34 G38 H34 J38 L34 M38 N34 P38 R34 T38 V34 W38 Y34 AA38 AB34 AC38
D34 F38 G34 H38 J34 L38 M34 N38 P34 R38 T34 V38 W34 Y38 AA34 AB38
F36 G40 H36 J40 L36 M40 N36 P40 R36 T40 V36 W40 Y36 AA40 AB36 AC40
D36 F40 G36 H40 J36 L40 M36 N40 P36 R40 T36 V40 W36 Y40 AA36 AB40
8
1.5VS
6 29Friday, May 19, 2006
8
R123
24.9_1%_04
1.0
PDF created with pdfFactory Pro trial version www.pdffactory.com
1
A A
SDQ_A[0..63] [9]
AJ35
AJ34 AM31 AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38 AM36 AM34
AN33
AK26
AL27 AM26
AN24
AK28
AL28 AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AW2
AK9 AN7 AK8 AK7 AP9 AN9 AT5 AL5 AY2
AP1 AN2 AV2 AT3 AN1
AL2 AG7 AF9 AG4 AF6 AG9 AH6 AF4 AF8
U15D
SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63
CALISTOGA
SDQ_A0 SDQ_A1 SDQ_A2 SDQ_A3 SDQ_A4 SDQ_A5 SDQ_A6 SDQ_A7 SDQ_A8 SDQ_A9 SDQ_A10 SDQ_A11 SDQ_A12 SDQ_A13 SDQ_A14 SDQ_A15 SDQ_A16 SDQ_A17 SDQ_A18 SDQ_A19
B B
C C
SDQ_A20 SDQ_A21 SDQ_A22 SDQ_A23 SDQ_A24 SDQ_A25 SDQ_A26 SDQ_A27 SDQ_A28 SDQ_A29 SDQ_A30 SDQ_A31 SDQ_A32 SDQ_A33 SDQ_A34 SDQ_A35 SDQ_A36 SDQ_A37 SDQ_A38 SDQ_A39 SDQ_A40 SDQ_A41 SDQ_A42 SDQ_A43 SDQ_A44 SDQ_A45 SDQ_A46 SDQ_A47 SDQ_A48 SDQ_A49 SDQ_A50 SDQ_A51 SDQ_A52 SDQ_A53 SDQ_A54 SDQ_A55 SDQ_A56 SDQ_A57 SDQ_A58 SDQ_A59 SDQ_A60 SDQ_A61 SDQ_A62 SDQ_A63
2
DDR SYSTEM MEMORY A
SA_BS_0 SA_BS_1 SA_BS_2
SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7
SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7
SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7
SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8
SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13
SA_CAS#
SA_RAS#
SA_WE#
SA_RCVENIN#
SA_RCVENOUT#
AU12 AV14 BA20
AJ33 AM35 AL26 AN22 AM14 AL9 AR3 AH4
AK33 AT33 AN28 AM22 AN12 AN8 AP3 AG5
AK32 AU33 AN27 AM21 AM12 AL8 AN3 AH5
AY16 AU14 AW16 BA16 BA17 AU16 AV17 AU17 AW17 AT16 AU13 AT17 AV20 AV12
AY13 AW14 AY14
AK23 AK24
SBA_A0 SBA_A1 SBA_A2
SDM_A0 SDM_A1 SDM_A2 SDM_A3 SDM_A4 SDM_A5 SDM_A6 SDM_A7
SDQS_A0 SDQS_A1 SDQS_A2 SDQS_A3 SDQS_A4 SDQS_A5 SDQS_A6 SDQS_A7
SDQS_A#0 SDQS_A#1 SDQS_A#2 SDQS_A#3 SDQS_A#4 SDQS_A#5 SDQS_A#6 SDQS_A#7
SMAA_A0 SMAA_A1 SMAA_A2 SMAA_A3 SMAA_A4 SMAA_A5 SMAA_A6 SMAA_A7 SMAA_A8 SMAA_A9 SMAA_A10 SMAA_A11 SMAA_A12 SMAA_A13
SCAS_A# SRAS_A# SWE_A#
3
SBA_A[0..2]
SDM_A[0..7]
SDQS_A[0..7]
SDQS_A#[0..7]
SMAA_A[0..13]
SCAS_A# [9,10] SRAS_A# [9,10] SWE_A# [9,10]
SBA_A[0..2] [9,10]
SDM_A[0..7] [9]
SDQS_A[0..7] [9]
SDQS_A#[0..7] [9]
SMAA_A[0..13] [9,10]
4
SDQ_B[0..63]
SDQ_B0 SDQ_B1 SDQ_B2 SDQ_B3 SDQ_B4 SDQ_B5 SDQ_B6 SDQ_B7 SDQ_B8 SDQ_B9 SDQ_B10 SDQ_B11 SDQ_B12 SDQ_B13 SDQ_B14 SDQ_B15 SDQ_B16 SDQ_B17 SDQ_B18 SDQ_B19 SDQ_B20 SDQ_B21 SDQ_B22 SDQ_B23 SDQ_B24 SDQ_B25 SDQ_B26 SDQ_B27 SDQ_B28 SDQ_B29 SDQ_B30 SDQ_B31 SDQ_B32 SDQ_B33 SDQ_B34 SDQ_B35 SDQ_B36 SDQ_B37 SDQ_B38 SDQ_B39 SDQ_B40 SDQ_B41 SDQ_B42 SDQ_B43 SDQ_B44 SDQ_B45 SDQ_B46 SDQ_B47 SDQ_B48 SDQ_B49 SDQ_B50 SDQ_B51 SDQ_B52 SDQ_B53 SDQ_B54 SDQ_B55 SDQ_B56 SDQ_B57 SDQ_B58 SDQ_B59 SDQ_B60 SDQ_B61 SDQ_B62 SDQ_B63
5
SDQ_B[0..63] [9]
U15E
AK39
SB_DQ0
AJ37
SB_DQ1
AP39
SB_DQ2
AR41
SB_DQ3
AJ38
SB_DQ4
AK38
SB_DQ5
AN41
SB_DQ6
AP41
SB_DQ7
AT40
SB_DQ8
AV41
SB_DQ9
AU38
SB_DQ10
AV38
SB_DQ11
AP38
SB_DQ12
AR40
SB_DQ13
AW38
SB_DQ14
AY38
SB_DQ15
BA38
SB_DQ16
AV36
SB_DQ17
AR36
SB_DQ18
AP36
SB_DQ19
BA36
SB_DQ20
AU36
SB_DQ21
AP35
SB_DQ22
AP34
SB_DQ23
AY33
SB_DQ24
BA33
SB_DQ25
AT31
SB_DQ26
AU29
SB_DQ27
AU31
SB_DQ28
AW31
SB_DQ29
AV29
SB_DQ30
AW29
SB_DQ31
AM19
SB_DQ32
AL19
SB_DQ33
AP14
SB_DQ34
AN14
SB_DQ35
AN17
SB_DQ36
AM16
SB_DQ37
AP15
SB_DQ38
AL15
SB_DQ39
AJ11
SB_DQ40
AH10
SB_DQ41
AJ9
SB_DQ42
AN10
SB_DQ43
AK13
SB_DQ44
AH11
SB_DQ45
AK10
SB_DQ46
AJ8
SB_DQ47
BA10
SB_DQ48
AW10
SB_DQ49
BA4
SB_DQ50
AW4
SB_DQ51
AY10
SB_DQ52
AY9
SB_DQ53
AW5
SB_DQ54
AY5
SB_DQ55
AV4
SB_DQ56
AR5
SB_DQ57
AK4
SB_DQ58
AK3
SB_DQ59
AT4
SB_DQ60
AK5
SB_DQ61
AJ5
SB_DQ62
AJ3
SB_DQ63
CALISTOGA
DDR SYSTEM MEMORY B
6
SB_BS_0 SB_BS_1 SB_BS_2
SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7
SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7
SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7
SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8
SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13
SB_CAS#
SB_RAS#
SB_WE#
SB_RCVENIN#
SB_RCVENOUT#
AT24 AV23 AY28
AK36 AR38 AT36 BA31 AL17 AH8 BA5 AN4
AM39 AT39 AU35 AR29 AR16 AR10 AR7 AN5
AM40 AU39 AT35 AP29 AP16 AT10 AT7 AP5
AY23 AW24 AY24 AR28 AT27 AT28 AU27 AV28 AV27 AW27 AV24 BA27 AY27 AR23
AR24 AU23 AR27
AK16 AK18
SBA_B0 SBA_B1 SBA_B2
SDM_B0 SDM_B1 SDM_B2 SDM_B3 SDM_B4 SDM_B5 SDM_B6 SDM_B7
SDQS_B0 SDQS_B1 SDQS_B2 SDQS_B3 SDQS_B4 SDQS_B5 SDQS_B6 SDQS_B7
SDQS_B#0 SDQS_B#1 SDQS_B#2 SDQS_B#3 SDQS_B#4 SDQS_B#5 SDQS_B#6 SDQS_B#7
SMAA_B0 SMAA_B1 SMAA_B2 SMAA_B3 SMAA_B4 SMAA_B5 SMAA_B6 SMAA_B7 SMAA_B8 SMAA_B9 SMAA_B10 SMAA_B11 SMAA_B12 SMAA_B13
SCAS_B# SRAS_B# SWE_B#
SBA_B[0..2]
SDM_B[0..7]
SDQS_B[0..7]
SDQS_B#[0..7]
SMAA_B[0..13]
7
SCAS_B# [9,10] SRAS_B# [9,10] SWE_B# [9,10]
8
SBA_B[0..2] [9,10]
SDM_B[0..7] [9]
SDQS_B[0..7] [9]
SDQS_B#[0..7] [9]
SMAA_B[0..13] [9,10]
D D
藍 天 電 腦 CLEVO CO.
Title
Size Document Number Rev Custom
1
2
3
4
5
6
Date: Sheet of
Calistoga GMCH 3/4
71-M52N0-D03
7
7 29Friday, May 19, 2006
8
1.0
PDF created with pdfFactory Pro trial version www.pdffactory.com
1
U15G
1.05VS
A A
B B
C C
D D
AA33
W33
AA32
W32
AA31
W31
AA30
W30
AA29
W29
AB28 AA28
AB23 AA23
AC22 AB22
W22
AC21 AA21
W21
AC20 AB20
W20
AB19 AA19
P33 N33 L33 J33
Y32 V32
P32 N32 M32 L32 J32
V31 T31 R31 P31 N31 M31
Y30 V30
U30 T30 R30 P30 N30 M30 L30
Y29 V29
U29 R29 P29 M29 L29
Y28 V28 U28 T28 R28 P28 N28 M28 L28 P27 N27 M27 L27 P26 N26 L26 N25 M25 L25 P24 N24 M24
Y23 P23 N23 M23 L23
Y22 P22
N22 M22 L22
N21 M21 L21
Y20 P20
N20 M20 L20
Y19 N19 M19 L19 N18 M18 L18 P17 N17 M17 N16 M16 L16
VCC_0 VCC_1 VCC_2 VCC_3 VCC_4 VCC_5 VCC_6 VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12 VCC_13 VCC_14 VCC_15 VCC_16 VCC_17 VCC_18 VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34 VCC_35 VCC_36 VCC_37 VCC_38 VCC_39 VCC_40 VCC_41 VCC_42 VCC_43 VCC_44 VCC_45 VCC_46 VCC_47 VCC_48 VCC_49 VCC_50 VCC_51 VCC_52 VCC_53 VCC_54 VCC_55 VCC_56 VCC_57 VCC_58 VCC_59 VCC_60 VCC_61 VCC_62 VCC_63 VCC_64 VCC_65 VCC_66 VCC_67 VCC_68 VCC_69 VCC_70 VCC_71 VCC_72 VCC_73 VCC_74 VCC_75 VCC_76 VCC_77 VCC_78 VCC_79 VCC_80 VCC_81 VCC_82 VCC_83 VCC_84 VCC_85 VCC_86 VCC_87 VCC_88 VCC_89 VCC_90 VCC_91 VCC_92 VCC_93 VCC_94 VCC_95 VCC_96 VCC_97 VCC_98 VCC_99 VCC_100 VCC_101 VCC_102 VCC_103 VCC_104 VCC_105 VCC_106 VCC_107 VCC_108 VCC_109 VCC_110
CALISTOGA
1
VCC
VCC_SM_0 VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8
VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35 VCC_SM_36 VCC_SM_37 VCC_SM_38 VCC_SM_39 VCC_SM_40 VCC_SM_41 VCC_SM_42 VCC_SM_43 VCC_SM_44 VCC_SM_45 VCC_SM_46 VCC_SM_47 VCC_SM_48 VCC_SM_49 VCC_SM_50 VCC_SM_51 VCC_SM_52 VCC_SM_53 VCC_SM_54 VCC_SM_55 VCC_SM_56 VCC_SM_57 VCC_SM_58 VCC_SM_59 VCC_SM_60 VCC_SM_61 VCC_SM_62 VCC_SM_63 VCC_SM_64 VCC_SM_65 VCC_SM_66 VCC_SM_67 VCC_SM_68 VCC_SM_69 VCC_SM_70 VCC_SM_71 VCC_SM_72 VCC_SM_73 VCC_SM_74 VCC_SM_75 VCC_SM_76 VCC_SM_77 VCC_SM_78 VCC_SM_79 VCC_SM_80 VCC_SM_81 VCC_SM_82 VCC_SM_83 VCC_SM_84 VCC_SM_85 VCC_SM_86 VCC_SM_87 VCC_SM_88 VCC_SM_89 VCC_SM_90 VCC_SM_91 VCC_SM_92 VCC_SM_93 VCC_SM_94 VCC_SM_95 VCC_SM_96 VCC_SM_97 VCC_SM_98 VCC_SM_99
VCC_SM_100 VCC_SM_101 VCC_SM_102 VCC_SM_103 VCC_SM_104 VCC_SM_105 VCC_SM_106 VCC_SM_107
2
AU41 AT41 AM41 AU40 BA34 AY34 AW34 AV34 AU34 AT34 AR34 BA30 AY30 AW30 AV30 AU30 AT30 AR30 AP30 AN30 AM30 AM29 AL29 AK29 AJ29 AH29 AJ28 AH28 AJ27 AH27 BA26 AY26 AW26 AV26 AU26 AT26 AR26 AJ26 AH26 AJ25 AH25 AJ24 AH24 BA23 AJ23 BA22 AY22 AW22 AV22 AU22 AT22 AR22 AP22 AK22 AJ22 AK21 AK20 BA19 AY19 AW19 AV19 AU19 AT19 AR19 AP19 AK19 AJ19 AJ18 AJ17 AH17 AJ16 AH16 BA15 AY15 AW15 AV15 AU15 AT15 AR15 AJ15 AJ14 AJ13 AH13 AK12 AJ12 AH12 AG12 AK11 BA8 AY8 AW8 AV8 AT8 AR8 AP8 BA6 AY6 AW6 AV6 AT6 AR6 AP6 AN6 AL6 AK6 AJ6 AV1 AJ1
2
C442 .47U
C392
10U/10V_08
C399
10U/10V_08
C422 .1U_X7R_04
C396 .47U
.47U
3
C441 .47U
1.8V
C431
10U/10V_08
C380
10U/10V_08
C385 .1U_X7R_04
C421 .47U
near pin BA15
.47U
3
C92
+
220u/2.5V_B
C400 .1U_X7R_04
1.05VS
C226
+
220u/4V_V
1.05VS
4
AD27 AC27 AB27 AA27
Y27
W27
V27 U27 T27
R27 AD26 AC26 AB26 AA26
Y26
W26
V26
U26
T26
R26 AD25 AC25 AB25 AA25
Y25
W25
V25
U25
T25
R25 AD24 AC24 AB24 AA24
Y24
W24
V24
U24
T24
R24 AD23
V23
U23
T23
R23 AD22
V22
U22
T22
R22 AD21
V21
U21
T21
R21 AD20
V20
U20
T20
R20 AD19
V19
U19
T19 AD18 AC18 AB18 AA18
Y18
W18
V18
U18
T18
C126 10U/10V_08
4
U15F
VCC_NCTF0 VCC_NCTF1 VCC_NCTF2 VCC_NCTF3 VCC_NCTF4 VCC_NCTF5 VCC_NCTF6 VCC_NCTF7 VCC_NCTF8 VCC_NCTF9 VCC_NCTF10 VCC_NCTF11 VCC_NCTF12 VCC_NCTF13 VCC_NCTF14 VCC_NCTF15 VCC_NCTF16 VCC_NCTF17 VCC_NCTF18 VCC_NCTF19 VCC_NCTF20 VCC_NCTF21 VCC_NCTF22 VCC_NCTF23 VCC_NCTF24 VCC_NCTF25 VCC_NCTF26 VCC_NCTF27 VCC_NCTF28 VCC_NCTF29 VCC_NCTF30 VCC_NCTF31 VCC_NCTF32 VCC_NCTF33 VCC_NCTF34 VCC_NCTF35 VCC_NCTF36 VCC_NCTF37 VCC_NCTF38 VCC_NCTF39 VCC_NCTF40 VCC_NCTF41 VCC_NCTF42 VCC_NCTF43 VCC_NCTF44 VCC_NCTF45 VCC_NCTF46 VCC_NCTF47 VCC_NCTF48 VCC_NCTF49 VCC_NCTF50 VCC_NCTF51 VCC_NCTF52 VCC_NCTF53 VCC_NCTF54 VCC_NCTF55 VCC_NCTF56 VCC_NCTF57 VCC_NCTF58 VCC_NCTF59 VCC_NCTF60 VCC_NCTF61 VCC_NCTF62 VCC_NCTF63 VCC_NCTF64 VCC_NCTF65 VCC_NCTF66 VCC_NCTF67 VCC_NCTF68 VCC_NCTF69 VCC_NCTF70 VCC_NCTF71 VCC_NCTF72
C127 10U/10V_08
NCTF
CALISTOGA
C128 1U_X7RC369
VSS_NCTF0 VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7 VSS_NCTF8
VSS_NCTF9 VSS_NCTF10 VSS_NCTF11 VSS_NCTF12
VCCAUX_NCTF0 VCCAUX_NCTF1 VCCAUX_NCTF2 VCCAUX_NCTF3 VCCAUX_NCTF4 VCCAUX_NCTF5 VCCAUX_NCTF6 VCCAUX_NCTF7 VCCAUX_NCTF8
VCCAUX_NCTF9 VCCAUX_NCTF10 VCCAUX_NCTF11 VCCAUX_NCTF12 VCCAUX_NCTF13 VCCAUX_NCTF14 VCCAUX_NCTF15 VCCAUX_NCTF16 VCCAUX_NCTF17 VCCAUX_NCTF18 VCCAUX_NCTF19 VCCAUX_NCTF20 VCCAUX_NCTF21 VCCAUX_NCTF22 VCCAUX_NCTF23 VCCAUX_NCTF24 VCCAUX_NCTF25 VCCAUX_NCTF26 VCCAUX_NCTF27 VCCAUX_NCTF28 VCCAUX_NCTF29 VCCAUX_NCTF30 VCCAUX_NCTF31 VCCAUX_NCTF32 VCCAUX_NCTF33 VCCAUX_NCTF34 VCCAUX_NCTF35 VCCAUX_NCTF36 VCCAUX_NCTF37 VCCAUX_NCTF38 VCCAUX_NCTF39 VCCAUX_NCTF40 VCCAUX_NCTF41 VCCAUX_NCTF42 VCCAUX_NCTF43 VCCAUX_NCTF44 VCCAUX_NCTF45 VCCAUX_NCTF46 VCCAUX_NCTF47 VCCAUX_NCTF48 VCCAUX_NCTF49 VCCAUX_NCTF50 VCCAUX_NCTF51 VCCAUX_NCTF52 VCCAUX_NCTF53 VCCAUX_NCTF54 VCCAUX_NCTF55 VCCAUX_NCTF56 VCCAUX_NCTF57
C129 .22U
5
+1.5VS_AUX
C144 .22U
5
AE27 AE26 AE25 AE24 AE23 AE22 AE21 AE20 AE19 AE18 AC17 Y17 U17
AG27 AF27 AG26 AF26 AG25 AF25 AG24 AF24 AG23 AF23 AG22 AF22 AG21 AF21 AG20 AF20 AG19 AF19 R19 AG18 AF18 R18 AG17 AF17 AE17 AD17 AB17 AA17 W17 V17 T17 R17 AG16 AF16 AE16 AD16 AC16 AB16 AA16 Y16 W16 V16 U16 T16 R16 AG15 AF15 AE15 AD15 AC15 AB15 AA15 Y15 W15 V15 U15 T15 R15
C143 .22UC44
U15I
AC41
VSS_0
AA41
VSS_1
W41
VSS_2
T41
VSS_3
P41
VSS_4
M41
VSS_5
J41
VSS_6
F41
VSS_7
AV40
VSS_8
AP40
VSS_9
AN40
VSS_10
AK40
VSS_11
AJ40
VSS_12
AH40
VSS_13
AG40
VSS_14
AF40
VSS_15
AE40
VSS_16
B40
VSS_17
AY39
VSS_18
AW39
VSS_19
AV39
VSS_20
AR39
VSS_21
AN39
VSS_22
AJ39
VSS_23
AC39
VSS_24
AB39
VSS_25
AA39
VSS_26
Y39
VSS_27
W39
VSS_28
V39
VSS_29
T39
VSS_30
R39
VSS_31
P39
VSS_32
N39
VSS_33
M39
VSS_34
L39
VSS_35
J39
VSS_36
H39
VSS_37
G39
VSS_38
F39
VSS_39
D39
VSS_40
AT38
VSS_41
AM38
VSS_42
AH38
VSS_43
AG38
VSS_44
AF38
VSS_45
AE38
VSS_46
C38
VSS_47
AK37
VSS_48
AH37
VSS_49
AB37
VSS_50
AA37
VSS_51
Y37
VSS_52
W37
VSS_53
V37
VSS_54
T37
VSS_55
R37
VSS_56
P37
VSS_57
N37
VSS_58
M37
VSS_59
L37
VSS_60
J37
VSS_61
H37
VSS_62
G37
VSS_63
F37
VSS_64
D37
VSS_65
AY36
VSS_66
AW36
VSS_67
AN36
VSS_68
AH36
VSS_69
AG36
VSS_70
AF36
VSS_71
AE36
VSS_72
AC36
VSS_73
C36
VSS_74
B36
VSS_75
BA35
VSS_76
AV35
VSS_77
AR35
VSS_78
AH35
VSS_79
AB35
VSS_80
AA35
VSS_81
Y35
VSS_82
W35
VSS_83
V35
VSS_84
T35
VSS_85
R35
VSS_86
P35
VSS_87
N35
VSS_88
M35
VSS_89
L35
VSS_90
J35
VSS_91
H35
VSS_92
G35
VSS_93
F35
VSS_94
D35
VSS_95
AN34
VSS_96
CALISTOGA
+1.5VS_AUX [6]
1.05VS [2,3,4,5,6,11,13,22]
1.8V [5,9,23]
6
6
VSS
7
AK34
VSS_97
AG34
VSS_98
AF34
VSS_99
AE34
VSS_100
AC34
VSS_101
C34
VSS_102
AW33
VSS_103
AV33
VSS_104
AR33
VSS_105
AE33
VSS_106
AB33
VSS_107
Y33
VSS_108
V33
VSS_109
T33
VSS_110
R33
VSS_111
M33
VSS_112
H33
VSS_113
G33
VSS_114
F33
VSS_115
D33
VSS_116
B33
VSS_117
AH32
VSS_118
AG32
VSS_119
AF32
VSS_120
AE32
VSS_121
AC32
VSS_122
AB32
VSS_123
G32
VSS_124
B32
VSS_125
AY31
VSS_126
AV31
VSS_127
AN31
VSS_128
AJ31
VSS_129
AG31
VSS_130
AB31
VSS_131
Y31
VSS_132
AB30
VSS_133
E30
VSS_134
AT29
VSS_135
AN29
VSS_136
AB29
VSS_137
T29
VSS_138
N29
VSS_139
K29
VSS_140
G29
VSS_141
E29
VSS_142
C29
VSS_143
B29
VSS_144
A29
VSS_145
BA28
VSS_146
AW28
VSS_147
AU28
VSS_148
AP28
VSS_149
AM28
VSS_150
AD28
VSS_151
AC28
VSS_152
W28
VSS_153
J28
VSS_154
E28
VSS_155
AP27
VSS_156
AM27
VSS_157
AK27
VSS_158
J27
VSS_159
G27
VSS_160
F27
VSS_161
C27
VSS_162
B27
VSS_163
AN26
VSS_164
M26
VSS_165
K26
VSS_166
F26
VSS_167
D26
VSS_168
AK25
VSS_169
P25
VSS_170
K25
VSS_171
H25
VSS_172
E25
VSS_173
D25
VSS_174
A25
VSS_175
BA24
VSS_176
AU24
VSS_177
AL24
VSS_178
AW23
VSS_179
Title
Size Document Number Rev Custom
Date: Sheet of
U15J
AT23
VSS_180
AN23
VSS_181
AM23
VSS_182
AH23
VSS_183
AC23
VSS_184
W23
VSS_185
K23
VSS_186
J23
VSS_187
F23
VSS_188
C23
VSS_189
AA22
VSS_190
K22
VSS_191
G22
VSS_192
F22
VSS_193
E22
VSS_194
D22
VSS_195
A22
VSS_196
BA21
VSS_197
AV21
VSS_198
AR21
VSS_199
AN21
VSS_200
AL21
VSS_201
AB21
VSS_202
Y21
VSS_203
P21
VSS_204
K21
VSS_205
J21
VSS_206
H21
VSS_207
C21
VSS_208
AW20
VSS_209
AR20
VSS_210
AM20
AA20
AN19 AC19
AH18
AY17 AR17 AP17
AM17
AK17 AV16 AN16
AL16
AN15
AM15
AK15
BA14
AT14 AK14 AD14 AA14
AV13 AR13 AN13
AM13
AL13 AG13
AY12 AC12
AD11 AA11
W19
K20 B20 A20
K19 G19 C19
P18 H18 D18 A18
J16 F16 C16
N15 M15 L15 B15 A15
U14 K14 H14 E14
P13 F13 D13 B13
K12 H12 E12
Y11
VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272
VSS
CALISTOGA
藍 天 電 腦 CLEVO CO.
Calistoga GMCH 4/4
71-M52N0-D03
7
8
VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358 VSS_359 VSS_360
8 29Friday, May 19, 2006
8
J11 D11 B11 AV10 AP10 AL10 AJ10 AG10 AC10 W10 U10 BA9 AW9 AR9 AH9 AB9 Y9 R9 G9 E9 A9 AG8 AD8 AA8 U8 K8 C8 BA7 AV7 AP7 AL7 AJ7 AH7 AF7 AC7 R7 G7 D7 AG6 AD6 AB6 Y6 U6 N6 K6 H6 B6 AV5 AF5 AD5 AY4 AR4 AP4 AL4 AJ4 Y4 U4 R4 J4 F4 C4 AY3 AW3 AV3 AL3 AH3 AG3 AF3 AD3 AC3 AA3 G3 AT2 AR2 AP2 AK2 AJ2 AD2 AB2 Y2 U2 T2 N2 J2 H2 F2 C2 AL1
1.0
PDF created with pdfFactory Pro trial version www.pdffactory.com
1
2
3
4
5
6
7
8
1.8V 1.8V
112
111
1179695
11881828710388104
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
18244153425459656066127
C429
C180 .1U_X7R_04
.1U_X7R_04
2
SMAA_A0 SMAA_A1 SMAA_A2 SMAA_A3 SMAA_A4 SMAA_A5 SMAA_A6 SMAA_A7 SMAA_A8 SMAA_A9
SMAA_A11 SMAA_A12 SMAA_A13
SDM_A0 SDM_A1 SDM_A2 SDM_A3 SDM_A4 SDM_A5 SDM_A6 SDM_A7
SDQS_A0 SDQS_A1 SDQS_A2 SDQS_A3 SDQS_A4 SDQS_A5 SDQS_A6 SDQS_A7
SDQS_A#0 SDQS_A#1 SDQS_A#2 SDQS_A#3 SDQS_A#4 SDQS_A#5 SDQS_A#6 SDQS_A#7
10U/10V_08
1.8V
C406 .1U_X7R_04
C50
JDIM2
102 101 100
99 98 97 94 92 93 91
105
90 89
116
86 84
85 107 106
10
26
52
67 130 147 170 185
13
31
51
70 131 148 169 188
108 109 113
110 115
79
80
30
32 164 166
114 119
195 197
11
29
49
68 129 146 167 186
1
199
C435
C418
.1U_X7R_04
.1U_X7R_04
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2 BA0 BA1
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
RAS# WE# CAS#
S0# S1#
CKE0 CKE1
CK0 CK0# CK1 CK1#
ODT0 ODT1
SDA SCL
DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7
VREF VDDSPD
C227 .1U_X7R_04
1
SMAA_A[0..13]
SBA_A2 SBA_A0 SBA_A1
SDM_A[0..7]
SDQS_A[0..7]
SRAS_A# SWE_A# SCAS_A#
SCS_A0# SCS_A1#
SCKE_A0 SCKE_A1
DDRCLK_A0 DDRCLK_A0# DDRCLK_A1 DDRCLK_A1#
SODT_A0 SODT_A1
SMB_ICHDATA SMB_ICHCLK SDQS_A#[0..7]
C51 .1U_04
DIMM_VREFA
A A
SMAA_A[0..13][7,10]
SBA_A2[7,10] SBA_A0[7,10] SBA_A1[7,10]
SDM_A[0..7][7]
B B
SDQS_A[0..7][7]
SRAS_A#[7,10]
SWE_A#[7,10]
SCAS_A#[7,10]
SCS_A0#[5,10] SCS_A1#[5,10]
SCKE_A0[5,10] SCKE_A1[5,10]
DDRCLK_A0[5]
DDRCLK_A0#[5]
DDRCLK_A1[5]
DDRCLK_A1#[5]
C C
D D
SODT_A0[5,10] SODT_A1[5,10]
SMB_ICHDATA[4,12,16]
SMB_ICHCLK[4,12,16] SDQS_A#[0..7][7]
Trace Width 12 Mil Space 20 Mil
1.8V 1.8V
R149
75_1%_04
R143
C230 1U_06
75_1%_04
VDD
VDD
VDD
VSS
VSS
VSS
C184
C201 .1U_X7R_04
.1U_X7R_04
VDD
VDD
VDD
VSS
VSS
VSS
139
128
47
133
183771248184787172121
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
145
165
171
172
177
C147
C109 10U/10V_08
.1U_X7R_04
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
187
178
1909213315534132
DDR2 SO-DIMM1
addr =1010000b addr =1010010b
C181
C93 10U/10V_08
10U/10V_08
3
122
196
VSS
VSS
VSS
VSS
C131
10U/10V_08
1938162
VSS
VSS
VSS
VSS
VSS
VSS
144
156
C178 10U/10V_08
SDQ_A[0..63][7]
150
1384028
VSS
VSS
VSS
VSS
VSS
VSS
168231527
VSS
NCTEST
VSS
C108
220U(D)(R)
161
VSS
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
NC1
NC2
NC3
NC4
VSS
149
VSS
SA0 SA1
VSS
39
SDQ_A[0..63]
SDQ_A0
5
SDQ_A1
7
SDQ_A2
17
SDQ_A3
19
SDQ_A4
4
SDQ_A5
6
SDQ_A6
14
SDQ_A7
16
SDQ_A8
23
SDQ_A9
25
SDQ_A10SMAA_A10
35
SDQ_A11
37
SDQ_A12
20
SDQ_A13
22
SDQ_A14
36
SDQ_A15
38
SDQ_A16
43
SDQ_A17
45
SDQ_A18
55
SDQ_A19
57
SDQ_A20
44
SDQ_A21
46
SDQ_A22
56
SDQ_A23
58
SDQ_A24
61
SDQ_A25
63
SDQ_A26
73
SDQ_A27
75
SDQ_A28
62
SDQ_A29
64
SDQ_A30
74
SDQ_A31
76
SDQ_A32
123
SDQ_A33
125
SDQ_A34
135
SDQ_A35
137
SDQ_A36
124
SDQ_A37
126
SDQ_A38
134
SDQ_A39
136
SDQ_A40
141
SDQ_A41
143
SDQ_A42
151
SDQ_A43
153
SDQ_A44
140
SDQ_A45
142
SDQ_A46
152
SDQ_A47
154
SDQ_A48
157
SDQ_A49
159
SDQ_A50
173
SDQ_A51
175
SDQ_A52
158
SDQ_A53
160
SDQ_A54
174
SDQ_A55
176
SDQ_A56
179
SDQ_A57
181
SDQ_A58
189
SDQ_A59
191
SDQ_A60
180
SDQ_A61
182
SDQ_A62
192
SDQ_A63
194
83 120
R138 0_04
50 69 163
R43 10K_04
198
R42 10K_04
200
NEAR DIMM PINNEAR DIMM PIN
R151
75_1%_04
R144
75_1%_04
4
SMAA_B[0..13][7,10]
SDM_B[0..7][7]
SDQS_B[0..7][7]
SMB_ICHDATA[4,12,16]
Trace Width 12 Mil Space 20 Mil
DIMM_VREFBDIMM_VREFA
C228
C231
1U_06
.1U_X7R_04
SDQ_B[0..63][7]
112
111
1179695
11881828710388104
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
18244153425459656066127
C185
C200 10U/10V_08
.1U_X7R_04
SMAA_B[0..13]
SDM_B[0..7]
SDQS_B[0..7]
SRAS_B# SWE_B# SCAS_B#
SCS_B0# SCS_B1#
SCKE_B0 SCKE_B1
DDRCLK_B1 DDRCLK_B1# DDRCLK_B0 DDRCLK_B0#
SODT_B0 SODT_B1
SMB_ICHDATA SMB_ICHCLK SDQS_B#[0..7]
3VS3VS
C165
C439
.1U_X7R_04
.1U_X7R_04
5
C53 .1U_04
SBA_B2 SBA_B0 SBA_B1
DIMM_VREFB
C160
.1U_X7R_04
SBA_B2[7,10] SBA_B0[7,10] SBA_B1[7,10]
SRAS_B#[7,10]
SWE_B#[7,10]
SCAS_B#[7,10]
SCS_B0#[5,10] SCS_B1#[5,10]
SCKE_B0[5,10] SCKE_B1[5,10]
DDRCLK_B1[5]
DDRCLK_B1#[5]
DDRCLK_B0[5]
DDRCLK_B0#[5]
SODT_B0[5,10] SODT_B1[5,10]
SMB_ICHCLK[4,12,16]
SDQS_B#[0..7][7]
1.8V
C438 .1U_X7R_04
SMAA_B0 SMAA_B1 SMAA_B2 SMAA_B3 SMAA_B4 SMAA_B5 SMAA_B6 SMAA_B7 SMAA_B8 SMAA_B9 SMAA_B10 SMAA_B11 SMAA_B12 SMAA_B13
SDM_B0 SDM_B1 SDM_B2 SDM_B3 SDM_B4 SDM_B5 SDM_B6 SDM_B7
SDQS_B0 SDQS_B1 SDQS_B2 SDQS_B3 SDQS_B4 SDQS_B5 SDQS_B6 SDQS_B7
SDQS_B#0 SDQS_B#1 SDQS_B#2 SDQS_B#3 SDQS_B#4 SDQS_B#5 SDQS_B#6 SDQS_B#7
10U/10V_08
C179 .1U_X7R_04
C52
JDIM1
102 101 100
99 98 97 94 92 93 91
105
90 89
116
86 84
85 107 106
10
26
52
67 130 147 170 185
13
31
51
70 131 148 169 188
108 109 113
110 115
79
80
30
32 164 166
114 119
195 197
11
29
49
68 129 146 167 186
1
199
C164
C163
.1U_X7R_04
.1U_X7R_04
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2 BA0 BA1
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
RAS# WE# CAS#
S0# S1#
CKE0 CKE1
CK0 CK0# CK1 CK1#
ODT0 ODT1
SDA SCL
DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7
VREF VDDSPD
VDD
VDD
VDD
VSS
VSS
VSS
C199
10U/10V_08
6
VDD
VDD
VDD
VSS
VSS
VSS
139
128
C159 10U/10V_08
47
133
183771248184787172121
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
145
165
171
172
177
C198
C186 10U/10V_08
10U/10V_08
122
196
1938162
150
1384028
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NCTEST
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
187
178
1909213315534132
C197
220U(D)(R)
144
156
168231527
DDR2 SO-DIMM2
藍 天 電 腦 CLEVO CO.
Title
Size Document Number Rev Custom
Date: Sheet of
7
SDQ_B[0..63]
149
161
VSS
VSS
SDQ_B0
5
DQ0
SDQ_B1
7
DQ1
SDQ_B2
17
DQ2
SDQ_B3
19
DQ3
SDQ_B4
4
DQ4
SDQ_B5
6
DQ5
SDQ_B6
14
DQ6
SDQ_B7
16
DQ7
SDQ_B8
23
DQ8
SDQ_B9
25
DQ9
SDQ_B10
35
DQ10
SDQ_B11
37
DQ11
SDQ_B12
20
DQ12
SDQ_B13
22
DQ13
SDQ_B14
36
DQ14
SDQ_B15
38
DQ15
SDQ_B16
43
DQ16
SDQ_B17
45
DQ17
SDQ_B18
55
DQ18
SDQ_B19
57
DQ19
SDQ_B20
44
DQ20
SDQ_B21
46
DQ21
SDQ_B22
56
DQ22
SDQ_B23
58
DQ23
SDQ_B24
61
DQ24
SDQ_B25
63
DQ25
SDQ_B26
73
DQ26
SDQ_B27
75
DQ27
SDQ_B28
62
DQ28
SDQ_B29
64
DQ29
SDQ_B30
74
DQ30
SDQ_B31
76
DQ31
SDQ_B32
123
DQ32
SDQ_B33
125
DQ33
SDQ_B34
135
DQ34
SDQ_B35
137
DQ35
SDQ_B36
124
DQ36
SDQ_B37
126
DQ37
SDQ_B38
134
DQ38
SDQ_B39
136
DQ39
SDQ_B40
141
DQ40
SDQ_B41
143
DQ41
SDQ_B42
151
DQ42
SDQ_B43
153
DQ43
SDQ_B44
140
DQ44
SDQ_B45
142
DQ45
SDQ_B46
152
DQ46
SDQ_B47
154
DQ47
SDQ_B48
157
DQ48
SDQ_B49
159
DQ49
SDQ_B50
173
DQ50
SDQ_B51
175
DQ51
SDQ_B52
158
DQ52
SDQ_B53
160
DQ53
SDQ_B54
174
DQ54
SDQ_B55
176
DQ55
SDQ_B56
179
DQ56
SDQ_B57
181
DQ57
SDQ_B58
189
DQ58
SDQ_B59
191
DQ59
SDQ_B60
180
DQ60
SDQ_B61
182
DQ61
SDQ_B62
192
DQ62
SDQ_B63
194
DQ63
83
NC1
120
NC2
R139 0_04
50
NC3
69
NC4
163
R264 10K_04
198
SA0
R263 10K_04
200
SA1
VSS
VSS
39
1.8V [5,8,23] 3VS [2,4,5,6,10,11,12,13,14,15,16,18,20,21,24]
3VS
SO-DIMM
71-M52N0-D03
9 29Friday, May 19, 2006
8
PM_EXTTS0# [5]PM_EXTTS1#[5]
1.0
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