l Simple Four-wire Serial Interface
l Charge Pump Driver output generates
negative power supply.
l Ground-Referenced Bipolar Inputs
VA+
Description
The CS5471 is a highly integrated Delta-Sigma (∆Σ) Analog-to-Digital Converter (ADC) developed for the Power
Measurement Industry. The CS5471 combines two ∆Σ
ADCs, decimation filters, and a serial interface on a single chip. The CS5471 interfaces directly to a current
transformer or shunt to measure current, and resistive
divider or transformer to measure voltage. The product
features a serial interface for communication with a micro-controller or DSP. The product is initialized and fully
functional upon reset, and includes a Voltage Reference.
Figure 3. Serial Port Data Transfer ................................................................................................. 8
Figure 4. Close-up of One Frame.................................................................................................... 9
Figure 5. Generating VA- with a Charge Pump ............................................................................. 10
Contacting Cirrus Logic Support
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Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product information describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information
contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of
any kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights
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in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trademarks and service marks can be found at http://www.cirrus.com.
2
1.CHARACTERISTICS AND SPECIFICATIONS
CS5471
ANALOG CHARACTERISTICS (T
= -40 °C to +85 °C; +2.7V < VA+ < +3.5V; +2.7V < VD+ < +3.5V;
A
VA- = -2 V ±10%; External VREF+ = 1.2 V; XIN = 4.000 MHz; AGND, DGND = 0.0V.) (See Notes 1 and 2)
Notes: 1. Specifications guaranteed by design, characterization, and/or test.
2. Analog signals are relative to AGND and digital signals to DGND unless otherwise noted.
3. Effective Input Impedance (EII) varies with clock frequency (XIN) and Input Capacitance (IC)
EII = 1/(IC*XIN/4)
3
CS5471
ANALOG CHARACTERISTICS (Continued)
ParameterSymbol Min TypMaxUnit
Reference Output
Output VoltageREFOUT1.15-1.25V
Temperature Coefficient-2050ppm/°C
Load Regulation(Output Current 1µA Source or Sink)∆V
R
Power Supply RejectionPSRR60--dB
Reference Input
Input Voltage RangeVREF+1.151.21.25V
Input Capacitance--10pF
Input CVF Current--1µA
Power Supplies
Power Supply CurrentsI
A+
I
D+
PSCA
PSCD
Power Consumption(Note 4)PC--15mW
Power Supply Rejection(DC, 50, 60 Hz)
PSRR60--dB
(see Note 5)
-610mV
-
-
-
-
1.5
2.5
mA
mA
Notes: 4. All outputs unloaded. All inputs CMOS level.
5. Definition for PSRR: VREFIN tied to VREFOUT, VA+ = VD+ = 3V, AGND = DGND = 0V, VA- = -2V
(using charge-pump circuit with CPD). In addition, a 106.07 mV rms (60 Hz) sinewave is imposed onto
the VA+ and VD+ pins. The “+” and “-” input pins of both input channels are shorted to VA-.
Instantaneous digital output data words are then collected for the channel under test. From these data
samples, the rms value (standard deviation) of the digital sinusoidal output signal is calculated, and this
rms value is converted into the rms value of the sinusoidal voltage (measured in mV) that would need
to be applied at the channel’s inputs, in order to cause the same digital sinusoidal output. This voltage
is then defined as Veq. PSRR is then (in dB)
106.07
------------- ---
log⋅=
V
eq
DIGITAL CHARACTERISTICS (T
PSRR20
= -40 °C to +85 °C; +2.7V < VA+ < +3.5V; +2.7V < VD+ < +3.5V;
A
VA- = -2 V ±10%; AGND, DGND = 0.0 V) (See Note 6)
ParameterSymbol Min TypMaxUnit
High-Level Input VoltageV
Low-Level Input VoltageV
High-Level Output VoltageI
Low-Level Output VoltageI
= -5.0 mAV
out
= 5.0 mAV
out
Input Leakage Current(Note 7)I
3-State Leakage CurrentI
Digital Output Pin CapacitanceC
OH
OL
in
OZ
out
IH
0.6 VD+-VD+V
IL
0.0-0.8V
(VD+) - 1.0--V
--0.4V
-±1±10µA
--±10µA
-9-pF
Notes: 6. All measurements performed under static conditions.