Cirrus Logic CS4339-KS, CS4339-BS, CS4338-KS, CS4338-BS, CS4337-KS Datasheet

CS4334/5/6/7/8/9

8-Pin, 24-Bit, 96 kHz Stereo D/A Converter

Features

l Complete Stereo DAC System: Inte rpolation,

D/A, Output Analog Filtering

l 24-Bit Conversion
l 96 dB Dynamic Range
l -88 dB THD+N
l Low Clock Jitter Sensitivity
l Single +5 V Power Supply
l Filtered Line Level Outputs
l On-Chip Digital De-emphasis
l Popgaurd
l Functionally Compatible with CS4330/31/33

I

®

Technology

Description

The CS4334 family m ember s are compl ete, st ereo dig i­tal-to-analog output systems including interpolation, 1-bit
D/A conversion and output analog filtering in an 8-pin
package. The CS433 4/5/6/7/ 8/9 su pport all maj or a udio
data interface format s, and the individu al devices differ
only in the supported interface format.

The CS4334 family is based on delta-sigma modulation,
where the modulator output c ontrols the referenc e volt­age input to an ultra-li near analog low-pass filter. This
architecture allows for infinite adjustment of sample rate
between 2 kHz and 100 kHz simply by changing the
master clock freque nc y.

The CS4334 family contai ns on-chip digital de-empha­sis, operates from a single +5V power supply, and
requires minimal support circuitry. These features are
ideal for set-top boxes, DVD players, SVCD players, and
A/V receivers.

ORDERING INFORMATION

See page 23

3

LRCK

SDAT A

1

Serial Input

Interface

Interpolator

Interpolator

Preliminary Product Information

DEM/SCLK

2

De-emphasis

∆Σ

Modulator

∆Σ

Modulator

4

MCLK

This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.

AGND

Voltage Reference

DAC

DAC

VA

6

7

Analog

Low-Pass

Filter

Analog

Low-Pass

Filter

AOUTL

8

AOUTR

5

P.O. Box 17847, Austin, Texas 78760
[phone] FAX: [phone]
http://www.cirrus.com

Copyright  Cirrus Logic, Inc. 1999

(All Rights Reserved)

SEP ‘99

DS248PP3

1

TABLE OF CONTENTS

1. CHARACTERISTICS/SPECIFICATIONS ...................................................... 4

ANALOG CHARACTERISTICS................................................................... 4

POWER AND THERMAL CHARACTERISTICS ......................................... 6

DIGITAL CHARACTERISTICS.................................................................... 7

ABSOLUTE MAXIMUM RATINGS.............................................................. 7

RECOMMENDED OPERATING CONDITIONS.......................................... 7

SWITCHING CHARACTERISTICS .................................... ....... ...... ....... ..... 8

2. TYPICAL CONNECTION DIAGRAM ...........................................................10

3. GENERAL DESCRIPTION .......................................................................... 11

3.1 Digital Interpolation Filter ................................................................... 11

3.2 Delta-Sigma Modulator ...................................................................... 11

3.3 Switched-Capacitor DAC ................................................................... 11

3.4 Analog Low-Pass Filter ...................................................................... 11

4. SYSTEM DESIGN ........................................................................................12

4.1 Master Clock ...................................................................................... 12

4.2 Serial Clock ........................................................................................12

4.2.1 External Serial Clock Mode ......................................................12

4.2.2 Internal Serial Clock Mode ....................................................... 12

4.3 De-Emphasis .....................................................................................12

4.4 Initialization and Power-Down ...........................................................12

4.5 Output Transient Control ................................................................... 13

4.6 Grounding and Power Supply Decoupling ......................................... 13

4.7 Analog Output and Filtering ............................................................... 13

4.8 Overall Base-Rate Frequency Response .......................................... 17

4.9 Overall High-Rate Frequency Response ...........................................18

4.10 Base Rate Mode Performance Plots ...............................................19

4.11 High Rate Mode Performance Plots ................................................20

5. PIN DESCRIPTIONS ................................................................................... 21

6. PARAMETER DEFINITIONS ....................................................................... 22

7. REFERENCES ............................................................................................. 22

8. ORDERING INFORMATION: ...................................................................... 23

9. FUNCTIONAL COMPATIBILITY ................................................................. 23

10. PACKAGE DIMENSIONS .......................................................................... 24

CS4334/5/6/7/8/9

Contacting Cirrus Logic Support

For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:

http://www.cirrus.com/corporate/contacts/

Preliminary product info rmation describes products which are in production, but for which full characteriza t i on da ta i s not yet available. Advance produ ct i nfor ­mation describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information
contained in this document is accurate and reli able. However , the i nformati on is sub ject to change with out no tice and i s provi ded “AS IS” withou t warranty of

any kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights
of third parties. This document i s the propert y of Cirru s Logic, Inc. and implie s no licen se under patent s, copyri ghts, trademarks, or tr ade secrets. No part of
this publication may be copied, reproduced , stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or
otherwise) without the pri or wri tt en consen t of Ci rrus Logic, Inc. Items from any Cirrus Logi c websi te or disk may be printed for use by the user. However, no
part of the printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical,
photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture
or sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing
in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trade­marks and service marks can be found at http://www.cirrus.com.

2 DS248PP3

LIST OF FIGURES

Figure 1.Output Test Load....................................................................................6

Figure 2.Maximum Loading...................................................................................6

Figure 3.Power vs. Sample Rate..........................................................................6

Figure 4.External Serial Mode Input Timing..........................................................9

Figure 5.Internal Serial Mode Input Timing...........................................................9

Figure 6. Internal Serial Clock Generation............................................................9

Figure 7.Recommended Connection Diagram....................................................10

Figure 8.System Block Diagram..........................................................................11

Figure 9.De-Emphasis Curve (Fs = 44.1kHz).....................................................13

Figure 10.CS4334 Data Format (I

Figure 11.CS4335 Data Format..........................................................................14

Figure 12.CS4336 Data Format..........................................................................14

Figure 13.CS4337 Data Format..........................................................................15

Figure 14.CS4338 Data Format..........................................................................15

Figure 15.CS4339 Data Format..........................................................................15

Figure 16.CS4334/5/6/7/8/9 Initialization and Power-Down Sequence..............16

Figure 17.Stopband Rejection.............................................................................17

Figure 18.Transition Band...................................................................................17

Figure 19.Transition Band...................................................................................17

Figure 20.Passband Ripple.................................................................................17

Figure 21.Stopband Rejection.............................................................................18

Figure 22.Transition Band...................................................................................18

Figure 23.Transition Band...................................................................................18

Figure 24.Passband Ripple.................................................................................18

Figure 25.0 dBFS FFT (BRM).............................................................................19

Figure 26. -60 dBFS FFT (BRM).........................................................................19

Figure 27.Idle Channel Noise FFT (BRM)...........................................................19

Figure 28.Twin Tone IMD FFT (BRM).................................................................19

Figure 29.THD+N vs. Amplitude (BRM)..............................................................19

Figure 30.THD+N vs. Frequency (BRM).............................................................19

Figure 31.0 dBFS FFT (HRM).............................................................................20

Figure 32. -60 dBFS FFT (HRM).........................................................................20

Figure 33.Idle Channel Noise FFT (HRM)..........................................................20

Figure 34.Twin Tone IMD FFT (HRM)................................................................20

Figure 35.THD+N vs. Amplitude (HRM)..............................................................20

Figure 36. THD+N vs. Frequency (HRM)............................................................20

CS4334/5/6/7/8/9

2

S)..................................................................14

DS248PP3 3

1. CHARACTERISTICS/SPECIFICATIONS

CS4334/5/6/7/8/9

ANALOG CHARACTERISTICS (T

Full-Scale Output Sine Wave, 997 Hz; MCLK = 12.288 MHz; Fs for Base-rate Mode = 48 kHz, SCLK = 3.072 MHz,
Measurement Bandwidth 10 Hz to 20 kHz, unless otherwise specified; Fs for High-Rate Mode = 96 kHz,
SCLK = 6.144 MHz, Measurement Bandwidth 10 Hz to 40 kHz, unless otherwise specified. Test load R
C

= 10 pF (see Figure 1))

L

Parameter

= 25 °C; Logic "1" = VA = 5 V; Logic "0" = AGND;

A

= 10 kΩ,

L

Base-rate Mode High-Rate Mode

Symbol Min T yp Max Min Typ Max Unit

Dynamic Performance for CS4334/5/6/7/8/9-KS

Specified Temperature Range T
Dynamic Range (Note 1)

18 to 24-Bit unweighted

A-Weighted

16-Bit unweighted

A-Weighted

Total Harmonic Distortion + Noise (Note 1)

18 to 24-Bit 0 dB

-20 dB

-60 dB

16-Bit 0 dB

-20 dB

-60 dB

Interchannel Isolation (1 kHz) - 94 - - 95 - dB

A

THD+N

-10 - 70 -10 - 70 °C

dB

88
91
86
89

93
96
91
94

-

-

-

-

-

-

-88

-73

-33

-86

-71

-31

-

-

-

-

-83

-68

-28

-81

-66

-26

-

91

-

89

-

-

-

-

-

-

90
96
88
94

-88

-70

-30

-86

-68

-28

-

-

-

-

-83

-65

-25

-81

-63

-23

dB
dB
dB

dB
dB
dB
dB
dB
dB

Dynamic Performance for CS4334/5/6/7/8/9-BS

Specified Temperature Range T
Dynamic Range (Note 1)

18 to 24-Bit unweighted

A-Weighted

16-Bit unweighted

A-Weighted

Total Harmonic Distortion + Noise (Note 1)

18 to 24-Bit 0 dB

-20 dB

-60 dB

16-Bit 0 dB

-20 dB

-60 dB

Interchannel Isolation (1 kHz) - 94 - - 95 - dB

A

THD+N

-40 - 85 -40 - 85 °C

dB

85
88
83
86

93
96
91
94

-

-

-

-

-

-

-88

-73

-33

-86

-71

-31

-

-

-

-

-82

-65

-25

-70

-63

-23

-

88

-

86

-

-

-

-

-

-

90
96
88
94

-88

-70

-30

-86

-68

-28

-

-

-

-

-82

-62

-22

-80

-60

-20

dB
dB
dB

dB
dB
dB
dB
dB
dB

Notes: 1. One-half LSB of triangular PDF dither added to data.

4 DS248PP3

CS4334/5/6/7/8/9

ANALOG CHARACTERISTICS (Continued)

Base-rate Mode High-Rate Mode

Parameter

Combined Digital and On-chip Analog Filter Response

Passband (Note 3)

to -0.05 dB corner

to -0.1 dB corner

to -3 dB corner
Frequency Response 10 Hz to 20 kHz -.01 - +.08 -.05 - +.2 dB
Passband Ripple - - ±.08 - - ±.2 dB

StopBand .5465 - - .5770 - - Fs
StopBand Attenuation (Note 4) 50 - - 55 - - dB
Group Delay tgd - 9/Fs - - 4/Fs - s
Passband Group Delay Deviation 0 - 40 kHz

0 - 20 kHz

De-emphasis Error Fs = 32 kHz

Fs = 44.1 kHz

Fs = 48 kHz

Symbol Min Typ Max Min Typ Max Unit

(Note 2)

0

-

0

- ±0.36/Fs - --±1.39/Fs

-

-

-

-

-

-

-

-

-

.4780

-

.4996

+1.5/+0

+.05/-.25

-.2/-.4

­0
0

±0.23/Fs--

(Note 5)

-

-

-

­.4650
.4982

Fs
Fs
Fs

s
s

dB
dB
dB

Parameters Symbol Min Typ Max Units

dc Accuracy

Interchannel Gain Mismatch - 0.1 0.4 dB
Gain Error - ±5 - %
Gain Drift - 100 - ppm/°C

Analog Output

Full Scale Output Voltage 3.25 3.5 3.75 Vpp
Quiescent Voltage V
Max AC-Load Resistance (Note 6) R
Max Load Capacitance (Note 6) C

Notes: 2. Filter response is not tested but is guaranteed by design.

3. Response is clock dependent and will scale with Fs. Note that the response plots (Figures 17-24) have
been normalized to Fs and can be de-normalized by multiplying the X-axis scale by Fs.

4. For Base-Rate Mode, the Measurement Bandwidth is 0.5465 Fs to 3 Fs.
For High-Rate Mode, the Measurement Bandwidth is 0.577 Fs to 1.4 Fs.

5. De-emphasis is not avai lab le in High - Rate Mod e.

6. Refer to Figure 2.

Q

L
L

-2.2-VDC

-3-k

- 100 - pF

Ω

DS248PP3 5

CS4334/5/6/7/8/9

100

50

75

25

2.5

51015

Safe Operating

Region

Capacitive Load -- C (pF)

L

Resistive Load -- R (kΩ)

L

125

3

20

Figure 2. Maximum Loading

POWER AND THERMAL CHARACTERISTICS

Parameters Symbol Min Typ Max Units

Power Supplies

Power Supply Current normal operation

power-down state

Power Dissipation (Note 7)

normal operation

power-down

Package Thermal Resistance

Power Supply Rejection Ratio (1 kHz) PSRR - 79 - dB

Notes: 7. Refer to Figure 3. Max Power Dissipation is measured at VA=5.5V.

10 µF

I

A

I

A

θ

JA

-

-

-

-

15
40

75

0.2

19

-

104

-

mA

µ

mW
mW

-110-°C/Watt

A

AGND

AOUTx

Figure 1. Output Test Load

V

out

R

L

75

70

65

60

Power (mW)

55

C

L

M

R

B

M

R

H

6 DS248PP3

50

30

40 50 60 70 80 90

Sample Rate (kHz)

Figure 3. Power vs. Sample Rate

100

CS4334/5/6/7/8/9

DIGITAL CHARACTERISTICS (T

= 25°C; VA = 4.75V - 5.5V)

A

Parameters Symbol Min Typ Max Units

High-Level Input Voltage V
Low-Level Input Voltage V
Input Leakage Current (Note 8) I

IH

IL

in

2.0 - - V

--0.8V

--±10µA

Input Capacitance - 8 - pF

Notes: 8. I

for CS433X LRCK is ±20µA max.

in

ABSOLUTE MAXIMUM RATINGS (AGND = 0V; all voltages with respect to ground.)

Parameters Symbol Min Max Units

DC Power Supply VA -0.3 6.0 V
Input Current, Any Pin Except Supplies I
Digital Input Voltage V
Ambient Operating Temperature (power applied) T
Storage Temperature T

in

IND

A

stg

-±10mA

-0.3 VA+0.4 V

-55 125 °C

-65 150 °C

WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is

not guaranteed at these extremes.

RECOMMENDED OPERATING CONDITIONS (AGND = 0V; all voltages with respect to ground.)

Parameters Symbol Min Typ Max Units

DC Power Supply VA 4.75 5.0 5.5 V

DS248PP3 7

CS4334/5/6/7/8/9

()

()

SWITCHING CHARACTERISTICS (T

= -40 to 85°C; VA = 4.75V - 5.5V; Inputs: Logic 0 = 0V,

A

Logic 1 = VA, CL = 20pF)

Parameters Symbol Min Typ Max Units

Input Sample Rate Fs 2 - 100 kHz
MCLK Pulse Width High MCLK/LRCK = 512 10 - 1000 ns
MCLK Pulse Width Low MCLK/LRCK = 512 10 - 1000 ns
MCLK Pulse Width High MCLK / LRCK = 384 or 192 21 - 1000 ns
MCLK Pulse Width Low MCLK / LRCK = 384 or 192 21 - 1000 ns
MCLK Pulse Width High MCLK / LRCK = 256 or 128 31 - 1000 ns
MCLK Pulse Width Low MCLK / LRCK = 256 or 128 31 - 1000 ns

External SCLK Mode

LRCK Duty Cycle (External SCLK only) 40 50 60 %
SCLK Pulse Width Low t
SCLK Pulse Width High t
SCLK Period MCLK / LRCK = 512, 256 or 384 t

SCLK Period MCLK / LRCK = 128 or 192 t
SCLK rising to LRCK edge delay t

SCLK rising to LRCK edge setup time t
SDATA valid to SCLK rising setup time t
SCLK rising to SDATA hold time t

sclkl
sclkh
sclkw

sclkw

slrd
slrs

sdlrs

sdh

20 - - ns
20 - - ns

1

------------------- --­128

1

------------------ ­64

Fs

Fs

--ns

--ns

20 - - ns
20 - - ns
20 - - ns
20 - - ns

Internal SCLK Mode

LRCK Duty Cycle (Internal SCLK only) (Note 9) - 50 - %
SCLK Period (Note 10) t

SCLK rising to LRCK edge t

SDATA valid to SCLK rising setup time t

sclkw

sclkr

sdlrs

1

---------------- ­SCLK

--

1

------------------- --- 10+

()

512

Fs

--ns

tsclkw

----------------- ­2

µ

--ns

s

SCLK rising to SDATA hold time

MCLK / LRCK = 512, 256 or 128

SCLK rising to SDATA hold time

MCLK / LRCK = 384 or 192

Notes: 9. In Internal SCLK Mode, the Duty Cycle must be 50%

t

sdh

t

sdh

1

------------------ ----15+

()

512

Fs

1

------------------ ----15+

()

384

Fs

+/−

1/2 MCLK Period.

--ns

--ns

10. The SCLK / LRCK ratio may be either 32, 48, or 64. This ratio depends on part type and MCLK/LRCK
ratio. (See figures 10-15)

8 DS248PP3