Lowest PFC System Cost for Electronic Ballasts
Variable Frequency Discontinuous Conduction Mode
Improved Efficiency Due to Variable Switching Frequency
EMI Signature Reduction from Digital Noise Shaping
Integrated Feedback Compensation
Overvoltage Protection with Hysteresis
Overpower Protection with Shutdown
UVLO with Wide Hysteresis
Thermal Shutdown with Hysteresis
Description
CS1600 is a high-performance Variable Frequency Discontinuous Conduction Mode (VF - DCM), active Power Factor
Correction (PFC) controller, optimized to deliver the lowe st PFC
system cost for electronic ballast applications.
A variable ON time / variable frequency algorithm is used to
achieve near unity power factor. This algorithm spreads the EMI
frequency spectrum, which reduces the conducted EMI filtering
requirements. The feedback loop is closed through an integrated
compensation network within the IC, eliminating the need for
additional external components. Protection features such as
overvoltage, overcurrent, overpower, open- and short-circuit protection, overtemperature, and brownout help protect the device
during abnormal transient conditions.
Pin Assignments
Advance Product Information
Cirrus Logic, Inc.
http://www.cirrus.com
This document contains information for a product under development.
Cirrus Logic reserves the right to modify this product without notice.
Copyright Cirrus Logic, Inc. 2010
(All Rights Reserved)
JUN ‘10
DS904A6
1. PIN DESCRIPTIONS
NC
STBY
IAC
FB
NC
VDD
GD
GND
1
2
3
4
8
7
6
5
CS1600
Table 1. Pin Descriptions
Pin NamePin #I/O
NC
STBY
IAC
FB
GND
GD
VDD
1, 8-
2IN
3IN
4IN
5–
6OUT
7IN
Description
No Connect — Connect these pins to VDD to prevent any leakage path that could
arise from leaving them unterminated.
Standby — This is an active-low pin. Shorting this pin to GND disables PFC switching. The input has a pull-up resistor and should be driven with an open-collector
device. Leave this pin unterminated when not in use.
Rectified Line Voltage Sense — The IAC pin is used to sense the rectified line voltage. This signal, in conjunction with the signal on the FB pin, is used in the Power
Factor Correction (PFC) algorithm
A filter capacitor of up to 2.2 nF may be added between this pin and VDD to provide
noise immunity.
Feedback Voltage Sense — The FB pin is used to sense the output voltage of the
PFC stage. This signal, in conjunction with the signal on the IAC pin, is used in the
Power Factor Correction (PFC) algorithm.
A filter capacitor of up to 2.2 nF may be added between this pin and VDD to provide
noise immunity.
Ground — GND is a common reference for all the functional blocks in this device.
Gate Drive — GD is the output of the device with a source capability of 0.5 A and a
current sink capacity of 1 A.
IC Supply Voltage — VDD is the input used to provide bias to the device. This pin
has an internal shunt to ground. An external bias needs to be applied for steadystate operation. A low-ESR ceramic decoupling capacitor at this pin is recommended
for reliable operation of this device.
Notes: 1. The CS1600 has an internal shunt regulator that controls the nominal operating voltage on the VDD pin.
2. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power
dissipation at the rate of 50 mW / ºC for variation over temperature.
V
z
DD
DD
600mW
V
V
V
2.2Electrical Characteristics
Recommended operating conditions (unless otherwise specified): TA = TJ = -40º to +125º C, VDD = 10 to 15 V, GND = 0 V.
Typical values are at T