Cirrus Logic CRD44600-PH-FB User Manual
CRD44600-PH-FB
Stereo 100 W PWM Amplifier Reference Design
Features
z Two full-bridge channels, 100 W each
z 106 dB Dynamic Range - both channels
z 0.015% THD+N at 1 W
z Power Supply Rejection (PSR) feedback
allowing amplifier to operate from low cost
linear unregulated power supplies
z Spread Spectrum Modulation - Reduces
Modulation Energy
z Passes CISPR and FCC requirements for
radiated and power line conducted
emissions
z Independent peak signal limiting per channel
z Thermal and over-current protection
z > 85% amplifier efficiency
z Works with GUI to configure the board
z Demonstrates recommended layout and
grounding arrangements
Description
The CRD44600-PH-FB PWM Amplifier demonstrates
the CS44600, Cirrus’ multi-channel pure digital PWM
I
controller. This reference design implements a twochannel amplifier which delivers 100 W per full-bridge
channel into 8 Ω loads using a single +50 V supply (at
1% THD+N). A 155 W unregulated linear power supply
is used to power the CRD44600-PH-FB.
As shown below, the CS44600 IC takes two stereo digital audio PCM inputs and converts them to PWM
outputs. This 64-pin LQFP PWM controller provides an
integrated sample rate converter for 32 kHz-192 kHz input sample rate support, volume up/down, speaker load
compensation, peak limiting to prevent amplifier clipping,
power supply ripple compensation, and AM frequency
interference elimination.
This reference design uses the the Philips TDA8939, an
integrated power stage back end for digital amplifiers
(two TDA8939 parts configured as full-bridges are used
for this two-channel design). Current limiting and thermal protection are provided by the TDA893 9.
The inductor/capacitor 2
nd
order low pass filter (LPF) removes high frequency components from the output
signal effectively converting it from digital to analog.
ORDERING INFORMATION
CRD44600-PH-FB Reference Design
155W Unregulated
Linear Power Supply
Audio Inputs and GUI
Cirrus Logic, Inc.
www.cirrus.com
Interface
+50 V
PCM Clocks & Data
I2C Host Control
PSR Circuitry
+50 V
CS4461 ADC
Channel 1
CS44600
(PWM Controller)
Channel 2
Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
+50 V
Philips
TDA8939
+50 V
Philips
TDA8939
LPF
LPF
8Ω
8Ω
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TABLE OF CONTENTS
1. SYSTEM OVERVIEW ............................................................................................................... 3
1.1 CS44600 PWM Modulator ................................................................................................. 3
1.2 CS4461 PSR Feedback ADC ................................. ... ... ... .... ... ... ... ... .... ... ... ........................3
1.3 TDA8939 Power Stage ....................... ... .... ... .......................................... ... ... .... ... ... ...........3
1.4 CS8416 Digital Audio Receiver .......................................................................................... 3
1.5 CS5341 Analog to Digital Converter ..................................................................................3
1.6 Control Port Interface and GUI .......................................................................................... 4
1.7 Unregulated Linear Power Supply ..................................................................................... 4
2. GUI CONTROL ......................................................................................................................... 5
2.1 CS44600 Dialog Tab .......................................................................................................... 5
2.2 Advanced Register Debug Tab .. ... ... ... ... .... .......................................... ... ... ... .... ... ... ... ... .... . 6
3. POWER SUPPLY ..................................................................................................................... 8
3.1 Power Supply Ratings ................................... ... ... .... ... ... ... .... ... ... ... .....................................8
3.2 Power Supply Decoupling ...... .... ... ... ... ... .... .......................................... ... ... ... .... ... ... ... ... .... . 8
4. ELECTROMAGNETIC INTERFERENCE (EMI) ....................................................................... 9
4.1 Suppression of EMI at the Source ..................................................................................... 9
4.2 EMI Testing ......... .......................................... ... ... .......................................... .... ... ... ...........9
5. CRD44600-PH-FB SCHEMATICS .........................................................................................14
6. CRD44600-PH-FB POWER SUPPLY SCHEMATICS ........................................................... 19
7. CRD44600-PH-FB LAYOUT ...................................................................................................20
8. CRD44600-PH-FB BILL OF MATERIALS ....................................................................... 23
9. TYPICAL PERFORMANCE PLOTS ....................................................................................... 25
10. REVISION HISTORY ............................................................................................................30
CRD44600-PH-FB
LIST OF FIGURES
Figure 1. CS44600 Dialog Tab........................................................................................................ 5
Figure 2. Advanced Register Debug Tab - CS44600......................................................................6
Figure 3. Advanced Register Debug Tab - CS8416........................................................................7
Figure 4. EMI Testing Setup..........................................................................................................11
Figure 5. EMI Testing Setup, Close-up .........................................................................................11
Figure 6. Radiated EMI Testing Results- 30 MHz to 200 MHz.......................................... ... ... ... ... 12
Figure 7. Radiated EMI Testing Results- 200 MHz to 1 GHz........................................................12
Figure 8. Conducted Power Line Testing Results.........................................................................13
Figure 9. Audio Inputs...................................................................................................................14
Figure 10. CS44600......................................................................................................................15
Figure 11. PSR Feedback.............................................................................................................16
Figure 12. Left/Right Channels......................................................................................................17
Figure 13. Control Port and Power................................................................................................18
Figure 14. Power Supply...............................................................................................................19
Figure 15. Silk Screen Top............................................................................................................ 20
Figure 16. Topside Layer .............................................................................................................. 21
Figure 17. Bottomside Layer .........................................................................................................22
Figure 18. Frequency Response...................................................................................................25
Figure 19. THD+N vs. Frequency at 1 W, 10 W, and 50 W ..........................................................26
Figure 20. THD+N vs. Power at 1 kHz..........................................................................................27
Figure 21. FFT at -60 dBFS and 1 kHz .........................................................................................28
Figure 22. FFT at -1 dBFS and 1 kHz. Red = PSR Feedback Off. Blue = PSR Feedback On .....29
LIST OF TABLES
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Table 1. Bill of Materials................................................................................................................ 23
Table 2. Revision History.............................................................................................................. 30
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CRD44600-PH-FB
1. SYSTEM OVERVIEW
The CRD44600-PH-FB reference design is an excellent means for evaluating the CS44600 sixchannel Class-D PWM modulator. It incorporates a digital Class-D PWM modulator, two fullbridge power stages, and power supply rejection (PSR) circuitry, all on a two-layer board.
The CRD44600-PH-FB schematic set is shown in Figures 9 through 13 and the board layout is
shown in Figures 15 through 17.
1.1 CS44600 PWM Modulator
A complete description of the CS44600 is included in the CS44600 product data sheet.
The CS44600 converts linear PCM data to pulse width modulated (PWM) output. It uses a
Sample Rate Converter (SRC) to eliminate serial audio interface jitter effects and maintains
a constant PWM switch rate of 384 kHz, resulting in high-quality sound output.
PCM data and clocks are input from either the CS8416 (S/PDIF Receiver), CS5341 (Stereo
ADC), or J19 (PCM Input Header).
1.2 CS4461 PSR Feedback ADC
A complete description of the CS4461 is included in the CS4461 product data sheet.
The CS4461 is connected to the CS44600 to provide power supply rejection (PSR) for the
VP supply voltage connected to J17. Resistors R41 and R42 are set for VP = +50 V. See the
CS4461 data sheet for equations to determine the resistor values.
1.3 TDA8939 Power Stage
A complete description of the Philips TDA8939 is included in the TDA8939 product data
sheet.
The TDA8939 is a high-voltage PWM amplifier power stage. It integrates two half-bridge drivers and fault protection. For the CRD44600-PH-FB, each of the two TDA8939’s are configured as full-bridges. Care should be taken to not connect the full bridge black speaker
connectors to ground as these outputs are driven.
1.4 CS8416 Digital Audio Receiver
The operation of the CS8416 receiver and a discussion of the digital audio interface are described in the CS8416 data sheet.
The CS8416 converts the input S/PDIF data stream into PCM data for the CS44600. The
CS8416 operates in master mode with RMCK = 256*Fs. The digital Interface format is set to
Left Justified (24-bit).
D20 (RERR) indicates a receiver error, such as loss of lock.
S/PDIF input is through OPT1 or J33.
1.5 CS5341 Analog to Digital Converter
The operation of the CS5341 ADC is described in the CS5341 data sheet.
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The CS5341 converts analog audio into PCM data for the CS44600. The CS5341 operates
in slave mode and the digital Interface format is set to Left Justified (24-bit).
Analog input is through J5 and J6.
1.6 Control Port Interface and GUI
The CS44600 and CS8416 are controlled through the provided control port interface. Connection to the control port is made through J37 (RS-232 Serial). A Windows based GUI provides control over all the individual registers of the CS44600 and the CS8416.
1.7 Unregulated Linear Power Supply
The power supply used for the CRD44600-PH-FB is a linear 155 W supply. The supply provides an unregulated +50 V for the TDA8939 power stages. The power supply consists of a
transformer, diode bridge rectifier, and bulk capacitor. Schematics are shown in Figure 14.
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CRD44600-PH-FB
2. GUI CONTROL
The CRD44600-PH-FB is shipped with a Microsoft Windows® based GUI, which allows control
over the CS8416 and CS44600 registers. Interface to the CDB44600 control port is provided using an RS-232 serial cable. The GUI requires no installation and can be run directly from the CD
or copied to a local directory and run from there. Once the serial port cable is connected between
the CRD44600-PH-FB and the host PC, load the FlexLoader.exe from the CRD44600-PH-FB directory. Once loaded, all registers are set to their default reset state. The GUI File menu provides the ability to save and restore (load) register settings. Sample script files are provided for
basic functionality. The GUI serial port interface is setup by default for 115.2 Kbps operation on
COM1. To change these settings, edit the “CRD44600-PH-FBCommunications” section of the
flexconfig.ini file or change the system communications setting in the Windows® control panel.
2.1 CS44600 Dialog Tab
The CS44600 Dialog tab provides high level control over the CS44600’s registers. Controls
are provided to change volume, mute, enable PSR, enable the power stages, limiter control.
Figure 1. CS44600 Dialog Tab
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2.2 Advanced Register Debug Tab
The Advanced Register Debug tab provides low level control over the CS44600 and CS8416
individual register settings. Each device is displayed on a separate tab. Register values can
be modified bitwise or bytewise. For bitwise, click the appropriate push button for the desired
bit. For bytewise, the desired hex value can be typed directly in the register address box in
the register map.
Figure 2. Advanced Register Debug Tab - CS44600
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Figure 3. Advanced Register Debug Tab - CS8416
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3. POWER SUPPLY
3.1 Power Supply Ratings
The required power supply current rating can be estimated as follows. 95 W is used as the
reference output power per channel because this represents the typical full scale output with
no clipping. Assume the efficiency, η, is approximately 85% (this accounts for power to supply control electronics and overhead), then for 95 W x 2 channels:
WP
190
Total
P
Supply
P
Consequently the supply current is:
Out
224
85.0
W
2
η
Total
P
2
W
224
===
W
112
===
Supply
I
Supply
P
V
Supply
The factor of 2 in the denominator of the P
Supply
W
112
50
===
V
A
24.2
calculation arises from the fact that for typical
consumer applications in A/V or DVD receivers, the power supply should be capable of providing ½ the total requirement for all channels operating at full power. This design guide is
still quite conservative, and gives more than adequate headroom in real applications.
3.2 Power Supply Decoupling
Proper power supply decoupling is one key to maximizing the performance of a Class-D amplifier. Because the design uses an open loop output stage, noise on the power supply rail
will be coupled to the output. While the PSR functionality of the CS44600 helps reduce power
supply noise feedthrough to the output, careful decoupling of the power stage supply rails is
essential. Referring to Figure 15, the top side of the CRD44600-PH-FB PWM amplifier board,
good decoupling practice is shown. Notice that the 0.1 µF ceramic capacitors are as close
as physically possible to the power pins of the TDA8939. The ground side of the capacitors
is connected directly to top side ground plane, which is also used by the power supply return
pins. This keeps the high frequency current loop small to minimize power supply variations
and EMI. 470 µF electrolytic capacitors are also located in close proximity to the power supply pins to supply the current locally for each channel. These are not required to be expensive
low ESR capacitors. General purpose electrolytic capacitors that are specified to handle the
ripple current can be used. The real time PSR feedback of the CS44600/CS4461 can greatly
attenuate the induced voltages due to the power supply ripple current.
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CRD44600-PH-FB
4. ELECTROMAGNETIC INTERFERENCE (EMI)
This reference design from Cirrus Logic is a board level solution which is meant to control
emissions by minimizing and suppressing them at the source in contrast to containing them
in an enclosure. Utilizing spread spectrum modulation techniques to reduce the overall
switching energy, along with a low internal modulator clock frequency of 24.576 MHz, the radiated emissions are greatly reduced. These features allow for the use of very low cost components to couple the high frequency noise to chassis ground. No common mode chokes,
inductors, or power line filters were required.
The EMI requirements for an amplifier have added dimensions beyond those imposed on
power supplies. Audio amplifiers are usually located in close proximity to radio receivers, particularly AM receivers which are notoriously sensitive to interference. Amplifiers also need to
operate with speaker leads of unpredictable length and construction which make it possible
for any high frequency currents that appear on the outputs to generate nuisance emissions.
4.1 Suppression of EMI at the Source
Several techniques are used in the circuit design and board layout to minimize high frequency fields in the immediate vicinity of the high power components. Specific techniques
include the following:
• As was mentioned in Section 3.2, effective power supply decoupling of high frequency currents, and minimizing the loop area of the decoupling loop is one aspect of minimizing EMI.
• Each output of the TDA8939 includes “snubbing” components. For example, OUT1 of U1 includes snubber components R18/R30 (5.6 Ω) and C34/C46 (560 pF). These components serve
to damp ringing on the switching outputs in the 30-50 MHz range. The snubbing components
should be as close as practical to the output pins to maximize their effectiveness. Again, refer
to Figure 15 for the preferred component layout.
• A separate ground plane with a capacitively coupled electrical connection to the chassis and
which surrounds the speaker output connector should be implemented. This allows the speaker
outputs to be AC coupled to the chassis just before they exit the chassis from the speaker connector. Again, refer to Figure 15 for the preferred component layout.
• Make use of source termination resistors on all digital signals whose traces are longer than approximately 25 mm.
It is extremely critical that the layout of the power amplifier section of the Cirrus Logic
CS44600 Reference Design be copied as exactly as possible to assure best RF/EMI performance.
4.2 EMI Testing
The CRD44600-PH-FB has been tested to CISPR and FCC Class B limits for radiated and
power line conducted emissions. The same test setup and test signal were used for all
tests. The setup consisted of an unregulated linear power supply, CRD44600-PH-FB
board, 5m of speaker cable, and two 8-Ω resistive loads. This setup is shown in Figure 4
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