Cirrus Logic CRD4202-2 User Manual
CRD4202-2
AC '97 Six Channel CNR Audio Reference Design with PLL
Features
Phase Locked Loop (PLL) Codec Operation
Six Channel Analog Audio Outputs
Headphone Sense using GPIO
CS4202 codec and two CS4334 DACs
20-bit D to A conversion (DAC)
18-bit A to D conversion (ADC)
S/PDIF (IEC-958) optical digital output
Complete suiteof Analog I/O connections:
– Line, Mic, CD, Video, Modem, and Aux Inputs
– Modem, Headphone, Line Front, Line Rear
and Line Center/Sub-Woofer Outputs
2-layer low cost PC board
Complies with Intel®AC '97 revision 2.2
Exceeds Microsoft’s®PC 2001 audio
performance requirements.
Description
The CRD4202-2 reference designeliminates the cost of
the 24.567 MHz crystal by operating t he CS4 202 in
Phase Lock ed Loop(PLL) mode. This reference design
also features six channel analog audio outputs, an optical S/PDIF digital output, and Communication and
Networking Riser (CNR) interface. This design uses the
CS4202 audio c odec which has several advanced features including a built-in headphone amplifier,
simultaneous six channel analog and S/PDIF optical
digital output, GPIO for headphone detection, and up to
30 dB of internal microphone boost.
The CRD4202-2 reference desig n is available by ordering the CMK4202-2 manufacturing kit. This kit includes
the CRD4202-2 board, a full set of schematic des ign
files (OrCAD
PCB art work files, and bill of mat erials. This reference
design offers significant cost savings over competing
solutions and can be easily modified to meet your s pecific design goals.
ORDERING INFO
CMK4202-2 (Manufacturing K it)
®
format), PC B job files (PADS®ASCII),
Microphone Input
Line Input
Line Output
Headphone Output
Rear Channel Output
Center / Sub-W oofer Output
S/PDIF Digital Optical Output
Preliminary Product Information
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
MIC
IN
LINE
IN
LINE
OUT
HEADPH
OUT
SURR
OUT
CNT/LFE
OUT
S/PDIF
OUT
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product withoutnotice.
CopyrightCirrus Logic, Inc. 2002
(All Rights Reserved)
CS4202
AUX INVIDEOINCD ININT MODEM
Cirrus Logic
CRD4202-1
DS549RD1B1
MAR ‘02
1
TABLE OF CONTENTS
1. GENERAL INFORMATION ...................................................................................3
2. SCHEMATIC DESCRIPTION ................................................................................3
2.1 CS4202 A udio Codec .................................................................................3
2.2 Analog Inputs ..............................................................................................3
2.3 Center, LFE, and Surround Output s ...........................................................4
2.4 Front Channel and Headphone Outputs .....................................................4
2.5 S/PDIF O ptical Output ................................................................................4
2.6 CNR Connector and EEPROM ...................................................................4
2.7 Auto Demotion Circuit .................................................................................4
2.8 Phase Locked Loop ....................................................................................4
2.9 Co mponent Selection .................................................................................5
2.10 EMI Components ......................................................................................5
3. GROUNDING AND L AYOUT ................................................................................5
3.1 Partitioned Voltage and Ground Planes .....................................................5
3.2 AC-Link .......................................................................................................5
3.3 CS4202 L ayout Notes .................................................................................5
4. REFERENCES .......................................................................................................6
4.1 ADDENDUM ...............................................................................................6
5. BILL OF MATERIALS .........................................................................................21
CRD4202-2
LIST OF FIGURES
Figure 1 . Block Diagram ....................................................................................................7
Figure 2. CS4202 Audio Codec .........................................................................................8
Figure 3 . Analog Inputs ......................................................................................................9
Figure 4 . Center Channel, Surround, and Sub-Woofer Outputs ......................................10
Figure 5 . Front Channel and Headphone Sens e Out put .................................................11
Figure 6 . S/PDIF Optical Output ......................................................................................12
Figure 7. CNR Connector ................................................................................................13
Figure 8 . Phase Locked Loop ..........................................................................................14
Figure 9 . Auto Demotion and Serial Buffers ....................................................................15
Figure 10. PCB Layout: Top Assembly Drawing ..............................................................16
Figure 1 1. PCB Layout: Top Layer ..................................................................................17
Figure 1 2. PCB Layout: Bottom Layer .............................................................................18
Figure 1 3. PCB Layout: Drill Drawing ..............................................................................19
Figure 1 4. PCB Layout: Top Silkscreen ...........................................................................20
Contacting Cirrus Logic Support
For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:
http://www.cirrus.com/corporate/contacts/
Microsoft, Windows 95, Windows 98 and Windows Millennium and WHQLis registered trademark of Microsoft.
CrystalClear is a trademark of Cirrus Logic, Inc.
Intel is a registered trademark of Intel Corporation.
OrCAD is a registered trademark of OrCAD, Inc.
PADS is a registered trademark of, PADS Software, Inc.
Preliminary product information describes products which arein production, but for which full characterization data is not yet available. Advance product information
describes products which are indevelopment and subject to development changes. Cirrus Logic, Inc. has madebest efforts to ensure that theinformation contained
in thisdocument is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any kind (express
or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights of third parties. This
document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of this publication may be
copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior
written consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or disk may be printed for use by the user. However, no part of the printout or electronic
files may be copied, reproduced, storedin a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture or sale of any items without the
prior writtenconsent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in this document may be trademarks
or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trademarks and service marks can be found at
http://www.cirrus.com.
2 DS549RD1B1
CRD4202-2
1. GENERAL INFORMATION
The CRD4202-2 CNR reference design features six
channel CD quality analog and S/PDIF digital audio outputs. The card includes the CS4202 AC '97
audio codec operating in PLL mode, and two
CS4334 24-bit serial stereo DACs. This combination gives the CRD4202-2 a rich feature set and industry leading audio performance.
The CS4202 audio codec includes a stereo 20-bit
DAC, a stereo 18-bit ADC, and a very flexible analog audio mixer.The serial data outputs are paired
with two CS4334 DACs to provide four additional
channels of analog audio. The CS4202 also features three stereo pairs of line level analog inputs, a
microphone input, and a stereo pseudo-differential
CD input. The input signals can be routed to the
ADC for recording or mixed together for recording
and direct playback. The CS4202 has internal registers that are used to control its various features
such as volume levels, audio muting, and signal
routing. The CS4202 maintains high audio quality
and exceeds the Microsoft®PC 2001 audio performance specifications.
The CS4202 audio codec communicates to the audio controller across the CNR interface using the
AC-Link. The AC-Link is a 5-wire serial digital interface that transfers digital audio data and GPIO
control/status data between the two devices, sends
commands from the audio controller to the codec,
and provides codec status information to the controller. For additional information on the AC-Link,
see the Intel
®
AC '97 revision 2.2 specification.
2. SCHEMATIC DESCRIPTION
The block diagram in Figure 1 illustrates the interconnections between the schematic pages found at
the end of this document. Sections 2.1 through 2.8
describe the circuitry contained in these schematics.
2.1 CS4202 Audio Codec
The CS4202 audio codec is shown in Figure 2. The
analog input signals to the CS4202 originate from
the inputs in Figure 3, while the analog outputs are
shown in Figure 4 and Figure 5. AFLT1 and
AFLT2 (pins 29, 30) require 1000 pF NPO/C0G
capacitors connected to analog ground. These capacitors provide a single pole lowpass filter to the
inputs of the CS4202 ADC. No other input filtering
is required.
The AC-Link may require series termination resistors to prevent reflections. These are normally
placed as close as possible to the transmitting end
of the AC-Link signal. The CS4202 SDATA_IN
(pin 8) and BIT_CLK (pin 6) outputs have 47 Ω series termination resistors.
The CS4202 is powered by separate analog and
digital power supplies, each with their own respective grounds. The AGND symbols refer to analog
ground and DGND symbols refer to digital ground.
For best results, connect the grounds together at a
single point with a 0.050 inch trace underneath the
CS4202. Each power pin requires an individual decoupling capacitor. These decoupling capacitors
are placed as close as possible to their respective
pins. The CS4202 audio codec uses a 0.1 µF ceramic capacitor for each of the +3.3 V digital and
+5 V analog supply pins.
2.2 Analog Inputs
The LINE_IN, VIDEO_IN, and AUX_IN stereo
inputs shown in Figure 3 are AC-coupled to the
CS4202 codec with 1 µF capacitors to minimize
low frequency roll-off. The pull down resistors are
recommended to prevent noise from coupling to
the analog inputs when they are not in use. Locations for 6 dB dividers were provided for 2.0 Vrms
input compatibility, but are not required for
PC 2001 compliance.
The microphone input is AC-coupled with a 1 µF
capacitor to minimize low frequency roll-off. The
DS549RD1B1 3
CRD4202-2
microphone circuit provides low voltage phantom
power for electret microphones. Phantom power is
derived from the +5 V analog supply and provides
a maximum of 4.2 V under no load and a minimum
of 2.0 V under a 0.8 mA load, as required by
PC 2001 specifications.
The CS4202 features a pseudo-differential CD input that minimizes common mode noise and interference. Each CD signal acts as one side of the
differential input and CD_C acts as the other side.
CD_C is used as the common return path for both
the left and right channels.
2.3 Center, LFE, and Surround Outputs
The audio outputs in Figure 4 drive the rear speakers (surround), center speaker (CNT), and subwoofer (LFE) in six channel applications. These
four outputs are driven digitally from the CS4202
through twoserialoutput ports and converted to analog audio through two high-performance CS4334
24-bit stereo DACs.
2.4 Front Channel and Headphone Outputs
Figure 5 details the Headphone and Line Output
circuits. The Line Outputs are the main analog outputs in a two channel system, and become the Front
Outputs in a six channel audio system.
The CS4202 has a built in headphone amplifier on
pins 39 and 41. These outputs are capable of driving headphones with impedances as low as 32 Ω.
The headphone outputs are AC-coupled through
220 µF capacitors. These large capacitor values
create excellent low frequency response even under
32 Ω loads.
uses an industry standard Toshiba TOTX-173 optical TOSLINK transmitter.
2.6 CNR Connector and EEPROM
The CNR connector is shown in Figure 7. CNR is a
motherboard interface that supports audio, modem,
and LAN subsystems.CNR applications are targeted at OEMs, system manufacturers, and system integrators who wish take advantage of physically
separating their audio, modem, or LAN circuitry
from the PC motherboard. CNR accomplishes this
without the additional cost associated with the interface circuitry required for a PCI bus add-in card.
The CRD4202-2 uses the AC-Link, SMBus, and
power supply pins. The SMBus signals are connected to an AT24C02 EEPROM to provide Plugand-Play functionality for the C NR card. The EEPROM holds the Subsystem Vendor ID and Subsystem ID. It also contains other information for
implementing a Plug-and-Play CNR card. For additional information on the CNR design specifications, programming utilities, and information on
®
programming the EEPROM, visit the Intel
munications and Network Riser (CNR) homepage
at http://developer.intel.com/technology/cnr/.
Com-
2.7 Auto Demotion Circuit
The configuration of the codec on the CRD4202-2
will always be set as the primary audio codec in
PLL mode. In crystal mode operation it can automatically demote to a secondary codec in the presence of a motherboard codec when R54 is changed
to 100 kΩ (Figure 9). This feature is in accordance
with the AC '97 Codec Disable and Demotion
Rules.
2.5 S/PDIF Optical Output
The S/PDIF (IEC-958) digital output shown in
Figure 6 is compatible with digital inputs on consumer devices such as Mini Disk recorders and
consumer stereo receivers. The S/PDIF output operates at a fixed sampling frequency of 48 kHz. It
4 DS549RD1B1
2.8 Phase Locked Loop
The CRD4202-2 reference design is configured to
operate the CS4202 in Phase Locked Loop (PLL)
mode as the primary codec. The external clock
mustbe one of the threesupported rates, and the codec ID pins must be properly configured to identify
CRD4202-2
the input clock frequency. Location Y2 in Figure 8
is populated with a 14.31818 MHz surface mounted clock oscillator (test clock) to demonstrate the
CS4202 PL L operation.
2.9 Component Selection
Great attention was given to the particular components used on the CRD4202-2 board with cost, performance, and package selection as the most
important factors. Listed are some of the guidelines
used in the selection of components:
• No components smaller than 0805 SMT package.
• Only single package passive components. No
resistor packs. This reduces the risk of crosstalk
between analog audio signals.
• All components except connectors are in surface mount packages.
2.10 EMI Components
Optional capacitors or inductors may be included
to help the board meet EMI compliance tests, such
as FCC Part 15. Choose these component values
according to individual requirements.
3. GROUNDING AND LAYOUT
The component layout and signal routing of the
CRD4202-2 provide a good model for developing
new CNR add-in card designs.
3.1 Partitioned Voltage and Ground
Planes
It is critical for good audio performance to separate
digital and analog sections to prevent digital noise
from affecting the performance of the analog circuits. The analog section of the CRD4202-2 is
physically isolated from the digital section with a
0.10 inch partition. Partitioning is defined as the
absence of copper on all PCB signal layers. The analog and digital sections have their own separate
ground planes. All analog components, power traces, and signal traces are routed over the analog
ground plane. Digital components, power traces,
and signal traces are not allowed to crossover into
the analog section.
The CS4202 audio codec is placed at the transition
point between the analog and digital ground planes.
The analog and digital ground planes must be tied
together externally for the CS4202 to maintain
proper voltage references. For best results, the two
ground planes are tied together with a single 0.050
inch trace under the CS4202 near its digital ground
pins.
Data converters are generally susceptible to noise
on the crystal pins. In order to reduce noise from
coupling onto these pins, the area around the
24.576 MHz crystal and its signal traces are filled
with copper on the top and bottom of the PCB and
attached to digital ground.
A separate chassis ground provides a noise-free
reference point for all of the EMI suppression components. The chassis ground plane is connected to
the analog ground plane at the external jacks.
3.2 AC-Link
According to the AC '97 revision 2.2 specification,
the AC-Link signals can have a maximum capacitance (including traces, connectors, and circuitry)
of 47.5 pF on BIT CLK and SDATA_IN (assuming
a single codec). If this capacitance is exceeded,
timing violations may occur and cause the system
to malfunction. In order to avoid adding excessive
capacitance, do not add any EMI capacitors to
ground on any of the AC-Link lines. In addition,
keep the trace length of the AC-Link as short as
possible. Keeping the AC-Link trace length under 8
inches is strongly recommend.
3.3 CS4202 Layout Notes
Refer to the CS4202 Data Sheet for analog and digital partitioning guidelines and bypass capacitor
placement. Pay special attention to the location of
bypass capacitors on REFFLT, AFLT1, AFLT2,
and the placement of the power supply capacitors.
DS549RD1B1 5
4. REFERENCES
1) Intel®, Audio Codec '97 Component Specification, Revision 2.2, September, 2000.
http://developer.intel.com/ial/scalableplatforms/audio/index.htm/
2) Intel
®
, CNR Specification, Revision 1.1, October 18, 2000.
http://developer.intel.com/technology/cnr/
CRD4202-2
3) Cirrus Logic, CS4202 Audio Codec
'97 Data Sheet
http://www.cirrus.com/products
4) Steve Harris, Clif Sanchez, Personal Computer Audio Quality Measurements
, Version 1.0
http://www.cirrus.com/pubs/meas100.pdf
5) Microsoft, PC Design Guidelines
,
http://www.microsoft.com/hwdev/desguid.htm
6) M. Montrose, Printed Circuit Board Design Techniques for EMC Compliance
Press, New York: 2000.
4.1 ADDENDUM
• Schematic drawings
• Layout drawings
• Bill of materials
(2nd edition), IEEE
6 DS549RD1B1
CRD4202-2
ANALOG_IN
PLL (optional)
PRIM_SEC_SWITCH
LINE_IN_L
LINE_IN_R
CD_IN_L
CD_IN_R
CD_C
VIDEO_IN_L
VIDEO_IN_R
AUX_IN_L
AUX_IN_R
MIC_IN
PHONE_IN
MONO_OUT
PC_BEEP
XTAL_IN
XTAL_OUT
ID0#
ID1#
ASDIN
PRIM_DN#
ASDIN0
ASDIN1
CS4202
LINE_IN_L
LINE_IN_R
CD_IN_L
CD_IN_R
CD_C
VIDEO_IN_L
VIDEO_IN_R
AUX_IN_L
AUX_IN_R
MIC1
PHONE_IN
MONO_OUT
PC_BEEP
XTAL_IN
XTAL_OUT
ID0#
CNR_BUS
ASDIN0
ASDIN1
ANALOG_OUT
HP_O UT_L
HP_O UT_R
HP_O UT_C
GPIO2
LINE_OUT_L
LINE_OUT_R
SPDIF_OUT
SDOUT0
SDOUT1
ABITCLK
ASYNC
PRIM_DN#
ASDIN
PRIM_DN#
ASDOUT
ARST#
ASYNC
ARST#
ASDOUT
ABITCLK
SCLKID1#
LRCLK
HP_OUT_L
HP_OUT_R
HP_OUT_C
GPIO2
LINE_OUT_L
LINE_OUT_R
SPDIF_OUT
SPDIF_TX
SERIAL_PORT
SDOUT0
SDOUT1
SCLK
LRCLK
MCLK
Figure 1. Block Diagram
DS549RD1B1 7
8 DS549RD1B1
+3.3VD
DGND
C1
0.1uF
Z5U
C5
2.2uF
Y5V
C2
0.1uF
Z5U
C6
0.1uF
X7R
+5VA
AGND
C3
0.1uF
Z5U
C7
1000pF
NPO
C4
0.1uF
Z5U
C8
1000pF
NPO
PC_BEEP
PHONE_IN
AUX_IN_L
AUX_IN_R
VIDEO_IN_L
VIDEO_IN_R
CD_IN_L
CD_C
CD_IN_R
MIC1
LINE_IN_L
LINE_IN_R
PRIM_DN#
XTAL_IN
XTAL_OUT
R55
NO POP
U1 CS4202
25
AVdd1
38
AVdd2
1
DVdd1
9
DVdd2
12
PC_BEEP
13
PHONE
14
AUX_L
15
AUX_R
16
VIDEO_IN_L
17
VIDEO_IN_R
18
CD_L
19
CD_C
20
CD_R
21
MIC1
22
MIC2
23
LINE_IN_L
24
LINE_IN_R
28
Vrefout
27
REFFLT
29
AFLT1
30
AFLT2
45
ID0#
46
ID1#
2
XTL_IN
3
XTL_OUT
AVss1
AVss2
DVss1
DVss2
BIT_CLK
SDATA_OUT
SDATA_IN
SYNC
RESET#
LINE_OUT_L
LINE_OUT_R
HP_OUT_L
HP_OUT_C
HP_OUT_R
GPIO2
MONO_OUT
SPDIF_OUT
EAPD/SCLK
HPCFG
GPIO0/LRCLK
GPIO1/SDOUT
GPIO3
GPIO4/SDO2
26
42
4
7
6
R1 47
5
8
R2 47
10
11
35
36
39
40
41
32
37
48
47
31
43
44
33
34
ABITCLK
ASDOUT
ASDIN
ASYNC
ARST#
LINE_OUT_L
LINE_OUT_R
HP_OUT_L
HP_OUT_C
HP_OUT_R
GPIO2
MONO_OUT
SPDIF_OUT
SCLK
LRCLK
SDOUT0
SDOUT1
DGND
AGND
AGND
LINE_OUT_L
C11
1000pF
NPO
LINE_OUT_R
C12
1000pF
NPO
MONO_OUT
C13
1000pF
NPO
DGND
Y1
NO POP
C14
NO POP
C15
NO POP
DGNDAGND
Figure 2. CS4202 Audio Codec
ID1#
ID0#
AGND
GND TIE 0.050 inches
AGND
DGND
For 6 channel Operation,
pin33ispulledlow.
CRD4202-2
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