Cirrus Logic CK4970x4 User Manual

CK49x

Customer Kit

CK49x–4953xx/

4970x4

User’s Manual

Preliminary Product Information

http://www.cirrus.com

This document contains information for a new product. Cirrus Logic reserves the right to modify this product without notice.

DS898CK7

CK49x User’s Manual

Contacting Cirrus Logic Support

For all product questions and inquiries contact a Cirrus Logic Sales Representative.

To find the one nearest to you go to www.cirrus.com

MPORTANT NOTICE

“Preliminary” product information describes products that are in production, but for which full characterization data is not yet available.

Cirrus Logic, Inc. and its subsidiaries (“Cirrus”) believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.

Cirrus Logic, Cirrus, the Cirrus Logic logo designs, DSP Composer, Cirrus Extra Surround, Cirrus Original Multichannel Surround, and Cirrus Original Surround are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners.

Microsoft, Windows, and XP are trademarks of Microsoft Corporation.

Motorola and SPI are registered trademarks of Motorola, Inc.

C is a trademark of Philips Semiconductor Corp.

HDMI is a trademark or registered trademark of HDMI Licensing, LLC in the United States and/or other countries.

Silicon Image is a trademark of Silicon Image, Inc.

CK49x User’s Manual

Chapter 1. Customer Kit Contents and Requirements ......................................1-1

1.1 CK49x Customer Kit Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1

1.2 Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-2

1.2.1 PC Requirements ............................................................................................................1-2

1.2.2 Software Requirements ...................................................................................................1-2

1.2.3 Support Hardware Requirements ....................................................................................1-2

1.2.4 Cabling Requirements .....................................................................................................1-3

1.3 CK49x System Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-4

1.3.1 Audio Inputs.....................................................................................................................1-5

1.3.1.1 Analog Line-level Inputs ................................................................................1-5

1.3.1.2 HDMI Digital Input..........................................................................................1-5

1.3.1.3 Optical Digital Inputs......................................................................................1-5

1.3.1.4 Coaxial Digital Inputs .....................................................................................1-5

1.3.1.5 I2S Digital Input .............................................................................................1-5

1.3.1.6 Microphone Input ...........................................................................................1-5

1.3.2 Audio Outputs..................................................................................................................1-6

1.3.2.1 Main Analog Line-level Outputs.....................................................................1-6

1.3.2.2 Headphone Output ........................................................................................1-6

1.3.2.3 Dual Zone Analog Line-level Outputs ............................................................1-6

1.3.2.4 HDMI Digital Output.......................................................................................1-6

1.3.2.5 Optical Digital Output.....................................................................................1-6

1.3.2.6 I2S Digital Output...........................................................................................1-6

1.3.2.7 I2S Digital Output (DAO Mux Output) ............................................................1-7

1.3.3 DC Power Input ...............................................................................................................1-7

1.3.4 USB Connector................................................................................................................1-7

1.3.5 MCU Programming Header .............................................................................................1-7

1.3.6 Reset button ....................................................................................................................1-7

1.3.7 Buttons and Knobs ..........................................................................................................1-7

1.3.8 DAO MUX Select Header ................................................................................................1-7

1.3.9 DAI1 Audio Input Source Multiplexer...............................................................................1-8

1.3.10 DAI2 Audio Input Source Multiplexer.............................................................................1-8

1.3.11 CS495xxx/CS497xxx Audio DSP ..................................................................................1-8

1.3.12 Debug Header ...............................................................................................................1-9

1.3.13 CS2000 Clock Synthesizer............................................................................................1-9

1.3.14 CS42528 S/PDIF RX .....................................................................................................1-9

1.3.15 CS42528 Audio CODEC ...............................................................................................1-9

1.3.16 CS4344 DAC .................................................................................................................1-9

1.3.17 HDMI Recevier (RX)....................................................................................................1-10

1.3.18 HDMI Transmitter (TX) ................................................................................................1-10

1.3.19 Memory........................................................................................................................1-10

1.3.20 Audio Clocking.............................................................................................................1-10

1.3.20.1 Clock and Data Flow for ADC Input ...........................................................1-11

1.3.20.2 Clock and Data Flow for S/PDIF Input .......................................................1-12

1.3.20.3 Clock and Data Flow for HDMI or ASIO Input Data Delivery .....................1-13

1.4 DS898CK4Other Useful Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-14

1.4.1 Web Sites ......................................................................................................................1-14

1.4.2 DSP Information ............................................................................................................1-14

1.4.3 Board Information ..........................................................................................................1-14

1.4.4 Audio CODEC Information ............................................................................................1-14

1.4.5 DSP Software Utility Information ...................................................................................1-14

CK49x User’s Manual

Chapter 2. Introduction to CK49x Evaluation System .......................................2-1

2.1 Introducing the CK49x Evaluation System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1

2.2 Identifying Components on the CK49x Evaluation System. . . . . . . . . . . . . . . . . . . . . . . . . .2-2

2.2.1 CDB49x Main Board Components ..................................................................................2-2

2.2.1.1 CDB49x Main Board Components.................................................................2-4

2.2.2 DC4953x Daughter Card .................................................................................................2-5

2.2.2.1 DC4953x Daughter Card Components..........................................................2-6

2.2.2.2 DC4970x4 Daughter Card Components........................................................2-6

2.2.2.3 DC4953x3 Daughter Card Components........................................................2-6

Chapter 3. Installation, Setup, and Running Application ..................................3-1

3.1 Installation, Setup, and Running First Application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1

3.1.1 Board Software Installation..............................................................................................3-1

3.1.2 Setting up the CK49x Evaluation Board ..........................................................................3-1

3.1.3 Connecting to a PC .........................................................................................................3-4

3.1.4 Opening a Console Window from the Cirrus Device Manager ........................................3-4

3.1.5 Running a Stereo PCM Application on CK49x ................................................................3-6

3.1.6 Downloading Other Applications .....................................................................................3-7

3.1.7 Running a Multichannel PCM Application via HDMI........................................................3-7

3.1.8 Running a Stereo Analog Input Application.....................................................................3-7

Chapter 4. Programming the DSP on the CK49x Evaluation Board .................4-1

4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1

4.2 Basic Application Download and System Configuration - PCM Pass-through . . . . . . . . . .4-1

4.2.1 System Block...................................................................................................................4-1

4.2.2 Channel Remap of the DSP ............................................................................................4-2

4.3 Changing Audio Input Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-3

4.3.1 S/PDIF Audio Input..........................................................................................................4-3

4.3.2 Analog Audio Input ..........................................................................................................4-4

4.3.3 HDMI Audio Input ............................................................................................................4-5

4.3.4 DAI Input..........................................................................................................................4-6

4.4 Changing Audio Output Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-7

4.4.1 DAO Output of the DSP...................................................................................................4-7

4.4.2 Changing Serial Control Protocol (I2C‘ or SPI‘) / Memory Usage ...................................4-8

4.5 Programming the On-board Serial Flash. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-9

Chapter 5. Running the CK49x Board in Standalone Mode ..............................5-1

5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1

5.1.1 Standalone Mode Setup ..................................................................................................5-1

5.2 System Boot-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-2

5.3 Top-Level Description of the CK49x Evaluation System Buttons

and Rotary Knob Functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-2

5.4 Configuration Modes Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-5

5.4.1 Status Display Mode........................................................................................................5-5

5.4.2 Adjusting Audio Volume ..................................................................................................5-6

5.4.3 Selecting the Audio Source .............................................................................................5-6

5.4.4 Selecting the Surround Sound Mode...............................................................................5-6

5.4.5 Selecting the Virtualizer Mode.........................................................................................5-7

5.4.6 Selecting the Bass Management Mode...........................................................................5-7

CK49x User’s Manual

Chapter 6. CK49x Schematics..............................................................................6-1

6.1 Obtaining Schematic Updates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-1

6.1.1 CK49x Daughter Card Schematics..................................................................................6-1

6.1.1.1 DC4953xx Daughter Card Modification .........................................................6-1

Chapter 7. Troubleshooting..................................................................................7-1

7.1 Troubleshooting Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-1

7.1.1 Power LEDs.....................................................................................................................7-1

7.1.2 Board not Recognized by PC ..........................................................................................7-1

7.1.3 Audio is not Heard ...........................................................................................................7-1

7.1.4 Only Stereo Audio is Heard .............................................................................................7-2

Appendix A. Modification for the Serial Flash Chip Select Signal on DC4953x3A-1

Appendix B. DAI I2S Play Back Header.............................................................. B-1

B.1 DAI I2S Play Back Header. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-1

Appendix C. CDB49x Rev. A Rework for I2C Buffer on SCP_CLK .................. C-1

C.1 Modifications to Improve the Signal Integrity of I2C Communications . . . . . . . . . . . . . . . C-1

Appendix D. CDB49x Rev. A Rework for I2C Buffer on DBCK Signal............. D-1

D.1 Modifications to Improve the Signal Integrity of Debugger Communications . . . . . . . . . D-1

Revision History................................................................................................... D-2

CK49x User’s Manual

Figure 1-1. CDB49x Evaluation Base Board (without DC4953x Installed) ....................................................1-2

Figure 1-2. CK49x Evaluation System (CDB49x Evaluation Base Board (with DC4953x Installed) .............1-2

Figure 1-3. CDB49x Main Board Block Diagram ...........................................................................................1-4

Figure 1-4. DC4953x Daughter Card Block Diagram ....................................................................................1-4

Figure 1-5. CS495xxx/CS497xxx ADC Clocking.........................................................................................1-11

Figure 1-6. CS495xxx/CS497xxx S/PDIF Clocking .....................................................................................1-12

Figure 1-7. HDMI Clocking ..........................................................................................................................1-13

Figure 2-1. CK49x Evaluation System Block Diagram Using PC Control .....................................................2-1

Figure 2-2. CK49x System Block Diagram in Standalone Mode ...................................................................2-1

Figure 2-3. CDB49x Main Board Top View ...................................................................................................2-3

Figure 2-4. Top View DC4953x/DC4953x3/DC4970x4 Daughter Card ........................................................2-5

Figure 3-1. Board Setup and Connection Diagram .......................................................................................3-3

Figure 3-2. Cirrus Device Manager Icon ......................................................................................................3-4

Figure 3-3. Cirrus Device Manager as Displayed after Double-clicking the CDM Icon .................................3-4

Figure 3-4. Opening a Console Window from Cirrus Device Manager .........................................................3-5

Figure 3-5. CDM Device Console Window ....................................................................................................3-5

Figure 3-6. PCM Pass-through Example Application ....................................................................................3-6

Figure 4-1. System Properties Showing CS495304 as the Chip ID ..............................................................4-1

Figure 4-2. System Properties Showing CS495314 as the Chip ID ..............................................................4-2

Figure 4-3. CK49x DAO Channel Remap .....................................................................................................4-2

Figure 4-4. CK49x Audio In Properties..........................................................................................................4-3

Figure 4-5. CK49x S/PDIF Rx Properties ......................................................................................................4-3

Figure 4-6. CK49x Analog Properties............................................................................................................4-4

Figure 4-7. DSP Composer Support for HDMI Audio Input via I2S ...............................................................4-5

Figure 4-8. CK49x DAI Input Properties ........................................................................................................4-6

Figure 4-9. CK49x Audio Out Properties .......................................................................................................4-7

Figure 4-10. CK49x Digital Audio Output Properties .....................................................................................4-7

Figure 4-11. CK49x Comm Mode / Memory Usage ......................................................................................4-8

Figure 5-1. Close-up View of the CK49x Evaluation System Push Buttons and Rotary Knob ......................5-3

Figure 5-2. LED Status Display: Current Audio Stream Sample Rate ..........................................................5-5

Figure 5-3. Using the Rotary Know to Increments/Decrements the Volume .................................................5-6

Figure 5-4. Setting the Audio Source ............................................................................................................5-6

Figure 5-5. Setting Surround Mode ...............................................................................................................5-7

Figure 5-6. Setting the Virtualizer Mode........................................................................................................5-7

Figure 5-7. Setting the Bass Management Mode..........................................................................................5-8

Figure A-1. DC1: DAI Record and Asio Play Block Diagram ....................................................................... A-2

Figure A-2. DC1: DAI Record and Asio Play ................................................................................................ A-3

CK49x User’s Manual

Table 1-1. CK49x Customer Kit Contents .....................................................................................................1-1

Table 1-2. ADC Clocking.............................................................................................................................1-11

Table 1-3. S/PDIF Clocking .........................................................................................................................1-12

Table 1-4. HDMI Clocking ...........................................................................................................................1-13

Table 2-1. HDMI Clocking .............................................................................................................................2-6

Table 5-1. Options for when S5 Button/Rotary Knob is Turned ....................................................................5-3

CK49x Customer Kit Contents

CK49x User’s Manual

Chapter 1

Customer Kit Contents and Requirements

1.1 CK49x Customer Kit Contents

Table 1-1. CK49x Customer Kit Contents

Customer Kit Item Quantity

CK49x-49530 CK49x-49531

CK49x-495303

CK49x-4953131 CK49x-497024

CK49x-497014

CK49x-49530

CK49x-49531

CK49x-495303

CK49x-4953131

CK49x-497024 DC497024 Daughter Card (128-pin package) with CS497024 DSP 1

CK49x-497014

CK49x-49530 CK49x-49531

CK49x-495303

CK49x-4953131 CK49x-497024

CK49x-497014 CK49x-49530

CK49x-49531

CK49x-495303

CK49x-4953131 CK49x-497024

CK49x-497014 CK49x-49530

CK49x-49531 CK49x-495303

CK49x-495313 CK49x-497024

CK49x-497014

CDB49x Evaluation Board

DC49530 Daughter Card (128-pin package) with CS495304 DSP 1

DC49531

Daughter Card (128-pin package) with CS495314 DSP

DC49503 Daughter Card (128-pin package) with CS495303 DSP 1

DC49513 Daughter Card (128-pin package) with CS495313 DSP 1

DC497014 Daughter Card (128-pin package) with CS497014 DSP 1

Power Supply: +9V, 2A, 100V - 240V with AC Power Cord 1

USB Cable (USB 2.0) 1

Document Card explaining how to get the latest board software 1

1. Not available for ordering.

2. In this manual, the main (large) board is called the “CDB49x Evaluation Board as shown in Figure 1-1.” When a daughter card is installed on the CDB49x Evaluation Board as shown in Figure 1-2, the board is then called the “CK49x Evaluation System”

3. DC49531 is being renamed to DC495314.

4. Use the DC497014 daughter card when implementing firmware other than firmware from DTS.

Requirements

DC4953x Daughter Card

CK49x User’s Manual

Figure 1-1. CDB49x Evaluation Base Board (without DC4953x Installed)

1.2 Requirements

1.2.1 PC Requirements

1.2.2 Software Requirements

1.2.3 Support Hardware Requirements

•Microsoft® Windows XP® Operating System

• USB 2.0 Support

• Cirrus Board Software Package (available from your local Cirrus Logic representative)

• Digital or Analog Audio Source (for example, DVD player, PC with a digital audio card/device)

• Amplified Speakers for audio playback (for example, powered PC speakers, AVR/amp + speakers)

Figure 1-2. CK49x Evaluation System (CDB49x Evaluation Base Board (with DC4953x Installed)

Requirements

CK49x User’s Manual

1.2.4 Cabling Requirements

• Digital Audio Inputs – HDMI cables, S/PDIF optical cables, RCA audio cables (Connect to digital

audio card, audio analyzer, or DVD player), 20-pin ribbon cable (Play I card)

• Digital Audio Output – HDMI cables, S/PDIF Optical cable, RCA audio cable (Connect to digital

audio card, audio analyzer, or AV), 20-pin ribbon cable (Record I

• Analog Audio Inputs – RCA audio cables (Connect CK49x line-level inputs to analog audio source)

• Analog Audio Outputs – RCA audio cables (Connect CK49x line-level outputs to powered speakers or AVR), 1/8” stereo headphone cable (Connect CK49x line-level output to headphones)

S audio from digital audio

S audio from digital audio card)

1.3 CK49x System Description

A block diagram of the CDB49x main board is shown in Figure 1-3 and a block diagram of the DC4953x daughter card in Figure 1-4. The sections that follow provide a detailed description of each block.

CK49x System Description

CK49x User’s Manual

Figure 1-3. CDB49x Main Board Block Diagram

Figure 1-4. DC4953x Daughter Card Block Diagram

CK49x System Description

CK49x User’s Manual

1.3.1 Audio Inputs

1.3.1.1 Analog Line-level Inputs

Analog line-level inputs have the following characteristics:

• Connector Type: RCA Female

• Absolute Maximum Signal Level: +12Vp-p

• Full Scale Amplitude: 2V

• Reference Designators: J26,J28, or LEFT-IN, RIGHT-IN

1.3.1.2 HDMI Digital Input

HDMI digital inputs have the following characteristics:

• Connector Type: HDMI Type A Female

• Reference Designators: J4, or HDMI RX

1.3.1.3 Optical Digital Inputs

Optical digital inputs have the following characteristics:

RMS

• Connector Type: Fiber Optic RX for Digital Audio, JIS F05 (TOSLINK)

• Reference Designators: J8, or RX0

1.3.1.4 Coaxial Digital Inputs

Coaxial digital inputs have the following characteristics:

• Connector Type: RCA Female

• Maximum Signal Level: 5Vp-p

• Reference Designators: J31, or RX1

1.3.1.5 I2S Digital Input

Coaxial digital inputs have the following characteristics:

• Connector Type: 0.100” Male Header

• Maximum Signal Level: +3.3V

• Reference Designator: P3

1.3.1.6 Microphone Input

The microphone input has the following characteristics:

• Connector Type: 3.5mm (1/8”) Stereo Female

• Absolute Maximum Signal Level: 14.3mVp-p

• Full Scale Amplitude: 6.5mVp-p

• Reference Designator: J5

1.3.2 Audio Outputs

1.3.2.1 Main Analog Line-level Outputs

Analog line-level outputs have the following characteristics:

• Connector Type: RCA Female

• Full Scale Amplitude: 2V

• Reference Designators: J33-J40, or LEFT, RIGHT, Ls, Rs, CENTER, SUB, SBL, SBR

1.3.2.2 Headphone Output

Analog line-level outputs have the following characteristics:

• Connector Type: 3.5mm (1/8”) Stereo Female

• Full Scale Amplitude: 2V

• Reference Designators: J12, or HEADPHONE OUT

The headphone output shares the same Op Amp that drives Main LEFT/RIGHT outputs, which means that headphone content will always be the same as Main LEFT/RIGHT. Only one pair of outputs should be connected to a load - either HEADPHONE OUT or J34/J36.

RMS

CK49x System Description

CK49x User’s Manual

1.3.2.3 Dual Zone Analog Line-level Outputs

Analog line-level outputs have the following characteristics:

• Connector Type: RCA Female

• Max Full Scale Amplitude: 1.23V

• Reference Designators: J1, J10, or LEFT, RIGHT

1.3.2.4 HDMI Digital Output

HDMI digital outputs have the following characteristics:

• Connector Type: HDMI Type A Female

• Reference Designators: J6, or HDMI TX

RMS

1.3.2.5 Optical Digital Output

The optical digital output has the following characteristics:

• Connector Type: Fiber Optic TX for Digital Audio, JIS F05 (TOSLINK)

• Reference Designator: J24, or DIGITAL OUTPUT

1.3.2.6 I2S Digital Output

I2S digital output has the following characteristics:

• Connector Type: 0.100” Male Header

• Maximum Signal Level: +3.3V

• Reference Designator: P12

1. HDMI Digital Output is not currently supported.

CK49x System Description

CK49x User’s Manual

1.3.2.7 I2S Digital Output (DAO Mux Output)

I2S digital output has the following characteristics:

• Connector Type: 0.100” Male Header

• Maximum Signal Level: +3.3V

• Reference Designator: P16

1.3.3 DC Power Input

The DC power input has the following characteristics and is switched by S7:

• Voltage Range: +9V

• Minimum Power: 18W supply (2A @ 9V)

• Connector Type: 2mm Female, positive center pin

• Reference Designator: J25

DC TO +12VDC

1.3.4 USB Connector

The control header has the following characteristics:

• Connector Type: USB Standard B Connector

• Reference Designator: J2

This connector is the interface between the CK49x and the PC.

1.3.5 MCU Programming Header

This header is used to program the MCU from a Silicon Labs programming dongle. This is not for customer use, and should be used only by Cirrus FAEs for upgrading the board.

• Connector Type: 0.100” Shrouded Male Header

• Reference Designator: J9

1.3.6 Reset button

The button S6 (located near the USB connector J2) is used to reset the MCU. In stand-alone mode this will re-initialize the entire board and start the stand-alone program over from the beginning.

In USB-control mode, this button will re-initialize the board and force the device to re-enumerate itself on the PC USB interface.

1.3.7 Buttons and Knobs

The buttons S1 - S4 (located near the LCD) are used for controlling the MCU when in stand-alone mode.

The knob S5 is also used for controlling the MCU when in stand-alone mode.

1.3.8 DAO MUX Select Header

The DAO outputs of the DSP are sent to a mux that drives I2S Digital Output header P16. The signals driven to P16 are selected by the Header P17. Only 1 shunt may be installed on header P17 at any time. Using more than 1 shunt will cause multiple buffers to drive their outputs simultaneously and cause contention.

The output buffer currently enabled is indicated by the LEDs D18 - D23.

1.3.9 DAI1 Audio Input Source Multiplexer

The audio input source multiplexer has the following characteristics:

• Source 0 [shunt removed]: HDMI RX I2S Audio

• Source 1 [shunt installed]: I

S Audio (ASIO I2S Board)

• Reference Designators: U15, U28

This multiplexer is controlled by pins 1-2 of header P4, and is used to select which audio source feeds the

CS495xxx/CS497xxx DAI1 pins when the ASIO I

S Board is installed. When the on-board sources (HDMI

RX) are being used, the ASIO audio data cannot be processed. Likewise, when the ASIO audio data

source (ASIO I

S Board) is selected, the on-board audio inputs are disabled.

1.3.10 DAI2 Audio Input Source Multiplexer

The audio input source multiplexer has the following characteristics:

• Source 0: CS42528 Audio (ADC or S/PDIF)

• Source 1: Bi-Phase Encoded S/PDIF Signal

• Reference Designator: U23

CK49x System Description

CK49x User’s Manual

This multiplexer is controlled by GPO1 of the CS42528 (U5), and is used to select which audio sources feed the CS495xxx/CS497xxx DAI2 pins. When the DSD audio from HDMI RX is being used, the CS42528 data cannot be processed. Likewise, when the CS42528 audio is selected, the HDMI RX DSD audio is disabled.

1.3.11 CS495xxx/CS497xxx Audio DSP

The audio DSP (U1 on DSP Daughtercard) is a dual-core processor designed specifically for audio applications. The CK49x allows a designer to evaluate the CS495xxx/CS497xxx DSPs in many different modes of multi-channel input and output. The 128-pin footprint on this board is compatible with any CS495xxx/CS497xxx chip that uses the LQFP128 package.

Audio input data to the DSP can come from any of the following sources:

• CS42528 Line-Level Analog In

• CS42528 Microphone Analog In

• CS42528 Digital S/PDIF In

• HDMI RX

•I

S Through ASIO I2S Board (feature not currently supported)

Audio output data from the DSP can be sent to the following destinations:

• CS42528 Line-Level Analog Output

• CS42528 Headphone Analog Output

• CS42528 Digital S/PDIF Out

• HDMI TX

•I

S Through Header P16

CK49x System Description

CK49x User’s Manual

The CS4953xx/CS4970x4 has many applications stored in internal ROM, but a host is still required to configure the application for a particular system. The CK49x allows the PC to act as a host to boot and configure the DSP through the GUI software.

The DSP is booted primarily from external serial Flash (U13 on CDB49x) using the DSP Condenser system for simplified MCU control.

1.3.12 Debug Header

The DC49xxx daughtercard (DSP daughtercard) has a debug port (TP13) intended for factory testing of the DSP. By default, shunts are installed across the header to allow debug from the attached MCU. If the jumpers are removed, it is possible to debug the DSP using an external controller.

1.3.13 CS2000 Clock Synthesizer

The CS2000 (U25) is a high performance clocking device that is used to reduce jitter on recovered clocks through the use of a low-jitter PLL and clean reference clock. The CS2000 is used on this board to reduce the jitter on the MCLK recovered from an HDMI link.

The CS2000 can also be programmed to pass the reference clock (XTAL_OUT from the DSP) directly to the CS42528 audio CODEC and S/PDIF RX.

1.3.14 CS42528 S/PDIF RX

The CS42528 (U5) has an integrated 192 kHz S/PDIF receiver with an input multiplexer. All of the S/PDIF sources on the board (RX0, RX1, DSP, U16) are connected to the CS42528 input multiplexer. The active S/PDIF signal is selected by changing the internal mux through the serial host port of the CS42528. This selection is controlled through the Audio In configuration within DSP Composer (see

"Programming the DSP on the CK49x Evaluation Board"

When S/PDIF audio is being processed, the CS42528 must master MCLK for the system (see Figure 1-6 for details).

1.3.15 CS42528 Audio CODEC

The CS42528 (U5) is a high-performance, multi-channel audio CODEC capable of supporting sample rates up to 192 kHz on its 2 ADCs and 8 DACs. This device is used for main-channel analog-to-digital and digital-to-analog conversions on the CK49x.

All analog inputs (J5, J26, J28) and 8 of the analog outputs (J33 - J40) are connected to the CS42528. The microphone input (J5) uses an external ADC (U7) to feed the dedicated ADC input of the CS42528. When the microphone is in use, a special TDM format is used to deliver the digitized microphone audio to the DSP via the SAI data output of the CS42528.

When analog audio is being processed, the 24.576 MHz crystal for the CS495xxx/CS497xxx must master MCLK for the system (see ‘Audio Clocking on page 1-10 for details).

Chapter 4,

for details).

1.3.16 CS4344 DAC

The CS4344 (U3) is a high-performance, 2-channel DAC capable of converting audio data with sample rates up to 192 kHz. This device is used for the dual-zone digital-to-analog conversions on the CK49x.

Analog outputs (J1, J10) are connected to the CS4344. The dual-zone DAC is connected to the DAO2 port of the CS495xxx/CS497xxx to allow up to 10 channels of simultaneous analog output.

1.3.17 HDMI Recevier (RX)

The Silicon Image™ Si9135 HDMI Rx (U16) is used for the HDMI input on the CK49x. It can provide up to

4 lines of I streams.

Because the Si9135 responds to all I HDMI Rx from responding to serial communication intended for other devices on the CK49x.

S data which can support PCM, legacy compressed audio (DD, DTS), and new HD audio

1.3.18 HDMI Transmitter (TX)

The Silicon Image Si9134 HDMI Tx (U19) is used for the HDMI output on the CK49x.

Note: The HDMI Tx function is currently not supported on the CK49x.

Because the Si9134 responds to all I HDMI Tx from responding to serial communication intended for other devices on the CK49x.

1.3.19 Memory

The CDB49x is assembled with a 32-Mbit serial Flash (U13).

CK49x System Description

CK49x User’s Manual

C addresses, a bus isolator (U14) has been used to prevent the

The CS495xxx/CS497xxx can use external SDRAM (U15 on DC4953x) to implement features such as large multi-channel audio delays. A 16 Mbit SDRAM (200 MHz) is connected to the 150 MHz memory bus of the CS495xxx/CS497xxx.

1.3.20 Audio Clocking

Clocking architecture is one of the most important aspects of an audio system. The input and output clock domains of the DSP must be synchronous when delivering audio data in an isochronous fashion (constant bit-rate delivery), even if the input/output domains operate at different frequencies (e.g. 48 kHz input/96

kHz output). Systems utilizing I isochronous delivery.

The requirements are slightly more complicated for systems using “bursty” delivery on the input side of the DSP, but the CK49x is designed to emulate isochronous systems.

The CK49x can operate in three different clocking modes. Each of these modes is explained in the following sections.

S delivery of S/PDIF input, ADC input, or other digital audio input use

CK49x System Description

OUT_DAO1_SCLK

OUT_DAO1_LRCLK

OUT_DA01_D[3:0]

XMTA S/PDIF

OUT

MUXED_BUF_MCLK

DAI DAO

SDIN

CS42528

XTAL_OUT

CS2000

S/PDIF

CODEC_SCLK

CODEC_LRCLK

CODEC_DOUT

SDOUT

CS4953x DSP-1

CK49x User’s Manual

1.3.20.1 Clock and Data Flow for ADC Input

Figure 1-5. CS495xxx/CS497xxx ADC Clocking

The ADC clocking architecture is used when the ADCs are used as the only audio input (i.e. S/PDIF is disabled, and the audio input source multiplexer (U23) is used to select CODEC audio sources. Figure 1-

5 illustrates this clocking configuration.

XTAL_OUT from the CS495xxx/CS497xxx is MCLK for the system via the CS2000 and CS42528 clocking mux, and the codec masters the input clocks (MUXED_SCLK/MUXED_LRCLK) of the CS495xxx/ CS497xxx. The system routing of the clocks was simplified by using the CS42528 to drive MCLK to the system, but the internal clock multiplexer of the CS42528 is forced to the OMCK setting to pass XTAL_OUT.

The CS495xxx/CS497xxx always masters its output clocks (OUT_DAO1_SCLK/OUT_DAO1_LRCLK).

MUXED_BUF_MCLK CS495xxx/CS497xxx CS42528 24.576 MHz

OUT_DAO1_LRCLK MUXED_BUF_MCLK CS495xxx/CS497xxx 1*Input Fs (default)

CODEC_LRCLK MUXED_BUF_MCLK CS42528 Input Fs

OUT_DAO1_SCLK MUXED_BUF_MCLK CS495xxx/CS497xxx 64*Output Fs (default)

Table 1-2. ADC Clocking

Clock Name Clock Master Source Clock Driver Clock Frequency

CODEC_SCLK MUXED_BUF_MCLK CS42528 64*Input Fs (default)

Note: MUXED_MCLK is the clock signal that is driven by the CS42528’s RMCK pin. The CS42528

OUT_DAO1_SCLK

OUT_DAO1_LRCLK

OUT_DA01_D[3:0]

XMTA S/PDIF

OUT

MUXED_BUF_MCLK

DAI DAO

SDIN

CS42528

XTAL_OUT

CS2000

S/PDIF

CODEC_SCLK

CODEC_LRCLK

CODEC_DOUT

SDOUT

CS4953x

DSP-1

provides the recovered clock from the S/PDIF input unless it loses signal lock, in which case the CS42528 passes the DSP clock (XTAL_OUT) that it receives on the OMCK pin via the CS2000.

1.3.20.2 Clock and Data Flow for S/PDIF Input

CK49x System Description

CK49x User’s Manual

Figure 1-6. CS495xxx/CS497xxx S/PDIF Clocking

The S/PDIF clocking architecture is used when any S/PDIF RX is used as an audio source. That is, any S/ PDIF RX is selected, and the audio input source multiplexer (U23) is used to select CODEC audio sources. Figure 1-6 illustrates this clocking configuration.

MCLK recovered from the incoming S/PDIF stream must be MCLK for the system, and the codec masters the input clocks (CODEC_SCLK/CODEC_LRCLK) of the CS495xxx/CS497xxx. In this configuration the internal multiplexer of the CS42528 routes the recovered MCLK to MUXED_MCLK.

The CS495xxx/CS497xxx always masters its output clocks (OUT_DAO1_SCLK/OUT_DAO1_LRCLK).

Clock Name Clock Master Source Clock Driver Clock Frequency

MUXED_MCLK CS42528 CS42528

CODEC_SCLK MUXED_MCLK CS42528 64*Input Fs (default)

CODEC_LRCLK MUXED_MCLK CS42528 Input Fs

OUT_DAO1_SCLK MUXED_MCLK CS495xxx/CS497xxx 64*Output Fs (default)

OUT_DAO1_LRCLK MUXED_MCLK CS495xxx/CS497xxx 1*Input Fs (default)

Note: MUXED_MCLK is the clock signal that is driven by the CS42528’s RMCK pin. The CS42528

Table 1-3. S/PDIF Clocking

512*S/PDIF Fs

(e.g. 24.576 MHz for 48 kHz),

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