Cirrus Logic CDB5528 User Manual
\
CDB5521/22/23/24/28
CDB5521/22/23/24/28 Evaluation Board and Software
Features
l Evaluation Board and Software Supports All
Chips: CS5521, CS5522, CS5523, CS5524,
and CS5528
l Direct Thermocouple Interface
l RS-232 to PC With Test Modes
l On-board 80C51 Micr ocontroller
l On-board Voltage Reference
l Lab Windows/CVI
– Register Setup & Chip Control
– Data Capture
– FFT Analysis
– Time Domain Analysis
– Noise Histogram Analysis
l On-board Charge Pump Drive Circuitry
REF+
TM
Evaluation Software
+5 ANALOG-5 ANALOG AGND
VOLTAGE
REFERENCE
J2
General Description
The CDB5521/22/23/24/28 is an inexpensive tool designed to evaluate the performance of the CS5521,
CS5522, CS5523, CS5524, and CS5528 Analog-to-Digital Converters (ADC).
The evaluation board includes a 2.5 V voltage reference,
an 80C51 microcontroller, an RS232 driver/receiver, and
firmware. The 8051 controls the serial communication
between the evaluat ion board and the PC vi a the firmware, thus, enabling qui ck and ea sy ac cess to all of th e
CS5521/22/23/24/28’s registers.
The CDB5521/22/23/24/28 also includes one installed
ADC sample, and software for Dat a Capture, Time Domain Analysis, Histogram Analysis, and Frequency
Domain Analysis.
ORDERING INFORMATION
CDB5521/22/23/24/28 Evaluation Board
DGND
+5 DIGITAL
REF-
J1
AIN1+
AIN1-
AIN2+
AIN2-
AIN3+
AIN3-
AIN4+
AIN4-
NBV DRIVE
CIRCUITRY
NBV
CPD
CS5521
CS5522
CS5523
CS5524
CS5528
CRYSTAL
32.768 kHz
Preliminary Product Information
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
TEST
SWITCHES
on off
3
2
1
DRIVER/RECEIVER
RESET
CIRCUITRY
CONNECTOR
RS232
CS
SDI
SDO
SCLK
LEDs
A0
A1
80C51
Microcontroller
CRYSTAL
11.0592 MHz
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright Cirrus Logic, Inc. 2000
(All Rights Reserved)
RS232
MAY ‘00
DS317DB2
1
TABLE OF CONTENTS
1. PART I: HARDWARE ............................................................................................................... 4
1.1 Introduction ........................................................................................................................4
1.3 Using the Evaluation Board ............................................................................................... 8
1.4. Power Connections ........................................................................................................... 8
1.5 Negative Bias Voltage ........................................................................................................ 8
1.6 Software ............................................................................................................................. 9
1.7. Writing Your Own Interface Software ................................................................................ 9
2. PART II: SOFTWARE ............................................................................................................. 13
2.1 Installation Procedure ......................................................................................................13
2.3 Menu Bars Overview ........................................................................................................ 14
2.4 Setup Window Overview ..................................................................................................15
2.5 Data FIFO Window Overview .......................................................................................... 15
2.6 Histogram Window Overview ...........................................................................................16
2.7 Frequency Domain Window (i.e. FFT) ............................................................................. 17
2.8 Time Domain Window Overview ......................................................................................18
2.9 Calibration Window Overview ..........................................................................................19
2.10 Trouble Shooting the Evaluation Board ......................................................................... 19
LIST OF FIGURES
CDB5521/22/23/24/28
Figure 1. CS5522 Analog Section................................................................................................... 5
Figure 2. CS5524/28 Analog Section..............................................................................................6
Figure 3. Digital Section .................................................................................................................. 7
Figure 4. Power Supplies ................................................................................................................ 8
Figure 5. Main Menu .....................................................................................................................21
Figure 6. Setup Window................................................................................................................ 21
Figure 7. Data FIFO Window.........................................................................................................22
Figure 8. Frequency Domain Analysis ..........................................................................................22
Figure 9. Calibration Menu............................................................................................................ 23
Figure 10. Time Domain Analysis .................................................................................................23
Figure 11. Histogram Analysis (Using the CS5524 with default register settings and
24-bit output words) ...................................................................................................... 24
Figure 12. CDB5521/22/23/24/28 Component Side Silkscreen....................................................25
Contacting Cirrus Logic Support
For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:
http://www.cirrus.com/corporate/contacts/
IBM, AT and PS/2 are trademarks of International Business Machines Corporation.
Windows is a trademark of Microsoft Corporation.
Lab Windows and CVI are trademarks of National Instruments.
TM
SPI
is a trademark of Motorola.
MICROWIRE
TM
is a trademark of National Semiconductor.
Preliminary product inf o rmation describes product s whi ch are in production, b ut f or which full character iza t i on da t a i s not yet available. Advance p rodu ct i nformation describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information
contained in this document i s accurat e and reli able. However , t he infor mation is subje ct to chang e without noti ce and is provi d ed “AS IS” without warrant y of
any kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other ri g ht s
of third parties. This document is the pro perty of Cirrus Logi c, Inc. and i mplie s no licen se under patents, copyrights, tr ademarks, or trade secre ts. No part of
this publication may be copied, reproduced , stored in a retrieval system, or transmitted, in any form or by any means (electro nic, mechanical, photographic, or
otherwise) without the pr i or writ ten consent of Cirrus Logic, Inc. It e ms f rom any Ci rrus Logic website or disk may be printed for use by the user. However, no
part of the printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical,
photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture
or sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing
in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trademarks and service marks can be found at http://www.cirrus.com.
2 DS317DB2
Figure 13. CDB5521/22/23/24/28 Component Side (top) ............................................................. 26
Figure 14. CDB5521/22/23/24/28 Solder Side (bottom) ............................................................... 27
LIST OF TABLES
Table 1. Header Descriptions.......................................................................................................... 9
Table 2. Microcontroller Read/Write Commands via RS-232 ....................................................... 10
Table 3. Microcontroller Conversion Commands via RS-232....................................................... 10
Table 4. Microcontroller Self Calibration Commands via RS-232................................................. 11
Table 5. Microcontroller System Calibration Commands via RS-232 ........................................... 12
CDB5521/22/23/24/28
DS317DB2 3
CDB5521/22/23/24/28
1. PART I: HARDWARE
1.1 Introduction
The CDB5521/22/23/24/28 evaluation board provides a means of testing the CS5521/22/23/24/28
Analog-to-Digital Converters (ADCs). The board
interfaces the converters to an IBMTM compatible
PC via an RS-232 interface while operating from a
+5 V and -5 V power supply. To accomplish this,
the board comes equipped with an 80C51 microcontroller and a 9-pin RS-232 cable, which physically interfaces the evaluation board to the PC.
Additionally, analysis software provides easy access to the internal registers of the converters and
provides a means to capture data and display the
converters’ time domain, frequency domain, and
noise histogram performance.
1.2 Evaluation Board Overview
The board is partitioned into two main sections: analog and digital. The analog section consists of the
either the CS5521, CS5522, CS5523, CS5524 or
CS5528, a precision voltage reference, and the circuitry to generate a negative voltage. The digital
section consists of the 80C51 microcontroller, the
hardware test switches, the reset circuitry, and the
RS-232 interface.
The CS5521/22/23/24/28 is designed to digitize
low level signals while operating from a
32.768 KHz crystal. As shown in Figures 1 and 2,
a thermocouple can be connected to the converter’s
inputs via J1’s AIN+ and AIN- inputs. Note, a simple RC network filters the thermocouple’s output to
reduce any interference picked up by the thermocouple leads.
The evaluation board provides two voltage reference options, on-board and external. With HDR5’s
jumpers in positions 1 and 4, the LT1019 provides
2.5 volts (the LT1019 was chosen for its low drift,
typically 5ppm/°C). By setting HDR5’s j umpers to
position 2 and 3, the user can supply an external
voltage reference to J2’s REF+ and REF- inputs
(Application Note 4 on the web details various
voltage references).
The A/D converters’ serial interfaces are SPI
and MICROWIRETM compatible. The interface
control lines (CS, SDI, SDO, and SCLK) are connected to the 80C51 microcontroller via port one.
To interface a different microcontroller to the ADC
chip, the control lines to the ADC are availa ble at
HDR6 (Header 6). However, to connect an external
microcontroller to the header, the evaluation board
must be modified in one of three ways: 1) cut the
interface control traces going to the on-board
80C51 microcontroller, 2) remove resistors R1-R6,
or 3) remove the 80C51 microcontroller from its
socket on the evaluation board.
Figure 3 illustrates the schemati c of the digital section. It contains the microcontroller, a Motorola
MC145407 interface chip, and test switches. The
test switches aid in debugging communication
problems between the CDB5521/22/23/24/28 and
the PC. The microcontroller derives its clock from
an 11.0592 MHz crystal. From this, the controller
is configured to communicate via RS-232 at
9600 baud, no parity, 8-bit data, and 1 stop bit.
TM
4 DS317DB2
+5V Analog
C20
0.1µF
+5V Analog
J2
REF+
REF-
JP6
JP5
AIN1+
AIN1-
AIN2+
AIN2-
R21
Ω
301
R22
Ω
301
J1
1
2
3
4
U4
LT1019
GND
JP3
JP4
OUTIN
TRIM
4700pF
+5V Analog
R17
C2
Ω
301
4700pF
R18
Ω
301
R25
C3
Ω
301
4700pF
R26
Ω
301
R7
20k
C1
R24
49.9
Ω
C41
0.1µF
0.1µF
Ω
C16
0.1µF
C14
C40
0.1µF
HDR1
HDR2
HDR8
HDR9
R15
10
Ω
C29
2
10µF
C32
0.1µF
C33
0.1µF
C34
0.1µF
C35
0.1µF
HDR5
1
3
4
VA+
AGND
AIN1+
AIN1-
U6
CS5521
VD+
XOUT
CS5522*
18
AIN2+
17
AIN2-
20
VREF+
19
VREF-
* CS5521 and CS5522 are interchangeable
SDO
SCLK
DGND
CPD
CDB5521/22/23/24/28
XIN
CS
SDI
A0
A1
NBV
14
10
11
9
8
12
15
6
16
13
7
5
C22
10µF
C30
10µF
JP7
Y2
32.768kHz
Figure 3
0.033µF
1N4148
+
C9
D2
To
D3
1N4148
CPD
GND
BAT85
C15
0.1µF
HDR4
337
D5
-5V Analog
C21
+
1µF
LM337_LZ
C11
0.1µF
U2
ADJ
VOUTVIN
R23
Ω
1k
+
R16
1k
Ω
Figure 1. CS5522 Analog Section
DS317DB2 5
+5V Analog
C20
0.1µF
+5V Analog
REF+
REF-
CDB5521/22/23/24/28
R15
Ω
+5V Analog
C14
0.1µF
R17
C2
Ω
301
4700pF
R18
Ω
301
OUTIN
TRIM
R25
301
R26
301
R27
301
R28
301
R29
301
R30
301
C1
4700pF
Ω
4700pF
Ω
Ω
4700pF
Ω
Ω
4700pF
Ω
C3
C4
C31
20k
R24
49.9
R7
Ω
C41
0.1µF
0.1µF
J1
1
AIN1+
2
AIN1-
3
AIN2+
4
AIN2-
5
AIN3+
6
AIN3-
7
AIN4+
8
AIN4-
U4
LT1019
GND
R21
301
301
JP3
Ω
JP4
R22
Ω
JP6
J2
JP5
HDR1
HDR2
HDR8
HDR9
HDR11
HDR12
HDR13
HDR14
Ω
C16
C40
0.1µF
C29
2
10µF
C32
0.1µF
C33
0.1µF
C34
0.1µF
C35
0.1µF
C36
0.1µF
C37
0.1µF
C38
0.1µF
C39
0.1µF
HDR5
* CS5523, CS5524 and CS5528
are interchangeable
VA+
1
AGND
3
AIN1+/AIN1
4
AIN1-/AIN2
22
AIN2+/AIN3
21
AIN2-/AIN4
5
AIN3+AIN5
6
AIN3-/AIN6
20
AIN4+/AIN7
19
AIN4-/AIN8
24
VREF+
23
VREF-
10
U3
CS5523
CS5524
CS5528*
VD+
XIN
XOUT
CS
SDI
SDO
SCLK
A0
A1
DGND
CPD
NBV
-5V Analog
C21
1µF
+
16
12
13
11
10
14
17
8
18
15
9
7
C22
10µF
C30
10µF
JP7
Y2
32.768kHz
+
LM337_LZ
C11
0.1µF
Figure 3
C9
0.033µF
D2
1N4148
U2
VOUTVIN
ADJ
+
To
D3
1N4148
CPD
GND
337
*
D5
BAT85
C15
0.1µF
R23
1k
R16
1k
HDR4
Ω
Ω
Figure 2. CS5524/28 Analog Section
6 DS317DB2
CDB5521/22/23/24/28
7
RTS
7
14
Normal
Test Switch 2
13
8
CTS
8
13
Loopback
Test Switch 3
R10
R11
R12
14
9
3
2
Ω
R14
10k
17
+
C26
10µF
19
VCC VDD
+5V Digital
C17
C7
+
RI
TXD
RXD
C25
10µF
+
18
20
5
6
C1-
C1+
C2+
C2-
3
1
16
15
+
TP71
RXD
From RS-232
TP72
TXD
To RS-232
Test Switch 1
S1
12
11
10
C27
10µF
HDR7
0.1µF
47µF
Ω
R13
JP2
10k
40
39
6
4
DTR
DSR
9
10
12
11
RESET
18+27+36+45
+
Ω
5.11k
Ω
5.11k
Ω
5.11k
21
5
1
DCD
C28
10µF
+
U1
24
MC145407
COMM
GAINCAL
23
22
24
OFFSETCAL
D1
LED_555_5003
Figure 3. Digital Section
P0.0
P3.0
P3.1
P3.2
P3.3
A1
A0
SCLK
SDO
SDI
CS
+5V Digital
HDR6
VDD
P1.0
P1.1
P1.2
1
Ω
R1
R2 2
200
CS
SDI
P1.3
4
Ω
Ω
Ω
R4
R3 3
200
200
SDO
From
R5 5
200
SCLK
Figure 1, 2
P3.4
P1.4
P1.5
Ω
Ω
R6 6
200
200
A0
A1
P2.0
P2.1
P2.2
P2.3
20
UM1
80C51
XTAL1
18
C23
C0G
33pF
XTAL2
19
Y1
11.0592MHz
+5V Digital
C24
C0G
33pF
+5V Digital
RST
9
C19
0.1µF
Cap
Bypass
D4
1N4148
VSS
RESET
C18
0.1µF
Ω
R9
750k
DS317DB2 7
CDB5521/22/23/24/28
1.3 Using the Evaluation Board
The CS5521/22/23/24/28 are highly integrated
ADCs. They contain a multiplexer, an instrumentation amplifier (IA), a programmable gain amplifier
(PGA), an on-chip charge pump drive (CPD), and
programmable output word rates (OWR). The IA
provides a set gain of 20 while the PGA sets the input levels of the ADC at either 25 mV, 55 mV,
100 mV, 1 V, 2.5 V, or 5 V (for VREF = 2.5 V).
The CPD provides a square wave output. This output, along with two diodes and two capacitors, is
used to supply the negative supply to the IA, enabling measurements of ground referenced signals.
The ADC’s digital filter allows the user to select
output word rates (OWR’s) from 1.88 Hz up to
101 Hz. higher output word rates ca n be attained
when a faster clock source is used. Since the
CS5521/22/23/24/28 have such a high degree of integration and flexibility, the CS5521/23 or
CS5522/24/28 data sheet should be read thoroughly before and consulted during the use of the
CDB5521/22/23/24/28. Table 1 lists the different
headers on the CDB5521/22/23/24/28 and their
functions. The locations of these headers are
marked on the top of the board, and the silkscreen
and layout of the board can also be found at the end
of this document in Figures 12, 13, and 14 for reference.
1.4. Power Connections
Figure 4 illustrates the power supply connections to
the evaluation board. The +5 V Analog supplies the
analog section of the evaluation board, the LT1019
and the ADC. The -5 V Analog supplies the negative bias voltage circuitry. The +5 V Digital supplies a separate five volts to the digital section of
the evaluation board, the 80C51, the reset circuitry,
and the RS-232 interface circuitry.
1.5 Negative Bias Voltage
The evaluation board provides three means of supplying the Negative Bias Voltage (NBV). HDR4
(Header 4) selects between them. When HRD4 is in
position one, the LM337 supplies NBV with an adjustable voltage. R16 is used to adjust this voltage
between -1.25 V and -5 V. When in position two,
HDR4 grounds NBV. And by setting HDR4 to position three, the converter’s Charge Pump Drive
provides NBV with a dc rectified voltage, nominally -2.1 V.
Note: NBV should not exceed a voltage more
negative than -3.0 V.
+5V Analog
Z3
P6KE6V8P
AGND DGND
Z1
P6KE6V8P
-5V Analog
8 DS317DB2
+
C8
47µF
+
C5
47µF
+5V Analog
C13
0.1µF
C10
0.1µF
-5V Analog
Figure 4. Power Supplies
+5V Digital
Z2
P6KE6V8P
+5V Digi tal
+
C6
47µF
C12
0.1µF
CDB5521/22/23/24/28
1.6 Software
The evaluation board comes with software and an
RS-232 cable to link the evaluation board to the
PC. The executable software was developed with
Lab Windows/CVITM and meant to run under WindowsTM 3.1 or later. After installing the software,
read the readme.txt file for last minute changes in
the software. Additionally, Section 2., Part II: Soft-
ware further details how to install and use the software
Name Function Description
HDR1 Used to switch AIN1+ (AIN1 on
CS5528) between J1 and AGND.
HDR2 Used to switch AIN1- (AIN2 on
CS5528) between J1 and AGND.
HDR3 Does not exist.
HDR4 Used to switch the power for NBV
from the LM337, CPD, or AGND.
HDR5 Used to switch VREF+ and VREF-
pins from external J2 header to the on
board LT1019 reference.
HDR6 Used to connect an external micro-
controller.
HDR7 Used in conjunction with the self test
modes to test the UART/RS232 com-
munication link between the micro-
controller and a PC.
HDR8 Used to switch AIN2 + (AIN3 on
CS5528) between J1 and AGND.
HDR9 Used to switch AIN2- (AIN4 on
CS5528) between J1 and AGND.
HDR10 Does not exist.
HDR11 Used to switch AIN3+ (AIN5 on
CS5528) between J1 and AGND.
HDR12 Used to switch AIN3- (AIN6 on
CS5528) between J1 and AGND.
HDR13 Used to switch AIN4+ (AIN7 on
CS5528) between J1 and AGND.
HDR14 Used to switch AIN4- (AIN8 on
CS5528) between J1 and AGND.
Table 1. Header Descriptions
1.7. Writing Your Own Interface Software
Tables 2 through 5 list the RS-232 commands used
to communicate between the PC and the microcontroller. To develop additional code to communicate to the evaluation board via RS-232, the
following applies: to write to an internal ADC register, choose the appropriate write command byte
(See Table 2), and transmit it LSB first. Then,
transmit the three data byt es lowest order byt e (b its
7-0) first with the LSB of each byte transmitted
first. These three data bytes provide the 24-bits of
information to be written to the desired register.
To read from an internal register, choose the appropriate read command byte and transmit it LSB first.
Then, the microcontroller automatically acquires the
ADC’s register contents and returns the 24-bits of
information. The returned data is transmitted lowest
order byte first with the LSB of each byte transmitted first.
DS317DB2 9
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