Cirrus Logic CDB5451A User Manual
CDB5451A
CDB5451A Evaluation Board and Software
Features
Direct Shunt Sensor and Current
Transformer Interface for 3-Phase Power
On-Board Voltage Reference
On-board crystal for XIN
Digital Interface to PC
Lab Windows/CVI
- Real-Time RMS calculation
- Fast Fourier Transform (FFT) Analysis
- Time Domain Analysis
- Noise Histogram Analysis
™
Evaluation Software
General Description
The CDB5451A is an inexpensive tool designed to evaluate the functionality/performance of the CS5451A 6channel A/D Converter. In addition to this data sheet, the
CS5451A Data Sheet is required in conjunction with the
CDB5451A Evaluation Board.
Six terminal block connectors serve as inputs to the
CS5451A’s six analog input pairs. The CDB5451A includes an optional voltage reference source for
CS5451A. A 4.096MHz crystal is provided as a source
for the CS5451A XIN pin, or an external clock source can
be supplied by the user. Digital output data from the
CS5451A is transferred to the user’s IBM-compatible PC
via the included 25-pin parallel port cable.
The CDB5451A includes PC software, allowing the user
to perform data capture (includes option for time domain
analysis, histogram analysis, and frequency domain
analysis). The software also allows real-time RMS calculation/analysis to be performed simultaneously on all six
channels.
ORDERING INFORMATION
CDB5451A Evaluation Board
VIN1+
VIN1-
IIN1+
IIN1-
VIN2+
VIN2-
IIN2+
IIN2-
VIN3+
VIN3-
IIN3+
IIN3-
V
REF
CPD
CS5451A
IN OU T
Voltage
Reference
Preliminary Product Information
http://www.cirrus.com
OWRS
RESET
V
REF
VA-
Charge
Pump
Circuitry
VA-
VA+
GAIN
FSO
SDO
CLK
SE
XIN
Header
+5 VINVA+
3 V
Regulator
(Not Populated)
Reset Circuit
4.096 MHz
Control Switches
Serial-to-
Parallel
Interfac e
Crystal
VD+GND
DB25
To PC
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright © Cirrus Logic, Inc. 2001
(All Rights Reserved)
Nov ‘03
DS458DB3
1
TABLE OF CONTENTS
1. INTRODUCTION........................................................................................................................ 3
1.1 CS5451A ........................................................................................................................... 3
1.2 Data Flow on Evaluation Board ......................................................................................... 3
2. HARDWARE .............................................................................................................................. 4
2.1 Evaluation Board Description............................................................................................. 4
2.2 Power Supply Connections................................................................................................ 4
2.2.1 Analog Power Supply ............................................................................................... 4
2.2.2 Digital Power Supply ................................................................................................ 4
2.2.3 Charge Pump Options.............................................................................................. 5
2.3 Eval Board Control - Headers/Switches............................................................................. 5
2.3.1 Analog Inputs ........................................................................................................... 7
2.3.2 Voltage Reference Input........................................................................................... 8
2.3.3 Clock Source for XIN................................................................................................ 8
2.3.4 S1 DIP Switch .......................................................................................................... 8
2.3.5 Reset Circuit............................................................................................................. 8
2.3.6 External Signal In/Out Header.................................................................................. 8
2.3.7 Serial-to-Parallel Interface ........................................................................................ 8
2.3.8 Connecting the Eval Board to PC............................................................................. 9
3. SOFTWARE............................................................................................................................. 13
3.1 Installing the Software...................................................................................................... 13
3.2 Running the Software ...................................................................................................... 13
3.2.1 Getting Started ....................................................................................................... 13
3.2.2 The Start-Up Window ............................................................................................. 14
3.2.3 The Conversion Window ........................................................................................ 15
3.2.4 Data Collection Window ......................................................................................... 16
3.2.5 Config Window ....................................................................................................... 17
3.2.6 Analyzing Data ....................................................................................................... 18
3.2.7 Time Domain Information ....................................................................................... 18
3.2.8 Frequency Domain Information .............................................................................. 19
3.2.9 Histogram Information ............................................................................................ 20
CDB5451A
LIST OF FIGURES
Figure 1. Power Supply, CS5451A, and Oscillator ......................................................... 10
Figure 2. Analog Inputs .................................................................................................. 11
Figure 3. Digital Circuitry ................................................................................................ 12
Figure 4. Start-Up Window ............................................................................................. 14
Figure 5. Conversion Window ........................................................................................ 15
Figure 6. Data Collection Window (Time Domain) ......................................................... 16
Figure 7. Configuration Window ..................................................................................... 18
Figure 8. Data Collection Window (FFT) ........................................................................ 19
Figure 9. Data Collection Window (Histogram) .............................................................. 20
Figure 10.Silkscreen ........................................................................................................ 22
Figure 11.Circuit Side ...................................................................................................... 23
Figure 12.Solder Side ...................................................................................................... 24
2 DS458DB3
CDB5451A
1. INTRODUCTION
The CDB5451A Evaluation Board demonstrates
the performance of the CS5451A 6-channel A/D
converter.
The CDB5451A evaluation board provides a quick
means of evaluating the CS5451A. Analysis software supplied with the CDB5451A allows the user
to observe the CS5451A’s digital output data on
the user’s PC monitor. The PC software allows the
user to quantify the device’s performance in the
time-domain and frequency domain. The user can
save raw data from the CS5451A to a data file,
which allows to user to analyze performance with
other tools that may be preferable to the user.
1.1 CS5451A
The CS5451A is a highly integrated Six-Channel
Delta-Sigma Analog-to-Digital Converter (ADC)
developed for three-phase power/energy metering
applications. However the CS5451A has other potential uses in other data acquisition applications,
particularly in motor/servo control applications that
require very high precision. The CS5451A combines six delta-sigma modulators with decimation
filters, along with a master-mode serial interface on
a single-chip device. The CS5451A was designed
for the purpose of performing the A/D conversion
operations required at the front-end of a digital 3phase metering system. The six ADC channels
can be thought of as three pairs of voltage/currentchannel ADC’s in a digital 3-phase power metering
application.
The CS5451A contains one three-channel programmable gain amplifier (PGA) for the three current input channels. The PGA sets the maximum
input levels of the all three current channels at
±800 mV DC (for gain = 1x) or ±40 mV DC (for gain
= 20x). The voltage channels have only the 1x gain
setting, and so the range of input levels on the voltage channels is
±800 mV DC.
Additional features of CS5451A include a charge
pump driver, on-chip 1.2 V reference, and a digital
input that can select between two different output
word rates. (The two output word rates are equal to
XIN/2048 and XIN/1024.)
The CS5451A requires a 1.2 V reference input on
VREFIN. The ∆Σ modulators and high rate digital
filters allow the user to measure instantaneous
voltage and current at an output word rate of 4 kHz
(or 2000 kHz, depending on the state of the OWRS
pin) when a 4.096 MHz clock source is used.
1.2 Data Flow on Evaluation Board
The output serial bit-stream from the CS5451A is
shifted into an 8-bit latch circuit so that it can be
quickly ported to the DB25 connector. From this
connector, the data can be sent through the provided 25-pin printer cable to the parallel port of the user’s IBM-compatible PC (the PC must run under
Windows ‘95/’98/2000 operating system).
Once the 8-bit segments of data are ported to the
user’s PC, the LabWindows software (included
with this kit) will re-segment the data into the appropriate 16-bit word format for each of the
CS5451A’s six data channels. The data is sent
quickly to the user’s PC, which allows the software
to perform various data processing and graphical
illustrations on the digital output data. This includes real-time RMS, variance, and standard deviation calculations for all six channels. The output
data from each channel can be plotted on-screen
in the time domain or in the frequency domain. A
histogram function is also included to help the user
to evaluate the noise characteristics of each channel. The software can also calculate the mean and
standard deviation of the output codes for all six
channels. This feature allows the user to scrutinize
the variation of the A/D converters if the user applies constant DC voltage levels to the inputs.
RMS calculation is also provided to assist in the
quick analysis AC input signals.
DS458DB3 3
CDB5451A
2. HARDWARE
2.1 Evaluation Board Description
The CDB5451A board contains circuitry that will:
• Accept appropriate DC voltage levels from
the user’s +3V and/or +5V power supplies,
and direct this power to the VA+, VD+, VAand DGND pins of the CS5451A.
• Direct the six analog input signals to the six
input pairs of the CS5451A.
• Supply necessary voltage reference input
for the CS5451A’s VREFIN pin.
• Supply appropriate crystal/oscillator stimulus to the CS5451A’s XIN pin.
• Direct the output driver signal from the
CS5451A’s charge-pump driver pin (CPD)
which is used produce the negative power
supply source for the CS5451A’s VA- pin.
• Provide a reset switch that allows the user to
set the CS5451A’s RESET pin from logic “1”
to logic “0”.
• Provide two DIP switches which allow the
user to set the logic levels on the CS5451A’s
GAIN and OWRS input pins.
• Detect and receive the data frame signal
and digital serial output data signals from
the CS5451A’s FSO and SDO pins, and
send this output data through the included
parallel cable, and up to user’s PC.
Several areas of blank proto-board space are provided so that, if desired, the user can interface their
own electronic sensor equipment onto the board.
The output from these sensors can be wired to the
six nearby analog input terminal block connectors,
which is then fed to the six analog input channels
of the CS5451A. Examples of such sensors would
include voltage and current transformers, shunt resistors, and resistor divider networks.
The next section of this document describes the
various sections of the board. After this, operation
of the PC software is described in detail.
2.2 Power Supply Connections
The CDB5451A can be used in several different
power supply configurations. Table 1 shows the
various possible power connections with the required jumper settings. There are various +3 V
and +5 V options. The user must supply the +3V,
+5V, GND, and sometimes -2V voltage levels
needed to power the evaluation board.
2.2.1 Analog Power Supply
Referring to Figure 1, the A+ post supplies power
to the positive analog power input pin (VA+) of the
CS5451A. This post also supplies power to the
LT1004 voltage reference (D3) and the optional
+3V regulator (U5). If HDR9 is set to the “A-” setting, the A- post can supply the required negative
voltage to the VA- pin of the CS5451A.
Note that the evaluation board contains the footprints and connectivity which allows the user to install a LM317 voltage regulator (U5), which can be
used to create +3 V from a +5 V supply. This option is useful if the user wants to interface the evaluation board to another board that can only
operate from a +5V supply. With HDR17 set to
“+5V_IN”, one single +5 V supply can be used to
provide both the +5 V power to a microcontroller
and/or other devices, as well as +3 V for the
CDB5451A board. The included schematic diagram shows the circuitry for the +5V regulator circuitry inside a box with dashed lines. These
components are not populated when the board is
shipped from the factory, but the user can install
these components if desired.
2.2.2 Digital Power Supply
The A+ post can be used to supply both the analog
power (to CS5451A VA+ pin) as well as the digital
power (to CS5451A VD+ pin). However if a separate supply voltage is desired for the digital power
supply, the “VD+” banana connector post can be
used to independently supply a separate digital
power supply to the input of the CS5451A (VD+
pin), the 4.096 MHz oscillator (U1), and circuitry for
the parallel port interface. This is controlled by the
setting on HDR18.
The user should note that the CS5451A can operate with a digital supply voltage of either +3V or
4 DS458DB3
CDB5451A
+5V. This voltage is defined as the voltage presented across VD+ and DGND.
2.2.3 Charge Pump Options
The output from CS5451A’s charge-pump driver
pin (CPD) can be used to generate a -2V supply
when the proper jumper settings are selected on
HDR9. This -2V supply can be used as the negative power supply connection for the CS5451A’s
VA- pin. Referring to Figure 1, circuitry for a
charge-pump circuit is included on-board. The
charge pump circuit consists of capacitors C11,
C12, and C36, and diodes D1 and D2.
As an alternative to using the charge pump circuit,
the user can supply an off-board -2V DC power
source to the “A-” banana connector. This option
is controlled by the setting on HDR9.
2.3 Eval Board Control Headers/Switches
Table 2 lists the various adjustable headers and
switches on the CDB5451A Evaluation Board, as
well as their default settings (as shipped from the
factory). The header settings can be adjusted by
the user to select various options on the evaluation
board. These options are described further in the
following paragraphs.
2.3.1 Analog Inputs
Refer to Figure 2. The settings on the 12 analog input headers (2 headers per channel) which are
designated as HDR1 up to HDR8, and HDR10 up
to HDR13, determine which inputs will carry a signal, and which inputs may be grounded. They can
be configured to accept either a single-ended or
Power Supplies Power Post Connections
Analog Digital A+ A- GND D+ +5 V_IN HDR9 HDR17 HDR18
+3 +3 +3 -2 0 +3 NC
A-
CPD
O O
O O
+5V_IN
A+
O O
O O
VD+
V+
O O
O O
+3 +3 +3 -2 0 NC NC
+3 +3 +3 NC 0 +3 NC
+3 +3 +3 NC 0 NC NC
+3 +3 NC -2 0 NC +5
+3 +3 NC NC 0 NC +5
+3 +5 +3 -2 0 +5 NC
+3 +5 +3 NC 0 +5 NC
+3 +5 NC -2 0 +5 +5
+3 +5 NC NC 0 +5 +5
+5 +3 +5 0 +2 +5 NC
Table 1. Power Supply Connections
A-
CPD
A-
CPD
A-
CPD
A-
CPD
A-
CPD
A-
CPD
A-
CPD
A-
CPD
A-
CPD
A-
CPD
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
+5V_IN
A+
+5V_IN
A+
+5V_IN
A+
+5V_IN
A+
+5V_IN
A+
+5V_IN
A+
+5V_IN
A+
+5V_IN
A+
+5V_IN
A+
+5V_IN
A+
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
VD+
V+
VD+
V+
VD+
V+
VD+
V+
VD+
V+
VD+
V+
VD+
V+
VD+
V+
VD+
V+
VD+
V+
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
DS458DB3 5
CDB5451A
Name Function Description Default Setting Default Jumpers
HDR1
HDR2
HDR3
HDR4
HDR5
HDR6
HDR7
HDR8
HDR9
Used to switch IIN3+ on the CS5451A between J2
and AGND.
Used to switch VIN3- on the CS5451A between J3
and AGND.
Used to switch VIN3+ on the CS5451A between J1
and AGND.
Used to switch IIN3- on the CS5451A between J4
and AGND.
Used to switch VIN2- on the CS5451A between J6
and AGND.
Used to switch IIN2+ on the CS5451A between J7
and AGND.
Used to switch IIN2- on the CS5451A between J5
and AGND.
Used to switch VIN2+ on the CS5451A between J8
and AGND.
Used to switch between external VA- and on-board
CS5451A charge-pump circuit, CPD
IIN3+ Set to BNC J2
VIN3- Set to BNC J3
VIN3- Set to BNC J1
IIN3- Set to BNC J4
VIN2- Set to BNC J6
IIN2+ Set to BNC J7
IIN2+ Set to BNC J5
VIN2+ Set to BNC J8
CPD active
O O IIN3+
O O AGND
O O VIN3O O AGND
O O VIN3+
O O AGND
O O IIN3O O AGND
O O VIN2O O AGND
O O IIN2+
O O AGND
O O IIN2O O AGND
O O VIN2+
O O AGND
A-
CPD
O O
O O
HDR10
HDR11
HDR12
SW1
HDR13
HDR14
Used to switch VIN1+ on the CS5451A between J9
and AGND.
Used to switch IIN1- on the CS5451A between J12
and AGND.
Used to switch IIN1+ on the CS5451A between J10
and AGND.
S1-1 sets logic level on CS5451A OWRS input pin
S1-2 sets logic level on CS5451A
GAIN input pin
Used to switch VIN1- on the CS5451A between J11
and AGND.
Used to switch the VREFIN from external VREF
post connector, to the on board LT1004 reference,
or to the on-chip reference VREFOUT. Refer to
Table 3.
Table 2. Default Header Settings
VIN1+ Set to BNC J9
IIN1- Set to BNC J12
IIN1- Set to BNC J10
SW1-2 Open (XIN/1024)
SW1-1 Open (GAIN
=x1)
VIN1- Set to BNC J11
VREFIN Set to on-
chip reference
VREFOUT
O O VIN1+
O O AGND
O O IIN1O O AGND
O O IIN1+
O O AGND
23
OPEN
O O VIN1O O AGND
O O LT1004
O O VREFOUT
O O EXT VREF
6 DS458DB3
CDB5451A
Name Function Description Default Setting Default Jumpers
HDR15
HDR16 This header should always be shorted. Short this header
HDR17
HDR18
differential signal. Using voltage channel #1 as an
example (see Figure 2), note that HDR10 sets the
input to the positive side of the first voltage channel
input (VIN1+ pin). HDR13 sets the input to the
negative side of the first voltage channel input
(VIN1- pin). In a single-ended input configuration,
HDR13 would be set to the “AGND” setting, and
HDR10 would be set to “VIN1+” and would conduct
the single-ended signal. In a differential input configuration, HDR13 would be set to “VIN1-” and
HDR10 would be set to “VIN1+” and this pair of inputs would form the differential input pair into the
VIN1+ and VIN1- pins of the CS5451A.
Controls the source for the CS5451A XIN clock
input.
Determines whether the main analog supply will be
powered from the A- post, or from the regulated 3V
voltage (generated from the +5V_IN) post input.
Choose whether the digital circuitry will be powered
by main analog supply, or powered by separate digital supply (through VD+ post).
Table 2. Default Header Settings (Continued)
current/voltage transformers and reduced in magnitude before they can be safely applied to the
evaluation board.
Several patch-circuit areas are provided near the
voltage/current input headers, in case the user
wants to connect special sensor circuitry to the analog inputs (such as transformers, shunt resistors,
etc., for monitoring a 3-phase power line). For
each of the three channels, a Shunt Resistor or
Current Transformer can be mounted in these areas and connections can be made to the individual
current-channel input pairs. Likewise, for each of
the three voltage channels, a Voltage Divider or
Set to on-board 4.000
MHz crystal (U1).
Set to A-
Set to main analog
supply
Voltage Transformer can be inserted to drive the
CS5451A’s three voltage input pairs. Note from
Figure 2 that a simple R-C network filters each
sensor’s output to reduce any noise that might be
coupled into the input leads. The 3 dB corner of the
filter is approximately 50 kHz differential and com-
WARNING: DANGER! One of the possible applications for the CS5451A includes data acquisition
for a power metering system. However, the user
should not attempt to directly connect any lead
from a high-voltage power line to the evaluation
board inputs, even if the current/voltage levels are
gain reduced by resistive dividers and/or shunts.
Because the ground terminal of the parallel cable
(from the PC) is near or at earth ground potential,
the ground node on the evaluation board will also
be forced to earth ground potential. Serious damage and even personal injury can occur if a “hot”
voltage main is connected to any point on the evaluation board, including the analog input connectors. Such power line signals must be isolated by
mon mode.
Other header options listed in Table 2 allow the
user to set the source of the input clock signal and
the source of the voltage reference (VREFIN) input, etc. The voltage reference options and clock
input options are discussed next.
2.3.2 Voltage Reference Input
To supply the CS5451A with a suitable 1.2 V voltage reference input at the VREFIN pin, the evaluation board provides three voltage reference
options: on-chip, on-board, and external. See
HDR14 as shown in Figure 1. Table 3 illustrates
the available voltage reference settings for
HDR14. With HDR14’s jumpers in position “VRE-
O O EXT XIN
O O DGND
O O 4.0096 MHz
O O
O O +5V_IN
O O A+
VD+
O O
O O
V+
OSC
DS458DB3 7
CDB5451A
Reference Description HDR14
LT1004
VREFOUT
EXTVREF
Select on board
LT1004 Reference
(5 ppm/
Select reference sup-
plied from CS5451A
VREFOUT pin
Select external
Table 3. Reference Selection
°C)
reference
O O LT1004
O O VREFOUT
O O EXT VREF
O O LT1004
O O VREFOUT
O O EXT VREF
O O LT1004
O O VREFOUT
O O EXT VREF
FOUT,” the CS5451A’s on-chip reference provides
1.2 volts. With HDR14 set to position “LT1004,” the
LT1004 provides 1.23 volts (the LT1004 temperature drift is typically 50 ppm/°C). By setting
HDR14’s jumpers to position “EXT VREF,” the
user can supply an external voltage reference to
J16 connector post (VREF) and AGND inputs.
2.3.3 Clock Source for XIN
A 4.000 MHz crystal is provided to drive the XIN input of the CS5451A. (See Figure 1.) However, the
user has the option to provide an external oscillator
signal for XIN, by switching the setting of HDR15.
2.3.4 S1 DIP Switch
Referring to Figure 3, the two single-pole singlethrow switches on SW1 DIP switch should be used
to control the logic settings on the CS5451A’s
OWRS pin and GAIN
pin. When these SW1
switches are set to “OPEN” the corresponding pin
on CS5451A is set to D+ potential, which creates a
logic-high state. When the user closes either of
these SW1 switches, the corresponding pin on
CS5451A is grounded, which creates a logic-low
state on the pin.
2.3.5 Reset Circuit
Circuitry has been provided which allows the user
to execute a hardware reset on the CS5451A.
(See Figure 3). By pressing on the S1 switch, the
RESET
pin on the CS5451A will be held low until
the switch is released.
2.3.6 External Signal In/Out Header
Note that HDR16 is included on the CDB5451A
Evaluation Board as a header that is normally left
unconnected. This header provides a way for the
user to interface the CDB5451A Evaluation Board
to other prototype boards, calibrators, logic analyzers, other peripherals, etc. in order to further evaluate the CS5451A device and/or to use the
evaluation board as a platform for the prototype
development of a digital power meter solution.
However, please note that the CDB5451A Evaluation Board is not intended to be integrated directly
into a commercial power meter. The layout of the
board is not optimized for practical power metering
situations.
2.3.7 Serial-to-Parallel Interface
Glue-logic on the evaluation board converts the
CS5451A serial data into 8-bit segments (bytes).
The bytes are sent to the DB25 connector (J17),
and then through the standard printer cable to the
user’s PC. This section briefly describes the operation of the digital circuitry on the CDB5451A that
provides the 8-bit parallel data to the PC. Refer to
Figure 3.
The user should recall from CS5451A Data Sheet
that the serial interface on the CS5451A device is
a “master-mode” interface, which means that the
device provides the clock. Once the CS5451A is
powered on, the SCLK pin produces a clock signal,
and data is sent out on the SDO pin of the device.
When the evaluation software is instructed (by the
user) to acquire data through the parallel interface,
a two-step process is performed: First the software synchronizes itself to the frame rate of the
CS5451A, then the software acquires multiple
frames of data from the CS5451A.
2.3.7.1. Synchronization
When the software is commanded to acquire data,
the software will first synchronize itself to the frame
rate of the CS5451A (see CS5451A Data Sheet).
This is done by measuring the amount of time between rising and falling edges of the “BUSY” signal. (BUSY will change state every time the
CS5451A issues eight SCLKs--See next section
for a more detailed description.) By measuring this
time period, the software can determine the idle
period of the frame, which allows it to be prepared
to collect a complete frame’s worth of data when
the next CS5451A frame is received. This acquisition sequence is described next.
8 DS458DB3
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