Cirrus Logic CDB470xx User Manual

CDB47xxx

Evaluation Kit

CDB47xxx

User’s Manual

http://www.cirrus.com

Copyright 2014 Cirrus Logic, Inc. FEB 2014

DS886DB11

CDB47xxx User’s Manual

Contacting Cirrus Logic Support

For all product questions and inquiries contact a Cirrus Logic Sales Representative.

To find the one nearest to you go to www.cirrus.com

I

MPORTANT NOTICE

Cirrus Logic, Inc. an d i ts su bsi d iari e s (“ Ci rr us” ) be li eve th at t he i nf orma t i on con t aine d in th is d ocu ment i s ac cu ra te a nd r el iable. However, the information
is subject to change without notice and is provided “AS IS” without warranty of any kind (express or implied). Customers are advised to obtain the latest
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terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability.
No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or
for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license,
express or implied und er a ny p atent s, mask wor k ri ghts , co pyri ght s, t ra demark s, t ra de secr et s or other int el lec tual pro pert y r igh ts. Cirr us owns the c opy­rights associated wi th th e inform ation co ntaine d herein and gives consent for cop ies to be made of t he info rmation only fo r use within your organization
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PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICA TIONS”). CIRRUS PRODUCTS ARE NOT DESI GNED, AUTHORIZED OR WAR­RANTED FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT
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Cirrus Logic, Cirrus, the Cirrus Logic logo design s, and D SP Comp oser are trademar ks of Cirrus L ogic, Inc. All other br and and product nam es in this do c­ument may be trademarks or service marks of their respective owners.

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I2C is a trademark of Philips Semiconductor Corp .

DS886DB11 Copyright 2014 Cirrus Logic ii

CDB47xxx User’s Manual

Contents

Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-iii

Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-v

Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-vii

Chapter 1. Kit Contents and Requirements........................................................1-1

1.1 CDB47xxx Kit Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1

1.2 Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-3

1.2.1 PC Requirements...........................................................................................................1-3

1.2.2 Software Requirements..................................................................................................1-3

1.2.3 Support Hardware Requirements...................................................................................1-3

1.2.4 Cabling Requirements....................................................................................................1-3

1.3 CDB47xxx Main Board System Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-4

1.3.1 Audio Inputs.............................. ... ... .... ... ... ... .............................................. ... ... ... ... .........1-5

1.3.1.1 Analog Line-level Inputs -- Single-Ended (CDB47xxxS only)

(AIN1A - AIN5B, AIN6B).............................................................................................1-5

1.3.1.2 Analog Line-level Inputs -- Differential (CDB47xxxD only)

(AIN1A - AIN5B, AIN6B).............................................................................................1-5

1.3.1.3 Optical Digital Input (J21) ..............................................................................1-6

1.3.1.4 Coaxial Digital Input (J4)................................................................................1-6

1.3.1.5 Microphone Input (J9)....................................................................................1-6

1.3.1.6 DSP Digital Audio Input (DAI) (J18 or DAI) ...................................................1-6

1.3.2 Audio Outputs........................................ ... ... .... ... ... ............................................. ... .........1-6

1.3.2.1 Main Analog Line-level Outputs (CDB47xxxS and CDB47xxxD)

(J5-J8, J10-J13, or AOUT_1 - AOUT_8) ....................................................................1-6

1.3.2.2 Optical Digital Output (J1)..............................................................................1-6

1.3.2.3 Coaxial Digital Output (J35)...........................................................................1-7

1.3.2.4 DSP Digital Audio Output (DAO) (J24 or DAO).............................................1-7

1.3.3 DC Power Input (J2).......................................................................................................1-7

1.3.4 External Control Header (JP1) .......................................................................................1-7

1.3.5 USB Connector (J25) .....................................................................................................1-7

1.3.6 On-Board Voltage Selection Headers (P1-P3)...............................................................1-7

1.3.7 Digital Audio Input Source Multiplexer (U1)....................................................................1-8

1.3.8 CS470xx Audio System-On-a-Chip (ASOC) ..................................................................1-8

1.3.9 C8051 MCU....................................................................................................................1-9

1.3.10 MCU Input: Push Buttons(S1-S4) and Rotary Encoder (S5)........................................1-9

1.3.11 MCU Output (LCD) (LCD1) ..........................................................................................1-9

1.3.12 Memory (U17, U16 and U14)) ......................................................................................1-9

1.4 CDB47xxx Daughtercard System Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-10

1.4.1 Audio Inputs.............................. ... ... .... ... ... ... .............................................. ... ... ... ... .......1-12

1.4.1.1 Analog Line-level Inputs (J3) .......................................................................1-12

1.4.1.2 Digital Audio Inputs (DAI) (J2).....................................................................1-12

1.4.2 Audio Outputs from the CS470xx DSP.........................................................................1-13

1.4.2.1 Analog Line-level Outputs (J3) ....................................................................1-13

1.4.2.2 Digital Audio Outputs (DAO) (J2).................................................................1-13

1.4.3 Control Header (J2)........ .... ... ... ... ............................................. .... ... ... ... .... ... ... ... ... .... ...1-13

1.4.4 User Input (S1 and S2).................................................................................................1-13

1.4.5 User LED Output (D1and D2).......................................................................................1-13

1.5 Audio Clocking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-14

1.5.1 Clock and Data Flow for ADC Input..............................................................................1-14

1.5.2 Clock and Data Flow for S/PDIF Input..........................................................................1-15

1.5.3 Clock and Data Flow for DAI Input with Fixed Output Fs .............................................1-16

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CDB47xxx User’s Manual

1.5.4 Clock and Data Flow for DAI Input with Matched DAO Fs ...........................................1-17

1.6 Other Useful Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-17

1.6.1 Web Sites.....................................................................................................................1-17

1.6.2 DSP Information...........................................................................................................1-17

1.6.3 Board Information.........................................................................................................1-18

1.6.4 DSP Software Utility Information ..................................................................................1-18

Chapter 2. Introduction to CDB47xxx Kit............................................................2-1

2.1 Introducing the CDB47xxx Customer Development Kit. . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1

2.2 Identifying CDB47xxx Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2

2.2.1 CDB47xxxS Board........................................................... ... ............................................2-2

2.2.1.1 CDB47xxxS Board (Single-Ended) Components ..........................................2-4

2.2.2 CDB47xxxD Board ................................ ... ... .... ... ... ... .... ... ... ... .........................................2-4

2.2.2.1 CDB47xxxD Board (Differential) Components...............................................2-6

2.2.3 CDB47xxx-DCxx Daughtercard......................................................................................2-6

2.2.3.1 CDB47xxx-DC48 Daughtercard Components ...............................................2-7

Chapter 3. Installation and Setup of Development Board Software.................3-1

3.1 Installation, Setup, and Running First Application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1

3.1.1 Evaluation Software Installation .....................................................................................3-1

3.1.2 Setting up the CDB47xxx Board with a DVD Player.......................................................3-1

3.1.3 Connecting to a PC ........................................................................................................3-2

3.1.4 Running a Stereo PCM SPDIF In, DAC Out Application on CDB47xxx.........................3-3

3.1.5 Running a Stereo ADC In, DAC Out Application on CDB47xxx.....................................3-3

Chapter 4. Programming the CDB47xxx Board..................................................4-1

4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1

4.2 Running the ADC In / DAC Out Example Application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1

4.2.1 System Block..................................................................................................................4-2

4.2.2 Selecting / Changing Audio Input Sources.....................................................................4-3

4.2.2.1 Audio In via ADC ...........................................................................................4-4

4.2.2.2 Audio In via S/PDIF .......................................................................................4-5

4.2.2.3 I2S Audio Input..............................................................................................4-5

4.2.3 Input Channel Remap.....................................................................................................4-6

4.2.4 Output Channel Remap...................................... ... ... .... ... ... ............................................4-6

4.2.5 Selecting the Audio Output Configuration ......................................................................4-6

4.2.5.1 Audio Out via DAC.........................................................................................4-7

4.2.5.2 Audio Out via S/PDIF Out..............................................................................4-7

4.2.5.3 I2S Audio Input Output ..................................................................................4-8

4.2.6 Changing Serial Control Protocol (I2C‘ or SPI‘) / Flash Type.........................................4-9

Chapter 5. Using DSP Composer or Micro-Condenser Application

to Create and Load a Flash Image.......................................................................5-1

5.1 Programming a Serial Flash Device for Master or Slave Boot Operations . . . . . . . . . . . . .5-1

5.1.1 Using DSP Composer to Create and Load a Flash Image for

Master Mode Operations.................................................... .... ... ... ... ... .... ... ... ... .........................5-1

5.1.2 Using Micro-Condenser to Create and Load a Flash Image for

Slave Mode Operations............................................................................................................5-4

5.1.2.1 Micro-Condenser Components......................................................................5-4

5.1.2.2 Micro-Condenser Restrictions/ Conventions ..................... ... .... ... ... ... ... .... ... ..5-4

5.1.3 Using Micro-Condenser to Create and Load a Flash Image into the DSP.....................5-5

iv Copyright 2014 Cirrus Logic, Inc. DS886DB11

CDB47xxx User’s Manual

5.1.3.1 Creating a Flash Image .................................................................................5-5

5.1.3.2 Programming the Flash Image into the Flash Device....................................5-5

Chapter 6. CDB47xxx Schematics.......................................................................6-1

6.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-1

6.2 CDB47xxS Single-Ended Schematic Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-1

6.2.1 CDB47xxxS Block Diagram................................ ... ... .... ............................................. ... ..6-1

6.2.2 Daughtercard Connectors ..................................... ... .... ... ... ... ... .... ... ... ... .... ... ... ... ... .... ... ..6-1

6.2.3 Digital Audio and Control Connectors ............................................................................6-1

6.2.4 Memory............................... ... ... ... ... .... ... ............................................. ... .... ... ... ... ............6-2

6.2.5 Microphone Preamplifier.................................................................................................6-2

6.2.6 Power ............................................. .... ... ............................................. ... .........................6-2

6.2.7 Input Filters.....................................................................................................................6-2

6.2.8 Output Filters............................................ ... .... ............................................. ... ...............6-3

6.2.9 MCU Block Diagram.......................................................................................................6-3

6.2.10 MCU ............................................. .............................................. ... ...............................6-3

6.2.11 User Interface Devices .................................................................................................6-3

6.3 CDB47xxD Differential Schematic Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-15

6.3.1 CDB47xxxD Block Diagram................ ... ... ....................................................................6-15

6.3.2 Daughtercard Connectors ..................................... ... .... ... ... ... ... .... ... ... ... .... ... ... ... ... .... ...6-15

6.3.3 Digital Audio and Control Connectors ..........................................................................6-15

6.3.4 Memory............................... ... ... ... ... .... ... ............................................. ... .... ... ... ... ..........6-15

6.3.5 Microphone Preamplifier...............................................................................................6-15

6.3.6 Power ............................................. .... ... ............................................. ... .......................6-15

6.3.7 Input Filters...................................................................................................................6-15

6.3.8 Output Filters............................................ ... .... ............................................. ... .............6-15

6.3.9 MCU Block Diagram.....................................................................................................6-16

6.3.10 MCU ............................................. .............................................. ... .............................6-16

6.3.11 User Interface Devices ...............................................................................................6-16

6.4 CDB47xxx-DC48 Daughtercard Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-28

6.4.1 CDB47xxx-DC48 Block Diagram..................................................................................6-28

6.4.2 CDB47xxx-DC48 Schematic ........................................................................................6-28

6.5 Obtaining Schematic Updates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-31

Chapter 7. Troubleshooting..................................................................................7-1

7.1 Troubleshooting Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-1

7.1.1 Power LEDs........................... ............................................. ... .........................................7-1

7.1.2 Board not Recognized by PC .........................................................................................7-1

7.1.3 Audio is not Heard..........................................................................................................7-2

Revision History....................................................................................................7-2

Figures

Figure 1-1. CDB47xxxS-DCxx Kit Contents .................................................................................................1-2

Figure 1-2. CDB47xxxD-DCxx Kit Contents .................................................................................................1-2

Figure 1-3. CDB47xxxS Main Board Block Diagram ....................................................................................1-4

Figure 1-4. CDB47xxxD Main Board Block Diagram ....................................................................................1-5

Figure 1-5. CDB47xxx-DC48 Daughtercard Block Diagram ......................................................................1-10

DS886DB11 Copyright 2014 Cirrus Logic v

CDB47xxx User’s Manual

Figure 1-6. CDB47xxx-DC28 Daughtercard Block Diagram ......................................................................1-11

Figure 1-7. CDB47xxx-DC24 Daughtercard Block Diagram ......................................................................1-12

Figure 1-8. ADC Clocking ...........................................................................................................................1-14

Figure 1-9. S/PDIF Clocking .......................................................................................................................1-15

Figure 1-10. DAI Clocking with Variable Input Fs and Fixed Output Fs ........... ... ... .... ... ... ... .... ... ... ... ..........1-16

Figure 1-11. DAI Clocking with Fixed Output Fs .................................... .... ... .............................................1-17

Figure 2-1. CDB47xxx System Block Diagram .............................................................................................2-1

Figure 2-2. CDB47xxxS (Single-ended) Top View .......................................................................................2-3

Figure 2-3. CDB47xxxD (Differential) Top View ...........................................................................................2-5

Figure 2-4. CDB47xxx-DC48 Daughtercard .................................................................................................2-7

Figure 3-1. CDB47xxx Board with CDB47xxxD (or S)-DC-xx Daughtercard Attached ................................3-2

Figure 4-1. ADC In / DAC Out Example .......................................................................................................4-2

Figure 4-2. CDB47xxx System Properties ....................................................................................................4-2

Figure 4-3. Selecting Audio In Source using Device Properties Dialog .......................................................4-3

Figure 4-4. ADC2 Device Properties. ...........................................................................................................4-4

Figure 4-5. Selecting ADC2 input Terminals using Device Properties Dialog ............... ...............................4-5

Figure 4-6. Selecting Multi-Channel I2S Input ..............................................................................................4-5

Figure 4-7. Input Remap Device Properties .................................................................................................4-6

Figure 4-8. Selecting DAC Outputs Only using Device Properties Dialog ...................................................4-7

Figure 4-9. Selecting S/PDIF Outputs and I2S Outputs using Device Properties Dialog .............................4-8

Figure 4-10. Selecting I2S Outputs using Device Properties Dialog ............................................................4-9

Figure 4-11. CDB47xxx Communication Modes / Flash Type ...................................................................4-10

Figure 5-1. Project Properties Dialog Showing the Selection of the I2C Protocol for

Loading the Flash Image ............................ ... .... ... ... ... ... .............................................. ... ... ... .........................5-2

Figure 5-2. Selecting Flash Type via the Advanced Properties Dialog Box .................................. ... ... .... ... ..5-3

Figure 6-1. CDB47xxxS (Sngle-ended) Board Block Diagram .....................................................................6-4

Figure 6-2. CDB47xxS (Sngle-ended) Board Schematic Index ...................................................................6-5

Figure 6-3. CDB47xxxS (Sngle-ended) Daughtercard Connectors ............... ................................ ............... 6-5

Figure 6-4. CDB47xxxS (Sngle-ended) Digital Audio Control Connectors .......... ................................ .........6-6

Figure 6-5. CDB47xxxS (Sngle-ended) Serial Memory ................................. ... ... ... .... ... ... ... .... ... ... ... ... .........6-7

Figure 6-6. CDB47xxxS (Sngle-ended) Mic Pre-Amp ......................... ... .... ... ... ... ... .... ... ... ... .... ... ..................6-8

Figure 6-7. CDB47xxxS (Single-ended) Power Connectors ............... ... .... ............................................. ... ..6-9

Figure 6-8. CDB47xxxS (Sngle-ended) ADC Filters .... .... ... ... ... .... ............................................. ... .............6-10

Figure 6-9. CDB47xxxS (Sngle-ended) DAC Filters .... .... ... ... ... .... ............................................. ... .............6-11

Figure 6-10. CDB47xxxS (Sngle-ended) Microcontroller Card Interface ...................................................6-12

Figure 6-11. CDB47xxxS (Sngle-ended) Microcontroller Card User Interface ...........................................6-13

Figure 6-12. CDB47xxxS (Sngle-ended) Microcontroller Card User Interface ...........................................6-14

vi Copyright 2014 Cirrus Logic, Inc. DS886DB11

CDB47xxx User’s Manual

Figure 6-13. CDB47xxD (Differential) Board Block Diagram ......................................................................6-17

Figure 6-14. CDB47xxD (Differential) Board Schematic Index ..................................................................6-18

Figure 6-15. CDB47xxD (Differential) Daughtercard Connectors ..............................................................6-18

Figure 6-16. CDB47xxD (Differential) Digital Audio Control Connectors ....................................................6-19

Figure 6-17. CDB47xxD (Differential) Digital Serial Flash ..........................................................................6-20

Figure 6-18. CDB47xxD (Differential) Mic Pre-Amp ...................................................................................6-21

Figure 6-19. CDB47xxxD (Differential) Power Connectors ........................................................................6-22

Figure 6-20. CDB47xxD (Differential) ADC Filters .....................................................................................6-23

Figure 6-21. CDB47xxD (Differential) Voltage Output Circuitry .................................................................6-24

Figure 6-22. CDB47xxD (Differential) Microcontroller Card Interface ........................................................6-25

Figure 6-23. CDB47xxD (Differential) Microcontroller Card Schematic ......................................................6-26

Figure 6-24. CDB47xxD (Differential) Microcontroller Card User Interface ................................................6-27

Figure 6-25. CDB47xxx-DC48 Daughtercard Block Diagram ....................................................................6-29

Figure 6-26. CDB47xxx-DC48 Daughtercard Schematic ...........................................................................6-30

Tables

Table 1-1. CDB47xxx Kit Contents................................................................................................................1-1

Table 4-1. Chip ID and Audio Terminals .......................................................................................................4-3

DS886DB11 Copyright 2014 Cirrus Logic vii

1.1 CDB47xxx Kit Contents

Each CDB47xxx kit comes with the items listed in Table 1-1.

Table 1-1. CDB47xxx Kit Contents

CRD Kit Item Quantity

CDB47xxx Kit Contents

CDB47xxx User’s Manual

Chapter 1

Kit Contents and Requirements

CDB47xxxS-DC48
CDB47xxxS-DC28
CDB47xxxS-DC24

CDB47xxxD-DC48
CDB47xxxD-DC28
CDB47xxxD-DC24

CDB47xxxS-DCxx
CDB47xxxD-DCxx

CDB47xxxS-DCxx
CDB47xxxD-DCxx

CDB47xxxS-DCxx
CDB47xxxD-DCxx

CDB47xxxS Single-Ended Development Board with integrated MCU & USB interface

with daughtercard populated with either the CS47048, CS4028, or CS47024 DSP.

CDB47xxxD Differential Development Board with integrated MCU & USB interface
with daughtercard populated with either the CS47048, CS4028, or CS47024 DSP.

Power Supply: +9V, 2A, 100V - 240V with AC Power Cord 1

USB Cable 1

Document Card explaining how to get the latest board software 1

Figure 1-1 and Figure 1-2 show the kit contents for the CDB47xxxS-DCxx (Single-ended)

CDB47xxxD-DCxx (Differential) development boards respectively.

1

1

and

DS886DB11 Copyright 2014 Cirrus Logic, Inc 1-1

CDB47xxx Kit Contents

CDB47xxx User’s Manual

Figure 1-1. CDB47xxxS-DCxx Kit Contents

Figure 1-2. CDB47xxxD-DCxx Kit Contents

DS886DB11 Copyright 2014 Cirrus Logic, Inc 1-2

Requirements

CDB47xxx User’s Manual

1.2 Requirements

1.2.1 PC Requirements

•Microsoft® Windows® XP with Service Pack 2 or higher or Windows 7 (32– or 64–bit) Operating
System

• USB 2.0 Support

1.2.2 Software Requirements

• Cirrus® Evaluation Software Package (available from your local Cirrus Logic representative)

1.2.3 Support Hardware Requirements

• Digital or Analog Audio Source (for example, DVD player, PC with a digital audio card/device)

• Amplified Speakers for audio playback (for example, powered PC speakers, AVR/amp + speakers)

1.2.4 Cabling Requirements

• Digital Audio Inputs – S/PDIF optical cables, RCA audio cable s (Connect to digit al audio car d, audio
analyzer, or DVD player.)

• Digital Audio Output – S/PDIF Optical cable, RCA audio cable (Connect to digital audio card , audio
analyzer, or AVR.)

• Analog Audio Inputs – 1/8” stereo p lug microphon e cable (Connect micro phone to ADC), RCA aud io
cables (CDB47xxxS only), 1/8” stereo plug differential cable (CDB47xxxD only)

• Analog Audio Outputs – RCA audio cables (Connect CDB47xxx line-level outputs to powered
speakers.)

1-3 Copyright 2014 Cirrus Logic, Inc. DS886DB11

CDB47xxx Main Board System Description

1.3 CDB47xxx Main Board System Description

A detailed block diagram of the CDB47xxxS Development Board is shown in

Figure 1-3. The block diagram of the CDB47xxxD Development Board is shown in
Figure 1-4 The sections that follow provide a detailed description of each block.

CDB47xxx User’s Manual

Figure 1-3. CDB47xxxS Main Board Block Diagram

DS886DB11 Copyright 2014 Cirrus Logic, Inc 1-4

CDB47xxx Main Board System Description

CS47xxx

I2S IN HDR

I2S OUT

HDR

(8 ch)

8ch
RCA
OUT

Power In

USB MCU

Silicon Labs

SMALL

20-PIN HDR

SPI_HOLD

Control

Control

EXT CTRL

SEL

Power

LEDs

5:1
mux
ADC

SPDIF

Rx

SPDIF Tx

DAC

I2S in
(8 ch)

I2S out

(8 ch)

Control

USB

(DSP

Composer)

Analog

Analog

Digital

Digital

Digital

DSP CORE

Digital

Use

DaughterCard

SRC

ADC

LCD Panel

Control (Parallel Port)

B1 B2 B3 B4

Buttons

Rotary Knob

GPIO

Mic Input

Jack

Mic

Pre-Amp

Circuitry

Stereo 1/8"

IN

2 ch (x4)

Stereo 1/8"

IN

2ch

GPIO

GPIO

HDR

SPDIF - IN

OPTICAL

SPDIF - IN

COAX

Wall Adapter

Buffer

Diff

Amp

Diff

Amp

20 Pin HDR

Standard 20 Pin Debug Header (Serial Control & Debug)

I2S HDRs

Header will be available to probe / bring in I2S signals

DSP Daughtercard

The Chronos DSP Daughercard will have only the DSP.

This allows us to easily swap out the DSP for different
CS47xxx Family members.

DAO Buttons/LEDs

DAO pins on Chronos are also GPIO. These buttons/LEDs
Can be used by the new primitives being developed

SPDIF - OUT

OPTICAL

Buffer

SPDIF - OUT

COAX

SPI

FLASH

I2C

FLASH

CDB47xxx User’s Manual

1.3.1 Audio Inputs

1.3.1.1 Analog Line-level Inputs -- Single-Ended (CDB47xxxS only) (AIN1A - AIN5B,

1

AIN6B)

Analog line-level inputs have the following characteristics:

• Connector Type: RCA Female

• Absolute Maximum Signal Level: 8Vp-p

• Full Scale Amplitude: 2V

1.3.1.2 Analog Line-level Inputs -- Differential (CDB47xxxD only) (AIN1A - AIN5B, AIN6B)

Analog line-level inputs have the following characteristics:

• Connector Type: 3.5mm (1/8”) Stereo Female

• Absolute Maximum Differential Signal Level: 16Vp-p

• Full Scale Differential Amplitude: 4V

1. Reference designators are listed at the end of the heading for each board component listed in this
chapter.

1-5 Copyright 2014 Cirrus Logic, Inc. DS886DB11

Figure 1-4. CDB47xxxD Main Board Block Diagram

RMS

RMS

1.3.1.3 Optical Digital Input (J21)

Optical digital inputs have the following characteristics:

• Connector T ype: Fiber Optic RX for Digital Audio, JIS F05 (TOSLINK)

1.3.1.4 Coaxial Digital Input (J4)

Coaxial digital inputs have the following characteristics:

• Connector Type: RCA Female

CDB47xxx Main Board System Description

CDB47xxx User’s Manual

• Input Impedance: 75

• Maximum Signal Level: 1.5Vp-p

• The CDB47xx-S, CDB47xx-D Rev B can accept 500mV Vpp signal to be amplified so that the S/
PDIF Rx pin on the DSP gets a digital signal with 2V swing compatible with V ih and Vil input voltage
thresholds of the DSP.



1.3.1.5 Microphone Input (J9)

The microphone input has a stereo connector, but only the LEFT channel is used for the microphone
input. This input has the following characteristics:

• Connector Type: 3.5mm (1/8”) Stereo Female

• Absolute Maximum Signal Level: 8Vp-p

• Full Scale Amplitude: 20mVp-p

1.3.1.6 DSP Digital Audio Input (DAI) (J18 or DAI)

The DAI connector has the following characteristics:

• Connector Type: 2x10, 0.100 inch Male Header

• Absolute Maximum Signal Level: +3.6V

• Absolute Minimum Signal Level: -0.3V

1.3.2 Audio Outputs

1.3.2.1 Main Analog Line-level Outputs (CDB47xxxS and CDB47xxxD) (J5-J8, J10-J13, or AOUT_1 - AOUT_8)

Analog line-level outputs are RCA connectors on both the single-ended and differential boards. The
CDB47xxxD board has a differential to single-e nded amplifier that feeds th e RCA connectors. The output s
have the following characteristics:

• Connector Type: RCA Female

• Full Scale Amplitude: 2V

RMS

1.3.2.2 Optical Digital Output (J1)

The optical digital output has the following characteristics:

• Connector Type: Fiber Optic TX for Digital Audio, JIS F05 (TOSLINK)

DS886DB11 Copyright 2014 Cirrus Logic, Inc 1-6

CDB47xxx Main Board System Description

CDB47xxx User’s Manual

1.3.2.3 Coaxial Digital Output (J35)

The coaxial digital output has the following characteristics:

• Connector Type: RCA Female

• Maximum Signal Output Level: 1Vp-p into 75

 load

1.3.2.4 DSP Digital Audio Output (DAO) (J24 or DAO)

The DAO connector has the following characteristics:

• Connector Type: 2x10, 0.100 inch Male Header

• Absolute Maximum Signal Level: +3.6V

• Absolute Minimum Signal Level: -0.3V

1.3.3 DC Power Input (J2)

The DC power input has the following characteristics:

• Voltage Range: +9V

• Minimum Power: 18W supply (2A @ 9V)

• Connector Type: 2mm female barrel connector with a positive center pin

DC TO +12VDC

1.3.4 External Control Header (JP1)

The control header has the following characte rist ics:

• Connector Type: 2x10, 0.100 inch Shrouded Male

• Absolute Maximum Signal Level: +3.6V

• Absolute Minimum Signal Level: -0.3V

This connector is the interface between the CS470xx DSP and an external host. This co nnector is used to
control the DSP when the on-board MCU is bypassed.

1.3.5 USB Connector (J25)

The control header has the following characte rist ics:

• Connector Type: USB Connector

• Absolute Maximum Signal Level: +5V

• Absolute Minimum Signal Level: -0.3V

1.3.6 On-Board Voltage Selection Headers (P1-P3)

The on-board voltage selection headers have the following characteristics:

• Connector Type: 1x2, 0.100 inch, Stake Header

The CDB47xxx is designed to operate from a single DC power input. The 9V power supply provided with
the kit is connected to the DC power input jack (J22) and is regulated down to the system voltages (5V,

3.3V, 1.8V). The power selection headers should be installed when using the DC wall supply. This is the
default mode of operation and should not need to be changed for most applications.

It is possible to bypass the regulated power supplies for any of the voltages by removing the jumper from
the appropriate power selection header, and connecting an external voltage supply to pin 2 of that

1-7 Copyright 2014 Cirrus Logic, Inc. DS886DB11

selection header. Pin 1 of each header is marked with a triangle and the word “REG” . Pin 2 of ea ch
header is labeled with the voltage required for that pin (+5V, +3.3V, or +1.8V).

1.3.7 Digital Audio Input Source Multiplexer (U1)

The audio input source multiplexer has the following characteristics:

• Source 1: Optical S/PDIF Input

• Source 2: Coaxial S/PDIF Input

• Source 3: Digital Audio Input (DAI) Header

This multiplexer is used to select which audio source feeds the CS470xx DAI3 pin. When the CS470xx
has DAI3 configured as a S/PDIF receiver, either Source 1 or Source 2 can be selected by the MCU.
When DAI3 is configured as a standard I2S input, Source 3 can be selected as the data source.

The CDB47xxx has been designed to indicate which input is currently selected by illuminating a specific
LED for each Source, as described below:

• Source 1 selected: D12 will be on

• Source 2 selected: D51 will be on

• Source 3 selected: D5 will be on

CDB47xxx Main Board System Description

CDB47xxx User’s Manual

1.3.8 CS470xx Audio System-On-a-Chip (ASOC)

The CS470xx ASOCs are a family of ICs designed specifically for audio applications. The CDB47xxx
allows a designer to evaluate the CS470xx ASOCs in many different modes of multi-channel input and
output. The 100-pin footprint on the daughtercard is compatible with any CS470xx chip that uses the
LQFP100 package.

Audio input data to the ASOC can come from any of the following sources:

• Line-Level Analog Audio Input Connectors

• Optical S/PDIF Input Connector

• Coaxial S/PDIF Input Connector

• DAI Header

Audio output data from the ASOC can be sent to the following destinations:

• Line-Level Analog Audio Output Connectors

• Optical S/PDIF Output Connector

• Coaxial S/PDIF Input Connector

• DAO Header

The CS470xx can be booted from external serial Flash for custom applications in which a host MCU is not
desired.

The CDB47xxx also allows the PC to act as a host to boot and configure the DSP through the GUI
software for real-time configuration of the audio processing.

DS886DB11 Copyright 2014 Cirrus Logic, Inc 1-8

CDB47xxx Main Board System Description

CDB47xxx User’s Manual

1.3.9 C8051 MCU

The C8051 (U15) is a USB slave controller and general purpose MCU used to control the CDB47xxx
Board in stand-alone applications, and also used to interface to the PC through the USB port (DSP
Composer). Standalone applications can be as simple as using the MCU to configure the inputs on the
board to feed the DSP and provide a power-on-reset (POR) to the DSP. But standalone applications can
also take advantage of the LCD display, buttons, and rotary encoder to provide a user interface that is
managed by the C8051.

When DSP Composer is needed to perform real-time application development on the CS470xx, the USB
port should be used to connect the CDB47xxx Board to a PC that has DSP Composer



1.3.10 MCU Input: Push Buttons(S1-S4) and Rotary Encoder (S5)

The C8051 can accept user input throug h the bu ttons on the CDB47xxx when USB is not connected.
There are 4 momentary contact push-buttons pro vid ed .
There is also a rotary encoder knob that can be used to scroll up and down through options provided

through the MCU interface. The rotary encoder has an integrated momentary contact push-button that is
activated by pushing down on the knob.

installed.

1.3.11 MCU Output (LCD) (LCD1)

The C8051 can provide feedback to the use r th rough the on-board LCD when USB is not connected.

1.3.12 Memory (U17, U16 and U14))

The CDB47xxx is assembled with a 32-Mbit SPI Flash (U17) and a 512-kbit I2C Flash (U16) which are
dedicated for DSP firmware and configuration data. The ser ial control lines are routed down from th e DSP
through the daughter-card connectors.

There is an additional 32-Mbit SPI Flash component on the board (U14) that is used only to store MCU
firmware, and it is not required by the DSP.

1-9 Copyright 2014 Cirrus Logic, Inc. DS886DB11

CDB47xxx Daughtercard System Description

1.4 CDB47xxx Daughtercard System Description

The CS470xx Audio SOC Daughtercard is exactly the same for both the CDB47xxxS and CDB47xxxD
evaluation kits. All of the analog and digital audio signals are fed to the CS470xx (U1) through the
daughtercard connectors (J2 - J3). All of the analog pins of the CS470xx are connected to the analog
daughtercard connector (J3). The distinction between a differential system and single-ended system is
made on the main board where either the full differential pair is used, or only the positive (+) half of the
pair.

A detailed block diagram of the CDB47xxxD(or S)-DC48 daughtercard for single- ended or differential
platforms is shown in Figure 1-5. The CDB47xxxD ( or S)-DC28 and CDB47xxxD (or S)-DC24
daughtercards for single-ended or differential platforms are shown in Figure 1-6 and Figure 1-7
respectively. The sections that follow provide a detailed description of each block.

CDB47xxx User’s Manual

Figure 1-5. CDB47xxx-DC48 Daughtercard Block Diagram

DS886DB11 Copyright 2014 Cirrus Logic, Inc 1-10

CDB47xxx Daughtercard System Description

CDB47xxx User’s Manual

Figure 1-6. CDB47xxx-DC28 Daughtercard Block Diagram

1-11 Copyright 2014 Cirrus Logic, Inc. DS886DB11

CDB47xxx Daughtercard System Description

CDB47xxx User’s Manual

Figure 1-7. CDB47xxx-DC24 Daughtercard Block Diagram

1.4.1 Audio Inputs

1.4.1.1 Analog Line-level Inputs (J3)

Analog line-level inputs have the following characteristics:

• Connector Type: High-Density High-Speed Shrouded Female Connector

• Absolute Maximum Signal Level: These signals should only be driven from the connectors on the
main board. Voltages should comply with the Max Signal Level specification for the main board
circuitry.

1.4.1.2 Digital Audio Inputs (DAI) (J2)

The DAI connector has the following characteristics:

• Connector Type: High-Density High-Speed Shrouded Female Connector

• Absolute Maximum Signal Level: +3.6V

• Absolute Minimum Signal Level: -0.3V

This connector passes all serial audio data and clock signals up from the main CDB47xxx board.

DS886DB11 Copyright 2014 Cirrus Logic, Inc 1-12

CDB47xxx Daughtercard System Description

CDB47xxx User’s Manual

1.4.2 Audio Outputs from the CS470xx DSP

1.4.2.1 Analog Line-level Outputs (J3)

Analog line-level outputs have the following characteristics:

• Connector Type: High-Density High-Speed Shrouded Female Connector

• Maximum Signal Output Level: These signals should only b e driven from the connectors on th e main
board. Voltages will comply with the Max Signal Level specification for the main board circuitry.

1.4.2.2 Digital Audio Outputs (DAO) (J2)

The DAO connector has the following characteristics:

• Connector Type: High-Density High-Speed Shrouded Female Connector

• Absolute Maximum Signal Level: +3.6V

• Absolute Minimum Signal Level: -0.3V

This connector passes all serial audio data and clock signals up from the main CS47xxx board.

1.4.3 Control Header (J2)

The control header has the following characte rist ics:

• Connector Type: High-Density High-Speed Shrouded Female Connector

• Absolute Maximum Signal Level: +3.6V

• Absolute Minimum Signal Level: -0.3V

This connector passes all serial control signals up from the main CS47xxx board.

1.4.4 User Input (S1 and S2)

The CS470xx can be configured to accept user input through the slide switch and button on the
daughtercard. The button and switch are connected to GPIO pins on the ASOC which are monitored by
the DSP. This feature is firmware dependent an d ma y no t be ava ilab le in all ap plic ations.

There is a slide switch (S1) provided. It can connect Pin 7 (GPIO0) of the DSP to either 3.3V or ground
through a 10K resistor on the DSP.

There is a momentary contact push-button (S2) provided. When pressed it connects Pin 19 (GPIO3) to

3.3V through a pull-up resistor.

1.4.5 User LED Output (D1and D2)

The CS470xx can be configured to provide user feedback through LEDs on the daughtercard. This
feature is firmware dependent and will not be available in all applications.

There are 2 LEDs provided for user feedback. These LEDs light up when their associated GPIO pin is
driven low by the DSP. The LEDs map to their pins as follows:

• LED D1 is connected to pin 7 (GPIO16) of the DSP.

• LED D2 is connected to pin 18 (GPIO6) of the DSP.

1-13 Copyright 2014 Cirrus Logic, Inc. DS886DB11

1.5 Audio Clocking

Clocking architecture is one of the most important asp ects of an audio system. This can also be one of the
most complicated parts of a system design to insure that clocking is valid and st able for all scenarios. This
is one of the major advantages of the CS470xx Audio System On-a-Chip (ASOC). Because of the
integrated ADC and DAC along with the integrated SRCs, the CS470xx makes audio clocking very
simple. For analog-only systems, the clocking architecture is as simple as a crystal feeding the CS470xx.

Traditionally the input and output clock do mains of the DSP needed to be synchronous when delivering
audio data in an isochronous fashion (constant bitrate delivery), even if the input/output domains operate

at different frequencies (e.g. 48 kHz input/96 kHz output). Systems utilizing serial audio data (I
would thus use isochronous delivery.

The CS470xx’s integrated SRCs remove this requireme nt because th e CS470xx can rate match the input
(DAI) Fs to any Fs on the output side (DAO). The examples below show configurations that support an Fs
that is synchronized between DAI and DAO, as well as an output Fs that is independent of the input Fs.

1.5.1 Clock and Data Flow for ADC Input

Audio Clocking

CDB47xxx User’s Manual

2

S) delivery

Figure 1-8. ADC Clocking

The ADC clocking architecture is used when the internal ADCs are used as the only audio input (that is,
SPDIF is disabled and there are no serial audio signals connected to DAI or DAO). In this scenario, the
CS470xx has all audio clocking self contained. Figure 1-8 illustrates this clocking configuration.

The clock fed to XTI of the CS470xx is MCLK for the system, and the ASOC masters clocks to DAC and
ADC. The user need only route in analog signals and route out the processed analog signals.

DS886DB11 Copyright 2014 Cirrus Logic, Inc 1-14

Audio Clocking

CDB47xxx User’s Manual

1.5.2 Clock and Data Flow for S/PDIF Input

Figure 1-9. S/PDIF Clocking

The S/PDIF clocking architecture is used when any S/PDIF RX is used as an audio source, whether from
the optical RX, coaxial RX, or brought in on the DAI header. Figure 1-9 illustrates this clocking
configuration.

The incoming S/PDIF stream is always rate matched to another MCLK in the system through an SRC.
This means that the DAO can be run at a consta nt Fs that is independ ent of the incoming S/PDIF Fs. This
is useful in systems with digital amplifiers and wireless audio transmitter modules that requires a fixed Fs.

The CS470xx can master its output clocks, or slave to clocks from another source.

1-15 Copyright 2014 Cirrus Logic, Inc. DS886DB11

CDB47xxx User’s Manual

1.5.3 Clock and Data Flow for DAI Input with Fixed Output Fs

Audio Clocking

Figure 1-10. DAI Clocking with Variable Input Fs and Fixed Output Fs

The DAI clocking architecture is used when any serial audio data source is connected to the DAI header.

Figure 1-10 illustrates this clocking configuration. Note that the incoming DAI data is passed out of the

CS470xx at the Fs of the crystal connected to the ASOC.
Like the S/PDIF clocking configuration, this allows the DAI to be rate matched to another MCLK in the

system through an SRC. This means that the DAO can be run at a constant Fs that is independent of the
incoming DAI Fs. This is useful in systems with a digital amplifier that requires a fixed Fs.

The CS470xx can masters its output clocks, or slave to clocks from another source.

DS886DB11 Copyright 2014 Cirrus Logic, Inc 1-16

Other Useful Information

CDB47xxx User’s Manual

1.5.4 Clock and Data Flow for DAI Input with Matched DAO Fs

Figure 1-11. DAI Clocking with Fixed Output Fs

The DAI clocking architecture is used when any serial audio data source is connected to the DAI header.

Figure 1-11 illustrates this clocking configuration. Note that the incoming DAI data is synchronized to the

DAO using a common MCLK.
This is a more traditional clocking architecture for serial audio data, where the DAI Fs and the DAO Fs are

synchronous. In this configuration, the SRC is bypassed for the DAO.

1.6 Other Useful Information

1.6.1 Web Sites

• Cirrus Logic main web site: www.cirrus.com

1.6.2 DSP Information

The following information can be obtained from your Cirrus Logic representative.

• CS470xx Data Sheet

• CS470xx Hardware User’s Manual

•AN333, CS470xx Firmware User’s Manual

1-17 Copyright 2014 Cirrus Logic, Inc. DS886DB11

1.6.3 Board Information

• The following information can be obtained from your local Cirrus Logic representative.

• Schematics

•BOM

• Artwork and PCB stackup

1.6.4 DSP Software Utility Information

The following information can be obtained from your local Cirrus representative.

™

• DSP Composer

• DSP Composer

The documents listed above are update d per iodica lly and may be more up- to-date than the info rmati on in
this document. Contact your Cirrus Logic sales representative for the latest updates.

User’s Manual

™

Primitive Elements Reference

Other Useful Information

CDB47xxx User’s Manual

DS886DB11 Copyright 2014 Cirrus Logic, Inc 1-18

Introducing the CDB47xxx Customer Development Kit

CDB47xxx

USB Port

PC

OPTIONAL

CDB47xxx User’s Manual

Chapter 2

Introduction to CDB47xxx Kit

2.1 Introducing the CDB47xxx Customer Development Kit

The CDB47xxx kit is composed of the CDB47xxxS or CDB47xxxD main board and a daughtercard that
can support any member of the CS470xx Audio SOC (ASOC) family. The CDB47xxx provides a practical
platform for emulating a typical multi-channel audio system application. The system can be an
independent evaluation platform controlled by the on-bo ard MCU, or using the USB connector, the CDB
can be connected to a host PC which can configure and control the board using DSP Composer, the
Cirrus Proprietary GUI. Figure 2-1 shows the relationship between the CDB47xxx and the optiona l PC.

Figure 2-1. CDB47xxx System Block Diagram

This document will concentrate on the features and basic operation of the CDB47xxx kit. Detailed
information regarding the operation and programming of the CS470xx Audio SOC is covered by the
CS470xx Data Sheet, CS470xx Hardware User’s Manual and application note AN333. See Section 1 .6
for more details.

The CDB47xxx is a convenient and easy-to-operate evaluation platform. It has been designed to
demonstrate the majority of the CS470xx functions on a small base board. These features include:

• PC control of the CS470xx using the DSP Composer

• Serial control of audio devices on CDB47xxx via I

• Digital audio input of PCM or compressed data via optical or coaxial S/PDIF.

• Up to 4 channels of simultaneous analog audio input via the integrated ADCs of the CS470xx.

• The 5:1 analog multiplexer integrated into one of the CS470xx ADCs.

• Up to 8-channel analog output via the integrated DACs of the CS470xx.

• Digital audio output of PCM data via optical or coaxial S/PDIF.

• Multi-channel digital audio input via the DAI serial audio (I

• Capability to support fixed output Fs that is independent of input Fs.

™

graphical user interface.

2C™

or SPI™ protocols.

2

S) header.

2-1 Copyright 2014 Cirrus Logic, Inc. DS886DB11

Identifying CDB47xxx Components

CDB47xxx User’s Manual

• Fast boot – master boot of custom applications from 32 Mbit serial SPI Flash device or 512 kbit I2C
device.

• Microphone input with integrated amplifier.

• Supports all members of the CS470xx family in the 100-pin LQFP package.

Note: Not all features of the CS470xx are exercised on the CDB47xxx.

2.2 Identifying CDB47xxx Components

2.2.1 CDB47xxxS Board

Figure 2-2 shows the top side of the CDB47xxxS Board. Section 2.2.1.1 contains the legend for the

reference points called out in red in Figure2-2 CDB47xxxS (Single-Ended) Top View.

DS886DB11 Copyright 2014 Cirrus Logic, Inc 2-2