Evaluation Board for CS4350
CDB4350
Features
No High Frequency Master Clock Required
Stand-Alone or PC GUI Board Control
CS8416 Receives S/PDIF-Compatible Digital
Audio
Headers for External PCM Audio Input
Demonstrates Recommended Layout and
Grounding Arrangements.
Requires Only a Digital Signal Source and
Power Supplies for a Complete Digital-toAnalog Converter System
Description
The CDB4350 evaluation board is an excellent platform
for quickly evaluating the CS4350 24-bit, 24-pin, stereo
D/A converter. Evaluation requires an analog signal analyzer, a digital signal source, a PC for controlling the
CS4350 (only required for Control Port Mode), and a
power supply. Analog line-level outputs are provided via
RCA phono jacks.
The CS8416 digital audio rec eiver IC provide s the sy stem timing necessary to operate the digital-to-analog
converter and will accept S/PDIF-compatible audio data. The evaluation board may also be configured to
accept external timing and data signals for operation in
a user application during system development.
ORDERING INFORMATION
CDB4350 Evaluation Board
Inputs for PCM
Clocks and Data
CS8416
Digital Audio
Interfa c e
Hardware or
Software Board
Control
Analog Outputs
and Filtering
CS4350
Recovered Master
Clock
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2006
(All Rights Reserved)
APRIL '06
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TABLE OF CONTENTS
1. CDB4350 SYSTEM OVERVIEW ............................................................................................................ 3
2. CS4350 DIGITAL-TO-ANALOG CONVERTER ..................................................................................... 3
3. CS8416 DIGITAL AUDIO RECEIVER .................................................................................................... 3
4. INPUT FOR CLOCKS AND DATA ......................................................................................................... 3
5. INPUT FOR CONTROL DATA ............................................................................................................... 3
6. POWER SUPPLY CIRCUITRY ............................................................................................................... 4
7. GROUNDING AND POWER SUPPLY DECOUPLING .......................................................................... 4
8. ANALOG OUTPUT FILTERING ................. ... .... ... ... ... .... ... ....................................... ... ... ... ... .... ... ........... 4
9. BOARD CONNECTIONS AND SETTINGS ............................................................................................ 5
10. SCHEMATICS ...................................................................................................................................... 6
11. LAYOUT ............................................................................................................................................. 13
12. REVISION HISTORY .......................................................................................................................... 16
LIST OF FIGURES
Figure 1.System Block Diagram and Signal Flow ....................................................................................... 6
Figure 2.CS4350 ... ... .... ... ... ... .... ............................................................................. ... .... ... ........................... 7
Figure 3.Analog Outputs ........................................... ... ... .... ...................................... .... ... ... ........................ 8
Figure 4.PCM Input Header and Hardware Control ..... ... .... ... ... .......................................... ... ... .... ... ... ... ..... 9
Figure 5.CS8416 S/PDIF Input .......... .... ... ... ... ... .... ... .......................................... ... ................................... 10
Figure 6.Control Port ........................................................................ ... ... ... ... .... ... ... ... .... ... ......................... 11
Figure 7.Power .............................................................................................................. ............................ 12
Figure 8.Silkscreen Top ............................................... ... .... ... ... .......................................... ...................... 13
Figure 9.Top Side ............................... .... ... ... ... .......................................................................................... 14
Figure 10.Bottom Side ....................... .... ... ... ... ... .... .......................................... ... ... ... .... ... ... ...................... 15
CDB4350
LIST OF TABLES
Table 1. System Connections ..................................................................................................................... 5
Table 2. CDB4350 Jumper Settings ............................................................................................................ 5
Table 3. CDB4350 Switch Settings ............................................................................................................. 5
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CDB4350
1. CDB4350 SYSTEM OVERVIEW
The CDB4350 evaluation board is an excellent platform for quickly evaluating the CS4350. The CS8416 digital audio
interface receiver provides an easy interface to digital audio signal sources including the majority of digital audio test
equipment. The evaluation board also allows the user to supply external PCM clocks and data through headers for
system development.
The CDB4350 schematic has been partitioned into 6 pages, shown in Figures2 through 7. Each schematic page is
represented in the system diagram shown in Figure 1. Notice that the system diag ram also includes the in terconnections between the partitioned schematics.
2. CS4350 DIGITAL-TO-ANALOG CONVERTER
A description of the CS4350 is included in the CS4350 datasheet, available at www.cirrus.com.
3. CS8416 DIGITAL AUDIO RECEIVER
The system receives and decodes the standard S/PDIF data format using a CS8416 digital audio receiver
(Figure 5). The outputs of the CS8416 include a serial bit clock, serial data, and a left-right clock. The CS8416 data
format is selected through switch S1. The operation of the CS8416 a nd a discussion of the digital aud io interface is
included in the CS8416 datasheet, available at www.cirrus.com.
The CDB4350 has been designed so that the input can be either optical or coaxial (see Figure 6). However, both
inputs cannot be driven simultaneously.
After the CS8416 serial format is changed either through S1 in Stand-Alone Mode, or though the CDB4350 GUI in
PC Mode, a reset is required. The CS8416 can be manually reset using ‘HARDWARE RESET’ (S2) in Stand-Alone
Mode, or through software when operating the CDB4350 in PC Mode.
4. INPUT FOR CLOCKS AND DATA
The evaluation board has been designed to allow external PCM data input through header J10. The schematic for
the clock/data input is shown in Figure 4. In Stand-Alone Mode, switch position 6 of S4 selects the source as either
CS8416 (open) or header J10 (closed). In PC Mode, the PCM source is selected through software.
5. INPUT FOR CONTROL DATA
The evaluation board can be ru n in either a Stand-Al one Mode or with a PC. Stand-Alone Mode does not require
the use of a PC, and the mode pins are configu red us ing switch positions 1 through 5 of S4 and switch positions 1
and 2 of S1. PC Mode uses software to se t up th e CS4350 thro ugh I²C
port. When the serial port (RS232) or USB is attached and the CDB4350 software is run ning, PC Mode is automatically selected.
Header J38 offers the option for external input of RST and SPI/I²C clocks and data. The board is set up from the
factory to use the on-board microcontroller in conjunction with software available at www.cirrus.com. To use an external control source, remove the shunts on J38 and place a ribbon cable so the signal lines are on the center row
and the grounds are on the right side. R89 and R90 should be populate d with 2 kΩ resistors when using an external
I²C source which does not already provide pull-ups.
®
or SPI™ using the PC’s serial port or USB
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CDB4350
6. POWER SUPPLY CIRCUITRY
Power is supplied to the evaluation board by three binding posts (GND, +12V, and -12V) , as shown in Figure 7. The
‘+12V’ and ‘-12V’ terminals supply the active output filters. The +3.3 V and +5.0 V circuitry is powered by regulators
fed by the ‘+12V’ terminal. Headers J3, J4, and J7 allow the user to either select +3.3 V or +5.0 V supplies for the
various CS4350 voltage supply pins. Alternatively, the user can remove the shunts on J3, J4, and J7, and provide
an external power supply.
WARNING:Refer to the CS4350 datasheet for maximum allowable voltage levels. Operation outside of this range
can cause permanent damage to the device.
7. GROUNDING AND POWER SUPPLY DECOUPLING
As with any high-performance converter, the CS4350 requires careful attention to power supply and grounding arrangements in order to optimize performance. Figure 2 details the connections to the CS4350 while Figures 8, 9,
and 10 show the component place ment and top an d botto m la yout. The d ecoupling capacito rs are located as close
to the CS4350 as possible. Extensive use of ground plane fill in the evaluation board yields large reductions in radiated noise.
8. ANALOG OUTPUT FILTERING
The analog output on the CDB4350 has been designed according to the CS4350 datasheet. This output circuit includes an active 2-pole, 50 kHz filter which utilizes the multiple-feedback topology and a passive output filter.
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9. BOARD CONNECTIONS AND SETTINGS
Board connections and settings are shown in Table 1, Table 2, and Table 3.
CONNECTOR INPUT/OUTPUT SIGNAL PRESENT
GND Input Ground connection from power supply
+12V Input +12V positive supply for the on-board filtering
-12V Input -12 V negative supply for the on-board filtering
S/PDIF IN - J1 Input Digital audio interface input via coax
S/PDIF IN - OPT1 Input Digital audio interface input via optical
PCM INPUT - J10 Input Input for master, serial, left/right clocks and serial data
AOUTA, AOUTB Output RCA line level analog outputs from active output stage
POUTA, POUTB Output RCA line level analog outputs from passive output stage
Table 1. System Connections
JUMPER PURPOSE POSITION FUNCTION SELECTED
J6, J21 Selects analog output
J3, J4, J7
J38 Selects source of control data
J27 C2 micro programming - Reserved for factory use only
Selects Supply Voltage for
CS4350
*A
P
+5V
*+3.3V
*PC CONTROL
shunts removed
*CDB4350 outputs from AOUTA and AOUTB
CDB4350 outputs from POUTA and POUTB
Supplies +5.0 V to associated CS4350 supply
*Supplies +3.3 V to associated CS4350 supply
*Control from PC and on-board microcontroller
External control input using center and right columns
CDB4350
Table 2. CDB4350 Jumper Settings
*Default Factory Settings.
SWITCH
(Note 1) PURPOSE POSITION FUNCTION SELECTED
S2 Resets CS8416 and CS4350 The CS8416 must be reset if switch S1 is changed
S1
S4
CS8416 Format Select
SFSEL[1:0]
CS4350 Format Select
DIF[2:0]
CS4350 De-emphasis Select 4
CS4350 Popguard Enable 5
Selects PCM source for
CS4350
Table 3. CDB4350 Switch Settings
1,2
1,2, 3
6
Default: SFSEL[1:0] = 00 (Closed). See CS8416 datasheet
for details.
Default: DIF[2:0] = 000 (Closed). See CS4350 datasheet
for details.
open = De-emphasis enabled
*closed = De-emphasis disabled.
open = Popguard enabled
*closed = Popguard disabled.
*open = CS8416
closed = PCM Header J10
*Default Factory Settings.
Note:
1. Switch settings take effect in Stand-Alone Mode only.
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10.SCHEMATICS
PCM HEADER
Figure 4
CS8416
S/PDIF
Input
Figure 5
PCM Clocks/Data
PCM Clocks/Data
CS8416 serial port
format
PCM source select
PCM mux
Figure 4
PCM source select
Hardware Contr ol
Switches
PCM Clocks/Data
DIF[2:0]
Serial Control Port
Figure 6
I2C/SPI Header
CS4350
Figure 2
Power
Figure 7
Analog Outputs
POUTA
Figure 3
2
AOUTA
Figure 3
2
AOUTB
Figure 3
POUTB
Figure 3
RMCK Header
Figure 4
Figure 4
CDB4350
Figure 1. System Block Diagram and Signal Flow
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Figure 2. CS4350
CDB4350
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Figure 3. Analog Outputs
CDB4350
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Figure 4. PCM Input Header and Hardware Control
CDB4350
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Figure 5. CS8416 S/PDIF Input
CDB4350
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Figure 6. Control Port
CDB4350
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Figure 7. Power
CDB4350
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11.LAYOUT
Figure 8. Silkscreen Top
CDB4350
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Figure 9. Top Side
CDB4350
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Figure 10. Bottom Side
CDB4350
12.REVISION HISTORY
Release Date Changes
DB1
April 2006
Initial Evaluation Board Datasheet Release
CDB4350
Contacting Cirrus Logic Support
For all product questions and inquiries, contact a Cirrus Logic Sales Representative.
To find the one nearest to you, go to www.cirrus.com
IMPORTANT NOTICE
Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the informatio n i s sub je ct
to change without notice and is provid ed "AS IS" witho ut warranty of any kind (ex press or imp lied). Cu stomers are adv ised to ob tain the latest version of relevant
information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale
supplied at the time of order acknowledgmen t, including those pe rtaining to warra nty, indemnific ation, and lim itation of lia bility. No responsibility is assumed by Cirrus
for the use of this information, including use o f this in forma tion as the ba sis for ma nu facture or sa le of a ny item s, or for i nfringement of patents or other rights of third
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copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only f or use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent
does not extend to other copying such as copying fo r ge neral distribution, advertising or promotional purposes, or for creating any work for resale.
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Cirrus Logic, Cirrus , the Cir rus Lo gic log o desi gns , and Po pgua rd are t rad emark s of Cirru s Logi c, I nc. All o ther br and and p rod uct na mes in t his do cument may be
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I²C is a registered trademark of Philips Semiconductor.
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