Cirrus Logic CS4340A-KS, CDB4340A Datasheet
CS4340A
24-Bit, 192 kHz Stereo DAC for Audio
Features
101 dB Dynamic Range
-91 dB THD+N
+3.3 V or +5 V Power Supply
50 mW with 3.3 V supply
Low Clock Jitter Sensitivity
Filtered Line Level Outputs
On-Chip Digital De-emphasis for 44.1kHz
Popguard®Technology for Control of Clicks
and Pops
Up to 200 kHz Sample Rates
Automatic Mode Detection for Sample Rates
between 4 and 200 kHz
Pin Compatible with the CS4340
Description
The CS4340A is a complete stereo digital-to-analog system including digital interpolation, fourth-order deltasigma digital-to-analog conversion, digital de-emphasis
and switched capacitor analog filtering. The advantages
of this architecture include: ideal differential linearity, no
distortion mechanisms due to resistor matching errors,
no linearity drift over time and temperature, and a high
tolerance to clock jitter.
The CS4340A accepts data at all standard audio sample
rates up to 192 kHz, consumes very little power, operates over a wide power supply range and is pin
compatible with the CS4340, as described in section 3.1.
These features are ideal for DVD audio players.
ORDERING INFORMATION
CS4340A-KS 16-pin SOIC, -10 to 70 °C
CDB4340A Evaluation Board
SCLK
RST
Interpolation
Serial
LRCK
SDIN
Audio
Interface
DIF0 DIF1
Interpolation
Preliminary Product Information
DEM
De-emphasis
Filter
Filter
MCLK
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
∆Σ
∆Σ
MUTEC
External
Mute Control
DAC
DAC
Analog Filter
Analog Filter
AOUTL
AOUTR
http://www.cirrus.com
CopyrightCirrus Logic, Inc. 2002
(All Rights Reserved)
OCT ‘02
DS590PP2
1
TABLE OF CONTENTS
1. PIN DESCRIPTION ......................................................................................... 4
2. TYPICAL CONNECTION DIAGRAM .............................................................. 5
3. APPLICATIONS .............................................................................................. 6
3.1 Upgrading from the CS4340 to the CS4340A ...................................... 6
3.2 Sample Rate Range/Operational Mode Detect ................................... 6
3.3 System Clocking .................................................................................. 6
3.4 Digital Interface Format ....................................................................... 7
3.5 De-Emphasis ....................................................................................... 8
3.6 Power-up Sequence ............................................................................ 9
3.7 Popguard
3.7.1 Power-up .................................................................................... 9
3.7.2 Power-down ............................................................................... 9
3.7.3 Discharge Time .......................................................................... 9
3.8 Mute Control ...................................................................................... 10
3.9 Grounding and Power Supply Arrangements .................................... 10
4. CHARACTERISTICS AND SPECIFICATIONS ............................................ 11
ANALOG CHARACTERISTICS (CS4340A-KS)........................................ 11
COMBINED INTERPOLATION
& ON-CHIP ANALOG FILTER RESPONSE.............................................. 13
SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE ............. 16
DC ELECTRICAL CHARACTERISTICS ...................................................17
DIGITAL INTERFACE SPECIFICATIONS ................................................ 17
DIGITAL INPUT CHARACTERISTICS...................................................... 17
THERMAL CHARACTERISTICS AND SPECIFICATIONS....................... 17
RECOMMENDED OPERATING SPECIFICATION ................................. 18
ABSOLUTE MAXIMUM RATINGS ............................................................ 18
5. PARAMETER DEFINITIONS ........................................................................19
6. REFERENCES .............................................................................................. 19
7. PACKAGE DIMENSIONS ............................................................................. 20
®
Transient Control .............................................................. 9
CS4340A
Contacting Cirrus Logic Support
For all product questions and inquiries contact a Cirrus Logic Sales Representative.
To find one nearest you go to http://www.cirrus.com/corporate/contacts/sales.cfm
IMPORTANT NOTICE
"Preliminary" product information describes products that are in production, but for which full characterization data is not yet available. "Advance" product inf ormation describes products that are i n development and subject to development changes. Cirrus Logic, I nc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the informati on is subject to change without notice and is provided "AS IS" without warranty
of any kind (express or implied). Customers are advised to obtain the latest version of relevant i nformation to verify, before placing orders, that information being
relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those
pertaining to warranty, patent infringement, and limitation of liability. No responsibility i s assumed by Cirrus f or the use of this informati on, i ncludi ng use of this
information as the basis for manufacture or sale of any items, or for i nfringement of patents or other rights of third parties. This document is the property of Cir rus
and by furnishi ng this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or
other intellectual property ri ghts. Ci rrus owns the copyrights of the information contained herein and gives consent for copies to be made of the info rmation only
for use within your organization wi th respect to Cirrus integr ated ci rcuits or other parts of Cirrus. This consent does not extend to other copying such as copying
for general distribution, advertising or pr omotional purposes, or for creating any work for resale.
An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in thismaterial and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. An export li cense and/or quota needs to be
obtained from the competent authorities of the Chinese Government if any of the products or technologies describ ed in this material is subject to the PRC Foreign
Trade Law and i s to be exported or taken out of the PRC.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE
PROPERTY OR ENVIRONMENTAL DAMAGE (" CRITICAL APPLICATIONS") . CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS
IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK.
Cirrus Logic, Cirrus, and the Cirrus Logi c logo desi gns are trademarks of Cirrus Logic, Inc. All other brand and product names in this d ocument may be trademarks or service marks of their respective owners.
2 DS590PP2
LIST OF FIGURES
CS4340A
Figure 1. Typical Connection Diagram............................................................................................ 5
Figure 2. CS4340A Format 0 - I
Figure 3. CS4340A Format 1 - Left Justified up to 24-Bit Data ....................................................... 8
Figure 4. CS4340A Format 2 - Right Justified, 24-Bit Data ............................................................ 8
Figure 5. CS4340A Format 3 - Right Justified, 16-Bit Data ............................................................ 8
Figure 6. De-Emphasis Curve......................................................................................................... 8
Figure 7. Output Test Load ........................................................................................................... 12
Figure 8. Maximum Loading..........................................................................................................12
Figure 9. Single-Speed Stopband Rejection................................................................................. 14
Figure 10. Single-Speed Transition Band ..................................................................................... 14
Figure 11. Single-Speed Transition Band (Detail)......................................................................... 14
Figure 12. Single-Speed Passband Ripple ................................................................................... 14
Figure 13. Double-Speed Stopband Rejection.............................................................................. 14
Figure 14. Double-Speed Transition Band .................................................................................... 14
Figure 15. Double-Speed Transition Band (Detail) ....................................................................... 15
Figure 16. Double-Speed Passband Ripple.................................................................................. 15
Figure 17. Serial Input Timing....................................................................................................... 16
LIST OF TABLES
Table 1. CS4340A Auto-Detect.......................................................................................................6
Table 2. Single-Speed Mode Standard Frequencies ...................................................................... 7
Table 3. Double-Speed Mode Standard Frequencies..................................................................... 7
Table 4. Quad-Speed Mode Standard Frequencies ....................................................................... 7
Table 5. Digital Interface Format - DIF1 and DIF0 .......................................................................... 7
Table 6. De-Emphasis Control ........................................................................................................ 8
2
S up to 24-Bit Data...................................................................... 7
DS590PP2 3
1. PIN DESCRIPTION
CS4340A
SDIN AOUTL
SCLK VA
LRCK AGND
MCLK AOUTR
DEM FILT+
Pin Name # Pin Description
RST
SDIN
SCLK
LRCK
MCLK
DIF1
DIF0
DEM
FILT+
VQ
REF_GND
AOUTR
AOUTL
AGND
VA
MUTEC
Reset (Input) - Powers down device.
1
Serial Audio Data (Input) - Input for two’s complement serial audio data.
2
Serial Clock (Input) -Serial clock for the serial audio interface.
3
Left Right Clock (Input) - Determines which channel, Left or Right, is currently active on the
4
serial audio data line.
Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters.
5
Digital Interface Format (Input) - Defines the required relationship between the Left Right
6
Clock, Serial Clock and Serial Audio Data.
7
De-emphasis Control (Input) - Selects the standard 15µs/50µs digital de-emphasis filter
8
response for the 44.1 kHz sample rate.
Positive Voltage Reference (Output) - Positive voltage reference for the internal
9
sampling circuits.
Quiescent Voltage (Output) - Filter connection for internal quiescent reference voltage.
10
Reference Ground (Input) - Ground reference for the internal sampling circuits.
11
Analog Outputs (Output) - The full scale analog output level is specified in the
12
Analog Characteristics table.
15
Analog Ground (Input)
13
14 Power (Input) - Positive power for the analog, digital and serial audio interface sections.
Mute Control (Output) - Control signal for an optional mute circuit.
16
RST MUTEC
161
152
143
134
125
DIF1 REF_GND
DIF0 VQ
116
107
98
4 DS590PP2
2. TYPICAL CONNECTION DIAGRAM
CS4340A
Serial Audio
Data
Processor
Externa l Clock
Mode
Configuration
1µF
560
560
+3.3V or +5.0V
Ω
C
+
0.1 µF
1µF
Ω
C
C=
OPTIONAL
MUTE
CIRCUIT
+560
R
L
πF
560
4
SRL
R
R
Left
Audio
Output
L
Right
Audio
Output
L
+
.1 µF
+
+
Ω
1µF
+
Ω
14
VA
2
SDIN
3
SCLK
4
LRC K
CS4340A
5
MCLK
6
DIF1
7
DIF0
8
DEM
1
RST
AGND
13
0.1 µF
AOUTL
MUTEC
FILT+
VQ
REF_GND
AOUTR
3.3 µF
15
10 k
16
9
10
11
3.3 µF
12
10 k
Figure 1. Typical Connection Diagram
DS590PP2 5
CS4340A
3. APPLICATIONS
3.1 Upgrading from the CS4340 to the CS4340A
The CS4340A is pin and functionally compatible with all CS4340 designs, operating at the standard audio
sample rates, that use pin 3 as a serial clock input. In addition to the features of the CS4340, the CS4340A
supports standard sample rates up to 192 kHz, as well as automatic mode detection for sample rates between 4 and 200 kHz. The automatic mode detection feature allows sample rate changes between single,
double and quad-speed modes without external intervention.
The CS4340A does not support an internal serial clock mode, sample rates between 50 kHz and 84 kHz or
de-emphasis for 32 and 48 kHz, as does the CS4340.
3.2 Sample Rate Range/Operational Mode Detect
The device operates in one of three operational modes. It will auto-detect the correct mode when the input
sample rate (F
ple rates outside the specified range for each mode are not supported.
), defined by the LRCK frequency, falls within one of the ranges illustrated in Table 1. Sam-
s
Input Sample Rate (FS)MODE
4 kHz - 50 kHz Single-Speed Mode
84 kHz - 100 kHz Double-Speed Mode
170 kHz - 200 kHz Quad-Speed Mode
Table 1. CS4340A Auto-Detect
3.3 System Clocking
The device requires external generation of the master (MCLK), left/right (LRCK) and serial (SCLK)
clocks. The LRCK, defined also as the input sample rate (F
MCLK according to specified ratios. The specified ratios of MCLK to LRCK, along with several standard
audio sample rates and the required MCLK frequency, are illustrated in Tables 2-4.
), must be synchronously derived from the
s
6 DS590PP2
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