C&H Technology VSKN26 User Manual

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Suite 108
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VSKT26.., VSKH26.., VSKL26.., VSKN26.. Series

Vishay Semiconductors

ADD-A-PAK Generation VII Power Modules

Thyristor/Diode and Thyristor/Thyristor, 27 A

FEATURES

• High voltage

• Industrial standard package

• UL approved file E78996

• Low thermal resistance

• Compliant to RoHS directive 2002/95/EC

• Designed and qualified for industrial level

ADD-A-PAK

BENEFITS

• Excellent thermal performances obtained by the usage of

PRODUCT SUMMARY

I

or I

T(AV)

F(AV)

27 A

exposed direct bonded copper substrate

• Up to 1600 V

• High surge capability

MECHANICAL DESCRIPTION

• Easy mounting on heatsink

The ADD-A-PAK Generation VII, new generation of
ADD-A-PAK module, combines the excellent thermal
performances obtained by the usage of exposed direct
bonded copper substrate, with advanced compact simple
package solution and simplified internal structure with
minimized number of interfaces.

ELECTRICAL DESCRIPTION

These modules are intended for general purpose high
voltage applications such as high voltage regulated power
supplies, lighting circuits, temperature and motor speed
control circuits, UPS and battery charger.

MAJOR RATINGS AND CHARACTERISTICS

SYMBOL CHARACTERISTICS VALUES UNITS

or I

I

T(AV)

F(AV)

I

O(RMS)

I

TSM,

I

FSM

2

I

t

2

I

√t 8000 kA2√s

V

RRM

T

Stg

T

J

85 °C 27

As AC switch 60

50 Hz 400

60 Hz 420

50 Hz 800

60 Hz 730

Range 400 to 1600 V

- 40 to 125 °C

A

kA2s

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VSKT26.., VSKH26.., VSKL26.., VSKN26.. Series

Vishay Semiconductors

ADD-A-PAK Generation VII Power Modules

Thyristor/Diode and Thyristor/Thyristor, 27 A

ELECTRICAL SPECIFICATIONS

VOLTAGE RATINGS

, MAXIMUM

V

RRM

TYPE NUMBER

VOLTAGE

CODE

REPETITIVE PEAK

REVERSE VOLTAGE

V

04 400 500 400

06 600 700 600

08 800 900 800

VSK.26

10 1000 1100 1000

12 1200 1300 1200

14 1400 1500 1400

16 1600 1700 1600

ON-STATE CONDUCTION

PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS

Maximum average on-state current (thyristors) I

Maximum average forward current (diodes) I

T(AV)

F(AV)

V

, MAXIMUM

RSM

NON-REPETITIVE PEAK

REVERSE VOLTAGE

V

180° conduction, half sine wave,
T

= 85 °C

C

V

, MAXIMUM REPETITIVE

DRM

PEAK OFF-STATE VOLTAGE,

GATE OPEN CIRCUIT

V

27

I

RRM, IDRM

AT 125 °C

mA

15

Maximum continuous RMS on-state current,
as AC switch

Maximum peak, one-cycle non-repetitive
on-state or forward current

2

Maximum I

Maximum I

t for fusing I2t

2

√t for fusing I2√t

Maximum value or threshold voltage V

Maximum value of on-state
slope resistance

Maximum peak on-state or forward voltage

Maximum non-repetitive rate of rise of
turned on current

Maximum holding current I

Maximum latching current I

Notes

(1)I2

t for time tx = I2√t x √t

(2)

Average power = V

(3)

16.7 % x π x IAV < I < π x I

(4)

I > π x I

AV

T(TO)

x

x I

T(AV)

AV

+ rt x (I

T(RMS)

2

)

I

O(RMS)

I

TSM

or

I

FSM

T(TO)

r

t

V

TM

V

FM

dI/dt

H

L

or

I

(RMS)

t = 10 ms

t = 8.3 ms 420

t = 10 ms

t = 8.3 ms 350

t = 10 ms

t = 8.3 ms 730

t = 10 ms

t = 8.3 ms 510

t = 0.1 ms to 10 ms, no voltage reapplied

(1)

T

= TJ maximum

J

Low level

(2)

High level

Low level

(2)

High level

ITM = π x I

IFM = π x I

TJ = 25 °C, from 0.67 V
I

= π x I

TM

No voltage
reapplied

Sinusoidal
half wave,

100 % V

RRM

initial T

reapplied

No voltage
reapplied

Initial TJ = TJ maximum

100 % V

RRM

reapplied

(3)

TJ = TJ maximum

(4)

(3)

TJ = TJ maximum

(4)

T(AV)

TJ = 25 °C 1.65 V

F(AV)

,

, Ig = 500 mA, tr < 0.5 μs, tp > 6 μs

T(AV)

DRM

I

(RMS)

= TJ maximum

J

TJ = 25 °C, anode supply = 6 V,
resistive load, gate open circuit

TJ = 25 °C, anode supply = 6 V, resistive load 400

60

400

335

800

560

A2s

8000 A

0.86

1.09

9.58

7.31

mΩ

150 A/μs

200

mA

A

2

√s

V

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VSKT26.., VSKH26.., VSKL26.., VSKN26.. Series

ADD-A-PAK Generation VII Power Modules

Vishay Semiconductors

Thyristor/Diode and Thyristor/Thyristor, 27 A

TRIGGERING

PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS

Maximum peak gate power P

Maximum average gate power P

Maximum peak gate current I

Maximum peak negative gate voltage - V

GM

G(AV)

GM

GM

TJ = - 40 °C

Maximum gate voltage required to trigger V

T

GT

= 25 °C 2.5

J

T

= 125 °C 1.7

J

Anode supply = 6 V
resistive load

TJ = - 40 °C

Maximum gate current required to trigger I

Maximum gate voltage that will not trigger V

Maximum gate current that will not trigger I

GT

GD

T

TJ = 125 °C, rated V

GD

TJ = 125 °C, rated V

= 25 °C 150

J

= 125 °C 80

J

Anode supply = 6 V
resistive load

applied 0.25 V

DRM

applied 6 mA

DRM

BLOCKING

PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS

Maximum peak reverse and off-state
leakage current at V

RRM

, V

DRM

Maximum RMS insulation voltage V

Maximum critical rate of rise of off-state voltage dV/dt T

I

RRM,

I

DRM

INS

TJ = 125 °C, gate open circuit 15 mA

50 Hz

= 125 °C, linear to 0.67 V

J

DRM

10

2.5

2.5 A

10

4.0

270

3000 (1 min)

3600 (1 s)

1000 V/μs

W

V

mAT

V

THERMAL AND MECHANICAL SPECIFICATIONS

PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS

Junction operating and storage
temperature range

Maximum internal thermal resistance,
junction to case per leg

Typical thermal resistance,
case to heatsink per module

to heatsink

Mounting torque ± 10 %

busbar 3

Approximate weight

, T

T

J

Stg

R

thJC

DC operation 0.76

- 40 to 125 °C

°C/W

R

thCS

Mounting surface flat, smooth and greased 0.1

A mounting compound is recommended and the
torque should be rechecked after a period of

4

Nm

3 hours to allow for the spread of the compound.

75 g

2.7 oz.

Case style JEDEC TO-240AA compatible

ΔR CONDUCTION PER JUNCTION

DEVICES

VSK.26.. 0.212 0.258 0.330 0.466 0.72 0.166 0.276 0.357 0.482 0.726 °C/W

Note

• Table shows the increment of thermal resistance R

SINE HALF WAVE CONDUCTION RECTANGULAR WAVE CONDUCTION

180° 120° 90° 60° 30° 180° 120° 90° 60° 30°

when devices operate at different conduction angles than DC

thJC

UNITS

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130

120

110

100

Maximum allowable case temperature (°C)

130

120

110

RthJC (DC) = 0.76°C/W

180°
120°

90°

90

60°
30°

80

0 5 10 15 20 25 30

Average on-state current (A)

Fig. 1 - Current Ratings Characteristics

RthJC (DC) = 0.76 °C/W

ADD-A-PAK Generation VII Power Modules

Thyristor/Diode and Thyristor/Thyristor, 27 A

60

180°
120°

50

40

30

20

10

Maximum average on-state power loss (W)

0

Fig. 4 - On-State Power Loss Characteristics

400

350

300

90°
60°
30°

RMS limit

Per leg, Tj = 125°C

0 1020304050

Average on-state current (A)

At any rated load condition and with

rated Vrrm applied following surge

@ 60 Hz 0.0083 s

DC

Initial T j = Tj max

@ 50 Hz 0.0100s

100

DC
180°

120°

90

90°
60°

Maximum allowable case temperature (°C)

30°

80

0 1020304050

Average on-state current (A)

Fig. 2 - Current Ratings Characteristics

50

40

180°
120°

90°
60°
30°

30

RMS limit

20

10

Per leg, Tj = 125°C

Maximum average on-state power loss (W)

0

0 5 10 15 20 25 30

Average on-state current (A)

Fig. 3 - On-State Power Loss Characteristics

250

200

Per leg

Peak half sine wave on-state current (A)

150

110100

Number of equal amplitude half cycle current pulses (N)

Fig. 5 - Maximum Non-Repetitive Surge Current

400

350

300

Maximum Non-repetitive Surge

of conduction may not be maintained.

Versus Pulse Train Duration

Current. Control

Initial T j = 125°C

No Voltage Reapplied

Rated Vrrm reapplied

250

200

Per leg

Peak half sine wave on-state current (A)

150

0.01 0.1 1

Pulse train duration (s)

Fig. 6 - Maximum Non-Repetitive Surge Current

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VSKT26.., VSKH26.., VSKL26.., VSKN26.. Series

ADD-A-PAK Generation VII Power Modules

Thyristor/Diode and Thyristor/Thyristor, 27 A

100

90

80

70

60

50

40

30

20

10

Maximum total on-state power loss (W)

0

0 102030405060

Total RMS output current (A)

250

200

150

∼

100

180°
120°

90°
60°
30°

VSK.26 Series

Per module

Tj = 125°C

0 20 40 60 80 100 120 140

Maximum allowable ambient temperature (°C)

Fig. 7 - On-State Power Loss Characteristics

180°

(sine)

180°

(rect)

Vishay Semiconductors

RthSA = 0.1 °C/W

0.3 °C/W

0.5 °C/W

0.7 °C/W
1 °C/W

1.5 °C/W
2 °C/W
3 °C/W
4 °C/W
8 °C/W

RthSA = 0.1 °C/W

0.3 °C/W

0.5 °C/W

0.7 °C/W
1 °C/W

1.5 °C/W
3 °C/W
8 °C/W

50

Maximum total power loss (W)

single ph ase bridg e connect ed

0

0 102030405060

Total output current (A)

Fig. 8 - On-State Power Loss Characteristics

300

250

200

150

100

50

Maximum total power loss (W)

three phase bridge connected

0

0 20406080

Total output current (A)

Fig. 9 - On-State Power Loss Characteristics

2 x VSK.26 Series

Tj = 125°C

120°

(rect)

3 x VSK.26 Series

Tj = 125°C

0 20 40 60 80 100 120 140

Maximum allowable ambient temperature (°C)

RthSA = 0.1 °C/W

0.3 °C/W

0.4 °C/W

0.5 °C/W

0.7 °C/W
1 °C/W

1.5 °C/W
3 °C/W

0 20 40 60 80 100 120 140

Maximum allowable ambient temperature (°C)

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10

Steady state value

(°C/W)

thJC

RthJC = 0.76 °C/W
(DC operation)

1

ADD-A-PAK Generation VII Power Modules

Thyristor/Diode and Thyristor/Thyristor, 27 A

1000

Per leg

100

10

Tj = 125°C

Instantaneous on-state current (A)

1

0.0 1.0 2.0 3.0 4.0 5.0 6.0

Instantaneous on-state voltage (V)

Fig. 10 - On-State Voltage Drop Characteristics

Tj = 25°C

0.1

0.01

Transient thermal impedance Z

0.001 0.01 0.1 1 10

Square wave pulse duration (s)

Fig. 11 - Thermal Impedance Z

100

Rect angula r g ate p ulse

a )Reco mmen ded load line f or

rat ed d i/d t: 20 V, 30 ohms
tr = 0.5 µs, tp >= 6 µs

b)Recommended load line for

<= 30% rated di/dt: 20 V, 65 ohms

10

tr = 1 µs, tp >= 6 µs

(b)

TJ = 2 5 ° C

TJ = 1 25 °C

1

Instantaneous gate voltage (V)

VGD

IGD

0.1

0.001 0.01 0.1 1 10 100 10 00

VSK.

IRK.26.. Se ries

Instantaneous gate current (A)

(a)

Per leg

Characteristics

thJC

(1) PGM = 100 W, t p = 500 µs
(2) PGM = 50 W, tp = 1 ms
(3) PGM = 20 W, tp = 25 ms
(4) PGM = 10 W, tp = 5 ms

TJ = - 4 0 ° C

(3) (2) (1)

(4)

Frequency Limited by PG(AV)

Fig. 12 - Gate Characteristics

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VSKT26.., VSKH26.., VSKL26.., VSKN26.. Series

ADD-A-PAK Generation VII Power Modules

Thyristor/Diode and Thyristor/Thyristor, 27 A

ORDERING INFORMATION TABLE

Device code

Note

• To order the optional hardware go to www.vishay.com/doc?95172

CIRCUIT CONFIGURATION

VSKT

(1)

~

VSK T 26 / 16

1324

1 - Module type

2 - Circuit configuration (see end of datasheet)

3

- Current code (27 A)

4 - Voltage code (see Voltage Ratings table)

VSKH

(1)

Vishay Semiconductors

VSKL

~

(1)

~

VSKN

(1)

-

1

4 5 7 6

1

G1
(4)

K1
(5)

(2)

(3)

+

-

K2
(7)G2(6)

2

3

4 5

2

3

G1

(4)

K1
(5)

(2)

(3)

+

-

1

2

3

7 6

(2)

(3)

+

-

K2
(7)G2(6)

1

2

3

4 5

LINKS TO RELATED DOCUMENTS

Dimensions www.vishay.com/doc?95368

G1
(4)

K1
(5)

(2)

(3)

+

+

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Legal Disclaimer Notice

Vishay

Disclaimer

All product specifications and data are subject to change without notice.

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.

Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.

The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
products designed for such applications.

Product names and markings noted herein may be trademarks of their respective owners.

Document Number: 91000 www.vishay.com
Revision: 18-Jul-08 1

Document Number: 95043 For technical questions, contact: [e-mail]

www.chtechnology.com

Revision: 17-Dec-08 1

VISHAY HIGH POWER PRODUCTS

Modules

Application Note

Mounting Instructions for

ADD-A-PAK Generation VII

APPLICATION NOTE

Generation VII ADD-A-PAK (AAP) power modules combine
the excellent thermal performance enabled by a direct
bonded copper (Al

2O3

) substrate, superior mechanical
ruggedness, and an environmentally friendly manufacturing
process that eliminates the use of hard molds, thus reducing
direct stresses on the leads. To prevent axial pull-out, the
electrical terminals are co-molded to the module housing.

The VSK series of AAP modules uses glass passivated and
Schottky power diodes and thyristors in circuit configurations
including common anode, common cathode, half-bridge, and
single switch. The semiconductors are internally connected
through wire-bonding and electrically isolated from the
bottom baseplate, allowing the use of a common heatsink
and enabling a more compact overall assembly.

INTRODUCTION

Major AAP Generation VII module features

• High blocking voltage up to 1600 V

• Industrial standard package style, fully compatible with

TO-240AA

• High isolation capability up to V

RMS

= 3500 V

• High surge capability with I

FSM

up to 3000 A

• No toxic material: Completely lead (Pb)-free, RoHS and UL

compliant

• Elimination of copper base plate reduces weight to 75 g

• Elimination of process steps requiring usage of chemicals

and related waste treatment promotes a cleaner and more
environmentally friendly manufacturing process

These features allow AAP Generation VII modules to fit into
existing standardized assembly processes. Important factors
in the assembly process include

• Heatsink design

• PCB, busbar, and cable design

• Power leads size/area

• Distance from adjacent heat-generating parts

The implications of these items and the requirements for
assembly of AAP Generation VII modules are discussed
over the following pages.

SPECIFYING THE HEATSINK

The heat generated by the module has to be dissipated with
a heatsink. Typically natural or forced air cooling is used.

To optimize the device performance, the contact surface of
the heatsink must be flat, with a recommended flatness of
≤ 0.03 mm (≤ 1.18 mils) and a levelling depth of less than

0.02 mm (≤ 0.79 mils), according to DIN/ISO 1302. A milled
or machined surface is generally satisfactory if prepared with
tools in good working condition. The heatsink mounting
surface must be clean, with no dirt, corrosion, or surface
oxide. It is very important to keep the mounting surface free
from particles exceeding 0.05 mm (2 mils) in thickness,
provided a thermal compound is used.

MOUNTING OPERATIONS

The AAP Generation VII modules are designed with an
exposed DBC Al

2O3

substrate.

This is used to optimize the thermal behavior of the module.
To reduce the risk of damage during mounting, the ceramic
has been given additional mechanical ruggedness in the
form of two separate 15.8 mm by 21.1 mm (0.62" by 0.83")
pieces of DBC substrate, which can be seen in the photo
below.

Before mounting, inspect the module to insure that the
contact surface of the bottom substrate is clean and free of
any lumps or bulges that could damage the device or impede
heat transfer across its surface.

Mounting Instructions for

ADD-A-PAK Generation VII

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Document Number: 95043

2 Revision: 17-Dec-08

Application Note

Vishay High Power Products

APPLICATION NOTE

Next, make a uniform coating on the heatsink mounting
surfaces and module substrate with a good quality thermal
compound. Screen printing of the compound is
recommended, as well as direct application through a roller
or spatula. The datasheet values for thermal resistance
assume a uniform layer of thermal compound with a
maximum thickness of 0.08 mm. The thermal conductivity of
the compound should be no less than 0.5 W/mK. Apply
uniform pressure on the package to force the compound to
spread over the entire contact area, and check the device
bottom surface to verify full and uniform coverage.

Bolt the module to the heatsink using the two fixing holes.

An even amount of torque should be applied for each
individual mounting screw. An M6 screw should be used with
lock washers. A torque wrench, which is accurate in the
specified range, must be used in mounting the module to
achieve optimum results. The first mounting screw should be
tightened to one third of the recommended torque; the
second screw should then be tightened to the same torque.
Full tightening of both the screws can then be completed by
applying the recommended torque (see data in bulletins).
Over-tightening the mounting screw may lead to deformation
of the package, which would hence increase the thermal
resistance and damage the semiconductors. After a period of
three hours, check the torque with a final tightening in
opposite sequence to allow the spread of the compound.

Power terminals can be screwed to busbars and/or flexible
cables with eyelets.

We recommend the use of M5 screws with spring washers.
Users should consult published datasheets to determine the
optimal torque.

AAP Generation VII modules are designed to guarantee a
good and reliable contact even at 3 ± 10 % Nm on a busbar,
so there is no need to apply an especially high level of force
to obtain a good and reliable connection.

SOLDERING TO THE PCB

The signal terminal (gate and auxiliary cathode) pins of AAP
Gen VII modules based on thyristors can be soldered to the
PCB using hand iron or wave soldering processes.

The PCB should be designed with appropriate tolerances on
the hole diameters, and soldering must be done without
imposing any mechanical stress on the module pins (pulling
and tensioning the pins).

To prevent overheating of the device, the soldering time
should not exceed 8 to 10 seconds at a temperature of
260 °C.

Alternatively, a fast-on cable connector can be used to
contact the signal pins.