Dual-In-Line Intelligent
Power Module
50 Amperes/600 Volts
Description:
DIPIPMs are intelligent power
modules that integrate power
devices, drivers, and protection
circuitry. Design time is reduced
by the use of application-specific
HVICs and value-added features
such as linear temperature feedback. Overall efficiency and
reliability are increased by the
use of full gate CSTBT technology
and low thermal impedance.
Features:
Low-loss, Full Gate
CSTBT IGBTs
Single Power Supply
Integrated HVICs
Direct Connection to CPU
Applications:
Variable Speed Pumps
Variable Speed Compressors
Small Motor Control
Ordering Information:
PS21A79 is a 600V, 50 Ampere
DIP Intelligent Power Module.
PS21A79
Intellimod™ Module
Dual-In-Line Intelligent Power Module
50 Amperes/600 Volts
Absolute Maximum Ratings, Tj = 25°C unless otherwise specified
Characteristics Symbol PS21A79 Units
Self-protection Supply Voltage Limit (Short Circuit Protection Capability)* V
400 Volts
CC(prot.)
Module Case Operation Temperature (See TC Measurement Point Below) TC -20 to 100 °C
Storage Temperature T
-40 to 125 °C
stg
Mounting Torque, M4 Mounting Screws — 13 in-lb
Module Weight (Typical) — 65 Grams
Isolation Voltage, AC 1 minute, 60Hz Sinusoidal, Connection Pins to Heatsink Plate V
2500 Volts
ISO
IGBT Inverter Sector
Supply Voltage (Applied between P-NU, NV, NW) VCC 450 Volts
Supply Voltage, Surge (Applied between P-NU, NV, NW) V
CC(surge)
Collector-Emitter Voltage (TC = 25°C) V
Collector Current (TC = 25°C) ±IC 50 Amperes
Peak Collector Current (TC = 25°C, <1ms) ±ICP 100 Amperes
Collector Dissipation (TC = 25°C, per 1 Chip) PC 142 Watts
Power Device Junction Temperature** Tj -20 to 150 °C
500 Volts
600 Volts
CES
Control Sector
Supply Voltage (Applied between VP1-VPC, VN1-VNC) VD 20 Volts
Supply Voltage (Applied between V
UFB-VUFS, VVFB-VVFS
, V
WFB-VWFS
) VDB 20 Volts
Input Voltage (Applied between UP, VP, WP-VPC, UN, VN, WN-VNC) VIN -0.5 ~ VD+0.5 Volts
Fault Output Supply Voltage (Applied between FO-VNC) VFO -0.5 ~ VD+0.5 Volts
Fault Output Current (Sink Current at FO Terminal) IFO 1 mA
Current Sensing Input Voltage (Applied between CIN-VNC) VSC -0.5 ~ VD+0.5 Volts
*VD = 13.5 ~ 16.5V, Inverter Part, Tj = 125°C, Non-repetitive, Less than 2µs
**The maximum junction temperature rating of the power chips integrated within the DIPIPM is 150°C (@Tf ≤ 100°C). However, to ensure safe operation of the DIPIPM,
the average junction temperature should be limited to T
Temperature Output VOT At LVIC Temperature = 85°C 3.50 3.63 3.76 Volts
* Short-Circuit protection is functioning only at the lower ar ms. Please select the value of the external shunt resistor such that the SC trip level is less than 85A.
**Fault signal is asserted when the lower arm shor t circuit or control supply under-voltage protective functions operate. The fault output pulse-width tFO depends on the capacitance value
of CFO according to the following approximate equation: CFO = (12.2 x 10-6 x tFO [F]).
***When the temperature rises excessively, the controller (MCU) should stop the DIPIPM.
* The allowable rms current value depends on the actual application conditions.
**If input signal ON pulse is less than P
***The IPM may fail to respond to an ON pulse if the preceeding OFF pulse is less than P
D1 1A, 600V Control and boot strap supply overvoltage suppression
DZ1 24V, 1W Control and boot strap supply over voltage suppression
C1 10-100µF, 50V Boot strap supply reservoir – electrolytic long lifem low impedance, 105°C
C2 0.22-2.0µF, 50V Local decoupling/High frequency noise filters – multilayer ceramic (Note 4)
C3 200 to 2500µF, 450V Main DC bus filter capacitor – electrolytic, long life, high ripple current, 105°C
C4 100pF, 50V Optional input signal noise filter – multilayer ceramic (Note 11)
C5 0.1-0.22µF, 1000V Surge voltage suppression (Note 2)
CSF 1000pF, 50V Shor t circuit detection filter capacitor – multilayer ceramic
RSF 1.8kΩ Short circuit detection filter resistor
R
SHUNT
20ohm-500ohm Current sensing resistor
R1 1-10Ω Boot strap supply inrush limiting resistor – non-inductive, temperature stable, tight tolerance (Note 5)
R2 330Ω Optional input signal noise filter (Note 11)
R3 10kΩ Fault signal pull-up resistor (Note 9)
Notes:
1) If control GND is connected to power GND by broad pattern, it may cause malfunction by power GND fluctuation.
It is recommended to connect control GND at only a point at which NU, NV, NW are connected to power GND line.
2) To prevent surge destruction, the wiring between the smoothing capacitor and the P-N1 terminals should be as short as
possible. Generally inserting a 0.1µ ~ 0.22µF snubber capacitor C3 between the P-N1 terminals is recommended.
3) The time constant R1,C4 of RC filter for preventing the protection circuit malfunction should be selected in the range of 1.5µ ~ 2µs.
SC interrupting time might vary with the wiring pattern. Tight tolerance, temp-compensated type is recommended for R1,C4.
4) All capacitors should be mounted as close to the terminals of the DIPIPM as possible. (C1: good temperature, frequency
characteristics electrolytic type, and C2 : good temperature, frequency and DC bias characteristic ceramic type are recommended.)
5) It is recommended to insert a Zener diode DZ1 (24V/1W) between each pair of control supply terminals to prevent surge destruction.
6) To prevent erroneous SC protection, the wiring from VSC terminals to CIN filter should be divided at the point D that is close
to the terminal of sense resistor and the wiring should be patterned as short as possible.
7) For sense resistor, the variation within 1% (including temperature characteristics), low inductance type is recommended.
1/8W is recommended, but an evaluation of your system is recommended.
8) To prevent erroneous operation, wiring A, B, and C should be as short as possible.
9) FO output is open drain type. It should be pulled up to the positive side of 5V or 15V power supply with a resistor that limits
FO sink current (IFO) under 1mA. (Over 5.1kΩ is needed and 10kΩ is recommended for 5V supply.)
10) Error signal output width (tFO) can be set by the capacitor connected to the CFO terminal. t
FO(typ)
= CFO / 9.1 x 10-6 (s).
11) Input drive is high-active type. There is a 3.3kΩ pull-down resistor integrated in the IC input circuit. To prevent malfunction, the wiring of each input
should be patterned as short as possible. When inserting the RC filter, make sure the input signal level meets the turn-on and turn-off threshold voltage.
Thanks to HVIC inside the module, connection to the MCU may be direct or with an opto-coupler.
V
N1
U
N
F
O
V
OT
V
NC
V
NO
V
SC
D
B
C
A
R
SHUNT
C
IN
C
SF
R
SF
V
N
W
N
CFO
HVIC1
IGBT1
FWDi1
IGBT2
FWDi2
IGBT3
IGBT4
IGBT5
IGBT6
FWDi3
FWDi4
FWDi5
FWDi6
LVIC
P
U
HVIC2
V
V
WFB
V
P1
V
WFS
W
P
V
PC
HVIC3
W
NU
NV
NW
C
2DZ1
C
1
V
D
15V
+
+
C
2
C
4
C
4
C
4
R
3
R
2
R
2
R
2
C
2
DZ
1
C
1
D
1
+
V
VFB
V
P1
V
VFS
V
P
C
2
C
2
DZ
1
C
1
D
1
MCU
+
V
UFB
V
P1
V
UFS
U
P
C
2
C
2
C
3
C
3
C
5
DZ
1
C
1
D
1
+
M
PS21A79
Intellimod™ Module
Dual-In-Line Intelligent Power Module
c1: Control supply voltage VDB rises – After VDB level reaches under voltage reset level (UV
DBr
),
the circuits starts to operate when next input is applied.
c2: Normal operation – IGBT turns on and carries current.
c3: V
DB
level dips to under voltage trip level (UV
DBt
).
c4: P-side IGBT turns off in spite of control input signal level, but there is no FO signal output.
c5: V
DB
level reaches UV
DBr
.
c6: Normal operation – IGBT on and carries current.
UP, VP, WP, UN, VN, W
N
MCU
5V LINE
10kΩ
2.5kΩ (MIN)
F
O
VNC (LOGIC)
DIP-IPM
NOTE: RC coupling at each input
(parts shown dotted) may change
depending on the PWM control
scheme used in the application and
the wiring impedance of the printed
circuit board. The DIPIPM input signal
section integrates a 2.5k
Ω (min)
pull-down resistor. Therefore, when
using an external filtering resistor, care
must be taken to satisfy the turn-on
threshold voltage requirement.
V
NC
NW
NV
NU
DIPIPM
It is recommended to make the inductance under 10nH.
For shunt resistors, it is recommended to use as low
inductance type as possible.
Shunt
Resistors
Connect the wiring from VNC terminal at the point as
close to shunt resistors’ terminal as possible.
It is recommended to divide the wiring to current detecting
circuit at the point as close to shunt resistor’s terminal as
possible.
To Current
Detecting Circuit
PS21A79
Intellimod™ Module
Dual-In-Line Intelligent Power Module
50 Amperes/600 Volts
Protection Function Timing Diagrams
Typical Interface Circuit
Wiring Method Around Shunt Resistor
7Rev. 08/09
Loading...
+ hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.