C&H Technology P400 User Manual
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Passivated Assembled Circuit Elements, 40 A
PACE-PAK (D-19)
PRODUCT SUMMARY
I
O
40 A
P400 Series
Vishay High Power Products
FEATURES
• Glass passivated junctions for greater reliability
• Electrically isolated base plate
• Available up to 1200 V
• High dynamic characteristics
• Wide choice of circuit configurations
• Simplified mechanical design and assembly
• UL E78996 approved
• Compliant to RoHS directive 2002/95/EC
DESCRIPTION
The P400 series of integrated power circuits consists of
power thyristors and power diodes configured in a single
package. With its isolating base plate, mechanical designs
are greatly simplified giving advantages of cost reduction
and reduced size.
Applications include power supplies, control circuits and
battery chargers.
RRM/VDRM
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL CHARACTERISTICS VALUES UNITS
I
O
I
,
TSM
I
FSM
2
I
t
2
I
√t 7450 A2√s
V
RRM
V
ISOL
T
J
T
Stg
80 °C 40 A
50 Hz 385
60 Hz 400
50 Hz 745
60 Hz 680
Range 400 to 1200 V
2500 V
- 40 to 125 °C
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
V
RRM/VDRM
TYPE
NUMBER
P401, P421, P431 400 500
P402, P422, P432 600 700
P403, P423, P433 800 900
P404, P424, P434 1000 1100
P405, P425, P435 1200 1300
REPETITIVE PEAK REVERSE AND
PEAK OFF-STATE VOLTAGE
, MAXIMUM
V
V
, MAXIMUM
RSM
NON-REPETITIVE PEAK
REVERSE VOLTAGE
V
I
RRM
AT T
MAXIMUM
MAXIMUM
J
A
A2s
mA
10
Document Number: 93755 For technical questions, contact: indmodules@vishay.com
Revision: 05-Nov-09 1
www.vishay.com
P400 Series
Vishay High Power Products
Passivated Assembled
Circuit Elements, 40 A
ON-STATE CONDUCTION
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum DC output current
at case temperature
Maximum peak, one-cycle
non-repetitive on-state or
forward current
Maximum I
Maximum I
2
t for fusing I2t
2
√t for fusing I2√t
Low level value of threshold voltage V
High level value of threshold voltage V
Low level value of on-state slope resistance r
High level value of on-state slope resistance r
Maximum on-state voltage drop V
Maximum forward voltage drop V
Maximum non-repetitive rate of rise of
turned-on current
Maximum holding current I
Maximum latching current I
I
O
I
TSM
I
FSM
T(TO)1
T(TO)2
t1
t2
TM
FM
dI/dt
H
L
Full bridge circuits
t = 10 ms
t = 8.3 ms 400
,
t = 10 ms
t = 8.3 ms 340
t = 10 ms
t = 8.3 ms 680
t = 10 ms
t = 8.3 ms 480
No voltage
reapplied
100 % V
RRM
reapplied
No voltage
reapplied
100 % V
RRM
reapplied
Sinusoidal half wave,
initial T
= TJ maximum
J
t = 0.1 ms to 10 ms, no voltage reapplied
2
I
t for time tx = I2√t · √tx
(16.7 % x π x I
(I > π x I
T(AV)
(16.7 % x π x I
(I > π x I
T(AV)
ITM = π x I
IFM = π x I
T(AV)
F(AV)
TJ = 125 °C from 0.67 V
ITM = π x I
T(AV)
T(AV)
< I < π x I
), TJ = TJ maximum 0.83
T(AV)
), TJ = TJ maximum 1.03
T(AV)
< I < π x I
), TJ = TJ maximum 9.61
T(AV)
), TJ = TJ maximum 7.01
TJ = 25 °C 1.4 V
, Ig = 500 mA, tr < 0.5 μs, tp > 6 μs
DRM
TJ = 25 °C anode supply = 6 V, resistive load
40 A
80 °C
385
325
745
530
7450 A
200 A/μs
130
250
A
A
2
V
mΩ
mA
2
s
√s
BLOCKING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum critical rate of rise of
off-state voltage
Maximum peak reverse and off-state
leakage current at V
RRM
, V
DRM
Maximum peak reverse leakage current I
RMS isolation voltage V
www.vishay.com For technical questions, contact: indmodules@vishay.com
2 Revision: 05-Nov-09
dV/dt T
I
,
RRM
I
DRM
RRM
ISOL
= 125 °C, exponential to 0.67 V
J
gate open 200 V/μs
DRM
TJ = 125 °C, gate open circuit 10 mA
TJ = 25 °C 100 μA
50 Hz, circuit to base, all terminals shorted,
= 25 °C, t = 1 s
T
J
2500 V
Document Number: 93755
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