C&H Technology P100 User Manual

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Please contact the C&H Technology team for the following questions -
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Application
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Phone – 1-800-274-4284
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www.chtechnology.com - SPECIALISTS IN POWER ELECTRONIC COMPONENTS AND ASSEMBLIES - www.chtechnology.com
Passivated Assembled Circuit Elements, 25 A
PACE-PAK (D-19)
PRODUCT SUMMARY
I
O
25 A
P100 Series
Vishay High Power Products
FEATURES
• Glass passivated junctions for greater reliability
• Electrically isolated base plate
• Available up to 1200 V
• High dynamic characteristics
• Wide choice of circuit configurations
• Simplified mechanical design and assembly
• UL E78996 approved
• Compliant to RoHS directive 2002/95/EC
DESCRIPTION
The P100 series of integrated power circuits consists of power thyristors and power diodes configured in a single package. With its isolating base plate, mechanical designs are greatly simplified giving advantages of cost reduction and reduced size.
Applications include power supplies, control circuits and battery chargers.
RRM/VDRM
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL CHARACTERISTICS VALUES UNITS
I
O
I
,
TSM
I
FSM
2
I
t
2
I
t 6365 A2√s
V
RRM
V
ISOL
T
J
T
Stg
85 °C 25 A
50 Hz 357
60 Hz 375
50 Hz 637
60 Hz 580
Range 400 to 1200 V
2500 V
- 40 to 125 °C
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
V
RRM/VDRM
TYPE NUMBER
P101, P121, P131 400 500
P102, P122, P132 600 700
P103, P123, P133 800 900
P104, P124, P134 1000 1100
P105, P125, P135 1200 1300
REPETITIVE PEAK REVERSE AND
PEAK OFF-STATE VOLTAGE
, MAXIMUM
V
V
, MAXIMUM
RSM
NON-REPETITIVE PEAK
REVERSE VOLTAGE
V
I
RRM
AT T
MAXIMUM
MAXIMUM
J
A
A2s
mA
10
Document Number: 93754 For technical questions, contact: indmodules@vishay.com Revision: 04-Nov-09 1
www.vishay.com
P100 Series
Vishay High Power Products
Passivated Assembled
Circuit Elements, 25 A
ON-STATE CONDUCTION
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum DC output current at case temperature
Maximum peak, one-cycle non-repetitive on-state or forward current
Maximum I
Maximum I
Maximum value of threshold voltage
2
t for fusing I2t
2
t for fusing I2√t
V
Maximum level value of on-state slope resistance
Maximum on-state voltage drop V
Maximum forward voltage drop V
Maximum non-repetitive rate of rise of turned-on current
Maximum holding current I
Maximum latching current I
I
O
I
TSM
I
FSM
T(TO)
r
t1
TM
FM
dI/dt
H
L
Full bridge
t = 10 ms
,
t = 8.3 ms 375
t = 10 ms
t = 8.3 ms 315
t = 10 ms
t = 8.3 ms 580
t = 10 ms
t = 8.3 ms 410
No voltage reapplied
100 % V
RRM
reapplied
No voltage reapplied
100 % V
RRM
reapplied
Sinusoidal half wave, initial T
J
= TJ maximum
t = 0.1 ms to 10 ms, no voltage reapplied
2
I
t for time tx = I2√t · √tx
TJ = 125 °C 0.82 V
TJ = 125 °C, average power = V
ITM = π x I
IFM = π x I
TJ = 125 °C from 0.67 V ITM = π x I
T(AV)
F(AV)
, Ig = 500 mA, tr < 0.5 μs, tp > 6 μs
T(AV)
DRM
x I
T(TO)
T(AV)
+ rt + (I
T(RMS)
)
TJ = 25 °C 1.35 V
TJ = 25 °C anode supply = 6 V, resistive load, gate open 130
TJ = 25 °C anode supply = 6 V, resistive load 250
25 A
85 °C
357
300
637
450
6365 A
2
12 mΩ
200 A/μs
A
A
2
mA
2
s
s
BLOCKING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum critical rate of rise of off-state voltage
Maximum peak reverse and off-state leakage current at V
, V
RRM
DRM
Maximum peak reverse leakage current
RMS isolation voltage V
www.vishay.com For technical questions, contact: indmodules@vishay.com 2 Revision: 04-Nov-09
dV/dt T
I
,
RRM
I
DRM
I
RRM
ISOL
= 125 °C, exponential to 0.67 V
J
gate open 200 V/μs
DRM
TJ = 125 °C, gate open circuit 10 mA
TJ = 25 °C 100 μA
50 Hz, circuit to base, all terminals shorted,
= 25 °C, t = 1 s
T
J
2500 V
Document Number: 93754
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