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MODEL NO.: V580DK1
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PRODUCT SPECIFICATION
ϭ
ϭ Tentative Specification
Ϯ Preliminary Specification
Approval Specification
SUFFIX: LS1
Customer:
APPROVED BY SIGNATURE
Name / Title
Note
Please return 1 copy for your confirmation with your
signature and comments.
Approved By Checked By Prepared By
Chao-Chun
Chung
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Perry Lin
John Hsieh
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PRODUCT SPECIFICATION
CONTENTS
CONTENTS .....................................................................................................................................................................2
REVISION HISTORY.......................................................................................................................................................4
1. GENERAL DESCRIPTION...........................................................................................................................................5
1.1 OVERVIEW ...........................................................................................................................................................................5
1.2 FEATURES.............................................................................................................................................................................5
1.3 APPLICATION .....................................................................................................................................................................5
1.4 GENERAL SPECIFICATI0NS.............................................................................................................................................5
1.5 MECHANICAL SPECIFICATIONS...................................................................................................................................7
2. ABSOLUTE MAXIMUM RATINGS .............................................................................................................................8
2.1 ABSOLUTE RATINGS OF ENVIRONMENT ..................................................................................................................8
2.2 PACKAGE STORAGE .........................................................................................................................................................9
2.3 ELECTRICAL ABSOLUTE RATINGS...............................................................................................................................9
2.3.1 TFT LCD MODULE........................................................................................................................................................... 9
2.3.2 BACKLIGHT CONVERTER UNIT ................................................................................................................................. 9
3. ELECTRICAL CHARACTERISTICS ..........................................................................................................................10
3.1 TFT LCD MODULE............................................................................................................................................................10
3.2 BACKLIGHT UNIT ............................................................................................................................................................13
3.2.1 CONVERTER CHARACTERISTICS.............................................................................................................................13
3.2.3 CONVERTER INTERFACE CHARACTERISTICS.....................................................................................................15
4. BLOCK DIAGRAM OF INTERFACE.........................................................................................................................17
4.1 TFT LCD MODULE............................................................................................................................................................17
5 .INPUT TERMINAL PIN ASSIGNMENT ...................................................................................................................18
5.1 TFT LCD MODULE............................................................................................................................................................18
5.2 BACKLIGHT UNIT ............................................................................................................................................................24
5.3 CONVERTER UNIT ...........................................................................................................................................................25
5.4 LVDS INTERFACE.............................................................................................................................................................26
5.5 COLOR DATA INPUT ASSIGNMENT ..........................................................................................................................28
6. INTERFACE TIMING ................................................................................................................................................29
6.1 INPUT SIGNAL TIMING SPECIFICATIONS................................................................................................................ 29
6.1.1 Input Timing SPEC for FHD, Frame Rate = 100Hz....................................................................................................29
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PRODUCT SPECIFICATION
6.1.2 Input Timing SPEC for FHD, Frame Rate = 120Hz....................................................................................................30
6.1.3 Input Timing SPEC for QFHD, Frame Rate = 24Hz...................................................................................................31
6.1.4 Input Timing SPEC for QFHD, Frame Rate = 30Hz...................................................................................................32
6.2 POWER ON/OFF SEQUENCE ........................................................................................................................................35
7. OPTICAL CHARACTERISTICS.................................................................................................................................37
7.1 TEST CONDITIONS...........................................................................................................................................................37
7.2 OPTICAL SPECIFICATIONS ...........................................................................................................................................38
8. PRECAUTIONS .........................................................................................................................................................43
8.1 ASSEMBLY AND HANDLING PRECAUTIONS .........................................................................................................43
8.2 SAFETY PRECAUTIONS ..................................................................................................................................................43
8.3 SAFETY STANDARDS ......................................................................................................................................................43
9. DEFINITION OF LABELS..........................................................................................................................................44
9.1 CMI MODULE LABEL ......................................................................................................................................................44
9.2 CARTON LABEL................................................................................................................................................................45
10. PACKAGING ...........................................................................................................................................................46
10.1 PACKAGING SPECIFICATIONS..................................................................................................................................46
10.2 PACKAGING METHOD.................................................................................................................................................46
11. MECHANICAL CHARACTERISTIC .......................................................................................................................48
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PRODUCT SPECIFICATION
REVISION HISTORY
Version Date
Ver. 1.1 12/28, 2012
01/28, 2013
Page
(New)
1
13
10
Section Description
All
3.2.1
3.1
Remove Rev remark
Update Converter Characteristics
Update TFT LCD module
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
V580DK1-LS1 is a 58” TFT Liquid Crystal Display module with LED Backlight unit and 4ch-LVDS
interface. This module supports 3840 x 2160 Quad Full HDTV format and can display true 1.07G colors
(8-bit+FRC). The driving board module for backlight is built-in.
1.2 FEATURES
Ё High brightness (400 nits)
Ё High contrast ratio (5000:1)
Ё Fast response time (Gray to Gray typical : 6.5 ms)
Ё High color saturation (NTSC 72%)
Ё Quad Full HDTV (3840 x 2160 pixels) resolution, true HDTV format
Ё LVDS (Low Voltage Differential Signaling) interface
Ё Optimized response time for 60Hz/120Hz frame rate
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PRODUCT SPECIFICATION
Ё Viewing Angle : 178(H)/178(V) (CR>20) VA Technology
Ё Ultra wide viewing angle: Super MVA technology
Ё RoHs compliance
Ё T-con input frame rate : FHD 100/120Hz or QFHD 24/30Hz,
Output frame rate: QFHD 100/120Hz or QFHD 48Hz/60Hz
1.3 APPLICATION
Ё Standard Living Room TVs
Ё Public Display Application
Ё Home Theater Application
Ё MFM Application
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note
Active Area 1270.08 (H) x 721.44 (V) (58” diagonal) mm
Bezel Opening Area 1275.3 (H) x 726.7 (V) mm
Driver Element a-si TFT active matrix - -
Pixel Number 3840 x R.G.B. x 2160 pixel -
(1)
Pixel Pitch(Sub Pixel) 0.334(H) x 0.334 (V) mm -
Pixel Arrangement RGB vertical stripe - -
Display Colors 1.07G colors (8-bit+FRC) color -
Display Operation Mode Transmissive mode / Normally black - -
Surface Treatment Anti-Glare coating (Haze 1%) Hardness 3H - (2)
Rotation Function
Display Orientation
Note (1) Please refer to the attached drawings in chapter 11 for more information about the front and back outlines.
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Unachievable (3)
Signal input with “CMI” (3)
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Note (2) The spec of the surface treatment is temporarily for this phase. CMI reserves the rights to change this feature.
Note (3)
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PRODUCT SPECIFICATION
Back Side
Tcon Board
Front Side
CMI
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1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal (H) 1288.8 1290.3 1291.8 mm (1),(2)
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PRODUCT SPECIFICATION
Module Size
Weight TBD g
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Note (2) Module Depth does not include connectors.
Vertical (V) 743.5 744.7 745.9 mm (1),(2)
Depth (D)
15.2 16.2 17.2 mm To Rear
26.6 27.6 28.6 mm
To converter
cover
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2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 50 ºC (1), (2)
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PRODUCT SPECIFICATION
Value
Unit Note
Min. Max.
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta 40 ºC).Љ
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) Thermal management should be considered in final product design to prevent the surface temperature of display
area from being over 65 ºC. The range of operating temperature may degrade in case of improper thermal
management in final product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 200 Hz, 30 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that the
module would not be twisted or bent by the fixture.
- 35 G (3), (5)
NOP
- 1.0 G (4), (5)
NOP
Relative Humidity (%RH)
100
90
80
60
Operating Range
40
20
10
Storage Range
8060-20 40020-40
Temperature (ºC)
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2.2 PACKAGE STORAGE
When storing modules as spares for a long time, the following precaution is necessary.
(a) Do not leave the module in high temperature, and high humidity for a long time, It is highly recommended
to store the module with temperature from 0 to 35 к at normal humidity without condensation.
(b) The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent
light.
2.3 ELECTRICAL ABSOLUTE RATINGS
2.3.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage VCC -0.3 13.5 V
Logic Input Voltage VIN -0.3 3.6 V
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PRODUCT SPECIFICATION
Value
Unit Note
Min. Max.
(1)
2.3.2 BACKLIGHT CONVERTER UNIT
Item Symbol
Light Bar Voltage VW Ta = 25 к - - 60 V
Converter Input Voltage VBL - 0 - 30 V
Control Signal Level - - -0.3 - 6 V
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation should be
restricted to the conditions described under Normal Operating Conditions.
Note (2) No moisture condensation or freezing.
Note (3) The control signals include On/Off Control and External PWM Control.
Test
Condition
Min. Type Max. Unit Note
3D Mode
RMS
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PRODUCT SPECIFICATION
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
(Ta = 25 ± 2 ºC)
Value
Parameter Symbol
Min. Typ. Max.
Power Supply Voltage VCC 10.8 12 13.2 V (1)
Unit Note
Rush Current I
White Pattern P
OFHD 120Hz Output
Horizontal Stripe P
Power Consumption
Black Pattern P
White Pattern
OFHD 120Hz Output
Horizontal Stripe
Power Supply Current
Black Pattern
White Pattern P
QFHD 60Hz Output
Horizontal Stripe P
Power Consumption
Black Pattern P
White Pattern
QFHD 60Hz Output
Horizontal Stripe
Power Supply Current
Black Pattern
RUSH
T
T
T
ЁЁ
Ё
Ё
Ё
ЁЁ
ЁЁ
ЁЁ
T
T
T
Ё
Ё
Ё
ЁЁ
ЁЁ
ЁЁ
3.9
14.4 17.52
28.2 34.08
14.4 17.52
1.2 1.46
2.35 2.84
1.2 1.46
13.44
16.56
13.92 16.08
12.96 15.48
1.12 1.38
1.16 1.34
1.08 1.29
A (2)
W
W
W
A
A
A
(3)
W
W
W
A
A
A
Differential Input High
Threshold Voltage
Differential Input Low
Threshold Voltage
V
V
LVT H
LVT L
+100
-300
Ё
Ё
+300 mV
-100 mV
LVDS
Common Input Voltage VCM 1.0 1.2 1.4 V
(4)
interface
CMOS
interface
Differential input voltage
(single-end)
Terminating Resistor R
|V
| 200
ID
T
Ё
Input High Threshold Voltage VIH 2.7
Input Low Threshold Voltage V
0
IL
Ё
100
Ё
Ё
600 mV
Ё
ohm
3.3 V
0.7 V
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Note (1) The module should be always operated within the above ranges. The ripple voltage should be controlled under
10% of Vcc (Typ.)
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PRODUCT SPECIFICATION
Note (2) Measurement condition :
GND
Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, fv = 60/120 Hz, whereas
a power dissipation check pattern below is displayed.
a. White Pattern
b. Black Pattern
Vcc rising time is 470us
Vcc
0.9Vcc
0.1Vcc
470us
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c. Heavy Loading pattern
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Active Area
Active Area
RGBRGBRGB
RGBRGBRGBRGBRGBRGB
RGBRGBRGB
RGBRGBRGBRGBRGBRGB
RGBRGBRGB
RGBRGBRGBRGBRGBRGB
RGBRGBRGB
RGBRGBRGBRGBRGBRGB
RGBRGBRGB
RGBRGBRGBRGBRGBRGB
RGBRGBRGB
RGBRGBRGBRGBRGBRGB
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Note (4) The LVDS input characteristics is shown as below :
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PRODUCT SPECIFICATION
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3.2 BACKLIGHT UNIT
3.2.1 CONVERTER CHARACTERISTICS
Parameter Symbol
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PRODUCT SPECIFICATION
Value
Unit Note
Min. Typ. Max.
P
BL(2D)
Ё
129 142
W
(1), (2),
Power Consumption
P
BL(3D)
Ё
129 142
W
(1), (2),
Converter Input Voltage VBL 22.8 24.0 25.2 VDC
I
BL(2D)
Ё
5.4 6.2 mA Non Dimming
Converter Input Current
I
BL(3D)
Ё
5.4 6.2 mA
VBL=22.8V, (IL=typ.)
I
R(2D)
ЁЁ
12
mApeak
(3), (6)
Input Inrush Current
VBL=22.8V,(IL= 360
I
R(3D)
ЁЁ
15
mApeak
mA.) (3), (6)
Dimming Frequency
Dimming Duty Ratio
Note (1) The power supply capacity should be higher than the total converter power consumption PBL. Since the pulse
width modulation (PWM) mode was applied for backlight dimming, the driving current changed as PWM
duty on and off. The transient response of power supply should be considered for the changing loading
when converter dimming.
FB 170 180 190 Hz
DDR 5 - 100 %
(5)
(4), (5)
Note (2) The measurement condition of Max. value is based on 50" backlight unit under input voltage 24V, at 2D/3D
Mode and lighting 1 hour later.
Note (3) For input inrush current measure, the VBL rising time from 10% to 90% is about 20ms.
Note (4) EPWM signal have to input available duty range. Between 97% and 100% duty (DDR) have to be avoided.
(97% < DDR < 100%) But 100% duty(DDR) is possible. 5% duty (DDR) is only valid for electrical operation.
Note (5) FB and DDR are available only at 2D Mode.
Note (6) Below diagram is only for power supply design reference.
ʳ
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PRODUCT SPECIFICATION
Note (7) The lifetime is defined as the time which luminance of the LED decays to 50% compared to the initial value,
Operating condition: Continuous operating at Ta = 25±2к
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3.2.2 CONVERTER INTERFACE CHARACTERISTICS
PRODUCT SPECIFICATION
Parameter Symbol
On/Off Control
ON
VBLON
Voltage
External PWM Control
Voltage
External PWM Frequency
OFF
HI
LO
VEPWM
F
EPWM
Error Signal ERR
VBL Rising Time Tr1
Control Signal Rising Time Tr
Control Signal Falling Time Tf
PWM Signal Rising Time TPWMR
PWM Signal Falling Time TPWMF
Input Impedance Rin
PWM Delay Time TPWM
Test
Value
Unit Note
Condition
Ё
Ё
Ё
Ё
Min. Typ. Max.
2.0
0
2.0
0
Ё
Ё
Ё
Ё
5.0 V
0.8 V
5.25 V Duty on
0.8 V Duty off
Ё 150 160 170 Hz
Ё Ё Ё Ё Ё
Ё
20
Ё Ё Ё
Ё Ё Ё
Ё Ё Ё
Ё Ё Ё
Ё
Ё
1
100
Ё Ё
100 ms
100 ms
50 us
50 us
Ё Ё
Ё Ё
ms 10%-90%VBL
MΩ
ms (6)
(5), (6)
Normal mode (7)
Abnormal: Open
(6)
EPWM, BLON
Ton
Ё
300
Ё Ё
ms
BLON Delay Time
T
on1
BLON Off Time Toff
Note (1) The Dimming signal should be valid before backlight turns on by BLON signal. It is inhibited to change the
external PWM signal during backlight turn on period.
Note (2) The power sequence and control signal timing are shown in the Fig.1. For a certain reason, the converter has a
possibility to be damaged with wrong power sequence and control signal timing.
Note (3) While system is turned ON or OFF, the power sequences must follow as below descriptions:
Turn ON sequence: VBL → PWM signal → BLON
Turn OFF sequence: BLOFF → PWM signal → VBL
Note (4) When converter protective function is triggered, ERR will output open collector status. Please refers to Fig.2.
Note (5) The EPWM interface that inserts a pull up resistor to 5V in Max Duty (100%), please refers to Fig.3.
Note (6) EPWM is available only at 2D Mode.
Note (7) EPWM signal have to input available frequency range.
Note (8) [Recommend] EPWM duty ratio is set at 100%(Max. Brightness) in 3D Mode.
Ё
Ё
300
300
Ё Ё
Ё Ё
ms
ms
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PRODUCT SPECIFICATION
V
V
BL
V
BLON
EPWM
Tr1
%/
9
9
%/
2.0V
0.8V
2.0V
0.8V
Ton
T
Backlight on duration
Tr
Ext. Dimming Function
PWMR
T
PWM
T
Ton1
Tf
PWMF
Floating
0
0
0
Toff
V
W
External
PWM
Period
External
PWM Duty
100%
Fig. 1
Fig. 2 Fig. 3
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PRODUCT SPECIFICATION
4. BLOCK DIAGRAM OF INTERFACE
4.1 TFT LCD MODULE
XRR Board XRL Board XLR Board XLL Board
OUTPUT CONNECTOR
L/R_O
CON2: LM123S010HTF13Y
TFT LCD PANEL
(3840x3x2160)
C Board
INPUT CONNECTOR
CNF1: WF23-402-5133 (FCN) , 187059-51221 (P-TWO)
CH1_0(+/-)
CH1_1(+/-)
CH1_2(+/-)
CH1_3(+/-)
CH1_4(+/-)
CH1_CLK(+/-)
CH2_0(+/-)
CH2_1(+/-)
CH2_2(+/-)
CH2_3(+/-)
CH2_4(+/-)
CH2_CLK(+/-)
E_PWM
BLON
SELLVDS
VBL
GND
ERR
L/R
2D/3D
LD_EN VCC L/R_O
CONVERTER
CONNECTOR
CN1:
CI0114M1HR0-LA
(CvilLux)
CN2: CI0112M1HR0-LA
(CvilLux)
SCL
SDA
GND
BACKLIGHT
INPUT CONNECTOR
CNF2:
187060-41221(P-TWO)
CH3_0(+/-)
CH3_1(+/-)
CH3_2(+/-)
CH3_3(+/-)
CH3_4(+/-)
CH3_CLK(+/-)
CH4_0(+/-)
CH4_1(+/-)
CH4_2(+/-)
CH4_3(+/-)
CH4_4(+/-)
CH4_CLK(+/-)
LED
UNIT
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PRODUCT SPECIFICATION
5 .INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
CNF1 Connector Pin Assignment (WF23-402-5133 (FCN) , 187059-51221 (P-TWO))
Matting connector : FI-RE51HL (JAE)
Pin Name Description
1 N.C. No Connection (1)
2 SCL I2C Clock (for mode selection & function setting)
3 SDA I2C Data (for mode selection & function setting)
4 N.C. No Connection
5 L/R_O Output signal for Left Right Glasses control
6 N.C. No Connection (1)
7 SELLVDS Input signal for LVDS Data Format Selection (3)(9)
8 N.C. No Connection
9 N.C. No Connection
10 N.C. No Connection
11 GND Ground
12 CH1[0]- First pixel Negative LVDS differential data input. Pair 0
13 CH1[0]+ First pixel Positive LVDS differential data input. Pair 0
Note
(1)
(2)
(1)
14 CH1[1]- First pixel Negative LVDS differential data input. Pair 1
(4)
15 CH1[1]+ First pixel Positive LVDS differential data input. Pair 1
16 CH1[2]- First pixel Negative LVDS differential data input. Pair 2
17 CH1[2]+ First pixel Positive LVDS differential data input. Pair 2
18 GND Ground
19 CH1CLK- First pixel Negative LVDS differential clock input.
(4)
20 CH1CLK+ First pixel Positive LVDS differential clock input.
21 GND Ground
22 CH1[3]- First pixel Negative LVDS differential data input. Pair 3
23 CH1[3]+ First pixel Positive LVDS differential data input. Pair 3
(4)
24 CH1[4]- First pixel Negative LVDS differential data input. Pair 4
25 CH1[4]+ First pixel Positive LVDS differential data input. Pair 4
26 2D/3D Input signal for 2D/3D Mode Selection (5)(10)
27 L/R Input signal for Left Right eye frame synchronous (6)
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28 CH2[0]- Second pixel Negative LVDS differential data input. Pair 0
29 CH2[0]+ Second pixel Positive LVDS differential data input. Pair 0
30 CH2[1]- Second pixel Negative LVDS differential data input. Pair 1
31 CH2[1]+ Second pixel Positive LVDS differential data input. Pair 1
32 CH2[2]- Second pixel Negative LVDS differential data input. Pair 2
33 CH2[2]+ Second pixel Positive LVDS differential data input. Pair 2
34 GND Ground
35 CH2CLK- Second pixel Negative LVDS differential clock input.
36 CH2CLK+ Second pixel Positive LVDS differential clock input.
37 GND Ground
38 CH2[3]- Second pixel Negative LVDS differential data input. Pair 3
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PRODUCT SPECIFICATION
(4)
(4)
39 CH2[3]+ Second pixel Positive LVDS differential data input. Pair 3
(4)
40 CH2[4]- Second pixel Negative LVDS differential data input. Pair 4
41 CH2[4]+ Second pixel Positive LVDS differential data input. Pair 4
42 LD_EN Input signal for Local Dimming Enable (7)(9)
43 N.C. No Connection (8)
44 GND Ground
45 GND Ground
46 GND Ground
47 N.C. No Connection
48 VCC +12V power supply
49 VCC +12V power supply
50 VCC +12V power supply
51 VCC +12V power supply
(1)
CNF2 Connector pin assignment (187060-41221(P-TWO), WF23-400-413C(FCN))
Matting connector : FI-RE41HL (JAE)
Pin Name Description Pin
1 N.C. No Connection
2 N.C. No Connection
3 N.C. No Connection
4 N.C. No Connection
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PRODUCT SPECIFICATION
5 N.C. No Connection
6 N.C. No Connection
7 N.C. No Connection
8 N.C. No Connection
9 GND Ground
10 CH3[0]- Third pixel Negative LVDS differential data input. Pair 0
11 CH3[0]+ Third pixel Positive LVDS differential data input. Pair 0
12 CH3[1]- Third pixel Negative LVDS differential data input. Pair 1
13 CH3[1]+ Third pixel Positive LVDS differential data input. Pair 1
14 CH3[2]- Third pixel Negative LVDS differential data input. Pair 2
15 CH3[2]+ Third pixel Positive LVDS differential data input. Pair 2
16 GND Ground
17 CH3CLK- Third pixel Negative LVDS differential clock input.
18 CH3CLK+ Third pixel Positive LVDS differential clock input.
Ё
(4)
(4)
19 GND Ground
20 CH3[3]- Third pixel Negative LVDS differential data input. Pair 3
21 CH3[3]+ Third pixel Positive LVDS differential data input. Pair 3
22 CH3[4]- Third pixel Negative LVDS differential data input. Pair 4
23 CH3[4]+ Third pixel Positive LVDS differential data input. Pair 4
24 GND Ground
25 GND Ground
26 CH4[0]- Fourth pixel Negative LVDS differential data input. Pair 0
27 CH4[0]+ Fourth pixel Positive LVDS differential data input. Pair 0
28 CH4[1]- Fourth pixel Negative LVDS differential data input. Pair 1
29 CH4[1]+ Fourth pixel Positive LVDS differential data input. Pair 1
30 CH4[2]- Fourth pixel Negative LVDS differential data input. Pair 2
31 CH4[2]+ Fourth pixel Positive LVDS differential data input. Pair 2
32 GND Ground
(4)
(4)
33 CH4CLK- Fourth pixel Negative LVDS differential clock input.
(4)
34 CH4CLK+ Fourth pixel Positive LVDS differential clock input.
35 GND Ground
36 CH4[3]- Fourth pixel Negative LVDS differential data input. Pair 3
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g
g
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PRODUCT SPECIFICATION
37 CH4[3]+ Fourth pixel Positive LVDS differential data input. Pair 3
38 CH4[4]- Fourth pixel Negative LVDS differential data input. Pair 4
39 CH4[4]+ Fourth pixel Positive LVDS differential data input. Pair 4
40 GND Ground
41 GND Ground
CON2 Connector Pin Assignment (LM123S010HTF13Y)
1 N.C. No Connection
2 N.C. No Connection
3 N.C. No Connection
4 GND Ground
5 N.C. No Connection
6 L/R_O Output signal for Left Right Glasses control
7 N.C. No Connection
Ё
Ё
(1)
(1)
(2)
8 N.C. No Connection
9 N.C. No Connection
10 N.C. No Connection
Note (1) Reserved for internal use. Please leave it open.
Note (2) The definition of L/R_O signal as follows
L= 0V , H= +3.3V
L/R_O Note
L
H
Note (3) LVDS format selection.
L= Connect to GND, H=Connect to +3.3V or Open
SELLVDS Note
L JEIDA Format
H or Open VESA Format
Note (4) LVDS 4-port Data Mapping
FHD 100/120Hz Input
Ri
ht glass turn on
Left
lass turn on
(1)
Port Channel of LVDS Data Stream
1st Port First Pixel 1, 5, 9, ……1913, 1917
2nd Port Second Pixel 2, 6, 10, ….1914, 1918
3rd Port Third Pixel 3, 7, 11, ….1915, 1919
4th Port Fourth Pixel 4, 8, 12, ….1916, 1920
QFHD 24/30Hz Input
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g
Port Channel of LVDS Data Stream
1st Port First Pixel 1, 5, 9, ……3833, 3837
2nd Port Second Pixel 2, 6, 10, ….3834, 3838
3rd Port Third Pixel 3, 7, 11, ….3835, 3839
4th Port Fourth Pixel 4, 8, 12, ….3836, 3840
Note (5) 2D/3D mode selection.
L= Connect to GND or Open, H=Connect to +3.3V
2D/3D Note
L or Open 2D Mode
H3D Mode
Note (6) Input signal for left and right eye frame synchronous
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PRODUCT SPECIFICATION
V
Note (7) Local dimming enable selection.
=0~0.7 V, VIH=2.7~3.3 V
IL
L/R Note
LRi
H Left synchronous signal
L= Connect to GNDΔH=Connect to +3.3V or Open
LD_EN Note
L Local Dimming Disable
H or Open Local Dimming Enable
ht synchronous signal
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y
V
Note (8) Reserved for internal use. Open is preferred. However, it is also acceptable to reserve the wire
connecting with specific High/Low voltage level.
Note (9) Interface optional pin has internal scheme as following diagram. Customer should keep the interface
voltage level requirement which including panel board loading as below.
stem Board
S
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PRODUCT SPECIFICATION
3.3V
10K ohm
1K ohm
IC
Interface Voltage Level
> V
H
IH
VL < V
Note (10) Interface optional pin has internal scheme as following diagram. Customer should keep the interface
IL
voltage level requirement which including panel board loading as below.
Panel Board
Panel BoardSystem Board
1K ohm
IC
Interface Voltage Level
> V
V
H
IH
VL < V
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IL
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10K ohm
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PRODUCT SPECIFICATION
Note (11) LVDS connector pin order defined as follows
Note (12) LVDS connector mating dimension range request is 0.93mm~1.0mm as follow
5.2 BACKLIGHT UNIT
The pin configuration for the housing and leader wire is shown in the table below.
CN2,3,6,7: 196388-12041-3 (P-TWO)
Pin № Symbol Feature
1 VLED
2 VLED
Positive of LED String
3 VLED
4 VLED
5 NC
6 NC
NC
7 NC
8 NC
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9 N1
10 N2
11 N3
12 N4
5.3 CONVERTER UNIT
CN1 (Header) : CI0114M1HR0-LA (CvilLux)
Pin No. Symbol Feature
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PRODUCT SPECIFICATION
Negative of LED String
1
2
3
4
5
6
7
8
9
10
11
12 BLON BL ON/OFF
13 NC NC
14
Note (1) If Pin14 is open, E_PWM is 100% duty.
Note (2) Input connector pin order defined as follows
VBL +24V
GND GND
ERR Normal (GND) ; Abnormal (Open collector)
E_PWM External PWM Control
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PRODUCT SPECIFICATION
Converter
Pin 1 Pin 14
Input Connector
5.4 LVDS INTERFACE
JEIDA Format : SELLVDS = L
VESA Format : SELLVDS = H or Open
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VESA Format
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PRODUCT SPECIFICATION
Current Cycle
AR 0P
AR 0N
AR 1P
AR 1N
AR 2P
AR 2N
AR 3P
AR 3N
AR 4P
AR 4N
JEIDA Format
AR 0P
AR 0N
AR 1P
AR 1N
AR0
AG1
AB2
AR6
AR4
AG5
AG0 AR5
AB1
DE VS HS AB5 AB4 AB3 AB2
REV AB7 AB6 AG7 AG6 AR7 AR6
REV AB9 AB8 AG9 AG8 AR9 AR8AR8 REV
AG4 AR7
AB5
AB0 AG5 AG4 AG3 AG2 AG1
AB4 AG7 AG6 AG5AG9 AG8
AR4 AR3 AR2 AR1 AR0
AR6 AR5 AR4AR9 AR8
AG0
AB1
DE
REV
AG4
AB5
AR 2P
AR 2N
AR 3P
AR 3N
AR 4P
AR 4N
AR0~AR9 First Pixel R Data
AG0~AG9 First Pixel G Data
AB0~AB9 First Pixel B Data
AB6
AR2
DE VS HS AB7 AB6AB9 AB8
REV AB3 AB2 AG3 AG2 AR3 AR2
REV AB1 AB0 AG1 AG0 AR1 AR0AR0 REV
(9; MSB, 0; LSB)
(9; MSB, 0; LSB)
(9; MSB, 0; LSB)
DE
REV
DE Data enable signal
DCLK Data clock signal
RSVD Reserved
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PRODUCT SPECIFICATION
5.5 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 10-bit gray scale data input for the
color. The higher the binary input the brighter the color. The table below provides the assignment of color versus
data input.
Data Signal
Color
R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 G9 G8 G7 G6 G5 G4 G3 G2 G1 G0 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
Basic
Colors
Gray
Scale
Of
Red
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Black
Red
Green
Blue
Cyan
Magenta
Yellow
White
Red (0) / Dark
Red (1)
Red (2)
:
:
Red (1021)
Red (1022)
Red (1023)
Green (0) / Dark
Green (1)
Green (2)
:
:
Green (1021)
Green (1022)
Green (1023)
Blue (0) / Dark
Blue (1)
Blue (2)
:
:
Blue (1021)
Blue (1022)
Blue (1023)
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
Note (1) 0: Low Level VoltageΔ1: High Level Voltage
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
1
0
0
0
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
1
0
1
0
:
:
:
:
:
:
1
0
1
1
1
0
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
1
0
0
0
:
:
0
0
0
0
0
0
:
:
1
1
1
0
0
0
:
:
0
0
0
1
1
0
0
0
1
1
1
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
:
:
:
:
:
:
1
0
1
1
1
0
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
;
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
0
1
0
0
0
:
:
0
0
0
0
0
0
:
:
0
0
0
0
0
0
:
:
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
:
:
:
:
:
:
1
0
1
1
1
0
1
1
1
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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram. (Ta = 25 ± 2 ºC)
Signal Item Symbol Min. Typ. Max. Unit Note
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PRODUCT SPECIFICATION
Input cycle to
- - 200 ps (1)
T
cycle jitter
rcl
LVDS
Spread spectrum
Receiver
modulation range
clkin_mod
F
F
-1.5% - F
clkin
+1.5% MHz
clkin
Clock
Spread spectrum
modulation frequency
F
SSM
- - 66 KHz
LVDS
Receiver
Receiver skew margin T
RSKM
-400 - 400 ps (3)
Data
6.1.1 Input Timing SPEC for FHD, Frame Rate = 100Hz
Signal Item Symbol Min. Typ. Max. Unit Note
F
LVDS Clock Frequency
clkin
60 74.25 79 MHz (4)
(=1/TC)
Frame Rate 2D Mode Fr 97 100 103 Hz (5)
Total Tv 1104 1350 1395 Th Tv=Tvd+Tvb
(2)
Vertical
Active
Display
Te rm
Horizontal
Active
Display
Te rm
2D Mode
Display Tvd 1080 Th
Blank Tvb 24 270 315 Th
Front porch Tvfp 10
Back porch Tvbp 10
Vsync Tvswid 4
ЁЁ
ЁЁ
ЁЁ
Th
Th
Th
(6)
Total Th 530 550 670 Tc Th=Thd+Thb
Display Thd 480 Tc
Blank Thb 50 70 190 Tc
Front porch Thfp 5
Back porch Thbp 5
Hsync Thswid 2
ЁЁ
ЁЁ
ЁЁ
Tc
Tc
Tc
(6)
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6.1.2 Input Timing SPEC for FHD, Frame Rate = 120Hz
Signal Item Symbol Min. Typ. Max. Unit Note
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PRODUCT SPECIFICATION
LVDS Clock
Frame Rate
Vertical
Active
Display
Te rm
2D Mode 60 74.25 79 MHz
3D Mode
2D Mode 117 120 123 Hz
3D Mode
2D Mode
3D Mode
F
clkin
(=1/TC
F
r
Total Tv 1104 1125 1395
Display Tvd 1080 Th
Blank Tvb 24 45 315
Front porch Tvfp 10
Back porch Tvbp 10
Vsync Tvswid 4
To ta l Tv 1125 Th
Display Tvd 1080 Th
Blank Tvb 45 Th
Front porch Tvfp 10
74.25 MHz
120 Hz
Tv=Tvd+
Tvb
Ё Ё
Ё Ё
Ё Ё
Ё Ё
(6)
(6)
(4)
(5)
Tv=Tvd+Tvb
(6)
Horizontal
Active
Display
Te rm
2D Mode
3D Mode
Back porch Tvbp 10
Vsync Tvswid 4
Total Th 530 550 670
Display Thd 480 Tc
Blank Thb 50 70 190
Front porch Thfp 5
Back porch Thbp 5
Hsync Thswid 2
To ta l Th 530 550 670
Display Thd 480 Tc
Blank Thb 50 70 190
Front porch Thfp 5
Back porch Thbp 5
Ё Ё
Ё Ё
Ё Ё
Ё Ё
Ё Ё
Ё Ё
Ё Ё
Th=Thd+
Thb
(6)
Th=Thd+
Thb
(6)
Th=Thd+Thb
(6)
Th=Thd+Thb
(6)
Hsync Thswid 2
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6.1.3 Input Timing SPEC for QFHD, Frame Rate = 24Hz
Signal Item Symbol Min. Typ. Max. Unit Note
LVDS Clock Frequency
Frame Rate 2D Mode Fr 23 24 25 Hz (5)
Total Tv 2208 2250 2450 Th Tv=Tvd+Tvb
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F
(=1/TC)
PRODUCT SPECIFICATION
clkin
60 74.25 79 MHz (4)
Vertical
Active
Display
Te rm
Horizontal
Active
Display
Te rm
2D Mode
Display Tvd 2160 Th
Blank Tvb 48 90 290 Th
Front porch Tvfp 20
Back porch Tvbp 20
Vsync Tvswid 8
Total Th 992 1375 1440 Tc Th=Thd+Thb
Display Thd 960 Tc
Blank Thb 32 415 480 Tc
Front porch Thfp 12
Back porch Thbp 10
Hsync Thswid 4
ЁЁ
ЁЁ
ЁЁ
ЁЁ
ЁЁ
ЁЁ
Th
Th
Th
Tc
Tc
Tc
(6)
(6)
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6.1.4 Input Timing SPEC for QFHD, Frame Rate = 30Hz
Signal Item Symbol Min. Typ. Max. Unit Note
LVDS Clock Frequency
Frame Rate 2D Mode Fr 29 30 31 Hz (5)
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F
(=1/TC)
PRODUCT SPECIFICATION
clkin
60 74.25 79 MHz (4)
Vertical
Active
Display
Te rm
Horizontal
Active
Display
Te rm
2D Mode
Total Tv 2208 2250 2450
Display Tvd 2160 Th
Blank Tvb 48 90 290
Front porch Tvfp 20
Back porch Tvbp 20
Vsync Tvswid 8
To ta l Th 992 11 00 1340
Display Thd 960 Tc
Blank Thb 32 140 380
Front porch Thfp 12
Back porch Thbp 10
Hsync Thswid 4
Ё Ё
Ё Ё
Ё Ё
Ё Ё
Ё Ё
Ё Ё
Tv=Tvd+
Tvb
(6)
Th=Thd
+Thb
(6)
Tv=Tvd+Tvb
(6)
Th=Thd+Thb
(6)
Note (1) The input clock cycle-to-cycle jitter is defined as below figures. Trcl =ΨT1 – TΪ
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Note (2) The SSCG (Spread spectrum clock generator) is defined as below figures.
Note (3) The LVDS timing diagram and the receiver skew margin is defined and shown in following figure.
Tc
RXCLK+/-
RXn+/-
T
RSKM
Note (4) Please make sure the range of pixel clock has follow the below equations.
Fclkin(max) Њ (Fr Ѽ Tv Ѽ Th) Њ Fclkin(min)
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Note (5)
a. The frame-to-frame jitter of the input frame rate is defined as the following figure.
b. FRn = FRn-1 ± 1.8%.
Note (6)
a. Hsync and Vsync signals are necessary for this module.
b. The polarity of Hsync & Vsync should be positive.
c. Please follow the input signal timing diagram as below :
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6.2 POWER ON/OFF SEQUENCE
(Ta = 25 ± 2 ºC)
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram
below.
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PRODUCT SPECIFICATION
0V
0.5ɩT1ɩ10ms
0ɩT2ɩ200ms
0ɩT3
500ms ɩT4
LVDS Signals
0ЉT7ЉT2
0ЉT8ЉT3
Option Signals
(SELLVDS,2D/3D, LD_EN)
0V
0.9Vcc
0.1VCC
Power On
T7
T2
0.9Vcc
0.1Vcc
T3T1
T4
Power Off
T8
Backlight (Recommended)
500msЉT5
100msЉT6
Vcc Dip
T13Љ10ms
T5
Vcc
Vcc(typ.) x 0.85
0V
50%
T13
50%
T
6
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Note (1) The supply voltage of external system for the module input should follow the definition of Vcc.
Note (2) Apply the LED voltage within the LCD operation range. When the backlight turns on before the LCD
operation or the LCD turns off before the backlight turns off, the display may momentarily become
abnormal screen.
Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance. If
T2<0,that maybe cause electrical overstress failure.ʳ
Note (4) T4 should be measured after the module has been fully discharged between power off and on period.
Note (5) Interface signal shall not be kept at high impedance when the power is on.
Note (6) Vcc must decay smoothly when power-off.
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
LED Current IL
Vertical Frame Rate Fr 120 Hz
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature change
during measuring in a windless room.
Local Dimming Function should be Disable before testing to get the steady optical characteristics (According to
5.1 CNF1 Connector Pin Assignment, Pin no. “42”))
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PRODUCT SPECIFICATION
25±2
50±10
12±1.2
145±4.35
o
C
%RH
V
mA
LCD Module
LCD Panel
CS - 2000
Field of View = 1º
500 mm
Light Shield Room
(Ambient Luminance < 2 lux)
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7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should be
measured under the test conditions described in 7.1 and stable environment shown in 7.1.
Item Symbol Condition Min. Typ. Max. Unit Note
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PRODUCT SPECIFICATION
Contrast Ratio CR
3500 5000
Response Time Gray to gray
Center Luminance of
White
White Variation
2D
L
C
3D
δW
320 400
2D
Cross Talk CT
3D-W
3D-D
=0°, θY =0°
θ
Red
Rx
Ry
x
Viewing angle at
normal direction
Gx
Green
Gy
Typ.-
Bx
Color
Blue
0.03
By
Chromaticity
Wx
White
Wy
- - Note (2)
6.5 13
ms Note (3)
- cd/m2 Note (4)
TBD - cd/m2 Note (8)
1.3 - Note (6)
- 4 % Note (5)
4 - % Note (8)
11 - % Note (8)
(TBD)
(TBD)
(TBD)
(TBD)
-
-
-
-
Typ.+
(TBD)
-
0.03
(TBD)
0.280
0.290
-
-
-
Correlated color temperature
Color
Gamut
Horizontal
Viewing
Angle
Vertical
Transmission direction of
the up polarizer
C.G.
θx+
-
θ
x
θY+
-
θ
Y
Φ
up
9800
-
80 88
80 88
72
- % NTSC
-
-
CR≥20
80 88
80 88
- - 90 - Deg. (7)
-
-
K
Deg. (1)
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Note (1) Definition of Viewing Angle (θx, θy) :
Viewing angles are measured by Autronic Conoscope Cono-80(or Eldim EZ-Contrast 160R).
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PRODUCT SPECIFICATION
θX- = 90º
6 o’clock
y- = 90º
θ
Note (2) Definition of Contrast Ratio (CR) :
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) =
x-
y-
Normal
θx = θy = 0º
θy- θy+
θx−
θx+
L0 of LuminanceSurface
12 o’clock direction
y+
y+ = 90º
θ
x+
θX+ = 90º
L1023of LuminanceSurface
1023 : Luminance of gray level 1023
L 0: Luminance of gray level 0
CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (6).
Note (3) Definition of Gray-to-Gray Switching Time :
Optical Response
100 %
90 %
10 %
0 %
Time
Gray to Gray
Switching Time
The driving signal means the signal of gray level 0, 124, 252, 380, 508, 636, 764, 892 and 1023.
Gray to gray average time means the average switching time of gray level 0, 124, 252, 380, 508, 636, 764, 892 and 1023. to each
Gray to Gray
Switching Time
other.
Note (4) Definition of Luminance of White (L
) :
C
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(
(
(
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PRODUCT SPECIFICATION
Measure the luminance of gray level 1023 at center point.
LC = L (5), where L (x) is corresponding to the luminance of the point X at the figure in Note (6).
Note (5) Definition of Cross Talk (CT) :
CT = | Y
Where :
YA = Luminance of measured location without gray level 1023 pattern (cd/m2)
YB = Luminance of measured location with gray level 1023 pattern (cd/m2)
– YA | / YA × 100 (%)
B
Active Area
(0, 0)
Y
(D/2,W/8)
A,U
Gray 512
(D/8,W/2) Y
Y
A,L
(D/2,7W/8)
Y
A, D
Y
(7D/8,W/2)
A, R
D, W)
0, 0)
(D/4,W/4)
Active Area
Y
(D/2,W/8)
B, U
Gray 1023
(7D/8,W/2)
Y
(D/8,W/2)
B, L
Y
(D/2,7W/8)
B, D
A, R
(3D/4,3W/4)
D, W)
Note (6) Definition of White Variation (δW):
Measure the luminance of gray level 1023 at 5 points
δW =
W
4
W
W
2
Vertical Line
3W
4
(5)] L (4), L (3), L (2), L (1),[L Maximum
(5)] L (4), L (3), L (2), L (1),[L Minimum
Horizontal Line
D
D
4
D
2
1 2
5
3 4
3D
4
X
Test point :
X = 1 ~ 5
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Note (7) This is a reference for designing the shutter glasses of 3D application. Definition of the transmission direction of the up
polarizer (Φ
) on LCD Module :
up-P
12 o’clock direction
x-
y-
6 o’clock
ӥ
up-P
y+
x
+
ӥ=0
o
Up Polarizer
The transmission axis of the front polarizer of the shutter glasses should be parallel to this panel transmission direction to
get a maximum 3D mode luminance.
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Note (8) Definition of the 3D mode performance (measured under 3D mode, use CMI’s shutter glass) :
a. Test pattern
Left eye image and right eye image are displayed alternated
WW
Left eye image:
WB
Left eye image:
BW
Left eye image: W0; Right eye image:
BB
Left eye image: W0; Right eye image: W0
b. Measurement setup
LCD Module
LCD Panel
Right Eye Shutter Glass
W1023 ; Right eye image: W1023
W1023; Right eye image: W0
CS - 2000
W1023
Field of View = 1º
500 mm
Shutter glasses are well controlled under suitable timing, and measure the luminance of the center point of the panel
through the right eye glass. The transmittance of the glass should be larger than 40.0% under 3D mode operation.
The luminance of the test pattern “WW”, denoted L(WW); the luminance of the test pattern ”WB”, denoted L(WB) ;
the luminance of the test pattern “BW”, denoted L(BW); the luminance of the test pattern “BB”, denoted “L(BB)
c. Definition of the Center Luminance of White, Lc (3D) : L(WW)
d. Definition of the 3D mode white crosstalk, CT (3D-W) :
e. Definition of the 3D mode dark crosstalk, CT (3D-D) :
Light Shield Room
(Ambient Luminance < 2 lux)
−
≡−
WDCT
)3(
≡−
DDCT
)3(
BBLWBL
−
BBLWWL
−
BWLWWL
−
BBLWWL
)()(
)()(
)()(
)()(
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8. PRECAUTIONS
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) It is recommended to assemble or to install a module into the user’s system in clean working areas. The
dust and oil may cause electrical short or worsen the polarizer.
(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and backlight.
(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMOS LSI chips.
(5) Do not plug in or pull out the I/F connector while the module is in operation.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.
(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD
modules in the specified storage conditions.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of LED will be higher than that of room
temperature.
8.2 SAFETY PRECAUTIONS
(1) The startup voltage of a backlight is over 1000 Volts. It may cause an electrical shock while assembling
with the inverter. Do not disassemble the module or insert anything into the backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
8.3 SAFETY STANDARDS
The LCD module should be certified with safety regulations as follows:
Regulatory Item Standard
UL UL60950-1:2006 or Ed.2:2007
Information Technology
cUL CAN/CSA C22.2 No.60950-1-03 or 60950-1-07
equipment
CB IEC60950-1:2005 / EN60950-1:2006+ A11:2009
UL UL60065 Ed.7:2007
Audio/Video Apparatus
If the module displays the same pattern for a long period of time, the phenomenon of image sticking may be occurred.
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cUL CAN/CSA C22.2 No.60065-03:2006 + A1:2006
CB IEC60065:2001+ A1:2005 / EN60065:2002 + A1:2006+ A11:2008
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9. DEFINITION OF LABELS
9.1 CMI MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
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PRODUCT SPECIFICATION
V580DK1-LS1 Rev. XX
X X X X X X X Y M D L N N N N
Model Name : V580DK1-LS1
Revision : Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.
Serial ID : X X X X X X X Y M D L N N N N
Serial No.
Product Line
Year, Month, Date
CMI Internal Use
CMI Internal Use
Revision
Serial ID includes the information as below:
CMI Internal Use
MADE IN CHINA
LEOO(or CAPG or CANO)
RoHS
Manufactured Date:
Year : 2001=1, 2002=2, 2003=3, 2004=4…2010=0, 2011=1, 2012=2…
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1st to 31st, exclude I ,O, and U.
Revision Code : Cover all the change
Serial No. : Manufacturing sequence of product
Product Line : 1 → Line1, 2 → Line 2, …etc.
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9.2 CARTON LABEL
The barcode nameplate is pasted on each box as illustration, and its definitions are as following explanation.
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PRODUCT SPECIFICATION
Model Name: V580DK1– LS1
Carton ID: X X X X X X X Y M D X X X X
P.O. NO.
Parts ID.
Model Name V580DK1-LS1
Carton ID.
XXXXXXXXXXXXXX
Made In Taiwan (Made In China)
Quantities
CMI Internal Use
Year, Month, Date
Serial ID includes the information as below :
Manufactured Date:
Year: 2010=0, 2011=1, 2012=2…etc.
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1st to 31st, exclude I ,O, and U.
Revision Code: Cover all the change
CMI Internal Use
Revision
CMI Internal Use
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10. PACKAGING
10.1 PACKAGING SPECIFICATIONS
(1) 3 LCD TV modules / 1 Box
(2) Box dimensions: 1448(L) X 283 (W) X 846 (H)
(3) Weight: approximately 59 Kg (3 modules per box)
10.2 PACKAGING METHOD
Packaging method is shown in following figures.
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11. MECHANICAL CHARACTERISTIC
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A
A
A
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PRODUCT SPECIFICATION
Appendix A
Local Dimming demo function
A.1 I2C address and write command
Device address: 1yF1
Register address: 0x01
Command data: 0x00: Local Dimming demo mode OFF (Note 1)
0x01: Local Dimming demo mode ON (Demo in right half screen) (Note 2)
START
Note 1: Local Dimming demo OFF
Device Address Register Address
11000010
(0xC2)
CK
00000001
(0x01)
CK
Command Data
00000001
(0x01)
CK
STOP
Note 2: Local Dimming demo ON
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A.2 I2C timing
Symbol Parameter Min. Max. Unit
t
Start setup time 250 - ns
SU-STA
t
Start hold time 250 - ns
HD-STA
t
Data setup time 80 - ns
SU-DAT
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PRODUCT SPECIFICATION
t
Data hold time 0 - ns
HD-DAT
t
Stop setup time 250 - ns
SU-STO
Time between Stop condition and next
t
BUF
500 - ns
Start condition
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