CHIMEI INNOLUX V546H1-LH4 Specification

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TFT LCD Approval Specification

MODEL NO.: V546H1 – LH4

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Issued Date: May 26, 2009

Model No.: V546H1-LH4

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Customer:

Approved by:

Note:

TVHD

Approved By

LY Chen

QA Dept. Product Development Div.

Reviewed By

YT Chen WT Lin

LCD TV Marketing and Product Management Div.

Prepared By

CY Chang WT Hsu

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CONTENTS -

REVISION HISTORY .................................................................................................................................4

1. GENERAL DESCRIPTION ...................................................................................................................5

1.1 OVERVIEW....................................................................................................................................5

1.2 FEATURES.....................................................................................................................................5

1.3 APPLICATION ...............................................................................................................................5

1.4 GENERAL SPECIFICATI0NS........................................................................................................5

1.5 MECHANICAL SPECIFICATIONS ...............................................................................................5

2. ABSOLUTE MAXIMUM RATINGS .......................................................................................................6

2.1 ABSOLUTE RATINGS OF ENVIRONMENT................................................................................6

2.2 ELECTRICAL ABSOLUTE RATINGS ..........................................................................................7

3. ELECTRICAL CHARACTERISTICS ....................................................................................................8

3.1 TFT LCD MODULE (Ta = 25 ± 2 ºC) .............................................................................................8

3.2 BACKLIGHT UNIT......................................................................................................................10

4. BLOCK DIAGRAM OF INTERFACE..................................................................................................14

4.1 TFT LCD MODULE.....................................................................................................................14

5 .INPUT TERMINAL PIN ASSIGNMENT..............................................................................................15

5.1 TFT LCD Module..........................................................................................................................15

5.2 BACKLIGHT UNIT......................................................................................................................18

5.3 INVERTER UNIT.........................................................................................................................19

5.4 BLOCK DIAGRAM OF INTERFACE..........................................................................................20

5.5 LVDS INTERFACE ......................................................................................................................21

5.6 COLOR DATA INPUT ASSIGNMENT ........................................................................................22

6. INTERFACE TIMING ...........................................................................................................................23

6.1 INPUT SIGNAL TIMING SPECIFICATIONS..............................................................................23

6.2 POWER ON/OFF SEQUENCE.....................................................................................................24

7. OPTICAL CHARACTERISTICS .........................................................................................................25

7.1 TEST CONDITIONS ....................................................................................................................25

7.2 OPTICAL SPECIFICATIONS.......................................................................................................25

8. DEFINITION OF LABELS ...................................................................................................................29

8.1 CMO MODULE LABEL ..............................................................................................................29

9. PACKING ..............................................................................................................................................30

9.1 PACKING SPECIFICATIONS......................................................................................................30

9.2 PACKING METHOD....................................................................................................................30

10. PRECAUTIONS .................................................................................................................................32

10.1 ASSEMBLY AND HANDLING PRECAUTIONS ......................................................................32

10.2 SAFETY PRECAUTIONS ..........................................................................................................32

10.3 SAFETY STANDARDS..............................................................................................................32

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11. MECHANICAL CHARACTERISTIC .................................................................................................33

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REVISION HISTORY

Version Date

Ver 1.0 Mar. 04, 09’ All All Preliminary Specification was first issued.

Ver 1.1 Mar. 31, 09’ 5 1.1 Modify “color depth” spec

5 1.2 Modify “color saturation” spec
8 3.1 Modify “Power Supply Current” spec
10 3.2.1 Modify “Lamp Input Voltage” spec
10 3.2.2 Modify “Inverter Characteristics” spec
13 3.2.3 Modify “Inverter Interface Characteristics” fig

’ 25-27 7.2 Modify “Optical Specifications” spec

Ver 2.0 June. 4 , 09’ 15 5.1 Add two pin definition, CON_SCL and CON_SDA for MEMC I2C bus.

Page

(New)

Section Description

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1. GENERAL DESCRIPTION

1.1 OVERVIEW

V546H1-LH4 is a 54.6” TFT Liquid Crystal Display module with 22-CCFL Backlight unit and 2ch-LVDS

interface. This module supports 1920 x 1080 HDTV format and can display true 1.073G colors

(8bit+FRC/color). The inverter module for backlight is built-in.

1.2 FEATURES

- High brightness (500nits)

- High contrast ratio (4000:1)

- Fast response time (Gray to Gray typical 4.5ms)

- High color saturation (86% NTSC)

- Full HDTV (1920 x 1080 pixels) resolution, true HDTV format

- DE (Data Enable) only mode

- LVDS (Low Voltage Differential Signaling) interface

- Optimized response time for 120 Hz frame rate

- Ultra wide viewing angle: Super MVA technology

1.3 APPLICATION

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- Standard Living Room TVs.

- Public Display Application.

- Home Theater Application.

- MFM Application.

1.4 GENERAL SPECIFICATI0NS

Item Specification Unit Note
Active Area 1209.6(H) x 680.4(V) (54.6” diagonal) mm
Bezel Opening Area 1267.6 (H) x 738.4 (V) mm
Driver Element a-si TFT active matrix - ­Pixel Number 1920x R.G.B. x 1080 pixel ­Pixel Pitch(Sub Pixel) 0.21(H) x 0.63(V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 1.073G color ­Display Operation Mode Transmissive mode / Normally black - -

Surface Treatment

Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and

back outlines.

Note (2) The spec of the surface treatment is temporarily for this phase. CMO reserves the rights to

change this feature.

Anti-Glare coating (11% Low Haze)

Hardness (3H)

- (2)

(1)

1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal (H) 1266.1 1267.6 1269.1 mm

Module Size

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

Note (2) Module Depth does not include connectors.

Vertical (V) 737.2 738.4 739.6 mm
Depth (D) 38.5 40 41.5 mm

Weight - 20500 - g -

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2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature T
Operating Ambient Temperature T

Shock (Non-Operating) S

Vibration (Non-Operating) V

Note (1) Temperature and relative humidity range is shown in the figure below.

(a) 90 %RH Max. (Ta 40 ºC).Љ

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The maximum operating temperature is based on the test condition that the surface temperature of

NOP

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Value

Min. Max.

ST

OP

±X, ±Y 30

±Z

NOP

-20 +60 ºC (1)
0 50 ºC (1), (2)

-

- 1.0 G (4), (5)

30

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Model No.: V546H1-LH4

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Unit Note

G (3), (5)

display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.

Thermal management should be considered in final product design to prevent the surface temperature

of display area from being over 65 ºC. The range of operating temperature may degrade in case of

improper thermal management in final product design.

Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.

Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that

the module would not be twisted or bent by the fixture.

Relative Humidity (%RH)

100

90

80

60

Operating Range

40

20

10

Storage Range

Temperature (ºC)

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2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

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Model No.: V546H1-LH4

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Item Symbol

Min. Max.

Power Supply Voltage VCC -0.3 13.5 V

Logic Input Voltage VIN -0.3 3.6 V

Value

Unit Note

(1)

2.2.2 BACKLIGHT INVERTER UNIT

Item Symbol

Lamp Voltage V

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

W

Value

Min. Max.

Ё

3000 V

Unit Note

RMS

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3. ELECTRICAL CHARACTERISTICS

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3.1 TFT LCD MODULE

Parameter Symbol

(Ta = 25 ± 2 ºC)

Value

Min. Typ. Max.

Unit Note

Power Supply Voltage VCC 10.8 12 13.2 V (1)
Rush Current I

- - 4.8 A (2)

RUSH

White - 1.5 - A

Power Supply Current

LVDS
Interface

Common Input Voltage V

Terminating Resistor R

Black - 1.6 - A
Vertical Stripe

I

CC

- 3 3.7 A

1.125 1.25 1.375 V

LVC

- 100 - ohm

T

(3)

Input High Threshold Voltage VIH 2.7 - 3.3 V CMOS

interface

Input Low Threshold Voltage V

0 - 0.7 V

IL

Note (1) The module should be always operated within the above ranges.

Note (2) Measurement condition:

+12V

R1
1K

Q1

Si4485D

FUSE

C3

1uF

Vcc

(LCD Module Input)

(Low to High)

(Control Signal)

SW

GND

VR1

47K

R2

1K

Q2

2N7002

Vcc rising time is 470us

0.9Vcc

0.1Vcc

470us

C1

0.01

Vcc

Note (3) The specified power supply current is under the conditions at Vcc = 12V, Ta = 25 ± 2 ºC, f

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whereas a power dissipation check pattern below is displayed.

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a. White Pattern

Active Area

c. Vertical Stripe Pattern

b. Black Pattern

Active Area

R

G

R

B

G

R

B

G

R R

G

B

B

B

B

R

R

R

G

G

G

G

B

B

B

B

R

R

Active Area

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3.2 BACKLIGHT UNIT

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3.2.1 CCFL (Cold Cathode Fluorescent Lamp) CHARACTERISTICS (

Parameter Symbol

Min. Typ. Max.
Lamp Input Voltage VL - 1410 - V
Lamp Current IL 5.5 6.0 6.5 mA

Lamp Turn On Voltage V

S

- - 3155 V

- - 2425 V

Value

Ta = 25 ± 2 ºC)

Unit Note

RMS

RMS

(2), Ta = 0 ºC

RMS

(2), Ta = 25 ºC

RMS

-

(1)

Operating Frequency FL 30 55 80 KHz (3)
Lamp Life Time LBL 50,000 - - Hrs (4)

3.2.2 INVERTER CHARACTERISTICS (

Parameter Symbol

Total Power Consumption P

Power Supply Voltage VBL 22.8 24 25.2 V

255

Ta = 25 ± 2 ºC)

Val ue

Min. Typ. Max.

Unit Note

- 191 201 W (5), (6), IL =6.0mA

DC

Supply Voltage Difference VD - - 1 VDC (7)
Power Supply Current IBL - 8.0 8.4 A Non Dimming
Input Ripple Noise - - - 912 mV

P-P

VBL=22.8V
Oscillating Frequency FW 52 55 58 kHz (3)
Dimming frequency FB 150 160 170 Hz
Minimum Duty Ratio D

- 20 - %

MIN

Note (1) Lamp current is measured by utilizing AC current probe and its value is average by measuring

master and slave board.

Note (2) The lamp starting voltage V

should be applied to the lamp for more than 1 second after startup.

S

Otherwise the lamp may not be turned on.

Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the

display input signals, and it may result in line flow on the display. In order to avoid interference, the

lamp frequency should be detached from the horizontal synchronous frequency and its harmonics

as far as possible.

Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and

the effective discharge length is longer than 80% of its original length (Effective discharge length is

defined as an area that has equal to or more than 70% brightness compared to the brightness at

the center point of lamp.) as the time in which it continues to operate under the condition at Ta = 25

±2 and Iк

Note (5) The power supply capacity should be higher than the total inverter power consumption P

= 5.5~ 6.5mArms.

L

. Since

BL

the pulse width modulation (PWM) mode was applied for backlight dimming, the driving current

changed as PWM duty on and off. The transient response of power supply should be considered

for the changing loading when inverter dimming.

Note (6) The measurement condition of Max. value is based on 54.6" backlight unit under input voltage 24V,

average lamp current 6.3mA and lighting 30 minutes later.

Note (7) The voltage difference of power supply voltage (V

) between Master and Slave board could not

BL

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Inverter

(Master)

A
A

A
A

A
A

A
A

A
A

A
A

HV(White -)

2

HV (Pink +)

1

HV(White -)

2

HV (Pink +)

1

HV(White -)

2

HV (Pink +)

1

HV(White -)

2

HV (Pink +)

1

HV(White -)

2

HV (Pink +)

1

HV(White -)

2

HV (Pink +)

1

HV (White-)
HV (Pink +)

HV (White-)
HV (Pink +)

HV (White-)
HV (Pink +)

HV (White-)
HV (Pink +)

HV (White-)
HV (Pink +)

HV (White-)
HV (Pink +)

A

1
2

A

A

1
2

A

A

1
2

A

Inverter

(Slave2)

A

1
2

A

A

1
2

A

A

1
2

A

LCD Module

Inverter

(Slave1)

A
A

A
A

A
A

A
A

A
A

HV (Pink +)

1

HV(White -)

2

HV (Pink +)

1

HV(White -)

2

HV (Pink +)

1

HV(White -)

2

HV (Pink +)

1

HV(White -)

2

HV (Pink +)

1

HV(White -)

2

HV (White-)
HV (Pink +)

HV (White-)
HV (Pink +)

HV (White-)
HV (Pink +)

HV (White-)
HV (Pink +)

HV (White-)
HV (Pink +)

A

1
2

A

A

1
2

A

A

1
2

A

A

1
2

A

A

1
2

A

Inverter

(Slave3)

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3.2.3 INVERTER INTERFACE CHARACTERISTICS

Parameter Symbol

On/Off Control Voltage

Voltage

Voltage

Status Signal

VBL Rising Time Tr1 Ё 30 ЁЁ ms
VBL Falling Time Tf1 Ё 30 ЁЁ ms
Control Signal Rising Time Tr
Control Signal Falling Time Tf
PWM Signal Rising Time T
PWM Signal Falling Time T
Input impedance R
PWM Delay Time T

BLON Delay Time

BLON Off Time T

Note (1) The Dimming signal should be valid before backlight turns on by BLON signal. It is inhibited to

ON

OFF

MAX 2.85 3.0 3.15 V Maximum duty ratioInternal PWM Control

MIN

HI 2.0

LO

HI 3.0 3.3 3.6 V Normal

LO

V

BLON

V

IPWM

V

EPWM

Status

PW MR

PW MF

IN

PW M

T

on

T

on1

off

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0

0

0

1

Value

Ё
Ё

0

Ё
Ё

Ё

5.0 V

0.8 V

Ё

5.0 V Duty on External PWM Control

0.8 V Duty off

0.8 V Abnormal

100 ms
100 ms

50 us
50 us

ЁЁ

Unit Note

V Minimum duty ratio

10%-90%V

Mȍ

Te st

Condition

Ё

Min. Typ. Max.

2.0

Ё

Ё

Ё

Ё

ЁЁЁ
ЁЁЁ
ЁЁЁ
ЁЁЁ
Ё
Ё 100 Ё ms
Ё 300 ЁЁ ms
ЁЁЁЁ 300 ЁЁЁЁЁ ms
Ё 300 ЁЁ ms

Approval

BL

change the internal/external PWM signal during backlight turn on period.

Note (2) The power sequence and control signal timing are shown in the following figure. For a certain

reason, the inverter has a possibility to be damaged with wrong power sequence and control

signal timing.

Note (3) While system is turned ON or OFF, the power sequences must follow as below descriptions:

Turn ON sequence: VBL

Turn OFF sequence: BLOFF ĺ PWM signal ĺ VBL

ĺ

PWM signal ĺ BLON

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V

V

V

BL

V

BLON

EPWM

IPWM

9

Toff

%/

Tf1

9

%/

Tr1

9

%/

9

%/

2.0V

0.8V

Ton

Ton1

0

0

Backlight on duration

Tr

Tf

Ext. Dimming Function

T

PWMR

2.0V

0

0.8V

T

PWM

T

PWMF

Floating

3.15V

0

Floating

Int. Dimming Function

V

W

External

PWM

Period

External

PWM Duty

100%

Minimun

Duty

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4. BLOCK DIAGRAM OF INTERFACE

4.1 TFT LCD MODULE

ODD_RIN0+/­ODD_RIN1+/­ODD_RIN2+/­ODD_RIN3+/­ODD_RIN4+/­ODD_CLK+/-

EVEN_RIN0+/­EVEN_RIN1+/­EVEN_RIN2+/­EVEN_RIN3+/­EVEN_RIN4+/­EVEN_CLK+/-

MEN
MCFG 0
MCFG 1
LVDS8b
GV_mode
SELLVDS
ODSEL

VIN
GND

(FI-RE51S-HF (JAE)) or equivalent

INPUT CONNECTOR

FRAME

BUFFER

MEMC

DC/DC CONVERTER

& REFERENCE VOLTAGE

GENERATOR

TIMING

CONTROLLER

FRAME

BUFFER

SCAN DRIVER

TFT LCD PANEL

(1920x3x1080)

DATA DRIVER (RSDS

VBL

GND

Status

E_PWM

I_PWM

BLON

INVERTER

CONNECTOR

CN127

130001WR-02E

(YEONHO) (Master)

CN103-CN105: 528521070 (Molex)

CN5-CN32: SM02 -BDAS-3-TB (JST)

or equivalent

BACKLIGHT

UNIT

CN101-CN102: 528521070 (Molex)

or equivalent

or equivalent

CN 3-CN4: Cl0114M1HR0-LF

or equivalent

INVERTER

CONNECTOR

CN227

130001WR-02E

(YEONHO) (Salve)

(Cvilux)

VBL

GND

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5 .INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD Module

CNF1 Connector Part No.: JAE Taiwan (؀᨜౰ሽ՗) FI-RE51S-HF or equivalent.

Pin Name Description Note

1 GND Ground ʳ

2 MEN MEMC function selection 4

3 MCFG0 MEMC function selection 4

4 MCFG1 MEMC function selection 4

5 LVDS8b 8bit/10bit LVDS input selection 5

6 GV_mode Graphic / Video mode selection 6

7 SELLVDS LVDS data format Selection 2
8 CON_SCL MEMC I2C bus ʳ
9 CON_SDA MEMC I2C bus ʳ

10 ODSEL Overdrive Lookup Table Selection 3
11 GND Ground ʳ
12 ERX0- 2nd pixel Negative LVDS differential data input. Channel 0 ʳ
13 ERX0+ 2nd pixel Positive LVDS differential data input. Channel 0 ʳ
14 ERX1- 2nd pixel Negative LVDS differential data input. Channel 1 ʳ
15 ERX1+ 2nd pixel Positive LVDS differential data input. Channel 1 ʳ
16 ERX2- 2nd pixel Negative LVDS differential data input. Channel 2 ʳ
17 ERX2+ 2nd pixel Positive LVDS differential data input. Channel 2 ʳ
18 GND Ground ʳ
19 ECLK- 2nd pixel Negative LVDS differential clock input. ʳ
20 ECLK+ 2nd pixel Positive LVDS differential clock input. ʳ
21 GND Ground ʳ
22 ERX3- 2nd pixel Negative LVDS differential data input. Channel 3 ʳ
23 ERX3+ 2nd pixel Positive LVDS differential data input. Channel 3 ʳ
24 ERX4- 2nd pixel Negative LVDS differential data input. Channel 4 ʳ
25 ERX4+ 2nd pixel Positive LVDS differential data input. Channel 4 ʳ

26 N.C. No Connection 1

27 N.C. No Connection 1
28 ORX0- 1st pixel Negative LVDS differential data input. Channel 0 ʳ
29 ORX0+ 1st pixel Positive LVDS differential data input. Channel 0 ʳ
30 ORX1- 1st pixel Negative LVDS differential data input. Channel 1 ʳ
31 ORX1+ 1st pixel Positive LVDS differential data input. Channel 1 ʳ
32 ORX2- 1st pixel Negative LVDS differential data input. Channel 2 ʳ
33 ORX2+ 1st pixel Positive LVDS differential data input. Channel 2 ʳ
34 GND Ground ʳ
35 OCLK- 1st pixel Negative LVDS differential clock input. ʳ
36 OCLK+ 1st pixel Positive LVDS differential clock input. ʳ
37 GND Ground ʳ
38 ORX3- 1st pixel Negative LVDS differential data input. Channel 3 ʳ
39 ORX3+ 1st pixel Positive LVDS differential data input. Channel 3 ʳ
40 ORX4- 1st pixel Negative LVDS differential data input. Channel 4 ʳ

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41 ORX4+ 1st pixel Positive LVDS differential data input. Channel 4 ʳ

42 N.C. No Connection 1

43 DEMO Demo window enable 7
44 GND Ground ʳ
45 GND Ground ʳ
46 GND Ground ʳ
47 N.C. No Connection ʳ
48 VCC +12V power supply ʳ
49 VCC +12V power supply ʳ
50 VCC +12V power supply ʳ
51 VCC +12V power supply ʳ

Note (1) Reserved for internal use. Please leave it open.

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Note (2)

SELLVDS Mode

L(default)

H JEIDA

L: Connect to GND, H: Connect to +3.3V

Note (3) Overdrive lookup table selection. The overdrive lookup table should be selected in accordance with the

frame rate to optimize image quality.

ODSEL Description

L(default)

H Lookup table was optimized for 50 Hz frame rate input.

Note (4) Motion Engine (ME) Level & Demo Function Table

Motion engine level must be adjusted after video mode is selected (or entered).

Adjusting the motion engine level in graphic mode has no effect

MEN MCFG1 MCFG0 Notes

Blanking

L: Connect to GND, H: Connect to +3.3V

Blanking disable
Auto blanking
Blanking enable

Lookup table was optimized for 60 Hz frame rate input.

VESA

0 0 0
0 0 1
0 1 0

(a)
(b)
(c)

Effect of ME  De blur De judder Halo

Demo mode (d)

Strong
Medium(Default)

ME

Level

Weak
OFF

(a) Module re-starts processing video signals from Frontend scaler control board.

(b) During sync unstable period such as format change, 60Hz <-> 50Hz .

0 1 1 Demo Window
1 0 0 Enable Strong Strong

1 0 1 Enable Normal Normal
1 1 0 Enable × ×
1 1 1 × × ×

(e) (f) (g)

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MCFG0 can be used to insert blanking of 500ms. This signal is toggled.

(c) Module continues to insert blanking until blanking disable signal is received from frontend scaler board.

(d) Demo window mode: Demo Window appears to the left half of display area. Left side with frame is

120Hz with MEMC, and right side is 120Hz w/o motion compensation.

(e) GPIO (General Purpose I/O) sequence of ME Level: (1) MEN; (2) MCFG1; (3) MCFG0.

GPIO sequence of Blanking Enable, Blanking Disable and Demo window: (1) MCFG1; (2) MCFG0; (3)

MEN.

(f) Each scaler command must be maintained the same voltage level at least 100ms.

(g) 0 : Connect to GND, 1 : +3.3V

Note (5) 8bit/10bit LVDS input selection

LVDS8b Bit depthʳʳʳʳ

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Model No.: V546H1-LH4

Approval

H(default)

L

L : Connect to GND, H : Connect to +3.3V

Note (6) Graphic / Video mode selection

There is no prohibited time period for switching between Graphic mode and Video mode.

When this switching signal is input, LCD will be reset and will re-start selected mode.

GV_mode Mode select MEMC ON/OFF

H(default)

L

L : Connect to GND, H : Connect to +3.3V

8bit

10bit

Graphic mode MEMC OFF

Video mode MEMC ON

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5.2 BACKLIGHT UNIT

The pin configuration for the housing and the leader wire is shown in the table below.

CN101-CN108: CP042ESFA00 (Cvilux)

Pin Name Description Wire Color

1 HV High Voltage Pink
2 HV High Voltage White

Note (1) The backlight interface housing for high voltage side is a model CP042ESFA00, manufactured by

Cvilux. The mating header on inverter part number is CP042EP1MFB-LF (Cvilux)

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1 HV(White)

2 HV(Pink)

1 HV(White)

2 HV(Pink)

1 HV(White)

2 HV(Pink)

1 HV(Pink)

2 HV(White)

1 HV(Pink)

2 HV(White)

1 HV(Pink)

2 HV(White)

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5.3 INVERTER UNIT

CN1: Cl0114M1HR0-LF (Cvilux)

Pin ʋ Symbol Feature

1
2
3
4
5
6
7
8
9

10

11

12 E_PWM External PWM Control Signal
13 I_PWM Internal PWM Control Signal

14 BLON BL ON/OFF
Note (1) PIN 12:External PWM Control (Use Pin 12): Pin 13 must open.
Note (2) PIN 13:Intermal PWM Control (Use Pin 13): Pin 12 must open.
Note (3) Pin 12(E_PWM) and Pin 13(I_PWM) can’t open in same period.

(Signal Output Pin)

VBL +24V

GND GND

Status

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Model No.: V546H1-LH4

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Normal (3.3V)

Abnormal (GND)

CN2-CN4: Cl0112M1HR0-LF (Cvilux)

Pin ʋ Symbol Feature

1
2
3
4
5
6
7
8

9
10
11 NC NC
12 NC NC

CN5-CN32: SM02 -BDAS-3-TB (JST)

Pin No. Symbol Description

1 CCFL CCFL high voltage

2 CCFL CCFL high voltage

CN103-CN105: 528521070 (Molex)

Pin No. Symbol Description

1 Board to Board

2 Board to Board

3 Board to Board

4 Board to Board

5 Board to Board

6 Board to Board

7 Board to Board

8 Board to Board

9

Control

Signal

VBL +24V

GND GND

Board to Board

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10 Board to Board

Note (1) Floating of any control signal is not allowed.

5.4 BLOCK DIAGRAM OF INTERFACE

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5.5 LVDS INTERFACE

VESA Format : SELLVDS = L or Open

JEIDA Format : SELLVDS = H

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Model No.: V546H1-LH4

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AR0~AR9: First Pixel R Data (9; MSB, 0; LSB)

AG0~AG9: First Pixel G Data (9; MSB, 0; LSB)

AB0~AB9: First Pixel B Data (9; MSB, 0; LSB)

DE : Data enable signal

DCLK : Data clock signal

RSVD : Reserved

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5.6 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 10-bit gray scale data input for

the color. The higher the binary input, the brighter the color. The table below provides the assignment of

color versus data input.

Basic
Colors

Gray
Scale
Of
Red

Gray
Scale
Of
Green

Gray
Scale
Of
Blue

Color

Black
Red
Green
Blue
Cyan
Magenta
Yel lo w
White
Red (0) / Dark
Red (1)
Red (2)

:

:
Red (1021)
Red (1022)
Red (1023)
Green (0) / Dark
Green (1)
Green (2)

:

:
Green (1021)
Green (1022)
Green (1023)

Blue (0) / Dark
Blue (1)
Blue (2)

:

:
Blue (1021)
Blue (1022)
Blue (1023)

R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 G9 G8 G7 G6 G5 G4 G3 G2 G1 G0 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0

0

0
1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Red Green Blue

0

0

0
1
0
0
0
1
1
1
0
0
0

:

:
1
1
1
0
0
0

:

:
0
0
0

0
0
0

:

:
0
0
0

0

1

1

1

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

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0

0

0

0

0

1

1

1

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

1

:

:

:

:

:

:

1

1

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

1

0

0

0

1

1

0

0

0

0

1

1

1

0

0

1

1

1

1

1

1

0

0

0

1

0

0

0

0

0

:

:

:

:

:

:

1

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

1

1

0

1

1

0

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

Data Signal

0

0
0

0

1

1

0

0

1

1

0

0

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

Issued Date: May 26, 2009

Model No.: V546H1-LH4

Approval

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0
1
0
1
1
0
0
0

:

:
0
0
0
0
0
0

:

:
1
1
1

0
0
0

:

:
0
0
0

0

1

1

1

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

0

0

1

1

1

0

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

;

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

1

0

0

:

:

:

:

:

:

0

1

0

1

0

0

1

1

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

1

0

0

1

0

0

1

0

0

0

0

1

1

1

1

1

1

1

1

1

0

0

0

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0
0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

1

1

1
1

1

1

1

1

1

0

0

0

0

0

1

1

1

1

1

1

1

1

1
0

0

0

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

0

0

0

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

1

0

:

:

:

:

:

:

1

0

1

1

1

0

1

1

1

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6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

Frequency 1/Tc 60 74.25 78 MH

LVDS Receiver Clock

LVDS Receiver Data

Vertical Active Display Term

Horizontal Active Display Term

Input cycle to
cycle jitter
Setup Time Tlvsu 600 - - ps ­Hold Time Tlvhd 600 - - ps -

Frame Rate

Total Tv 1115 1125 1135 Th Tv=Tvd+Tvb
Display Tvd 1080 1080 1080 Th ­Blank Tvb 35 45 55 Th ­Total Th 1050 1100 1150 Tc Th=Thd+Thb
Display Thd 960 960 960 Tc ­Blank Thb 90 140 190 Tc -

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Model No.: V546H1-LH4

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Z

Trcl - - 200 ps -

57 60 61
47 50 53

Hz

-

-

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6.2 POWER ON/OFF SEQUENCE

To prevent a latch-up or DC operation of LCD module, the power on/off sequence should follow the diagram

below.

0V

0.5ЉЉЉЉT1ЉЉЉЉ10ms

2

0ЉЉЉЉT
0ЉЉЉЉT
500ms ЉЉЉЉT

LVDS Signals

ЉЉЉЉ50ms

3

ЉЉЉЉ50ms

4

0V

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0.1V

Power On

Issued Date: May 26, 2009

Model No.: V546H1-LH4

Approval

0.1V

cc

T

T

1

T

2

VALI D

3

Power Off

T

4

0ЉЉЉЉT7ЉЉЉЉT2

8

0ЉЉЉЉT

T

7

T

8

Option Signals

(SELLVDS…)

50%

6

T

Backlight (Recommended)

1300msЉЉЉЉT

100ms

5

ЉЉЉЉ

T

6

50%

T

5

Power ON/OFF Sequence

Note:

(1) The supply voltage of the external system for the module input should follow the definition of Vcc.

(2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD

operation or the LCD turns off before the backlight turns off, the display may momentarily become abnormal

screen.

(3) In case of VCC is in off level, please keep the level of input signals on the low or high impedance.

(4) T4 should be measured after the module has been fully discharged between power off and on period.

(5) Interface signal shall not be kept at high impedance when the power is on.

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7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Lamp Current I
Oscillating Frequency (Inverter) F
Vertical Frame Rate Fr 120 Hz

7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should be

measured under the test conditions described in 7.1 and stable environment shown in Note (6).

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR 3000 4000 - - Note (2)

Response Time

Center Luminance of White L

White Variation
Cross Talk CT - - 4 % Note (5)

Red

Green
Color
Chromaticity

Viewing
Angle

Blue

White

Color Gamut

Horizontal

Vertical

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o

252

5010

CC

L

W

Gray to

gray

C

W

=0, Y =0



Rx 0.650 ­Ry

x

Viewing angle at

normal direction

12V V

6.00.5
553

- 4.5 9 ms Note (3)

400 500 -

- - 1.3 - Note (7)

0.322
Gx 0.228 ­Gy
Bx 0.152 -

Typ.-

0.03

By

Wx
Wy

0.664

0.055

0.280

0.290

Typ.+

0.03

86 - % NTSC

x+



-

x

Y+



Y

CR20

-

80 88 ­80 88 ­80 88 ­80 88 -

C

%RH

mA

KHz

cd/

Note (4)

2

m

-

­Note (6)

-

-

-

Deg. Note (1)

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T

Note (1) Definition of Viewing Angle (x, y):

Viewing angles are measured by Eldim EZ-Contrast 160R

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Model No.: V546H1-LH4

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Normal

x = y = 0º

y- y

X- = 90º

x-

x

6 o’clock



y-

= 90º

y-

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) = L1023 / L0

L1023: Luminance of gray level 1023

L 0: Luminance of gray level 0

CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note

(7)

Note (3) Definition of Gray to Gray Switching Time :

x

12 o’clock direction

y+



y+

= 90º

x+

X+ = 90º

100%

90%

Optical

Response

10%

0%

Gray to gray
switching time

Gray to gray
switching time

ime

The driving signal means the signal of gray level 0, 255,511,767,and 1023.

Gray to gray average time means the average switching time of gray level 0, 255, 511, 767, 1023 to each

other .

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A

(

)

A

(

)

A

(

)

A

(

)

Note (4) Definition of Luminance of White (LC):

Measure the luminance of gray level 1023 at center point.

L

= L (5), where L (x) is corresponding to the luminance of the point X at the figure in Note (7).

C

Note (5) Definition of Cross Talk (CT):

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CT = | Y

Where:

(a)

(0, 0)

Y

(D/8,W/2)

A, L

Y

(D/2,7W/8)

A, D

(b)

– YA | / YA 100 (%)

B

Y

= Luminance of measured location without gray level 1023 pattern (cd/m2)

A

Y

= Luminance of measured location with gray level 1023 pattern (cd/m2)

B

ctive Area

Y

(D/2,W /8)

A, U

Y

Gray 512

Y

= Luminance of measured location without gray level 1023 pattern (cd/m2)

A

Y

= Luminance of measured location with gray level 1023 pattern (cd/m2)

B

Y

A, R

D, W

(7D/8,W/2)

B, L

Y

B, D

0, 0

(D/4,W/4)

(D/8,W/2)

(D/2,7W/8)

ctive Area

Gray 0

Gray 1023

Gray 512

Y

(D/2,W /8)

B, U

Y

(7D/8,W/2)

B, R

(3D/4,3W/4)

(D, W)

Y

(D/8,W/2)

A, L

Y

(D/2,7W/8)

A, D

(0, 0)

ctive Area

Gray 0

Y

Y

A, R

D, W

A, U

(D/2,W /8)

(7D/8,W/2)

27

(D/4,W/4)

(D/8,W/2)

Y

B, L

Y

(D/2,7W/8)

B, D

0, 0

ctive Area

Gray 1023

Gray 0

Y

(D/2,W /8)

B, U

Y

(7D/8,W/2)

B, R

(3D/4,3W/4)

(D, W)

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Note (6) Measurement Setup:

The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt

temperature change during measuring. In order to stabilize the luminance, the measurement

should be executed after lighting backlight for 1 hour in a windless room.

LCD Module

LCD Panel

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Model No.: V546H1-LH4

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Center of the Screen

Note (7) Definition of White Variation (W):

Measure the luminance of gray level 1023 at 5 points

W = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

Display Color Analyzer

(Minolta CA210)

Light Shield Room

(Ambient Luminance < 2 lux)

Horizontal Line

D

D/4 D/2 3D/4

W

W/4

W/2

1 2

: Test Point

5

X

X=1 to 5

Vertical Line

3W /4

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3 4

Active Area

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8. DEFINITION OF LABELS

8.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

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Issued Date: May 26, 2009

Model No.: V546H1-LH4

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V546H1-LH4 Rev. XX

CHI MEI

OPTOELECTRONICS

CHI MEI

OPTOELECTRONICS

(a) Model Name: V546H1-LH4

(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.

(c) CMO barcode definition:

Serial ID: XX-XX-X-XX-YMD-L-NNNN

Code Meaning Description

XX CMO internal use ­XX Revision Cover all the change

X-XX CMO internal use -

Year, month, day

YMD

L Product line # Line 1=1, Line 2=2, Line 3=3, …

NNNN Serial number Manufacturing sequence of product

X X X X X X X Y M D L N N N N

V546H1-LH4 Rev. XX

X X X X X X X Y M D L N N N N

Year: 2001=1, 2002=2, 2003=3, 2004=4…
Month: Jan. ~ Dec.=1, 2, 3, ~, 9, A, B, C

st

Day: 1

to 31st =1, 2, 3, ~, 9, A, B, C, ~, W, X, Y, exclude I, O, and U

E207943

MADE IN Taiwan

MADE IN TAIWAN

GEMN

ROHS

E207943

MADE IN CHINA

MADE IN TAIWAN

CAPG
ROHS

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9. PACKING

9.1 PACKING SPECIFICATIONS

(1) 2 LCD TV modules / 1 Box

(2) Box dimensions: 1334(L) X 284 (W) X 856 (H)

(3) Weight: approximately 46 Kg (2 modules per box)

9.2 PACKING METHOD

Figures 9-1 and 9-2 are the packing method

LCD TV Module

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Issued Date: May 26, 2009

Model No.: V546H1-LH4

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Anti-static Bag

Cushion(Bottom)

Carton

PP Belt

Carton Label

Figure.9-1 packing method

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Sea & Land Transportation Air Transportation
Gross : 383Kg Gross : 199Kg

(L1130*50mm*50mm)

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Model No.: V546H1-LH4

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Film

PP Belt

(L1150*W1345*H140mm)

Figure. 9-2 Packing method

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10. PRECAUTIONS

10.1 ASSEMBLY AND HANDLING PRECAUTIONS

(1) Do not apply rough force such as bending or twisting to the module during assembly.

(2) It is recommended to assemble or to install a module into the user’s system in clean working areas. The

dust and oil may cause electrical short or worsen the polarizer.

(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and backlight.

(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the

damage and latch-up of the CMOS LSI chips.

(5) Do not plug in or pull out the I/F connector while the module is in operation.

(6) Do not disassemble the module.

(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and

easily scratched.

(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.

(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD

modules in the specified storage conditions.

(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the

response time will become slow, and the starting voltage of CCFL will be higher than that of room

temperature.

10.2 SAFETY PRECAUTIONS

(1) The startup voltage of a backlight is over 1000 Volts. It may cause an electrical shock while assembling

with the inverter. Do not disassemble the module or insert anything into the backlight unit.

(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In

case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.

(3) After the module’s end of life, it is not harmful in case of normal operation and storage.

10.3 SAFETY STANDARDS

The LCD module should be certified with safety regulations as follows:

Regulatory Item Standard

UL UL 60950-1: 2003

Information Technology equipment

Audio/Video Apparatus

If the module displays the same pattern for a long period of time, the phenomenon of image sticking may be

occurred.

cUL CAN/CSA C22.2 No.60950-1-03

CB IEC 60950-1:2001

UL UL 60065: 2003

cUL CAN/CSA C22.2 No.60065-03

CB IEC 60065:2001

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11. MECHANICAL CHARACTERISTIC

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