CHIMEI INNOLUX V500HK1-LS5 Rev C1 Specification

PRODUCT SPECIFICATION

Customer:

□ Tentative Specification
□ Preliminary Specification

■

Approval Specification

MODEL NO.: V500HK1

SUFFIX: LS5 (C1)

APPROVED BY SIGNATURE

Name / Title
Note

Please return 1 copy for your confirmation with your signature and
comments.

Approved By Checked By Prepared By

Chao-Chun

Ken Wu HT Hung

Chung

Version 2.0 1 Date 31 Jan.2012

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

CONTENTS

PRODUCT SPECIFICATION

1. GENERAL DESCRIPTION............................................................................................................................................5

1.1 OVERVIEW..........................................................................................................................................................5

1.2 FEATURES ..........................................................................................................................................................5

1.3 APPLICATION......................................................................................................................................................5

1.4 GENERAL SPECIFICATI0NS..............................................................................................................................5

1.5 MECHANICAL SPECIFICATIONS.......................................................................................................................6

2. ABSOLUTE MAXIMUM RATINGS ................................................................................................................................7

2.1 ABSOLUTE RATINGS OF ENVIRONMENT........................................................................................................7

2.2 PACKAGE STORAGE..........................................................................................................................................8

2.3 ELECTRICAL ABSOLUTE RATING.....................................................................................................................8

2.3.1 TFT LCD MODULE...........................................................................................................................................8

2.3.1 BACKLIGHT CONVERTER UNIT.....................................................................................................................8

3. ELECTRICAL CHARACTERISTICS .............................................................................................................................9

3.1 TFT LCD MODULE ..............................................................................................................................................9

3.2 BACKLIGHT UNIT..............................................................................................................................................12

3.2.1 LED LIGHT BAR CHARACTERISTICS (Ta= 25± 2 ºC)..................................................................................12

3.2.2 CONVERTER CHARACTERISTICS (Ta= 25± 2 ºC)......................................................................................12

3.2.3 CONVERTER INTERFACE CHARACTERISTICS .........................................................................................14

4. BLOCK DIAGRAM OF INTERFACE ...........................................................................................................................16

4.1 TFT LCD MODULE ............................................................................................................................................16

5 .INPUT TERMINAL PIN ASSIGNMENT.......................................................................................................................17

5.1 TFT LCD MODULE ............................................................................................................................................17

5.2 BACKLIGHT UNIT..............................................................................................................................................24

5.3 DRIVING BOARD UNIT ...................................................................................................................................24

5.4 BLOCK DIAGRAM OF INTERFACE..................................................................................................................25

5.5 LVDS INTERFACE.............................................................................................................................................28

5.6 COLOR DATA INPUT ASSIGNMENT................................................................................................................29

6. INTERFACE TIMING...................................................................................................................................................31

6.1 INPUT SIGNAL TIMING SPECIFICATIONS (Ta = 25 ± 2 ºC)............................................................................31

6.1.1 Timing spec for Frame Rate=100 Hz ..............................................................................................................31

6.1.2 Timing spec for Frame Rate=120 Hz ..............................................................................................................32

6.2 POWER ON/OFF SEQUENCE..........................................................................................................................35

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PRODUCT SPECIFICATION

6.2.1 POWER ON/OFF SEQUENCE.......................................................................................................................35

6.2.2 2D/3D MODE CHANGE SIGNAL SEQUENCE WITHOUT VCC TURN OFF AND TURN ON.......................36

7. OPTICAL CHARACTERISTICS ..................................................................................................................................37

7.1 TEST CONDITIONS...........................................................................................................................................37

7.2 OPTICAL SPECIFICATIONS .............................................................................................................................38

8. DEFINITION OF LABELS............................................................................................................................................43

8.1 CMI MODULE LABEL........................................................................................................................................43

9. Packaging....................................................................................................................................................................44

9.1 PACKING SPECIFICATIONS.............................................................................................................................44

9.2 PACKING METHOD...........................................................................................................................................44

10. PRECAUTIONS.........................................................................................................................................................46

10.1 ASSEMBLY AND HANDLING PRECAUTIONS...............................................................................................46

10.2 SAFETY PRECAUTIONS ................................................................................................................................46

10.3 SAFETY STANDARDS....................................................................................................................................46

11. MECHANICAL CHARACTERISTIC...........................................................................................................................47

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PRODUCT SPECIFICATION

all all Preliminary

Specification Ver

1

.0 was first issued.

REVISION HISTORY

Version

B1

C1 Jan.31 ,12

Date

Nov.17,11

Page

(New)

all all Approval Specification Ver 2.0 was first issued.

Section

Description

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PRODUCT SPECIFICATION

1. GENERAL DESCRIPTION

1.1 OVERVIEW

V500HK1-LS5 is a 50” TFT Liquid Crystal Display module with LED Backlight unit and 4ch-LVDS interface.
This module supports 1920 x 1080 HDTV format and can display true 1.07G colors (8-bit + Hi-FRC /color).
The driving board module for backlight is built-in.

1.2 FEATURES

- High brightness 400nits

- High contrast ratio 5000:1

- Fast response time Gray to Gray typical 6.5 ms

- High color saturation 72% NTSC

- Full HDTV (1920 x 1080 pixels) resolution, true HDTV format

- DE (Data Enable) only mode

- LVDS (Low Voltage Differential Signaling) interface

- Optimized response time for 120 Hz frame rate

- Ultra wide viewing angle: Super MVA technology

- RoHs compliance

1.3 APPLICATION

- Standard Living Room TVs.

- Public Display Application.

- Home Theater Application.

- MFM Application.

1.4 GENERAL SPECIFICATI0NS

Item Specification Unit Note

Active Area
Bezel Opening Area
Driver Element
Pixel Number
Pixel Pitch(Sub Pixel)

Pixel Arrangement RGB vertical stripe - ­Display Colors 1.073G color ­Display Operation Mode Transmissive mode / Normally black - -

Surface Treatment
Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and

back outlines.

Note (2) The spec of the surface treatment is temporarily for this phase. CMI reserves the rights to

1095.84(H) x (V) 616.41 (50” diagonal)

1102.84(H) x 623.41(V)
a-si TFT active matrix
1920 x R.G.B. x 1080

0.1903(H) x 0.5708(V)

Anti-Glare coating (Haze 3.5%),Hardness 3H

mm
mm

- -

pixel -

mm -

- (2)

(1)

change this feature.

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PRODUCT SPECIFICATION

1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal (H) 1121.14 1122.64 1124.14 mm Module Size
Vertical (V) 643.81 645.31 646.81 mm

Module Size
Weight

Note (1)Please refer to the attached drawings for more information of front and back outline dimensions.

Note (2) Module Depth does not include connectors.

Depth (D) 14.1 15.1 16.1 mm To Rear

Weight

23 24 25

14000

G Weight

mm To converter

cover

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PRODUCT SPECIFICATION

2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 50 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V

Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta 40 ºC).≦

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of

display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 65 ºC. The range of operating temperature may degrade in case of improper

- 35 G (3), (5)

NOP

- 1.0 G (4), (5)

NOP

Min. Max.

Value

Unit Note

thermal management in final product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 200 Hz, 30 min, 1 time each X, Y, Z.
Note (5)At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that

the module would not be twisted or bent by the fixture.

Relative Humidity (%RH)

100

90

80

60

Operating Range

40

20

10

Storage Range

Temperature (ºC)

80 60 -20 40 0 20 -40

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PRODUCT SPECIFICATION

2.2 PACKAGE STORAGE

When storing modules as spares for a long time, the following precaution is necessary.

(a) Do not leave the module in high temperature, and high humidity for a long time, It is highly recommended to

store the module with temperature from 0 to 35 ℃ at normal humidity without condensation.

(b)

The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent
light.

2.3 ELECTRICAL ABSOLUTE RATING

2.3.1 TFT LCD MODULE

Item Symbol

Min. Max.

Power Supply Voltage VCC -0.3 13.5 V

Logic Input Voltage VIN -0.3 3.6 V

Value

Unit Note

(1)

2.3.1 BACKLIGHT CONVERTER UNIT

Item Symbol

Light Bar Voltage VW Ta = 25 ℃ - - 58.8 V

Converter Input Voltage VBL - 0 - 30 V

Control Signal Level - - -0.3

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

Note (2) No moisture condensation or freezing.

Note (3) The control signals include On/Off Control and External PWM Control.

Test

Condition

Min. Type Max. Unit

RMS

- 6 V

Note

3D Mode

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PRODUCT SPECIFICATION

3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE

(Ta = 25 ± 2 ºC)
Note (1) The module should be always operated within the above ranges.
Note (2) Measurement condition:

Value

Parameter Symbol

Min. Typ. Max.

Power Supply Voltage VCC 10.8 12 13.2 V (1)

Unit Note

Rush Current I

White Pattern

Power Consumption

Power Supply Current

Differential Input High
Threshold Voltage

Differential Input Low

LVDS
interface

CMIS

Threshold Voltage
Common Input Voltage VCM 1.0 1.2 1.4 V
Differential input voltage

(single-end)
Terminating Resistor RT

Input High Threshold Voltage VIH 2.7

Horizontal Stripe
Black Pattern
White Pattern
Horizontal Stripe
Black Pattern

－ －

RUSH

－

－ －
－ －
－ －
－ －
－ －

V

LVTH

V

LVTL

|VID| 200

+100

－

－ －

－

3.2 A (2)

6.6 7.92

15.6 21.12

6.36 7.656

0.55 0.6

1.3 1.6

0.53 0.58

－ －

-100 mV

－

100

－

600 mV

－

3.3 V

W
W
W

(3)

A
A
A

mV

(4)

ohm

interface

Note (1) The module should be always operated within the above ranges.
Note (2) Measurement condition:

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Input Low Threshold Voltage VIL 0

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－

0.7 V

PRODUCT SPECIFICATION

GND

Vcc rising time is 470us

0.9Vcc

0.1Vcc

470us

Vcc

Note (3) The specified power consumption and power supply current is under the conditions at Vcc = 12 V, Ta =

25 ± 2 ºC, fv = 120 Hz, whereas a power dissipation check pattern below is displayed.

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PRODUCT SPECIFICATION

a. White Pattern

c. Horizontal Pattern

Active Area

b. Black Pattern

Active Area

Note (4) The LVDS input characteristics are as follows:

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3.2 BACKLIGHT UNIT

3.2.1 LED LIGHT BAR CHARACTERISTICS (Ta= 25± 2 ºC)

PRODUCT SPECIFICATION

Parameter Symbol

Unit Note

Min. Typ. Max.

Value

Total Current (16 String) If

I

L(2D)

- 1840 1952

- 115

122

mA
mA

One String Current

I

L(3D)

LED Forward Voltage Vf
One String Voltage VW
One String Voltage Variation

△VW

Life time -

- 400 424

5.5 6.15 7
44 - 56

- - 2

30,000 - -

mApeak 3D ENA=ON

VDC IL =115mA
VDC IL =115mA

V

Hrs (1)
Note (1) The lifetime is defined as the time which luminance of the LED decays to 50% compared to the initial
value, Operating condition: Continuous operating at Ta = 25±2 , I℃L =115mA.

3.2.2 CONVERTER CHARACTERISTICS (Ta= 25± 2 ºC)

Value

Parameter Symbol

Unit

Note

Min. Typ. Max.

(1), (2)

P

BL(2D)

-

87.3 96

W

IL = 115mA

Power Consumption

(1), (2)

P

BL(3D)

-

85 96

W

IL=400mA.

Converter Input Voltage VBL 22.8 24.0 25.2 VDC

－

I

BL(2D)

3.64 4

A

Non Dimming

Converter Input Current

－

I

BL(3D)

3.2 4

A

VBL=22.8V,(IL=typ.)

I

-

R(2D)

- 6.5

Apeak

(3), (6)

Input Inrush Current

VBL=22.8V,(IL=

I

- - 10 Apeak

Dimming Frequency
Minimum Duty Ratio

R(3D)

FB 170 180 190 Hz

DMIN 5 10 - %

360mA.)(3), (6)

(5)

(4), (5)

Note (1) The power supply capacity should be higher than the total converter power consumption PBL.

Since the pulse width modulation (PWM) mode was applied for backlight dimming, the driving
current changed as PWM duty on and off. The transient response of power supply should be
considered for the changing loading when converter dimming.

Note (2) The measurement condition of Max. value is based on 50" backlight unit under input voltage 24V,

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PRODUCT SPECIFICATION

average LED current 115 mA at 2D Mode (LED current 400mA

later.
Note (3) For input inrush current measure, the VBL rising time from 10% to 90% is about 30ms.
Note (4) 5% minimum duty ratio is only valid for electrical operation.
Note (5) FB and DMIN are available only at 2D Mode.
Note (6) Below diagram is only power supply design reference.

at 3D Mode) and lighting 1 hour

peak

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3.2.3 CONVERTER INTERFACE CHARACTERISTICS

PRODUCT SPECIFICATION

Parameter Symbol

ON

On/Off Control Voltage

OFF

External PWM Control
Voltage

External PWM Frequency

Error Signal ERR

VBL Rising Time Tr1
Control Signal Rising Time Tr

HI
LO

VBLON

VEPWM

F

EPWM

Condition

0

0

30

Value

－
－
－

－

－ －

Unit Note

5.0 V

0.8 V

5.25

0.8 V Duty off

100 ms

V Duty on

Abnormal: Open

Normal: GND

ms 10%-90%VBL

(5), (6)

collector

(4)

Test

Min. Typ. Max.

－
－

－
－

－ 95 － 200 Hz Normal mode

－ － － － －

－
－ － －

2.0

2.0

Control Signal Falling Time Tf
PWM Signal Rising Time TPWMR
PWM Signal Falling Time TPWMF
Input Impedance Rin
PWM Delay Time TPWM

Ton

BLON Delay Time

T

on1

BLON Off Time Toff

Note (1) The Dimming signal should be valid before backlight turns on by BLON signal. It is inhibited to

change the external PWM signal during backlight turn on period.

Note (2) The power sequence and control signal timing are shown in the Fig.1. For a certain reason, the

converter has a possibility to be damaged with wrong power sequence and control signal timing.

Note (3) While system is turned ON or OFF, the power sequences must follow as below descriptions:

Turn ON sequence: VBL → PWM signal → BLON

Turn OFF sequence: BLOFF → PWM signal → VBL

－ － －
－ － －
－ － －
－
－
－
－
－

1
100
300
300
300

－ －
－ －
－ －
－ －
－ －

100 ms

50 us
50 us

MΩ

ms (6)
ms
ms
ms

EPWM, BLON

(6)

Note (4) When converter protective function is triggered, ERR will output open collector status.

Note (5) The EPWM interface that inserts a pull up resistor to 5V in Max Duty (100%), please refers to Fig.2.
Note (6) EPWM is available only at 2D Mode.
Note(7) [Recommend] EPWM duty ratio is set at 100%(Max. Brightness) in 3D Mode.

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PRODUCT SPECIFICATION

V

V

BL

V

BLON

EPWM

Tr1

BL

0.9V

0.1V

BL

2.0V

0.8V

Ton

Ton1

0

0

Toff

Backlight on duration

Tr

Tf

Ext. Dimming Function

PWMR

T

2.0V

0

0.8V

T

PWM

T

PWMF

Floating

V

W

External

PWM

Period

External

PWM Duty

100%

Fig. 1

5V +/- 5%

Converter
Side

EPWM

10kΩ

Ω

ΩΩ

>1MΩ

Ω

ΩΩ

10kΩ

Ω

ΩΩ

Dimming

Circuit

Fig. 2

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4. BLOCK DIAGRAM OF INTERFACE

DATA DRIVER

S

CAN DRIVER

GND

SCN_EN

SCL

4.1 TFT LCD MODULE

PRODUCT SPECIFICATION

INPUT CONNECTOR

CH3_0(+/-)

CH3_1(+/-)

CH3_2(+/-)

CH3_3(+/-)

CH3_4(+/-)

CH3_CLK(+/-)

CH4_0(+/-)

CH4_1(+/-)

CH4_2(+/-)

CH4_3(+/-)

CH4_4(+/-)

CH4_CLK(+/-)

CH1_0(+/-)
CH1_1(+/-)
CH1_2(+/-)
CH1_3(+/-)
CH1_4(+/-)
CH1_CLK(+/-)

CH2_0(+/-)
CH2_1(+/-)
CH2_2(+/-)
CH2_3(+/-)
CH2_4(+/-)
CH2_CLK(+/-)

SDA

SELLVDS

2D/3D

LR

LD_EN

L/R_O

VCC

CNF2: WF23-400-413C

or equivalent

TIMING

CONTROLLER

TFT LCD PANEL

(1920x3x1080)

CNF1:WF23-400-513C-FCN,

INPUT CONNECTOR

or equivalent

DC/DC CONVERTER

& REFERENCE

VOLTAGE

L/R_O

OUTPUT CONNECTOR

CN6:LM123S-010-H-TF1-3

or equivalent

CONVERTER

VBL

GND

ERR

E_PWM

BLON

CONNECTOR

CN1:

S14B-PH-SM4-TB

(JST) or

CI0114M1HR0-LA

(CvilLux)

CN2,3,4,5: 196388-12041-3 (P-TWO)

or equivalent

LED

BACKLIGHT

UNIT

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PRODUCT SPECIFICATION

Input signal for Left Right eye frame synchronous(Frame sequence

5 .INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD MODULE

CNF1 Connector Pin Assignment: (WF23-400-513C-FCN) or equivalent)

Pin Name Description Note
1 N.C. No Connection (1)

2 SCL I2C Serial Clock (for 3D format selection function)
3 SDA I2C Serial Data (for 3D format selection function)
4 N.C. No Connection (1)
5 L/R_O Output signal for Left Right Glasses control (10)
6 N.C. No Connection (1)
7 SELLVDS Input signal for LVDS Data Format Selection (2)(7)
8 N.C. No Connection

(11)

9 N.C. No Connection
10 N.C. No Connection
11 GND Ground
12
13
14
15
16
17
18 GND Ground
19
20
21 GND Ground
22

CH1[0]- First pixel Negative LVDS differential data input. Pair 0

CH1[0]+ First pixel Positive LVDS differential data input. Pair 0

CH1[1]- First pixel Negative LVDS differential data input. Pair 1

CH1[1]+ First pixel Positive LVDS differential data input. Pair 1

CH1[2]- First pixel Negative LVDS differential data input. Pair 2

CH1[2]+ First pixel Positive LVDS differential data input. Pair 2

CH1CLK- First pixel Negative LVDS differential clock input.

CH1CLK+ First pixel Positive LVDS differential clock input.

CH1[3]- First pixel Negative LVDS differential data input. Pair 3

(1)

(9)

(9)

23
24
25
26 2D/3D Input signal for 2D/3D Mode Selection (3)(6)(8)

27 L/R

28

Version 2.0 17 Date 31 Jan.2012

CH1[3]+ First pixel Positive LVDS differential data input. Pair 3

CH1[4]- First pixel Negative LVDS differential data input. Pair 4

CH1[4]+ First pixel Positive LVDS differential data input. Pair 4

mode)

CH2[0]- Second pixel Negative LVDS differential data input. Pair 0

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(9)

(4)(8)

(9)

PRODUCT SPECIFICATION

29
30
31
32
33
34 GND Ground
35
36
37 GND Ground
38
39
40
41
42 LD_EN Input signal for Local Dimming Enable (5)(8)

CH2[0]+ Second pixel Positive LVDS differential data input. Pair 0

CH2[1]- Second pixel Negative LVDS differential data input. Pair 1

CH2[1]+ Second pixel Positive LVDS differential data input. Pair 1

CH2[2]- Second pixel Negative LVDS differential data input. Pair 2

CH2[2]+ Second pixel Positive LVDS differential data input. Pair 2

CH2CLK- Second pixel Negative LVDS differential clock input.

(9)

CH2CLK+ Second pixel Positive LVDS differential clock input.

CH2[3]- Second pixel Negative LVDS differential data input. Pair 3

CH2[3]+ Second pixel Positive LVDS differential data input. Pair 3

(9)

CH2[4]- Second pixel Negative LVDS differential data input. Pair 4

CH2[4]+ Second pixel Positive LVDS differential data input. Pair 4

43 SCN_EN Input signal for Scanning Enable (6)(8)
44 GND Ground
45 GND Ground
46 GND Ground
47 N.C. No Connection
48 VCC +12V power supply
49 VCC +12V power supply
50 VCC +12V power supply
51 VCC +12V power supply

CNF2 Connector Pin Assignment (CNF2 : WF23-400-413C,FCN)

Pin Name Description Note

1

N.C. No Connection

2

N.C. No Connection

3

N.C. No Connection

4

N.C. No Connection

(1)

5

N.C. No Connection

6

N.C. No Connection

7

N.C. No Connection

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(1)

8

N.C. No Connection

PRODUCT SPECIFICATION

9

GND Ground

10

CH3[0]- Third pixel Negative LVDS differential data input. Pair 0

11

CH3[0]+ Third pixel Positive LVDS differential data input. Pair 0

12

CH3[1]- Third pixel Negative LVDS differential data input. Pair 1

13

CH3[1]+ Third pixel Positive LVDS differential data input. Pair 1

14

CH3[2]- Third pixel Negative LVDS differential data input. Pair 2

15

CH3[2]+ Third pixel Positive LVDS differential data input. Pair 2

16

GND Ground

17

CH3CLK- Third pixel Negative LVDS differential clock input.

18

CH3CLK+ Third pixel Positive LVDS differential clock input.

19

GND Ground

20

CH3[3]- Third pixel Negative LVDS differential data input. Pair 3

21

CH3[3]+ Third pixel Positive LVDS differential data input. Pair 3

22

CH3[4]- Third pixel Negative LVDS differential data input. Pair 4

(9)

(9)

(9)

23

CH3[4]+ Third pixel Positive LVDS differential data input. Pair 4

24

GND Ground

25

GND Ground

26

CH4[0]- Fourth pixel Negative LVDS differential data input. Pair 0

27

CH4[0]+ Fourth pixel Positive LVDS differential data input. Pair 0

28

CH4[1]- Fourth pixel Negative LVDS differential data input. Pair 1

29

CH4[1]+ Fourth pixel Positive LVDS differential data input. Pair 1

30

CH4[2]- Fourth pixel Negative LVDS differential data input. Pair 2

31

CH4[2]+ Fourth pixel Positive LVDS differential data input. Pair 2

32

GND Ground

33

CH4CLK- Fourth pixel Negative LVDS differential clock input.

34

CH4CLK+ Fourth pixel Positive LVDS differential clock input.

35

GND Ground

36

CH4[3]- Fourth pixel Negative LVDS differential data input. Pair 3

37

CH4[3]+ Fourth pixel Positive LVDS differential data input. Pair 3

(9)

(9)

(9)

38

CH4[4]- Fourth pixel Negative LVDS differential data input. Pair 4

(9)

39

CH4[4]+ Fourth pixel Positive LVDS differential data input. Pair 4

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PRODUCT SPECIFICATION

SELLVDS

Note

L JEIDA Format

H or

O

pen VESA Format

2D/3D

Note

L

or Open 2D Mode

H 3D Mode

L/R Note

L Right synchronous signal

H Left synchronous signal

40

GND Ground

41

GND Ground

CN6 Connector Pin Assignment (LM123S-010-H-TF1-3 (UNE) or equivalent)

1 N.C. No Connection
2 N.C. No Connection
3 N.C. No Connection
4 GND Ground
5 N.C. No Connection
6 L/R_O Output signal for Left Right Glasses control
7 N.C. No Connection
8 N.C. No Connection
9 N.C. No Connection

10 N.C. No Connection

(1)

(1)

(10)

(1)

Note (1) Reserved for internal use. Please leave it open.
Note (2) LVDS format selection.

L= Connect to GND, H=Connect to +3.3V or Open

Note (3) 2D/3D mode selection.

L= Connect to GND or Open, H=Connect to +3.3V

Note (4) Input signal for Left Right eye frame synchronous
VIL=0~0.8 V, VIH=2.0~3.3 V

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PRODUCT SPECIFICATION

L Local Dimming Disable

H Local Dimming Enable

Note (5) Local dimming enable selection.

L= Connect to GND, H=Connect to +3.3V

LD_EN Note

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PRODUCT SPECIFICATION

L or Open Scanning Disable

H Scanning Enable

TCON

R2

R1

Setti

ng

LCM side

System side

Vcc

R3

Note (6) Scanning enable selection.

L= Connect to GND or Open, H=Connect to +3.3V

SCN_EN Note

Note (7) SELLVDS LD_EN signal pin connected to the LCM side has the following diagram.

R1 in the system side should be less than 1K Ohm. (R1 < 1K Ohm)

Selector (pin7)

System side
R1 < 1K

Note (8) 2D/3D, L/R and SCN_EN signal pin connected to the LCM side has the following diagram.

R1 in the system side should be less than 1K Ohm. (R1 < 1K Ohm)

Note (9) LVDS 4-port Data Mapping

Version 2.0 22 Date 31 Jan.2012

Port Channel of LVDS

1st Port First Pixel 1, 5, 9, ……1913, 1917

2nd Port Second Pixel

3rd Port Third Pixel 3, 7, 11, ….1915, 1919

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

Data Stream

2, 6, 10, ….1914, 1918

4th Port Fourth Pixel 4, 8, 12, ….1916, 1920

L R

ight glass turn on

H Left glass turn on

Note (10) The definition of L/R_O signal as follows

L= 0V , H= +3.3V

L/R_O Note

Note (11) Please reference Appendix A

PRODUCT SPECIFICATION

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PRODUCT SPECIFICATION

5.2 BACKLIGHT UNIT

The pin configuration for the housing and leader wire is shown in the table below.

CN2,3,4,5: 196388-12041-3 (P-TWO) or equivalent

Pin № Symbol Feature

1 VLED
2 VLED
3 VLED
4 VLED
5 NC
6 NC
7 NC
8 NC
9 N1

10 N2

11 N3

12 N4

Note (1)The backlight interface housing for high voltage side is a model 51281-1094, manufactured by Molex or

equivalent. The mating header on converter part number is 51281-1094

5.3 DRIVING BOARD UNIT

CN1(Header): S14B-PH-SM4-TB (JST) or CI0114M1HR0-LA (CvilLux)

Positive of LED String

NC

Negative of LED String

Notice

Pin No. Symbol Feature

1
2
3
4
5
6
7
8
9

10
11 ERR

12 BLON BL ON/OFF

13 NC NC

14 E_PWM

VBL +24V

GND GND

Normal (GND)

Abnormal (Open

External PWM

Control

1. If Pin14 is open, E_PWM is 100% duty.

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5.4 BLOCK DIAGRAM OF INTERFACE

PRODUCT SPECIFICATION

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PRODUCT SPECIFICATION

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PRODUCT SPECIFICATION

AR0~AR9 First Pixel R Data BR0~BR9 Second Pixel R Data

AG0~AG9 First Pixel G Data BG0~BG9 Second Pixel G Data

AB0~AB9 First Pixel B Data BB0~BB9 Second Pixel B Data

DE Data enable signal

DCLK Data clock signal

The third and fourth pixel are followed the same rules.

CR0~CR9 Third Pixel R data DR0~DR9 Fourth Pixel R data

CG0~CG9 Third Pixel G data DG0~DG9 Fourth Pixel G data

CB0~CB9 Third Pixel B data DB0~OB9 Fourth Pixel B data

Note (1) A ~ D channel are first, second, third and fourth pixel respectively.

Note (2) The system must have the transmitter to drive the module.

Note (3) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is

used differentially.

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5.5 LVDS INTERFACE

JEIDA Format : SELLVDS = L

VESA Format : SELLVDS = H or Open

VESA Format

PRODUCT SPECIFICATION

Current Cycle

AR 0P

AR 0N

AR 1P

AR 1N

AR 2P

AR 2N

AR 3P

AR 3N

AR 4P

AR 4N

JEIDA Format

AR 0P

AR 0N

AR 1P

AR 1N

AR0

AG1

AB2

AR6

AR4

AG5

AG0 AR5

AB1

DE VS HS AB5 AB4 AB3 AB2

REV AB7 AB6 AG7 AG6 AR7 AR6

REV AB9 AB8 AG9 AG8 AR9 AR8AR8 REV

AG4 AR7

AB5

AB0 AG5 AG4 AG3 AG2 AG1

AB4 AG7 AG6 AG5AG9 AG8

AR4 AR3 AR2 AR1 AR0

AR6 AR5 AR4AR9 AR8

AG0

AB1

DE

REV

AG4

AB5

AR 2P

AR 2N

AR 3P

AR 3N

AR 4P

AR 4N

AR0~AR9 First Pixel R Data

AG0~AG9 First Pixel G Data

AB0~AB9 First Pixel B Data

Version 2.0 28 Date 31 Jan.2012

AB6

AR2

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

DE VS HS AB7 AB6AB9 AB8

REV AB3 AB2 AG3 AG2 AR3 AR2

REV AB1 AB0 AG1 AG0 AR1 AR0AR0 REV

DE Data enable signal

(9; MSB, 0; LSB)

DCLK Data clock signal

(9; MSB, 0; LSB)

RSVD Reserved

(9; MSB, 0; LSB)

DE

REV

PRODUCT SPECIFICATION

5.6 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the color. The higher
the binary input, the brighter the color. The table below provides the assignment of the color versus data input.

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Data Signal

Basic
Colors

Gray
Scale
Of
Red

Color

Black
Red
Green
Blue
Cyan
Magenta
Yellow
White
Red (0) / Dark
Red (1)
Red (2)

:

:
Red (253)
Red (254)

Red Green Blue

R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

1

1

1

1

1

1

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0
0
0
1
1
1
0
1
0
0
0

:

:
0
0

Red (255)
Green (0) / Dark
Green (1)
Green (2)

Gray

:

Scale

:

Of

Green (253)

Green

Green (254)
Green (255)
Blue (0) / Dark
Blue (1)
Blue (2)

Gray

:

Scale

:

Of

Blue (253)

Blue

Blue (254)
Blue (255)

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1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

Note (1) 0: Low Level Voltage, 1: High Level Voltage

PRODUCT SPECIFICATION

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PRODUCT SPECIFICATION

6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS (Ta = 25 ± 2 ºC)

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol

Frequency

Input cycle to

LVDS

cycle jitter

Receiver

Spread spectrum

Clock

modulation range
Spread spectrum
modulation frequency

LVDS

Setup Time Tlvsu

Receiver

Data

Hold Time Tlvhd

6.1.1 Timing spec for Frame Rate=100 Hz

Signal Item Symbol

2D mode F

Frame rate

3D mode F

Min. Typ. Max. Unit Note

F

clkin

60 74.25 80 MHz

(=1/TC)

T

- - 350 ps (3)

rcl

F

clkin_mod

F

F

SSM

-2%

clkin

- - 200 KHz

- F

clkin

+2%

MHz

600 - - ps

600 - - ps

Min. Typ. Max. Unit Note

94 100 106

r5

100 100 100

r5

Hz
Hz (7)

(4)

(5)

Vertical

Active

Display

Term

Horizontal

Active

Display

Term

2D Mode

3D Mdoe

2D Mode

3D Mdoe

Total Tv 1090 1350 1395 Th

Display Tvd 1080 1080 1080 Th
Blank Tvb 10 270 315 Th
Total Tv 1350 Th
Display Tvd 1080 Th
Blank Tvb 270 Th

Total Th 520 550 670 Tc

Display Thd 480 480 480 Tc
Blank Thb 40 70 190 Tc

Total Th 520 520 670 Tc

Display Thd 480 480 480 Tc

Tv=Tvd+Tv

b

－
－

(6), (8)

Th=Thd+T

hb

－
－

Th=Thd+T

hb

－

Blank Thb 40 70 190 Tc

－

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6.1.2 Timing spec for Frame Rate=120 Hz

PRODUCT SPECIFICATION

Signal Item Symbol

2D mode Fr6 114 120 126 Hz

Frame rate

3D mode Fr6 120 120 120 Hz (7)

Total Tv 1090 1125 1395 Th Tv=Tvd+Tvb

Vertical

Active

Display

Term

2D Mode

3D Mdoe

Display Tvd 1080 1080 1080 Th
Blank Tvb 10 45 315 Th
Total Tv 1125 Th
Display Tvd 1080 Th
Blank Tvb 45 Th
Total Th 520 550 670 Tc Th=Thd+Thb

Horizontal

Active

Display

Term

2D Mode

3D Mdoe

Display Thd 480 480 480 Tc
Blank Thb 40 70 190 Tc
Total Th 520 550 670 Tc Th=Thd+Thb
Display Thd 480 480 480 Tc

Min. Typ. Max. Unit Note

－
－

(6), (8)

－
－

－

Blank Thb 40 70 190 Tc

Note (1) Since the module is operated in DE only mode, Hsync and Vsync input signals should be set to low logic

level. Otherwise, this module would operate abnormally.

Note (2) Please make sure the range of pixel clock has follow the below equation:

F

clkin(max)

F

r

5

Tv Th F╳ ╳ ≧

F≧

r

6

Tv Th╳ ╳

clkin(min)

－

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PRODUCT SPECIFICATION

Thb

Tc

INPUT SIGNAL TIMING DIAGRAM

DE

Th

DCLK

DE

DATA

Tvd

Tv

Tvb

Thd

Valid display data ( 480 clocks)

Note (3) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T1 – TI

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PRODUCT SPECIFICATION

14

14

14

14

14

14

14

Note (4) The SSCG (Spread spectrum clock generator) is defined as below figures.

Note (5) The LVDS timing diagram and setup/hold time is defined and showing as the following figures.

RXCLK+/-

RXn+/-

Tlvsu

Tlvhd

1T

LVDS RECEIVER INTERFACE TIMING DIAGRAM

Tc

3T

5T

7T

9T

11T

13T

Note (6) Please fix the Vertical timing (Vertical Total =1350 / Display =1080 / Blank = 270) in 100Hz 3D mode

and Vertical timing (Vertical Total =1125 / Display =1080 / Blank = 45) in 120Hz 3D mode

Note (7) In 3D mode, the set up Fr5 and Fr6 in Typ. ±3 Hz .In order to ensure that the electric function performance

to avoid no display symptom.(Except picture quality symptom.)

Note (8) In 3D mode, the set up Tv and Tvb in Typ. ±30.In order to ensure that the electric function performance to

avoid no display symptom.(Except picture quality symptom.)

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PRODUCT SPECIFICATION

P

100ms

T

Option

Signals

6.2 POWER ON/OFF SEQUENCE

(Ta = 25 ± 2 ºC)

6.2.1 POWER ON/OFF SEQUENCE

To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram
below.

0.5≦≦≦≦T
0≦≦≦≦T

500ms ≦≦≦≦T

0≦≦≦≦T

1

≦

≦10ms

≦≦

2

≦

≦50ms

≦≦

3

≦

≦50ms

≦≦

0V

4

0.1VCC

T3 T1

T2

0.1Vcc

T4

LVDS Signals

0V

Power On

0≦≦≦≦T
0≦≦≦≦T

7

≦

≦T2

≦≦

8

≦

≦T3

≦≦

T7

T8

(SELLVDS,2D/3D

L/R,LD_EN, SCN_EN)

Backlight (Recommended)

500ms≦≦≦≦T5

≦≦≦≦

6

50%

T5

50%

T6

Power ON/OFF Sequence

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PRODUCT SPECIFICATION

2D/3D

Scalar Black Pattern

Scalar send

6.2.2 2D/3D MODE CHANGE SIGNAL SEQUENCE WITHOUT VCC TURN OFF AND TURN ON

VCC

0V

0.9VCC

0.1VCC

0.5≦≦≦≦T
0≦≦≦≦T

1

≦

≦10ms

≦≦

2

≦

≦50ms

≦≦

T1

T2

LVDS Signals

0V

Power On

Black Pattern

0≦≦≦≦T

7

≦

≦T2

0≦≦≦≦T

≦≦

10

≦

≦10m

≦≦

T7

T10

0≦≦≦≦T

10≦≦≦≦T

Insertion

9

≦

≦10ms

≦≦

12

≦

≦20ms

≦≦

T9

T12

Backlight ON/OFF

500ms≦≦≦≦T

500ms≦≦≦≦T11

5

T5

T11

Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.
Note (2) Apply the LED voltage within the LCD operation range. When the backlight turns on before the LCD

operation or the LCD turns off before the backlight turns off, the display may momentarily become
abnormal screen.

Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance. If

T2<0,that maybe cause electrical overstress failure.
Note (4) T4 should be measured after the module has been fully discharged between power off and on period.
Note (5) Interface signal shall not be kept at high impedance when the power is on.
Note (6) When 2D/3D mode is changed, TCON will insert black pattern internally. During black insertion, TCON

would load required optical table and TCON parameter setting. The black insertion time should be longer

than 650ms because TCON must recognize 2D or 3D format and set the correct parameter.

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PRODUCT SPECIFICATION

7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC 12V V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
LED Current IL 115 mA

The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature change during
measuring in a windless room.

Local Dimming Function should be Disable before testing to get the steady optical characteristics (According to

5.1 CNF1 Connector Pin Assignment, Pin no. “ 42”)

25±2

50±10

o

C

%RH

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PRODUCT SPECIFICATION

Center Luminance of

7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should be

measured under the test conditions described in 7.1 and stable environment shown in 7.1.

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR

3500 5000

Response Time Gray to gray

320 400

White
White Variation

2D

L

C

3D

δW

2D

Cross Talk CT

3D-W

3D-D

θ

=0°, θY =0°

Red

Rx
Ry

x

Viewing angle at

normal direction

Gx

Green

Gy

Typ.-

Bx

Color

Blue

0.03

By

Chromaticity

Wx

White

Wy

- - Note (2)

6.5 13

- cd/m

85 - cd/m

ms Note (3)

2

Note (4)

2

Note (8)

1.3 - Note (6)

- - 4 % Note (5)

- 4 - % Note (8)

- 12 - % Note (8)

0.644

0.330

0.296

0.595

0.148

0.054

0.280

0.290

Typ.+

0.03

-

-

-

-

-

-

-

-

Correlated color temperature

9800

K

Color

C.G.

-

72

- % NTSC

Gamut

Viewing
Angle

Horizontal

Vertical

θ

+

x

θ

-

x

80 88
80 88

CR≥20

θ

+

Y

θ

-

Y

80 88
80 88

-

­Deg.

(1)

-

-

Transmission direction of
the up polarizer

up

- - 90

Deg.

-

(7)

Φ

Version 2.0 38 Date 31 Jan.2012

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Note (1) Definition of Viewing Angle (θx, θy):

T

ime

Viewing angles are measured by Autronic Conoscope Cono-80.

PRODUCT SPECIFICATION

θ

X-

= 90º

x-

6 o’clock

θ

y-

= 90º

y-

Note (2) Definition of Contrast Ratio (CR) :

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) =

Normal

θx = θy = 0º

θy- θ

y

θx−

+

θx+

y+

12 o’clock direction

θ

y+

= 90º

x+

θ

X+

= 90º

L1023 of Luminance Surface

L0 of Luminance Surface

L1023: Luminance of gray level 1023
L 0: Luminance of gray level 0
CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (6).

Note (3) Definition of Gray-to-Gray Switching Time:

100%

90%

Optical

Response

10%

0%

Gray to gray

switching time

Gray to gray

switching time

The driving signal means the signal of gray level 0, 124, 252, 380, 508, 636, 764, 892 and 1023.
Gray to gray average time means the average switching time of gray level 0, 124, 252, 380, 508, 636, 764, 892
and 1023 to each other.
Note (4) Definition of Luminance of White (L

):

C

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Measure the luminance of gray level 1023 at center point.

Active Area

(D, W)

Active Area

(0, 0)

(D, W)

LC = L (5), where L (x) is corresponding to the luminance of the point X at the figure in Note (6).

Note (5) Definition of Cross Talk (CT):

CT = | YB – YA | / YA × 100 (%)
Where:

YA = Luminance of measured location without gray level 1023 pattern (cd/m2)
YB = Luminance of measured location with gray level 1023 pattern (cd/m2)

(0, 0)

PRODUCT SPECIFICATION

Y

A, L

(D/8,W/2)

Gray 512

Note (6) Definition of White Variation (δW):

Measure the luminance of gray level 1023 at 5 points

δW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

Y

(D/2,W/8)

A, U

Y

(D/2,7W/8)

A, D

Y

(7D/8,W/2)

A, R

Y

Horizontal Line

D

D/4 D/2 3D/4

(D/8,W/2)

B, L

(D/4,W/4)

Y

B, U

Gray 1023

Y

B, D

(D/2,W/8)

Y

B, R

(3D/4,3W/4)

(D/2,7W/8)

(7D/8,W/2)

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W

W/4

W/2

1 2

5

Vertical Line

3 4

Active Area

Note (7) This is a reference for designing the shutter glasses of 3D application.

Definition of the transmission direction of the up polarizer:

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X

: Test Point
X=1 to 5

PRODUCT SPECIFICATION

x-

Φ

6 o’clock

y-

The transmission axis of the front polarizer of the shutter glasses should be parallel to this panel

transmission direction to get a maximum 3D mode luminance.

12 o’clock direction
y+

up

Φ=0o, x+

o

o

o

0

0

0

o

o

o

90

90

Bottom

Bottom

Bottom

POL

POL

POL

Cell

Cell

Cell

Up

Up

Up
POL

POL

POL

LCD module

LCD module

LCD module

90

90

90

90

Front

Front

Front
POL

POL

POL

Cell

Cell

Cell

back

back

o

o

o

back
POL

POL

POL

o

o

o

90

90

90

Front

Front

Front

POL

POL

POL

Cell

Cell

Cell

back

back

back
POL

POL

POL

Shutter glasses

Shutter glasses

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PRODUCT SPECIFICATION

shutter glass

shutter glassshutter glass

shutter glass

Note(8) Definition of the 3D mode performance (measured under 3D mode, use CMI’ s shutter glass):

a. Test pattern

Left eye image and right eye image are displayed alternated

WW
Left eye image: W1023; Right eye image: W1023

WB
Left eye image: W1023; Right eye image: W0

BW
Left eye image: W0; Right eye image: W1023

BB
Left eye image: W0; Right eye image: W0

b. Measurement setup

Right eye

Right eye

Shutter glasses are well controlled under suitable timing, and measure the luminance of the center

point of the panel through the right eye glass. The transmittance of the glass should be larger than 40.0%
under 3D mode operation.

The luminance of the test pattern “WW”, denoted L(WW); the luminance of the test pattern ”WB”,

denoted L(WB); the luminance of the test pattern “BW”, denoted L(BW); the luminance of the test pattern
“BB”, denoted “L(BB)

Right eye Right eye

Version 2.0 42 Date 31 Jan.2012

c. Definition of the Center Luminance of White, Lc (3D) : L(WW)

d. Definition of the 3D mode white crosstalk, CT (3D-W) :

e. Definition of the 3D mode dark crosstalk, CT (3D-D) :

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)3(

WDCT

≡−

)3(

DDCT

≡−

−

−

BWLWWL

−

−

)()(

BBLWWL

)()(

)()(

BBLWWL

)()(

BBLWBL

PRODUCT SPECIFICATION

GEMN

V500HK1

-

LS5

Rev.

XX

V500HK1

-

LS5

Rev.

XX

RoHS

8. DEFINITION OF LABELS

8.1 CMI MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

Model Name: V500HK1-LS5
Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.
Serial ID: X X X X X X X Y M D L N N N N

Serial No.
Product Line

E 2 0 7 9 43

M A D E IN T A IW A N

MADE IN CHINA

LEOO(or CAPG or CANO)

Serial ID includes the information as below:
Manufactured Date:
Year : 2001=1, 2002=2, 2003=3, 2004=4…2010=0, 2011=1, 2012=2…
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1st to 31st, exclude I ,O, and U.
Revision Code : Cover all the change
Serial No. : Manufacturing sequence of product
Product Line : 1 → Line1, 2 → Line 2, …etc.

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Year, Month, Date
CMI Internal Use

CMI Internal Use

Revision

CMI Internal Use

9. Packaging

9.1 PACKING SPECIFICATIONS

(1) 4 LCD TV modules / 1 Box
(2) Box dimensions: 1235(L) X 258 (W) X 751 (H)
(3) Weight: approximately 59.8 Kg (4 modules per box)

9.2 PACKING METHOD

Figures 9-1 and 9-2 are the packing method

PRODUCT SPECIFICATION

Figure.9-1 packing method

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PRODUCT SPECIFICATION

Figure. 9-2 Packing method

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PRODUCT SPECIFICATION

10. PRECAUTIONS

10.1 ASSEMBLY AND HANDLING PRECAUTIONS

(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) It is recommended to assemble or to install a module into the user’s system in clean working areas. The

dust and oil may cause electrical short or worsen the polarizer.
(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and backlight.
(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the

damage and latch-up of the CMOS LSI chips.
(5) Do not plug in or pull out the I/F connector while the module is in operation.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and

easily scratched.
(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.
(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD

modules in the specified storage conditions.

(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the

response time will become slow, and the starting voltage of LED will be higher than that of room

temperature.

10.2 SAFETY PRECAUTIONS

(1) The startup voltage of a backlight is over 1000 Volts. It may cause an electrical shock while assembling

with the inverter. Do not disassemble the module or insert anything into the backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case

of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.

10.3 SAFETY STANDARDS

The LCD module should be certified with safety regulations as follows:

Regulatory Item

Information Technology equipment

UL UL60950-1:2006 or Ed.2:2007

cUL CAN/CSA C22.2 No.60950-1-03 or 60950-1-07

CB IEC60950-1:2005 / EN60950-1:2006+ A11:2009

Standard

UL UL60065 Ed.7:2007

Audio/Video Apparatus

If the module displays the same pattern for a long period of time, the phenomenon of image sticking may be occurred.

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cUL CAN/CSA C22.2 No.60065-03:2006 + A1:2006

IEC60065:2001+ A1:2005 / EN60065:2002 + A1:2006+

CB

A11:2008

11. MECHANICAL CHARACTERISTIC

PRODUCT SPECIFICATION

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PRODUCT SPECIFICATION

Appendix A

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PRODUCT SPECIFICATION

Appendix A Local Dimming demo function

A.1 I2C address and write command
Device address: 0xC2
Register address: 0x01
Command data: 0x00: Local Dimming demo mode OFF (Note 1)
0x01: Local Dimming demo mode ON (Demo in right half screen) (Note 2)

Note 1: Local Dimming demo OFF

START

Device Address Register Address

11000010

ACK

(0xC2)

00000001

(0x01)

ACK

Command Data

00000001

(0x01)

STOP

Note 2: Local Dimming demo in right/left mode

A.2 I2C timing

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PRODUCT SPECIFICATION

Symbol Parameter Min. Max.

t
t

t
t
t

Start setup time 250

SU-STA
HD-STA

SU-DAT

HD-DAT

SU-STO

Start hold time 250
Data setup time 80 - ns
Data hold time 0 - ns
Stop setup time 250

- ns

- ns

- ns

Unit

Time between Stop condition and

t

BUF

next Start condition

500

- ns

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