CHIMEI INNOLUX V500HJ1-LE1 Specification

Page 1
PRODUCT SPECIFICATION
Tentative Specification
Preliminary Specification
Approval Specification
MODEL NO.: V500HJ1
SUFFIX: LE1
Customer:
APPROVED BY SIGNATURE
Please return 1 copy for your confirmation with your signature and comments.
Approved By Checked By Prepared By
Chao-Chun
Chung
Version 1.3 1 Date 22 Mar. 2012
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Ken Wu WT Hsu
Page 2
PRODUCT SPECIFICATION
CONTENTS
1. GENERAL DESCRIPTION............................................................................................................................................5
1.1 OVERVIEW..........................................................................................................................................................5
1.2 FEATURES...........................................................................................................................................................5
1.3 APPLICATION......................................................................................................................................................5
1.4 GENERAL SPECIFICATI0NS..............................................................................................................................5
1.5 MECHANICAL SPECIFICATIONS.......................................................................................................................6
2. ABSOLUTE MAXIMUM RATINGS ................................................................................................................................7
2.1 ABSOLUTE RATINGS OF ENVIRONMENT........................................................................................................7
2.2 PACKAGE STORAGE..........................................................................................................................................8
2.3 ELECTRICAL ABSOLUTE RATINGS..................................................................................................................8
3. ELECTRICAL CHARACTERISTICS.............................................................................................................................9
3.1 TFT LCD MODULE..............................................................................................................................................9
3.2 BACKLIGHT UNIT..............................................................................................................................................11
4. BLOCK DIAGRAM OF INTERFACE ...........................................................................................................................15
4.1 TFT LCD MODULE............................................................................................................................................15
5 .INPUT TERMINAL PIN ASSIGNMENT.......................................................................................................................16
5.1 TFT LCD MODULE............................................................................................................................................16
5.2 BACKLIGHT UNIT..............................................................................................................................................19
5.3 DRIVING BOARD UNIT.....................................................................................................................................19
5.4 BLOCK DIAGRAM OF INTERFACE..................................................................................................................20
5.5 LVDS INTERFACE.............................................................................................................................................21
5.6 COLOR DATA INPUT ASSIGNMENT................................................................................................................23
6. INTERFACE TIMING...................................................................................................................................................25
6.1 INPUT SIGNAL TIMING SPECIFICATIONS (Ta = 25 ± 2 ºC)............................................................................25
6.2 POWER ON/OFF SEQUENCE..........................................................................................................................28
7. OPTICAL CHARACTERISTICS..................................................................................................................................29
7.1 TEST CONDITIONS...........................................................................................................................................29
7.2 OPTICAL SPECIFICATIONS.............................................................................................................................30
8. DEFINITION OF LABELS............................................................................................................................................34
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PRODUCT SPECIFICATION
8.1 CMI MODULE LABEL........................................................................................................................................34
9. Packaging....................................................................................................................................................................35
9.1 PACKING SPECIFICATIONS.............................................................................................................................35
9.2 PACKING METHOD...........................................................................................................................................35
10. PRECAUTIONS.........................................................................................................................................................37
10.1 ASSEMBLY AND HANDLING PRECAUTIONS ...............................................................................................37
10.2 SAFETY PRECAUTIONS................................................................................................................................37
10.3 SAFETY STANDARDS ....................................................................................................................................37
11. MECHANICAL CHARACTERISTIC...........................................................................................................................38
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REVISION HISTORY
PRODUCT SPECIFICATION
Version
0.0 Jan.19,12
1.3 Mar. 20,12
Date
Page
(New)
all all Tentative Specification Ver 0.0 was first issued.
5 9
15
16-18
22 23 25 28 30 35
38~39
Section Description
1.4
3.1
4.1
5.1
5.5
5.6
6.1
6.2
7.2
9.1 11
Update GENERAL SPECIFICATI0NS Update TFT LCD MODULE
Update TFT LCD MODULE Update TFT LCD MODULE
Update LVDS INTERFACE Update COLOR DATA INPUT ASSIGNMENT Update INPUT SIGNAL TIMING SPECIFICATIONS UpdatePOWER ON/OFF SEQUENCE
Update OPTICAL SPECIFICATIONS Update PACKING SPECIFICATIONS Update MECHANICAL CHARACTERISTIC
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PRODUCT SPECIFICATION
1. GENERAL DESCRIPTION
1.1 OVERVIEW
V500HJ1-LE1 is a 50” TFT Liquid Crystal Display module with LED Backlight unit and 2ch-LVDS interface. This module supports 1920 x 1080 HDTV format and can display true 16.7M colors (8-bit /color). The driving board module for backlight is built-in.
1.2 FEATURES
- High brightness 350 nits
- High contrast ratio 5000:1
- Fast response time Gray to Gray typical 8ms
- High color saturation 72% NTSC
- Full HDTV (1920 x 1080 pixels) resolution, true HDTV format
- DE (Data Enable) only mode
- LVDS (Low Voltage Differential Signaling) interface
- Optimized response time for 60 Hz frame rate
- Ultra wide viewing angle: Super MVA technology
- RoHs compliance
1.3 APPLICATION
- Standard Living Room TVs.
- Public Display Application.
- Home Theater Application.
- MFM Application.
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note
Active Area Bezel Opening Area Driver Element Pixel Number Pixel Pitch(Sub Pixel)
Pixel Arrangement RGB vertical stripe - ­Display Colors 16.7M color ­Display Operation Mode Transmissive mode / Normally black - -
Surface Treatment Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and
back outlines.
Note (2) The spec of the surface treatment is temporarily for this phase. CMI reserves the rights to
1095.84(H) x (V) 616.41 (50” diagonal)
1102.84(H) x 623.41(V) a-si TFT active matrix 1920 x R.G.B. x 1080
0.1903(H) x 0.5708(V)
Anti-Glare coating (Haze 1%),Hardness 3H
mm mm
- -
pixel -
mm -
- (2)
(1)
change this feature.
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PRODUCT SPECIFICATION
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal (H) 1121.14 1122.64 1124.14 mm Module Size Vertical (V) 643.81 645.31 646.81 mm
Module Size Weight
Note (1)Please refer to the attached drawings for more information of front and back outline dimensions.
Note (2) Module Depth does not include connectors.
Depth (D) 14.1 15.1 16.1 mm To Rear
23 24 25 mm
Weight
13000
G Weight
To converter cover
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PRODUCT SPECIFICATION
60
40 0 20
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1) Operating Ambient Temperature TOP 0 50 ºC (1), (2) Shock (Non-Operating) S Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below. (a) 90 %RH Max. (Ta 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC). (c) No condensation. Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber. Thermal management should be considered in final product design to prevent the surface temperature of display area from being over 65 ºC. The range of operating temperature may degrade in case of improper
- 35 G (3), (5)
NOP
- 1.0 G (4), (5)
NOP
Min. Max.
Value
Unit Note
thermal management in final product design. Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z. Note (4) 10 ~ 200 Hz, 30 min, 1 time each X, Y, Z. Note (5)At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that
the module would not be twisted or bent by the fixture.
Relative Humidity (%RH)
100
90
80
60
Operating Range
40
20
10
Storage Range
-40
-20
Temperature (ºC)
80
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PRODUCT SPECIFICATION
2.2 PACKAGE STORAGE
When storing modules as spares for a long time, the following precaution is necessary. (a) Do not leave the module in high temperature, and high humidity for a long time, It is highly recommended to
store the module with temperature from 0 to 35 at normal humidity without condensation.
(b)
The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent light.
2.3 ELECTRICAL ABSOLUTE RATINGS
2.3.1 TFT LCD MODULE Item Symbol
Min. Max.
Power Supply Voltage VCC -0.3 13.5 V
Logic Input Voltage VIN -0.3 3.6 V
Value
Unit Note
(1)
2.3.2 BACKLIGHT CONVERTER UNIT
Item Symbol
Light Bar Voltage VW Ta = 25 - - 46.9 V
Converter Input Voltage VBL - 0 - 30 V
Control Signal Level - - -0.3
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
Note (2) No moisture condensation or freezing.
Note (3) The control signals include On/Off Control and External PWM Control.
Test
Condition
Min. Type Max. Unit
RMS
- 7 V
Note
(1)
(1), (3)
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PRODUCT SPECIFICATION
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
(Ta = 25 ± 2 ºC)
Value
Parameter Symbol
Min. Typ. Max.
Power Supply Voltage VCC 10.8 12 13.2 V (1)
Unit Note
Rush Current I
White Pattern
Power Consumption
Power Supply Current
Differential Input High Threshold Voltage
Differential Input Low
LVDS interface
CMIS
Threshold Voltage Common Input Voltage VCM 1.0 1.2 1.4 V Differential input voltage
(single-end) Terminating Resistor RT
Input High Threshold Voltage VIH 2.7
Horizontal Stripe Black Pattern White Pattern Horizontal Stripe Black Pattern
RUSH
- - - - - - - -
V
LVTH
V
LVTL
|VID| 200
+100
(2.34) A (2)
(5.76) (6.86) W
(9.6) (11.62) (5.64) (6.73) W (0.48) (0.52) A
(0.8) (0.88) A (0.47) (0.51) A
-100 mV
100
600 mV
3.3 V
W
mV
ohm
(3)
(4)
interface
Note (1) The module should be always operated within the above ranges. Note (2) Measurement condition:
Version 1.3 9 Date 22 Mar. 2012
Input Low Threshold Voltage VIL 0
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0.7 V
Page 10
PRODUCT SPECIFICATION
Vcc (LCD Module Input)
C3 1uF
(Low to High)
Control Signal
SW
+12V
R1
1k
R2
Q1 Si4485DY
Fuse
VR1
47k
Q2 2N7002
1k
C1
0.01uF
Vcc rising time is 470us
Vcc
0.9Vcc
GND
0.1Vcc
470us
Note (3) The specified power consumption and power supply current is under the conditions at Vcc = 12 V, Ta =
25 ± 2 ºC, fv = 60 Hz, whereas a power dissipation check pattern below is displayed.
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PRODUCT SPECIFICATION
a. White Pattern
c. Horizontal Pattern
Active Area
b. Black Pattern
Active Area
Note (4) The LVDS input characteristics are as follows:
3.2 BACKLIGHT UNIT
V V
LVTH
LVTL
3.2.1 LED LIGHT BARCHARACTERISTICS (Ta = 25 ± 2 ºC)
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PRODUCT SPECIFICATION
Parameter Symbol
Min. Typ. Max.
Total Current (8 String) If One String Current IL LED Forward Voltage Vf One String Voltage VW One String Voltage Variation
Life time ­Note (1) The lifetime is defined as the time which luminance of the LED decays to 50% compared to the initial value, Operating condition: Continuous operating at Ta = 25±2 , IL =115mA.
3.2.2 CONVERTER CHARACTERISTICS (Ta = 25 ± 2 ºC)
Parameter Symbol
VW
- 1240 1320
- 155
5.7 6.3 6.7
39.9 - 46.9
- - 1
30,000 - -
Min. Typ. Max.
Value
Value
165
Unit Note
mA mA VDC VDC
V
Hrs (1)
Unit
IL =155mA IL =155mA
Note
Power Consumption PBL
Converter Input Voltage VBL 22.8 24.0 25.2 VDC Converter Input Current IBL
Input Inrush Current
Dimming Frequency Minimum Duty Ratio
Note (1) The power supply capacity should be higher than the total converter power consumption PBL.
Since the pulse width modulation (PWM) mode was applied for backlight dimming, the driving current changed as PWM duty on and off. The transient response of power supply should be considered for the changing loading when converter dimming.
Note (2) The measurement condition of Max. value is based on 50" backlight unit under input voltage 24V,
average LED current 165mA and lighting 1 hour later.
IR -
FB 150 160 170 Hz
DMIN 5 10 - %
-
60.72 69.84
2.53
- 3.94
2.91
W
A
Apeak
(1), (2)
IL = 155mA
Non Dimming
VBL=22.8V,(IL=typ.)
(3)
(4)
Note (3) For input inrush current measure, the VBL rising time from 10% to 90% is about 30ms. Note (4) 5% minimum duty ratio is only valid for electrical operation.
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3.2.3 CONVERTER INTERFACE CHARACTERISTICS
PRODUCT SPECIFICATION
Parameter Symbol
ON
On/Off Control Voltage
OFF
External PWM Control Voltage
External PWM Frequency
Error Signal ERR
VBL Rising Time Tr1 Control Signal Rising Time Tr
HI LO
VBLON
VEPWM
F
EPWM
Condition
0
0
30
Value
- - -
Unit Note
5.0 V
0.8 V
5.0 V Duty on
0.8 V Duty off
Abnormal: Open
collector
Normal: GND
ms 10%-90%VBL
100 ms
(4)
Test
Min. Typ. Max.
- -
- -
150 160 170 Hz Normal mode
- -
2.0
2.0 (5)
Control Signal Falling Time Tf PWM Signal Rising Time TPWMR PWM Signal Falling Time TPWMF Input Impedance Rin PWM Delay Time TPWM
Ton
BLON Delay Time
T
on1
BLON Off Time Toff
Note (1) The Dimming signal should be valid before backlight turns on by BLON signal. It is inhibited to
change the external PWM signal during backlight turn on period.
Note (2) The power sequence and control signal timing are shown in the Fig.1. For a certain reason, the
converter has a possibility to be damaged with wrong power sequence and control signal timing.
Note (3) While system is turned ON or OFF, the power sequences must follow as below descriptions:
Turn ON sequence: VBL PWM signal BLON
Turn OFF sequence: BLOFF PWM signal VBL
- - - - - - - - - -
1 100 300 300 300
- - - - - - - -
100 ms
50 us 50 us
M
ms ms ms ms
EPWM, BLON
Note (4) When converter protective function is triggered, ERR will output open collector status. (Fig.2)
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PRODUCT SPECIFICATION
Note (5) The EPWM interface that inserts a pull up resistor to 5V in Max Duty (100%), please refers to Fig.3.
Tr1
BL
V
V
V
BLON
EPWM
0.1 V
0
BL
2.0V
0
0.8V
0
0.9 V
2.0V
0.8V
Ton
PWM
T
BL
Backlight on duration
Tr
Ext. Dimming Function
PWMR
T
T
Toff
Ton1
Tf
PWMF
Floating
V
W
External
PWM
Period
ERR PIN
External
PWM Duty
100%
Fig. 1
1Kohm
32
.
1
ERR Circuit
Fig. 2 Fig. 3
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4. BLOCK DIAGRAM OF INTERFACE
DATA DRIVER
SCAN DRIVER
187059
-
51221, (P
-
TWO)
VIN
VBL
4.1 TFT LCD MODULE
ORX0(+/-) ORX1(+/-) ORX2(+/-) ORX3(+/-) OCLK(+/-)
ERX0(+/-) ERX1(+/-) ERX2(+/-) ERX3(+/-) ECLK(+/-)
(B-F,WF23-400-513C,(FCN)) or equivalent
INPUT CONNECTOR
TIMING
CONTROLLER
PRODUCT SPECIFICATION
TFT LCD PANEL
(1920x3x1080)
SELLVDS
GND
GND
ERR
E_PWM
BLON
DC/DC CONVERTER
CONVERTER
CONNECTOR
CN1:
CI0114M1HR0-LA
(CvilLux) or
JH2-D4-143N (FCN)
& REFERENCE
VOLTAGE
LED
BACKLIGHT
UNIT
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PRODUCT SPECIFICATION
5 .INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
CNF1 Connector Pin Assignment: (WF23-400-513C-FCN) or 187059-51221,(P-TWO)
Pin Name Description Note 1 N.C. No Connection (1)
2 N.C. 3 N.C. 4 N.C. No Connection (1) 5 N.C. No Connection (1) 6 N.C. No Connection (1)
7
8 N.C. No Connection 9 N.C. No Connection 10 N.C. No Connection 11 GND Ground 12 ORX0- Odd pixel Negative LVDS differential data input. Channel 0 13 ORX0+ Odd pixel Positive LVDS differential data input. Channel 0 14 ORX1- Odd pixel Negative LVDS differential data input. Channel 1 15 ORX1+ Odd pixel Positive LVDS differential data input. Channel 1
SELLVDS LVDS data format Selection
No Connection
(1)
No Connection
(3)(4)
(1)
(2)
16 ORX2- Odd pixel Negative LVDS differential data input. Channel 2 17 ORX2+ Odd pixel Positive LVDS differential data input. Channel 2 18 GND Ground 19 OCLK- Odd pixel Negative LVDS differential clock input
(2)
20 OCLK+ Odd pixel Positive LVDS differential clock input 21 GND Ground 22 ORX3- Odd pixel Negative LVDS differential data input. Channel 3 23 ORX3+ Odd pixel Positive LVDS differential data input. Channel 3 24 N.C. No Connection
(1)
25 N.C. No Connection 26 N.C. No Connection 27 N.C. No Connection 28 ERX0- Even pixel Negative LVDS differential data input. Channel 0
(1) (1)
(2)
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PRODUCT SPECIFICATION
29 ERX0+ Even pixel Positive LVDS differential data input. Channel 0 30 ERX1- Even pixel Negative LVDS differential data input. Channel 1 31 ERX1+ Even pixel Positive LVDS differential data input. Channel 1 32 ERX2- Even pixel Negative LVDS differential data input. Channel 2 33 ERX2+ Even pixel Positive LVDS differential data input. Channel 2 34 GND Ground 35 ECLK- Even pixel Negative LVDS differential clock input.
(2)
36 ECLK+ Even pixel Positive LVDS differential clock input. 37 GND Ground 38 ERX3- Even pixel Negative LVDS differential data input. Channel 3 39 ERX3+ Even pixel Positive LVDS differential data input. Channel 3
(2)
40 N.C. No Connection 41 N.C. No Connection 42 GND Ground 43 GND Ground 44 GND Ground 45 GND Ground 46 GND Ground 47 N.C. No Connection 48 VCC +12V power supply 49 VCC +12V power supply 50 VCC +12V power supply 51 VCC +12V power supply
Note (1) Reserved for internal use. Please leave it open.
Note (2) LVDS 2-Port Data Mapping
Port CH of LVDS Data Stream
1st Port
2nd Port
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First pixel 1, 3, 5, ..........., 1917, 1919
Second pixel 2, 4, 6, ........., 1918, 1920
Page 18
PRODUCT SPECIFICATION
Note (3)
SELLVDS Mode
L JEIDA
H(default) VESA
L: Connect to GND, H: Connect to Open or +3.3V
Note (4) LVDS signal pin connected to the LCM side has the following diagram. R1 in the system side should be
less than 1K Ohm. (R1 < 1K Ohm)
Note (5) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and the
second pixel is even pixel.
Note (6) LVDS connector mating dimension range request is 0.93mm~1.0mm as follow:
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PRODUCT SPECIFICATION
Abnormal (Open
5.2 BACKLIGHT UNIT
The pin configuration for the housing and leader wire is shown in the table below.
CN2,3: 196388-12041-3 (P-TWO) B-F or FF01-431-123A (FCN)
Pin Symbol Feature
1 VLED 2 VLED 3 VLED 4 VLED 5 NC 6 NC 7 NC 8 NC 9 N4
10 N3
11 N2
12 N1
5.3 DRIVING BOARD UNIT
CN1(Header): CI0114M1HR0-LA (CvilLux) or JH2-D4-143N (FCN)
Positive of LED String
NC
Negative of LED String
Notice
Pin No. Symbol Feature
1 2 3 4 5
6 7 8 9
10
11
12 BLON BL ON/OFF
13 NC NC
14
VBL +24V
GND GND
ERR
E_PWM
Normal (GND)
External PWM
Control
Version 1.3 19 Date 22 Mar. 2012
1. If Pin14 is open, E_PWM is 100% duty.
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5.4 BLOCK DIAGRAM OF INTERFACE
ER0
-
ER7
EG0
-
EG7
EB0
-
EB7
DE
TxIN
PLL
PLL
ER0
-
ER7
EG0
-
EG7
EB0
-
EB7
DE
ERx0+
ERx0
-
ERx2
-
ECLK
-
RxOUT
51Ω
51Ω
5
51Ω
51Ω
51Ω
51Ω
51Ω
51Ω
PLL
PLL
ORx0+
ORx0
-
ORx2
-
OCLK
-
51Ω
51Ω
51Ω
51Ω
51Ω
51Ω
51Ω
51Ω
OR0
-
OR7
OG0
-
OG7
OB0
-
OB7
DCLK
OR0
-
OR7
OG0
-
OG7
OB0
-
OB7
PRODUCT SPECIFICATION
100pF
ERx1+ ERx1-
51
Ω
100pF
ERx2+
100pF
ERx3+ ERx3-
100pF
ECLK+
100pF
DCLK
Host Graphics
Timing Controller
Controller
100pF
ORx1+ ORx1-
51
Ω
100pF
ORx2+
100pF
ORx3+ ORx3-
100pF
OCLK+
100pF
LVDS Transmitter
LVDS Receiver
THC63LVDM83A
Version 1.3 20 Date 22 Mar. 2012
(LVDF83A)
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PRODUCT SPECIFICATION
ER0~ER7: Even pixel R data EG0~EG7: Even pixel G data EB0~EB7: Even pixel B data OR0~OR7: Odd pixel R data OG0~OG7: Odd pixel G data OB0~OB7: Odd pixel B data DE: Data enable signal DCLK: Data clock signal
Note (1) The system must have the transmitter to drive the module. Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is
used differentially.
5.5 LVDS INTERFACE
VESA Format : SELLVDS = H or Open
RXCLK±
RXCLK±
ORX0±
ORX0± ORX1±
ORX1±
ORX2±
ORX2±
ORX3±
ORX3±
ERX0±
ERX0± ERX1±
ERX1±
ERX2±
ERX2±
ERX3±
ERX3±
Current cycle
Current cycle
R5G0 R4 R3 R2 R1
R5G0 R4 R3 R2 R1
B0 G5B1
B0 G5B1
R5G0 R4 R3 R2 R1
R5G0 R4 R3 R2 R1
B0 G5B1
B0 G5B1
G3 G2G4
G3 G2G4
G3 G2G4
G3 G2G4
R0
R0
G1
G1
B2B4 B3B5VS HSDE
B2B4 B3B5VS HSDE
R6G6 R7G7B7 B6RSVD
R6G6 R7G7B7 B6RSVD
R0
R0
G1
G1
B2B4 B3B5VS HSDE
B2B4 B3B5VS HSDE
R6G6 R7G7B7 B6RSVD
R6G6 R7G7B7 B6RSVD
JEIDA Format : SELLVDS = L
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RXCLK±
RXCLK±
PRODUCT SPECIFICATION
Current cyc le
Current cyc le
ORX0±
ORX0± ORX1±
ORX1±
ORX2±
ORX2±
ORX3±
ORX3±
ERX0±
ERX0± ERX1±
ERX1± ERX2±
ERX2±
ERX3±
ERX3±
R0~R7: Pixel R Data (7; MSB, 0; LSB) G0~G7: Pixel G Data (7; MSB, 0; LSB) B0~B7: Pixel B Data (7; MSB, 0; LSB)
R7G2 R6 R5 R4 R3
R7G2 R6 R5 R4 R3
B2 G7B3
B2 G7B3
R7G2 R6 R5 R4 R3
R7G2 R6 R5 R4 R3
B2 G7B3
B2 G7B3
G5 G4G6
G5 G4G6
G5 G4G6
G5 G4G6
R2
R2
G3
G3
B4B6 B5B7VS HSDE
B4B6 B5B7VS HSDE
R0G0 R1G1B1 B0RSVD
R0G0 R1G1B1 B0RSVD
R2
R2
G3
G3
B4B6 B5B7VS HSDE
B4B6 B5B7VS HSDE
R0G0 R1G1B1 B0RSVD
R0G0 R1G1B1 B0RSVD
DE: Data enable signal DCLK : Data clock signal Note: (1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.
Version 1.3 22 Date 22 Mar. 2012
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Page 23
PRODUCT SPECIFICATION
5.6 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the color. The higher the binary input, the brighter the color. The table below provides the assignment of the color versus data input.
Data Signal
Basic Colors
Gray Scale Of Red
Color
Black Red Green Blue Cyan Magenta Yellow White Red (0) / Dark Red (1) Red (2)
:
: Red (253) Red (254)
Red Green Blue
R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0 0 1 1 1 0 1 0 0 0
:
: 0 0
Red (255) Green (0) / Dark Green (1) Green (2)
Gray
:
Scale
:
Of
Green (253)
Green
Green (254) Green (255) Blue (0) / Dark Blue (1)
Gray
Blue (2)
Scale
:
Of
:
Blue
Blue (253)
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1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
1
Page 24
Blue (254)
PRODUCT SPECIFICATION
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
Blue (255)
Note (1) 0: Low Level Voltage, 1: High Level Voltage
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Version 1.3 24 Date 22 Mar. 2012
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Page 25
PRODUCT SPECIFICATION
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS (Ta = 25 ± 2 ºC)
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol
F
Frequency
clkin
(=1/TC)
Input cycle to
LVDS
T
cycle jitter
Receiver
Spread spectrum
Clock
modulation range
clkin_mod
F
Spread spectrum
F
modulation frequency
SSM
LVDS
Receiver Skew
Receiver
Margin
T
RSKM
Data
Fr5 47 50 53 Hz
Vertical
Active
Frame Rate
Fr6 57 60 63 Hz
Total Tv 1115 1125 1320 Th
Display
Term
Display Tvd 1080 1080 1080 Th
Min. Typ. Max. Unit Note
60 74.25 80 MHz
rcl
F
-2%
clkin
200 ps (3)
F
clkin
+2%
MHz
(4)
-400
200 KHz
400 ps (5)
(6)
Tv=Tvd+Tvb
Horizontal
Active
Blank Tvb 35 45 240 Total Th 1050 1100 1150 Tc Display Thd 960 960 960 Tc
Th
Th=Thd+Thb
Display
Term
Blank Thb 90 140 190 Tc
Note (1) Please make sure the range of pixel clock has follow the below equation
F
clkin(max)
F
r
5
F
r
6
Tv Th
Tv Th F
clkin(min)
Note (2) This module is operated in DE only mode and please follow the input signal timing diagram below
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Page 26
PRODUCT SPECIFICATION
INPUT SIGNAL TIMING DIAGRAM
Note (3) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T1 – TI
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Page 27
PRODUCT SPECIFICATION
Note (4) The SSCG (Spread spectrum clock generator) is defined as below figures.
Note (5) LVDS receiver skew margin is defined and shown as below.
LVDS RECEIVER INTERFACE TIMING DIAGRAM
RXCLK+/-
RXn+/-
T
RSKM
Tc
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Page 28
PRODUCT SPECIFICATION
100ms
T6
6.2 POWER ON/OFF SEQUENCE
(Ta = 25 ± 2 ºC)
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram below.
0.9V
CC
0.5T110ms 0T250ms 0T350ms 500ms T4
0V
0.1V
CC
T3 T1
T2
0.1Vcc
T4
LVDS Signals
0V
Power On
VALID
Power Off
0T7T2
0T8 T3
T7
T8
Option Signals
(SELLVDS)
Backlight (Recommended)
500ms≦T5
50%
T5
50%
T6
Power ON/OFF Sequence
Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc. Note (2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD
operation or the LCD turns off before the backlight turns off, the display may momentarily become abnormal screen.
Note (3) In case of VCC is in off level, please keep the level of input signals on the low or high impedance.
If T2<0,that maybe cause electrical overstress failure. Note (4) T4 should be measured after the module has been fully discharged between power off and on period. Note (5) Interface signal shall not be kept at high impedance when the power is on.
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Page 29
PRODUCT SPECIFICATION
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit Ambient Temperature Ta Ambient Humidity Ha Supply Voltage VCC 12V V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" LED Current IL 155 mA
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature change during measuring in a windless room.
25±2
50±10
o
C
%RH
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Page 30
PRODUCT SPECIFICATION
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should be
measured under the test conditions described in 7.1 and stable environment shown in 7.1.
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR Response Time Gray to gray CenterLuminance of White
White Variation
L
C
δW
Cross Talk CT
Rx
Red
Ry Gx
Green
Gy
Color
Bx
Blue
Chromaticity
By
Wx
White
Wy
Correlated color temperature
Color Gamut
C.G.
θ
=0°, θY =0°
x
Viewing angle at
normal direction
(3500) (5000)
(8) (15)
TBD (350)
- - Note (2) ms Note (3)
- cd/m
2
Note (4)
(1.3) - Note (6)
- - (4) % Note (5)
Typ.-
0.03
-
(0.645) (0.329) (0.300) (0.600) (0.152) (0.050) (0.280) (0.290)
(9800)
72
Typ.+
0.03
- % NTSC
-
-
-
-
-
-
-
-
K
Viewing Angle
Horizontal
Vertical
θ
+
x
θ
-
x
θ
+
Y
θ
-
Y
CR20
80 88 80 88 80 88 80 88
-
-
Deg.
(1)
-
-
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Page 31
Note (1) Definition of Viewing Angle (θx, θy):
T
ime
Viewing angles are measured by Autronic Conoscope Cono-80.
PRODUCT SPECIFICATION
θ
X-
= 90º
x-
6 o’clock
θ
y-
= 90º
y-
Note (2) Definition of Contrast Ratio (CR) :
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) =
Normal
θx = θy = 0º
θy- θ
y+
θx
θx+
12 o’clock direction
y+
θ
y+
= 90º
x+
θ
X+
= 90º
L255 of Luminance Surface
L0 of Luminance Surface
L255: Luminance of gray level 255 L 0: Luminance of gray level 0 CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (6).
Note (3) Definition of Gray-to-Gray Switching Time:
100%
90%
Optical
Response
10%
0%
Gray to gray
switching time
Gray to gray
switching time
The driving signal means the signal of gray level 0, 124, 252, 380, 508, 636, 764, 892 and 1023. Gray to gray average time means the average switching time of gray level 0, 124, 252, 380, 508, 636, 764, 892 and 1023 to each other.
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Page 32
Note (4) Definition of Luminance of White (LC):
Active Area
(D, W)
Active Area
(0, 0)
(D, W)
Active Area
(D, W)
Active Area
(0, 0)
(D, W)
PRODUCT SPECIFICATION
Measure the luminance of gray level 1023 at center point.
LC = L (5), where L (x) is corresponding to the luminance of the point X at the figure in Note (6).
Note (5) Definition of Cross Talk (CT):
CT = | YB – YA | / YA × 100 (%) Where: YA = Luminance of measured location without gray level 0 pattern (cd/m2) YB = Luminance of measured location with gray level 0 pattern (cd/m2)
(0, 0)
Y
A, L
(D/8,W/2)
Gray 128
Y
(D/2,W/8)
A, U
Y
(D/2,7W/8)
A, D
Y
(7D/8,W/2)
A, R
Y
B, L
(D/4,W/4)
(D/8,W/2)
Gray 0
Y
(D/2,W/8)
B, U
(3D/4,3W/4)
Y
(D/2,7W/8)
B, D
Y
(7D/8,W/2)
B, R
YA = Luminance of measured location without gray level 255 pattern (cd/m2) YB = Luminance of measured location with gray level 255 pattern (cd/m2)
(0, 0)
Y
A, U
(D/2,W/8)
Y
(D/8,W/2)
A, L
Gray 128
Y
(D/2,7W/8)
A, D
Y
A, R
Note (6) Definition of White Variation (δW):
Measure the luminance of gray level 255 at 5 points
(7D/8,W/2)
Y
B, L
(D/4,W/4)
(D/8,W/2)
Y
Gray 255
Y
(D/2,W/8)
B, U
(3D/4,3W/4)
(D/2,7W/8)
B, D
Y
(7D/8,W/2)
B, R
Version 1.3 32 Date 22 Mar. 2012
δW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
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Page 33
PRODUCT SPECIFICATION
2
4
4
W/2
D/4
W/
Horizontal Line
1
D/2
D
3D/4
W
5
Vertical Line
3
X
: Test Point X=1 to 5
Active Area
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Page 34
PRODUCT SPECIFICATION
GEMN
V500H
J1-LE1
Rev.
XX
V500H
J1-LE1 Rev.
XX
RoHS
8. DEFINITION OF LABELS
8.1 CMI MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
Model Name: V500HJ1-LE1 Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc. Serial ID: X X X X X X X Y M D L N N N N
Serial No. Product Line
E 20 7 9 43
M A DE IN T A IW A N
MADE IN CHINA
LEOO(or CAPG or CANO)
Serial ID includes the information as below: Manufactured Date: Year : 2001=1, 2002=2, 2003=3, 2004=4…2010=0, 2011=1, 2012=2… Month: 1~9, A~C, for Jan. ~ Dec. Day: 1~9, A~Y, for 1st to 31st, exclude I ,O, and U. Revision Code : Cover all the change Serial No. : Manufacturing sequence of product Product Line : 1 Line1, 2 Line 2, …etc.
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Year, Month, Date CMI Internal Use
CMI Internal Use
Revision
CMI Internal Use
Page 35
9. Packaging
9.1 PACKING SPECIFICATIONS
(1) 4 LCD TV modules / 1 Box (2) Box dimensions: 1235(L) X 258 (W) X 751 (H) (3) Weight: approximately 53.6 Kg (4 modules per box)
9.2 PACKING METHOD
Figures 9-1 and 9-2 are the packing method
PRODUCT SPECIFICATION
Figure.9-1 packing method
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Page 36
PRODUCT SPECIFICATION
Figure. 9-2 Packing method
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Page 37
PRODUCT SPECIFICATION
10. PRECAUTIONS
10.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly. (2) It is recommended to assemble or to install a module into the user’s system in clean working areas. The
dust and oil may cause electrical short or worsen the polarizer. (3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and backlight. (4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMOS LSI chips. (5) Do not plug in or pull out the I/F connector while the module is in operation. (6) Do not disassemble the module. (7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched. (8) Moisture can easily penetrate into LCD module and may cause the damage during operation. (9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD
modules in the specified storage conditions.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of LED will be higher than that of room
temperature.
10.2 SAFETY PRECAUTIONS
(1) The startup voltage of a backlight is over 1000 Volts. It may cause an electrical shock while assembling
with the inverter. Do not disassemble the module or insert anything into the backlight unit. (2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case
of contact with hands, skin or clothes, it has to be washed away thoroughly with soap. (3) After the module’s end of life, it is not harmful in case of normal operation and storage.
10.3 SAFETY STANDARDS
The LCD module should be certified with safety regulations as follows:
Regulatory Item
Information Technology equipment
UL UL60950-1:2006 or Ed.2:2007
cUL CAN/CSA C22.2 No.60950-1-03 or 60950-1-07
CB IEC60950-1:2005 / EN60950-1:2006
Standard
UL UL60065 Ed.7:2007
Audio/Video Apparatus
If the module displays the same pattern for a long period of time, the phenomenon of image sticking may be occurred.
Version 1.3 37 Date 22 Mar. 2012
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cUL CAN/CSA C22.2 No.60065-03:2006 + A1:2006
CB IEC60065:2001+ A1:2005 / EN60065:2002 + A1:2006
Page 38
11. MECHANICAL CHARACTERISTIC
PRODUCT SPECIFICATION
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Page 39
PRODUCT SPECIFICATION
Version 1.3 39 Date 22 Mar. 2012
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