CHIMEI INNOLUX V500DK1-LS1 Specification

Page 1
PRODUCT SPECIFICATION
Customer:
Tentative Specification Preliminary Specification
Approval Specification
MODEL NO.: V500DK1
SUFFIX: LS1
APPROVED BY SIGNATURE
Name / Title Note
Please return 1 copy for your confirmation with your signature and comments.
Approved By Checked By Prepared By
Chao-Chun
Carlos Lee Archer Chang
Chung
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PRODUCT SPECIFICATION
CONTENTS
REVISION HISTORY.........................................................................................................................................................4
1. GENERAL DESCRIPTION............................................................................................................................................5
1.1 OVERVIEW..........................................................................................................................................................5
1.2 FEATURES ..........................................................................................................................................................5
1.3 APPLICATION......................................................................................................................................................5
1.4 GENERAL SPECIFICATI0NS..............................................................................................................................5
1.5 MECHANICAL SPECIFICATIONS.......................................................................................................................6
2. ABSOLUTE MAXIMUM RATINGS ................................................................................................................................7
2.1 ABSOLUTE RATINGS OF ENVIRONMENT........................................................................................................7
2.2 PACKAGE STORAGE..........................................................................................................................................8
2.3 ELECTRICAL ABSOLUTE RATINGS..................................................................................................................8
2.3.1 TFT LCD MODULE...........................................................................................................................................8
2.3.2 BACKLIGHT CONVERTER UNIT.....................................................................................................................8
3. ELECTRICAL CHARACTERISTICS .............................................................................................................................9
3.1 TFT LCD MODULE..............................................................................................................................................9
3.2 BACKLIGHT UNIT..............................................................................................................................................12
3.2.1 LED LIGHT BARCHARACTERISTICS (Ta = 25 ± 2 ºC).................................................................................12
3.2.2 CONVERTER CHARACTERISTICS (Ta = 25 ± 2 ºC)....................................................................................12
3.2.3 CONVERTER INTERFACE CHARACTERISTICS .........................................................................................14
4. BLOCK DIAGRAM OF INTERFACE...........................................................................................................................17
5 .INPUT TERMINAL PIN ASSIGNMENT.......................................................................................................................17
5.1 TFT LCD MODULE............................................................................................................................................18
5.2 BACKLIGHT UNIT..............................................................................................................................................25
5.3 DRIVING BOARD UNIT.....................................................................................................................................26
5.4 LVDS INTERFACE.............................................................................................................................................27
5.5 COLOR DATA INPUT ASSIGNMENT................................................................................................................28
6. INTERFACE TIMING...................................................................................................................................................29
6.1 INPUT SIGNAL TIMING SPECIFICATIONS (Ta = 25 ± 2 ºC)............................................................................29
6.2 POWER ON/OFF SEQUENCE..........................................................................................................................34
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PRODUCT SPECIFICATION
7. OPTICAL CHARACTERISTICS..................................................................................................................................36
7.1 TEST CONDITIONS...........................................................................................................................................36
7.2 OPTICAL SPECIFICATIONS.............................................................................................................................37
8. DEFINITION OF LABELS............................................................................................................................................42
8.1 CMI MODULE LABEL........................................................................................................................................42
9. Packaging....................................................................................................................................................................44
9.1 PACKING SPECIFICATIONS.............................................................................................................................44
9.2 PACKING METHOD...........................................................................................................................................44
10. PRECAUTIONS.........................................................................................................................................................46
10.1 ASSEMBLY AND HANDLING PRECAUTIONS...............................................................................................46
10.2 SAFETY PRECAUTIONS ................................................................................................................................46
10.3 SAFETY STANDARDS....................................................................................................................................46
11. MECHANICAL CHARACTERISTIC...........................................................................................................................48
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PRODUCT SPECIFICATION
Ver.
1.0
Sep.07,12
All All The preliminary specification was first issued.
REVISION HISTORY
Version
Ver.2.0
Date
Oct. 11,12
Dec. 21,12
Page
(New)
8
9 12 12 14 17 29 30 31
34 36
37-41
43
43-44
5
12-13
27 43
Section Description
2.3.2
3.1
3.2.1
3.2.2
3.2.3
4.1
6.1.1
6.1.2
6.1.3
6.1.4
6.2
7.1
7.2
9.1
9.2
1.1
1.4
3.2.2
5.4
8.2
Update BACKLIGHT CONVERTER UNIT Update TFT LCD MODULE Update LED LIGHT BARCHARACTERISTICS (Ta = 25 ± 2 ºC) Update Input Inrush Current I
R(3D)
Update CONVERTER INTERFACE CHARACTERISTICS Update TFT LCD MODULE Update Input Timing SPEC for FHD, Frame Rate = 100Hz Update Input Timing SPEC for FHD, Frame Rate = 120Hz Update Input Timing SPEC for QFHD, Frame Rate = 24Hz Update Input Timing SPEC for QFHD, Frame Rate = 30Hz Update POWER ON/OFF SEQUENCE Update TEST CONDITIONS Update OPTICAL SPECIFICATIONS Update PACKING SPECIFICATIONS Update PACKING METHOD
Update OVERVIEW GENERAL SPECIFICATI0NS CONVERTER CHARACTERISTICS (Ta = 25 ± 2 ºC) LVDS INTERFACE Add CARTON LABEL
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PRODUCT SPECIFICATION
1. GENERAL DESCRIPTION
1.1 OVERVIEW
V500DK1-LS1 is a 50” TFT Liquid Crystal Display module with LED Backlight unit and 4ch-LVDS interface. This module supports 3840 x 2160 QFHDTV format and can display true 1.07G colors (8-bit color). The driving board module for backlight is built-in.
1.2 FEATURES
- High brightness 400 nits
- High contrast ratio 5000:1
- Fast response time Gray to Gray typical 6.5ms
- High color saturation 72% NTSC
- Quad Full HDTV (3840 x 2160 pixels) resolution, true QFHDTV format
- LVDS (Low Voltage Differential Signaling) interface
- Optimized response time for 30Hz/120Hz frame rate
- Ultra wide viewing angle: Super MVA technology
- RoHs compliance
- T-con input frame rate: FHD 100/120Hz or QFHD 24/30Hz, output frame rate: QFHD 100/120Hz or QFHD 48Hz/60Hz
1.3 APPLICATION
- Standard Living Room TVs.
- Public Display Application.
- Home Theater Application.
- 3D Application.
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note
Active Area Bezel Opening Area Driver Element Pixel Number Pixel Pitch(Sub Pixel)
Pixel Arrangement RGB vertical stripe - ­Display Colors 1.07G colors (8-bit+FRC) color ­Display Operation Mode Transmissive mode / Normally black - -
Surface Treatment Rotation Function Achievable (3) Display Orientation
1095.84(H) x (V) 616.41 (50” diagonal)
1103.04(H) x 622.41(V) a-si TFT active matrix 3840 x R.G.B. x 2160
0.0955(H) x 0.2865(V)
Anti-Glare coating (Haze 1%),Hardness 3H
Signal input with “CMI” (3)
mm mm
- -
pixel -
mm -
- (2)
(1)
Note (1) Please refer to the attached drawings in chapter 11 for more information about the front and back outlines. Note (2) The spec. of the surface treatment is temporarily for this phase. CMI reserves the rights to change this feature. Note (3)
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PRODUCT SPECIFICATION
Tcon
Board
Back Side
Front Side
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal (H) 1114.04 1115.04 1116.04 mm Module Size Vertical (V) 637.41 638.41 639.41 mm
Module Size Weight
Note (1)Please refer to the attached drawings for more information of front and back outline dimensions.
Note (2) Module Depth does not include connectors.
Depth (D) 15.2 16.2 17.2 mm To Rear
Weight 11875
26.6 27.6 28.6 12500
CMI
mm To converter
cover
13125 G Weight
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PRODUCT SPECIFICATION
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1) Operating Ambient Temperature TOP 0 50 ºC (1), (2) Shock (Non-Operating) S Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below. (a) 90 %RH Max. (Ta 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC). (c) No condensation. Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber. Thermal management should be considered in final product design to prevent the surface temperature of display area from being over 65 ºC. The range of operating temperature may degrade in case of improper
- 35 G (3), (5)
NOP
- 1.0 G (4), (5)
NOP
Min. Max.
Value
Unit Note
thermal management in final product design. Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z. Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z. Note (5)At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that
the module would not be twisted or bent by the fixture.
Relative Humidity (%RH)
100
90
80
60
Operating Range
40
20
10
Storage Range
Temperature (ºC)
80 60 -20 40 0 20 -40
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PRODUCT SPECIFICATION
2.2 PACKAGE STORAGE
When storing modules as spares for a long time, the following precaution is necessary. (a) Do not leave the module in high temperature, and high humidity for a long time, It is highly recommended to
store the module with temperature from 0 to 35 at normal humidity without condensation.
(b) The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent
light.
2.3 ELECTRICAL ABSOLUTE RATINGS
2.3.1 TFT LCD MODULE
Item Symbol
Min. Max.
Power Supply Voltage VCC -0.3 13.5 V
Logic Input Voltage VIN -0.3 3.6 V
Value
Unit Note
(1)
2.3.2 BACKLIGHT CONVERTER UNIT
Item Symbol
Light Bar Voltage VW
Converter Input Voltage VBL - 0 - 30 V
Control Signal Level - - -0.3
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
Note (2) No moisture condensation or freezing.
Note (3) The control signals include On/Off Control and External PWM Control.
Test
Condition
Ta = 25
Min. Type Max. Unit
- - 60 V
- 7 V
RMS
Note(1)(2)(3)
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PRODUCT SPECIFICATION
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
(Ta = 25 ± 2 ºC)
Value
Parameter Symbol
Min. Typ. Max.
Power Supply Voltage VCC 10.8 12 13.2 V (1)
Unit Note
Rush Current I
White Pattern P
OFHD 120Hz Output
Horizontal Stripe PT
Power Consumption
Black Pattern PT White Pattern
OFHD 120Hz Output
Horizontal Stripe
Power Supply Current
Black Pattern White Pattern P
QFHD 60Hz Output
Horizontal Stripe PT
Power Consumption
Black Pattern PT White Pattern
QFHD 60Hz Output
Horizontal Stripe
Power Supply Current
Black Pattern
RUSH
T
- - - -
T
- - - -
- - -
- - -
4.76 A (2)
12.9 14.64 W
28.8 29.64 W
12.9 14.88 W
1.08 1.22 A
2.4 2.47 A
1.07 1.24 A
11.80
25.92
11.37
0.98 1.084 A
2.16 2.301 A
0.948
13.01 W
27.612 W
13.182 W
1.0985 A
(3)
Differential Input High Threshold Voltage
Differential Input Low
LVDS interface
CMOS interface
Note (1) The module should be always operated within the above ranges. The ripple voltage should be controlled
Note (2) Measurement condition:
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Threshold Voltage Common Input Voltage VCM 1.0 1.2 1.4 V Differential input voltage
(single-end) Terminating Resistor RT
Input High Threshold Voltage VIH 2.7 Input Low Threshold Voltage VIL 0
under 10% of Vcc (Typ.)
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V
LVTH
V
LVTL
|VID| 200
+100
-300
- -
100
- -
+300 mV
-100 mV
600 mV
3.3 V
0.7 V
ohm
(4)
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PRODUCT SPECIFICATION
Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, fv = 60/120 Hz
whereas a power dissipation check pattern below is displayed.
a. White Pattern
GND
Vcc rising time is 470us
Vcc
0.9Vcc
0.1Vcc
470us
b. Black Pattern
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Active Area
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Active Area
Page 11
PRODUCT SPECIFICATION
c. Horizontal Stripe
Note (4) The LVDS input characteristics are as follows:
R G B R G B R G B
R G BR G B R G BR G B R G BR G B R G B R G B R G B
R G BR G B R G BR G B R G BR G B
R G B R G B R G B
R G B R G B R G BR G B R G B R G B R G B R G B R G B
R G B R G B R G BR G B R G B R G B
R G B R G B R G B
R G BR G B R G BR G B R G BR G B R G B R G B R G B
R G BR G B R G BR G B R G BR G B
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PRODUCT SPECIFICATION
3.2 BACKLIGHT UNIT
3.2.1 LED LIGHT BARCHARACTERISTICS (Ta = 25 ± 2 ºC)
The backlight unit contains 2 pcs LED light bar, and each light bar has 8 string LED
Parameter Symbol
Unit Note
Min. Typ. Max.
Value
I
L(2D)
117.5 125 133
mA (1)
One String Current
I
L(3D)
One String Voltage VW
One String Voltage Variation
V
W
Life time -
Note (1) Dimming Ratio=100%
Note (2) The lifetime is defined as the time which luminance of the LED decays to 50% compared to the initial value,
Operating condition: Continuous operating at Ta = 25±2, IL =125mA.
376 400 424
40 - 47
- - 2
30,000 - -
mApeak 3D ENA=ON
VDC IL =125mA
V
Hrs (2)
3.2.2 CONVERTER CHARACTERISTICS (Ta = 25 ± 2 ºC)
Value
Parameter Symbol
Unit
Note
Min. Typ. Max.
P
BL(2D)
94.7 109
(1), (2), IL=125 mA
W
Power Consumption
P
BL(3D)
85 96
(1), (2), IL=400 mA
W
Converter Input Voltage VBL 22.8 24.0 25.2 VDC
I
BL(2D)
3.95 4.54 A Non Dimming
Converter Input Current
I
BL(3D)
3.54 4 A
VBL=22.8V, (IL=typ.)
I
R(2D)
9.5
Apeak
(3), (6)
Input Inrush Current
VBL=22.8V,(IL= 360
I
R(3D)
14
Apeak
mA.) (3), (6)
Dimming Frequency
Dimming Duty Ratio
Note (1) The power supply capacity should be higher than the total converter power consumption PBL. Since the pulse
width modulation (PWM) mode was applied for backlight dimming, the driving current changed as PWM
duty on and off. The transient response of power supply should be considered for the changing loading
when converter dimming.
Note (2) The measurement condition of Max. value is based on 50" backlight unit under input voltage 24V, average
LED current 133 mA at 2D Mode (LED current 424 mA
Note (3) For input inrush current measure, the VBL rising time from 10% to 90% is about 30ms.
FB 170 180 190 Hz
DDR 5 - 100 %
at 3D Mode) and lighting 1 hour later.
peak
(5)
(4), (5)
Note (4) EPWM signal have to input available duty range. Between 97% and 100% duty (DDR) have to be avoided.
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(97% < DDR < 100%) But 100% duty(DDR) is possible. 5% duty (DDR) is only valid for electrical operation.
Note (5) FB and DDR are available only at 2D Mode.
Note (6) Below diagram is only for power supply design reference.
PRODUCT SPECIFICATION
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3.2.3 CONVERTER INTERFACE CHARACTERISTICS
PRODUCT SPECIFICATION
Parameter Symbol
ON
On/Off Control Voltage
VBLON
OFF
External PWM Control Voltage
External PWM Frequency
HI LO
VEPWM
F
EPWM
Error Signal ERR
VBL Rising Time Tr1 Control Signal Rising Time Tr
Condition
Test
Value
Unit Note
Min. Typ. Max.
2.0
5.0 V
- -
0
2.0
- -
0.8 V
5.0 V Duty on (5)(6)
0
0.8 V Duty off
150 160 170 Hz Normal mode
Abnormal: Open
collector
Normal: GND
(4)
20
100 ms
ms 10%-90%VBL
Control Signal Falling Time Tf PWM Signal Rising Time TPWMR PWM Signal Falling Time TPWMF Input Impedance Rin PWM Delay Time TPWM
Ton
- - - - - - - -
1 100 300
- - - -
100 ms
50 us 50 us
M
EPWM, BLON
ms (6) ms
BLON Delay Time
T
on1
BLON Off Time Toff
Note (1) The Dimming signal should be valid before backlight turns on by BLON signal. It is inhibited to change the
external PWM signal during backlight turn on period.
Note (2) The power sequence and control signal timing are shown in the Fig.1. For a certain reason, the converter has a
possibility to be damaged with wrong power sequence and control signal timing.
Note (3) While system is turned ON or OFF, the power sequences must follow as below descriptions:
Turn ON sequence: VBL → PWM signal → BLON
Turn OFF sequence: BLOFF → PWM signal → VBL
- -
300 300
- -
ms ms
(6)
Note (4) When converter protective function is triggered, ERR will output open collector status. Please refers to Fig.2.
Note (5) The EPWM interface that inserts a pull up resistor to 5V in Max Duty (100%), please refers to Fig.3.
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PRODUCT SPECIFICATION
Note (6) EPWM is available only at 2D Mode.
Note (7) EPWM signal have to input available frequency range.
Note (8) [Recommend] EPWM duty ratio is set at 100%(Max. Brightness) in 3D Mode.
V
V
BL
V
BLON
EPWM
Tr1
BL
0.9V
0.1V
BL
2.0V
0.8V
2.0V
0.8V
Ton
PWM
T
Backlight on duration
Tr
Ext. Dimming Function
PWMR
T
T
Ton1
Tf
PWMF
Floating
0
0
0
Toff
V
W
External
PWM
Period
External
PWM Duty
100%
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PRODUCT SPECIFICATION
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4. BLOCK DIAGRAM OF INTERFACE
4.1 TFT LCD MODULE
PRODUCT SPECIFICATION
TFT LCD PANEL
(3840x3x2160)
X(R) Board X(L) Board
OUTPUT CONNECTOR
L/R_O
INPUT CONNECTOR
CNF1:WF23-400-5133 (FCN) or 187059-51221(P-TWO)
CON2: LM123S-010-H-TF1-3Y
C Board
INPUT CONNECTOR
CNF2:WF23-400-413C(FCN) or 187060-41221(P-TWO)
CH1_0(+/-) CH1_1(+/-) CH1_2(+/-) CH1_3(+/-) CH1_4(+/-) CH1_CLK(+/-)
CH2_0(+/-) CH2_1(+/-) CH2_2(+/-) CH2_3(+/-) CH2_4(+/-) CH2_CLK(+/-)
SELLVDS
2D/3D
L/R
LD_EN VCC L/R_O
SDA
SCL
GND
CH3_0(+/-) CH3_1(+/-) CH3_2(+/-) CH3_3(+/-) CH3_4(+/-) CH3_CLK(+/-)
CH4_0(+/-) CH4_1(+/-) CH4_2(+/-) CH4_3(+/-) CH4_4(+/-) CH4_CLK(+/-)
VBL GND
ERR
E_PWM BLON
CONVERTER
CONNECTOR
CN1: CI0114M1HR0-LA
(CvilLux) CN2: CI0112M1HR0-LA (CvilLux)
LED
BACKLIGHT
UNIT
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PRODUCT SPECIFICATION
5 .INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
CNF1 Connector Part No.: FCN (WF23-400-5133) or P-TWO (187059-51221)
Pin Name Description
1 N.C. No Connection (1)
SCL I2C Clock (for mode selection & function setting)
2
SDA I2C Data (for mode selection & function setting)
3 4 N.C. No Connection 5 L/R_O Output signal for Left Right Glasses control 6 N.C. No Connection (1) 7 SELLVDS Input signal for LVDS Data Format Selection (3)(9) 8 N.C. No Connection
9 N.C. No Connection 10 N.C. No Connection 11 GND Ground 12 CH1[0]- First pixel Negative LVDS differential data input. Pair 0 13 CH1[0]+ First pixel Positive LVDS differential data input. Pair 0
Note
(1) (2)
(1)
14 CH1[1]- First pixel Negative LVDS differential data input. Pair 1
(4)
15 CH1[1]+ First pixel Positive LVDS differential data input. Pair 1 16 CH1[2]- First pixel Negative LVDS differential data input. Pair 2 17 CH1[2]+ First pixel Positive LVDS differential data input. Pair 2 18 GND Ground 19 CH1CLK- First pixel Negative LVDS differential clock input. 20 CH1CLK+ First pixel Positive LVDS differential clock input. 21 GND Ground 22 CH1[3]- First pixel Negative LVDS differential data input. Pair 3 23 CH1[3]+ First pixel Positive LVDS differential data input. Pair 3 24 CH1[4]- First pixel Negative LVDS differential data input. Pair 4 25 CH1[4]+ First pixel Positive LVDS differential data input. Pair 4 26 2D/3D Input signal for 2D/3D Mode Selection (5)(10) 27 L/R Input signal for Left Right eye frame synchronous (6)
(4)
(4)
28 CH2[0]- Second pixel Negative LVDS differential data input. Pair 0
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(4)
Page 19
PRODUCT SPECIFICATION
29 CH2[0]+ Second pixel Positive LVDS differential data input. Pair 0 30 CH2[1]- Second pixel Negative LVDS differential data input. Pair 1 31 CH2[1]+ Second pixel Positive LVDS differential data input. Pair 1 32 CH2[2]- Second pixel Negative LVDS differential data input. Pair 2 33 CH2[2]+ Second pixel Positive LVDS differential data input. Pair 2 34 GND Ground 35 CH2CLK- Second pixel Negative LVDS differential clock input. 36 CH2CLK+ Second pixel Positive LVDS differential clock input. 37 GND Ground 38 CH2[3]- Second pixel Negative LVDS differential data input. Pair 3 39 CH2[3]+ Second pixel Positive LVDS differential data input. Pair 3 40 CH2[4]- Second pixel Negative LVDS differential data input. Pair 4 41 CH2[4]+ Second pixel Positive LVDS differential data input. Pair 4 42 LD_EN Input signal for Local Dimming Enable (7)(9) 43 N.C. No Connection (8) 44 GND Ground 45 GND Ground 46 GND Ground 47 N.C. No Connection
(4)
(4)
(1)
48 VCC +12V power supply 49 VCC +12V power supply 50 VCC +12V power supply 51 VCC +12V power supply
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PRODUCT SPECIFICATION
CNF2 Connector Part No.: FCN (WF23-400-413C) or P-TWO (187060-41221)
Pin Name Description Note
1 N.C. No Connection
2 N.C. No Connection
3 N.C. No Connection
4 N.C. No Connection
5 N.C. No Connection
6 N.C. No Connection
7 N.C. No Connection
8 N.C. No Connection
9 GND Ground 10 CH3[0]- Third pixel Negative LVDS differential data input. Pair 0
(1)
11 CH3[0]+ Third pixel Positive LVDS differential data input. Pair 0 12 CH3[1]- Third pixel Negative LVDS differential data input. Pair 1
(4)
13 CH3[1]+ Third pixel Positive LVDS differential data input. Pair 1 14 CH3[2]- Third pixel Negative LVDS differential data input. Pair 2 15 CH3[2]+ Third pixel Positive LVDS differential data input. Pair 2 16 GND Ground 17 CH3CLK- Third pixel Negative LVDS differential clock input.
(4)
18 CH3CLK+ Third pixel Positive LVDS differential clock input. 19 GND Ground 20 CH3[3]- Third pixel Negative LVDS differential data input. Pair 3 21 CH3[3]+ Third pixel Positive LVDS differential data input. Pair 3
(4)
22 CH3[4]- Third pixel Negative LVDS differential data input. Pair 4 23 CH3[4]+ Third pixel Positive LVDS differential data input. Pair 4 24 GND Ground 25 GND Ground 26 CH4[0]- Fourth pixel Negative LVDS differential data input. Pair 0 27 CH4[0]+ Fourth pixel Positive LVDS differential data input. Pair 0 28 CH4[1]- Fourth pixel Negative LVDS differential data input. Pair 1 29 CH4[1]+ Fourth pixel Positive LVDS differential data input. Pair 1
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(4)
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PRODUCT SPECIFICATION
L Right glass turn on
H Left glass turn on
SELLVDS
Note
30 CH4[2]- Fourth pixel Negative LVDS differential data input. Pair 2 31 CH4[2]+ Fourth pixel Positive LVDS differential data input. Pair 2 32 GND Ground 33 CH4CLK- Fourth pixel Negative LVDS differential clock input.
(4)
34 CH4CLK+ Fourth pixel Positive LVDS differential clock input. 35 GND Ground 36 CH4[3]- Fourth pixel Negative LVDS differential data input. Pair 3 37 CH4[3]+ Fourth pixel Positive LVDS differential data input. Pair 3
(4)
38 CH4[4]- Fourth pixel Negative LVDS differential data input. Pair 4 39 CH4[4]+ Fourth pixel Positive LVDS differential data input. Pair 4 40 GND Ground 41 GND Ground
CON2 Connector Pin Assignment LM123S010HTF13Y
1 N.C. No Connection
2 N.C. No Connection
3 N.C. No Connection
4 GND Ground
5 N.C. No Connection
6 L/R_O Output signal for Left Right Glasses control
7 N.C. No Connection
8 N.C. No Connection
9 N.C. No Connection 10 N.C. No Connection
Note (1) Reserved for internal use. Please leave it open.
(1)
(1) (2)
(1)
Note (2) The definition of L/R_O signal as follows
Note (3) LVDS format selection.
Version 2.0 21 Date 26 Oct. 2012
L= 0V , H= +3.3V
L/R_O Note
L= Connect to GND, H=Connect to +3.3V or Open
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Page 22
L JEIDA Format
H or Open
VESA Format
Note (4) LVDS 4-port Data Mapping
2D/3D
Note
L or Open
2D Mode
H 3D Mode
L Local Dimming Disable
H or Open
Local Dimming Enable
L/R Note
L Right synchronous signal
H Left synchronous signal
PRODUCT SPECIFICATION
Port Channel of LVDS
1st Port First Pixel 1, 5, 9, ……1913, 1917
2nd Port Second Pixel
3rd Port Third Pixel 3, 7, 11, ….1915, 1919 4th Port Fourth Pixel 4, 8, 12, ….1916, 1920
QFHD 24/30 Input
Port Channel of LVDS
1st Port First Pixel 1, 5, 9, ……3833, 3837
2nd Port Second Pixel
3rd Port Third Pixel 3, 7, 11, ….3835, 3839 4th Port Fourth Pixel 4, 8, 12, ….3836, 3840
Note (5) 2D/3D mode selection.
L= Connect to GND or Open, H=Connect to +3.3V
Data Stream
2, 6, 10, ….1914, 1918
Data Stream
2, 6, 10, ….3834, 3838
Note (6) Input signal for left and right eye frame synchronous VIL=0~0.7 V, VIH=2.7~3.3 V
Note (7) Local dimming enable selection.
L= Connect to GNDH=Connect to +3.3V or Open
LD_EN Note
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PRODUCT SPECIFICATION
IC
10
K ohm
1K ohm
Panel Board
System Board
3.3V
Note (8) Reserved for internal use. Open is preferred. However, it is also acceptable to reserve the wire
connecting with specific High/Low voltage level.
Note (9) Interface optional pin has internal scheme as following diagram.
Customer should keep the interface voltage level requirement which including Panel board loading as below.
Interface Voltage Level VH > V VL < V
Note (10) Interface optional pin has internal scheme as following diagram.
IH IL
Customer should keep the interface voltage level requirement which including Panel board loading as below.
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Page 24
IC
10
K ohm
1K ohm
Panel Board
System Board
Interface Voltage Level
PRODUCT SPECIFICATION
VH > V VL < V
Note (11) LVDS connector pin order defined as follows
IH IL
Note (12) LVDS connector mating dimension range request is 0.93mm~1.0mm as follow
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Page 25
PRODUCT SPECIFICATION
5.2 BACKLIGHT UNIT
The pin configuration for the housing and leader wire is shown in the table below.
CN3
Connector Type : 196388-12041-3(P-TWO) or FF01-431-123A(FCN)
Pin No.
1 VLED+ 2 VLED+ 3 VLED+ 4 NC NC 5 N­6 N­7 N­8 N­9 N-
10 N-
11 N-
12 N-
Symbol Description
Positive of LED string
Negative of LED string
CN6
Connector Type : 196388-12041-3(P-TWO) or FF01-431-123A(FCN)
Pin No.
12 VLED+
11 VLED+
10 VLED+
9 NC NC 8 N­7 N­6 N­5 N­4 N­3 N­2 N­1 N-
Symbol Description
Positive of LED string
Negative of LED string
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5.3 DRIVING BOARD UNIT
CN1(Header): CI0114M1HR0-LA (CvilLux) or JH2-D4-143N (FCN)
Pin No. Symbol Feature
1 2
PRODUCT SPECIFICATION
3 4 5
6 7 8 9
10
11 ERR
12 BLON BL ON/OFF
13 NC NC
14 E_PWM External PWM Control
Note (1) If Pin14 is open, E_PWM is 100% duty.
Note (2) Input connector pin order defined as follows
VBL +24V
GND GND
Normal (GND)
Abnormal (Open collector)
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5.4 LVDS INTERFACE
JEIDA Format : SELLVDS = L VESA Format : SELLVDS = H or Open
VESA Format
PRODUCT SPECIFICATION
Current Cycle
AR 0P
AR 0N
AR 1P
AR 1N
AR 2P
AR 2N
AR 3P
AR 3N
AR 4P
AR 4N
JEIDA Format
AR 0P
AR 0N
AR 1P
AR 1N
AR0
AG1
AB2
AR6
AR4
AG5
AG0 AR5
AB1
DE VS HS AB5 AB4 AB3 AB2
REV AB7 AB6 AG7 AG6 AR7 AR6
REV AB9 AB8 AG9 AG8 AR9 AR8AR8 REV
AG4 AR7
AB5
AB0 AG5 AG4 AG3 AG2 AG1
AB4 AG7 AG6 AG5AG9 AG8
AR4 AR3 AR2 AR1 AR0
AR6 AR5 AR4AR9 AR8
AG0
AB1
DE
REV
AG4
AB5
AR 2P
AR 2N
AR 3P
AR 3N
AR 4P
AR 4N
AR0~AR9
AG0~AG9
AB0~AB9
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AB6
AR2
DE VS HS AB7 AB6AB9 AB8
REV AB3 AB2 AG3 AG2 AR3 AR2
REV AB1 AB0 AG1 AG0 AR1 AR0AR0 REV
First Pixel R Data
(9; MSB, 0; LSB)
First Pixel G Data
(9; MSB, 0; LSB)
First Pixel B Data
(9; MSB, 0; LSB)
DE Data Enable Signal
VS
HS
REV Reserved
Vertical SYNC
Horizontal SYNC
DE
REV
Note
Page 28
PRODUCT SPECIFICATION
5.5 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 10-bit gray scale data input for the color. The higher the binary input the brighter the color. The table below provides the assignment of color versus data input.
Data Signal
Color
R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 G9 G8 G7 G6 G5 G4 G3 G2 G1 G0 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
Basic Colors
Gray Scale Of Red
Gray Scale Of Green
Gray Scale Of Blue
Black Red Green Blue Cyan Magenta Yellow White
Red (0) / Dark Red (1) Red (2)
:
: Red (1021) Red (1022) Red (1023)
Green (0) / Dark Green (1) Green (2)
:
: Green (1021) Green (1022) Green (1023)
Blue (0) / Dark Blue (1) Blue (2)
:
: Blue (1021) Blue (1022) Blue (1023)
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
Note (1) 0: Low Level Voltage1: High Level Voltage
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1 1 1
0 0 0
:
: 1 1 1
0 0 0
:
: 0 0 0
0 0 0
:
: 0 0 0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
:
:
:
:
:
:
1
1
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
1
1
1
1
1
1
0
0
0
1
0
0
0
0
0
:
:
:
:
:
:
1
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
1
1
0
1
1
0
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
1
0
0
0
1
1
1
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
1
1
1
1
0
0
1
1
1
0
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
;
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
0
:
:
:
:
:
:
0
1
0
1
0
0
1
1
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
1
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
:
:
:
:
:
:
1
0
1
1
1
0
1
1
1
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Page 29
PRODUCT SPECIFICATION
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS (Ta = 25 ± 2 ºC)
The input signal timing specifications are shown as the following table and timing diagram. (Ta = 25 ± 2 ºC)
Signal Item Symbol
Min. Typ. Max. Unit Note
Input cycle to
T
- - 200 ps (1)
cycle jitter
rcl
LVDS
Spread spectrum
Receiver
modulation range
clkin_mod
F
F
clkin
-1.5%
- F
+1.5% MHz
clkin
Clock
Spread spectrum modulation frequency
SSM
- - 66 KHz
F
LVDS
Receiver
Receiver skew margin T
RSKM
-400 - 400 ps (3)
Data
6.1.1 Input Timing SPEC for FHD, Frame Rate = 100Hz
Signal Item Symbol
LVDS Clock Frequency
F
clkin
(=1/TC)
Min. Typ. Max. Unit Note
60 74.25 79 MHz (4)
Frame Rate 2D Mode Fr 97 100 103 Hz (5)
(2)
Vertical
Active
Display
Total 1100
Display Tvd 1080 Th Blank Tvb 24 270 315 Th Front porch Tvfp 10
1104 1350 1395 Th Tv=Tvd+Tvb
Th
Term
Back porch Tvbp Vsync Tvswid
10
4
- -
Th Th
(6)
2D Mode
Total Th 530 550 670 Tc Th=Thd+Thb
Horizontal
Active
Display
Term
Display Thd 480 Tc Blank Thb 50 70 190 Tc Front porch Thfp 5 Back porch Thbp Hsync Thswid
5 2
- - - -
Tc Tc Tc
(6)
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Page 30
6.1.2 Input Timing SPEC for FHD, Frame Rate = 120Hz
PRODUCT SPECIFICATION
Signal Item Symbol
2D Mode 60 74.25 79 MHz
LVDS Clock
3D Mode 2D Mode 117 120 123 Hz
Frame Rate
3D Mode
Total Tv 1104 1125 1395 Th Tv=Tvd+Tvb Display Tvd 1080 Th Blank Tvb 24 45 315 Th
2D Mode
Front porch Tvfp 10
Vertical
Active
Display
Term
Back porch Tvbp Vsync Tvswid Total Tv 1125 Th Display Tvd 1080 Th
F
clkin
(=1/TC
Fr
Min. Typ. Max. Unit Note
(4)
74.25 MHz
(5)
120 Hz
10
4
- - - -
Th Th Th
(6)
Horizontal
Active
Display
Term
3D Mdoe
2D Mode
3D Mdoe
Blank Tvb 45 Th Front porch Tvfp 10 Back porch Tvbp Vsync Tvswid Total Th 530 550 670 Tc Th=Thd+Thb Display Thd 480 Tc Blank Thb 50 70 190 Tc Front porch Thfp 5 Back porch Thbp Hsync Thswid Total Th 530 550 670 Tc Th=Thd+Thb Display Thd 480 Tc Blank Thb 50 70 190 Tc
10
4
5 2
- - - -
- - - -
Tc Tc Tc
(6)
(6)
Front porch Thfp 5 Back porch Thbp
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5
- -
Tc Tc
(6)
Page 31
PRODUCT SPECIFICATION
Hsync Thswid
6.1.3 Input Timing SPEC for QFHD, Frame Rate = 24Hz
Signal Item Symbol
F
LVDS Clock Frequency
Frame Rate 2D Mode Fr 23 24 25 Hz (5)
Total 2200
Vertical
Active
Display
Term
2D Mode
Display Tvd 2160 Th Blank Tvb 48 90 290 Th Front porch Tvfp 20 Back porch Tvbp Vsync Tvswid Total Th 990 1375 1440 Tc Th=Thd+Thb
clkin
(=1/TC)
2
Min. Typ. Max. Unit Note
60 74.25 79 MHz (4)
2208 2250 2450 Th Tv=Tvd+Tvb
20
8
- - - -
Tc
Th Th Th
(6)
Horizontal
Active
Display
Term
6.1.4 Input Timing SPEC for QFHD, Frame Rate = 30Hz
Signal Item Symbol
LVDS Clock Frequency
Frame Rate 2D Mode Fr 29 30 31 Hz (5)
2D Mode
Vertical
Active
Display
Term
Display Thd 960 Tc Blank Thb 30 415 480 Tc Front porch Thfp 10 Back porch Thbp Hsync Thswid
F
clkin
(=1/TC)
Total Tv 2208 2250 2450 Th Tv=Tvd+Tvb
Display Tvd 2160 Th Blank Tvb 48 90 290 Th Front porch Tvfp 20 Back porch Tvbp
10
4
Min. Typ. Max. Unit Note
60 74.25 79 MHz (4)
20
- - - -
- -
Tc Tc Tc
Th Th
(6)
(6)
Vsync Tvswid
Horizontal
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Total Th 990 1100 1340 Tc Th=Thd+Thb
8
Th
Page 32
Active
Display
Term
PRODUCT SPECIFICATION
Display Thd 960 Tc Blank Thb 30 140 380 Tc Front porch Thfp 10
Tc Back porch Thbp Hsync Thswid
Note (1) The input clock cycle-to-cycle jitter is defined as below figures. Trcl =T1 – T
Note (2) The SSCG (Spread spectrum clock generator) is defined as below figures.
10
4
- -
Tc
Tc
(6)
Note (3) The LVDS timing diagram and the receiver skew margin is defined and shown in following figure.
Version 2.0 32 Date 26 Oct. 2012
RXCLK+/-
RXn+/-
T
RSKM
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Tc
Page 33
PRODUCT SPECIFICATION
Note (4) Please make sure the range of pixel clock has follow the below equation.
Fclkin(max) (Fr Tv Th) Fclkin(min)
Note (5)
a. The frame-to-frame jitter of the input frame rate is defined as the following figure. b. FRn = FRn-1 ± 1.8%.
Note (6)
a. Hsync and Vsync signals are necessary for this module. b. The polarity of Hsync & Vsync should be positive. c. Please follow the input signal timing diagram as below :
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Page 34
PRODUCT SPECIFICATION
100ms T6
T
10≦10ms
6.2 POWER ON/OFF SEQUENCE
(Ta = 25 ± 2 ºC)
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram below.
0.5 T1≦ ≦10ms 0 T2≦ ≦200ms
0 T3
500ms T4
LVDS Signals
0V
Option Signals
(SELLVDS,2D/3D,LD_EN,)
0 T7 T2≦ ≦ 0 T8≦ ≦T3
500ms T9
0V
0.9VCC
0.1VCC
Power on
T7
T1
T2
0.9VCC
0.1VCC
T3
T4
VALID
Power off
T8
T9
Host I2C Command
Backlight (Recommended)
1000msT5
T5
50% 50%
T6
Power ON/OFF Sequence
Vcc Dip
Vcc
Vcc(typ.) x 0.85
0V
T10
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Page 35
PRODUCT SPECIFICATION
Note (1) The supply voltage of external system for the module input should follow the definition of Vcc. Note (2) Apply the LED voltage within the LCD operation range. When the backlight turns on before the LCD
operation or the LCD turns off before the backlight turns off, the display may momentarily become abnormal screen.
Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance. If
T2<0,that maybe cause electrical overstress failure. Note (4) T4 should be measured after the module has been fully discharged between power off and on period. Note (5) Interface signal shall not be kept at high impedance when the power is on. Note (6) Vcc must decay smoothly when power-off.
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Page 36
PRODUCT SPECIFICATION
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit Ambient Temperature Ta Ambient Humidity Ha Supply Voltage VCC 12V V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" LED Current IL
Vertical Frame Rate Fr 120 Hz
Local Dimming Function should be Disable before testing to get the steady optical characteristics (According to
5.1 CNF1 Connector Pin Assignment, Pin no. “42”)
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature change during measuring in a windless room.
25±2
50±10
125±3.45
o
C
%RH
mA
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Page 37
PRODUCT SPECIFICATION
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should be
measured under the test conditions described in 7.1 and stable environment shown in 7.1.
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR
Gray
Response Time
to
gray
CenterLuminance of White
White Variation
L
C
δW
Cross Talk CT
Rx
Red
Ry Gx
Green
Gy
Color
Bx
Blue
Chromaticity
By
60Hz
120Hz
2D
3500 5000
8.5 17
6.5
320 400
- - Note (2)
13 ms Note (3)
- cd/m
3D 65 cd/m
1.3 - Note (6)
2D
3D-W
3D-D
θ
=0°, θY =0°
x
Viewing angle at
4 % Note (5) 4 - % Note (8)
- 11 - % Note (8)
0.642
normal direction
0.332
0.306
0.619
Typ.-
Typ.+
0.152
0.03
0.03
0.051
ms Note (3)
2
Note (4)
2
Note (8)
-
-
-
-
-
-
White
Correlated color temperature
Color Gamut
Horizontal
Viewing Angle
Vertical
Transmission direction of the up polarizer
Wx Wy
C.G.
θ
x
θ
x
θ
Y
θ
Y
Φ
up-P
+
+
0.280
0.290 9800
-
80 88
-
80 88
72
- % NTSC
-
-
CR20
80 88
-
- - 90 - Deg.
80 88
-
-
-
-
K
Deg.
(1)
(7)
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Page 38
Note (1) Definition of Viewing Angle (θx, θy):
Time
Viewing angles are measured by Autronic Conoscope Cono-80 ( or Eldim EZ-Contrast 160R ).
PRODUCT SPECIFICATION
X- = 90º
x-
6 o’clock
y-
y- = 90º
Note (2) Definition of Contrast Ratio (CR) :
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) =
Normal
x = y = 0º
y- y
x
x
12 o’clock direction
y+
y+ = 90º
X+ = 90º
x+
L1023 of Luminance Surface
L0 of Luminance Surface
L1023: Luminance of gray level 1023 L 0: Luminance of gray level 0 CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (6).
Note (3) Definition of Gray-to-Gray Switching Time:
100%
90%
Optical
Response
10%
0%
Gray to gray
switching time
Gray to gray
switching time
The driving signal means the signal of gray level 0, 124, 252, 380, 508, 636, 764, 892 and 1023. Gray to gray average time means the average switching time of gray level 0, 124, 252, 380, 508, 636, 764, 892 and 1023 to each other.
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Page 39
Note (4) Definition of Luminance of White (LC):
Active Area
(D, W)
Active Area
(0, 0)
(D, W)
PRODUCT SPECIFICATION
Measure the luminance of gray level 1023 at center point.
LC = L (5), where L (x) is corresponding to the luminance of the point X at the figure in Note (6).
Note (5) Definition of Cross Talk (CT):
CT = | YB – YA | / YA × 100 (%) Where: YA = Luminance of measured location without gray level 1023 pattern (cd/m2) YB = Luminance of measured location with gray level 1023 pattern (cd/m2)
(0, 0)
Gray 512
Y
(D/8,W/2)
A, L
Y
(D/2,W/8)
A, U
Y
(D/2,7W/8)
A, D
Y
(7D/8,W/2)
A, R
Y
(D/8,W/2)
B, L
(D/4,W/4)
Y
B, U
Gray 1023
Y
B, D
(D/2,W/8)
Y
B, R
(3D/4,3W/4)
(D/2,7W/8)
(7D/8,W/2)
Note (6) Definition of White Variation (δW):
Measure the luminance of gray level 1023 at 5 points
δW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
W
W/4
W/2
Vertical Line
Horizontal Line
D
D/4 D/2 3D/4
1 2
5
3 4
X
: Test Point X=1 to 5
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Active Area
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Page 40
PRODUCT SPECIFICATION
6 o’clock
Note (7) This is a reference for designing the shutter glasses of 3D application.
Definition of the transmission direction of the up polarizer(Φ
The transmission axis of the front polarizer of the shutter glasses should be parallel to this panel
transmission direction to get a maximum 3D mode luminance.
x-
y-
Up Polarizer
12 o’clock direction
y+
Φ
up-P
x
Φ=0o
) on LCD Module:
up-P
+
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PRODUCT SPECIFICATION
shutter glass
Note(8) Definition of the 3D mode performance (measured under 3D mode, use CMI’s shutter glass):
a. Test pattern
Left eye image and right eye image are displayed alternated
WW Left eye image: W1023; Right eye image: W1023
WB Left eye image: W1023; Right eye image: W0
BW Left eye image: W0; Right eye image: W1023
BB Left eye image: W0; Right eye image: W0
b. Measurement setup
Shutter glasses are well controlled under suitable timing, and measure the luminance of the center
point of the panel through the right eye glass. The transmittance of the glass should be larger than 40.0% under 3D mode operation.
The luminance of the test pattern “WW”, denoted L(WW); the luminance of the test pattern ”WB”,
denoted L(WB); the luminance of the test pattern “BW”, denoted L(BW); the luminance of the test pattern “BB”, denoted “L(BB)
Right eye
Version 2.0 41 Date 26 Oct. 2012
c. Definition of the Center Luminance of White, Lc (3D) : L(WW)
d. Definition of the 3D mode white crosstalk, CT (3D-W) :
e. Definition of the 3D mode dark crosstalk, CT (3D-D) :
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)3(
WDCT
)3(
DDCT
)()(
BBLWBL
)()(
BBLWWL
)()(
BWLWWL
)()(
BBLWWL
Page 42
PRODUCT SPECIFICATION
GEMN
V500
DK1-
LS1
Rev. XX
V500
DK1-LS1
Rev. XX
RoHS
8. DEFINITION OF LABELS
8.1 CMI MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
Model Name: V500DK1-LS1 Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc. Serial ID: X X X X X X X Y M D L N N N N
Serial No. Product Line
E 2 0 7 9 4 3
M A D E IN T A IW A N
MADE IN CHINA
LEOO(or CAPG or CANO)
Serial ID includes the information as below: Manufactured Date: Year : 2001=1, 2002=2, 2003=3, 2004=4…2010=0, 2011=1, 2012=2… Month: 1~9, A~C, for Jan. ~ Dec. Day: 1~9, A~Y, for 1st to 31st, exclude I ,O, and U. Revision Code : Cover all the change Serial No. : Manufacturing sequence of product Product Line : 1 Line1, 2 Line 2, …etc.
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Year, Month, Date CMI Internal Use
CMI Internal Use
Revision
CMI Internal Use
Page 43
PRODUCT SPECIFICATION
8.2 CARTON LABEL
The barcode nameplate is pasted on each box as illustration, and its definitions are as following explanation.
Model Name: V500DK1– LS1
Carton ID: X X X X X X X Y M D X X X X
P.O. NO.
Parts ID.
Model Name V500DK1-LS1
Carton ID. Quantities XXXXXXXXXXXXXX
Made In China
CMI Internal Use
Serial ID includes the information as below :
Manufactured Date:
Year: 2010=0, 2011=1, 2012=2…etc.
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1st to 31st, exclude I ,O, and U.
Revision Code: Cover all the change
Year, Month, Date
CMI Internal Use
Revision
CMI Internal Use
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Page 44
9. Packaging
9.1 PACKING SPECIFICATIONS
(1) 4 LCD TV modules / 1 Box (2) Box dimensions: 1235(L) X 258 (W) X 751 (H) (3) Weight: approximately 54.5 Kg (4 modules per box)
9.2 PACKING METHOD
Figures 9-1 and 9-2 are the packing method
PRODUCT SPECIFICATION
Note:T-CON Downward
Note:T-CON Downward
Figure.9-1 packing method
Note:T-CON Downward
Carton Label
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Page 45
PRODUCT SPECIFICATION
Figure. 9-2 Packing method
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PRODUCT SPECIFICATION
10. PRECAUTIONS
10.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly. (2) It is recommended to assemble or to install a module into the user’s system in clean working areas. The
dust and oil may cause electrical short or worsen the polarizer. (3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and backlight. (4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMOS LSI chips. (5) Do not plug in or pull out the I/F connector while the module is in operation. (6) Do not disassemble the module. (7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched. (8) Moisture can easily penetrate into LCD module and may cause the damage during operation. (9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD
modules in the specified storage conditions.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of LED will be higher than that of room
temperature.
10.2 SAFETY PRECAUTIONS
(1) The startup voltage of a backlight is over 1000 Volts. It may cause an electrical shock while assembling
with the inverter. Do not disassemble the module or insert anything into the backlight unit. (2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case
of contact with hands, skin or clothes, it has to be washed away thoroughly with soap. (3) After the module’s end of life, it is not harmful in case of normal operation and storage.
10.3 SAFETY STANDARDS
The LCD module should be certified with safety regulations as follows:
Regulatory Item
UL UL60950-1:2nd Ed.,2011
cUL CAN/CSA C22.2 No.60950-1-07,2nd Ed.,2011
Information Technology equipment
IEC60950-1:2005+A1:2009 /
CB
EN60950-1:2006+ A11:2009+A1:2010+A12:2011
Standard
UL UL60065: 7th Ed.,2007 Audio/Video Apparatus
cUL CAN/CSA C22.2 No.60065-03,1st Ed.,2006+A1:2006
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PRODUCT SPECIFICATION
IEC60065:2001+ A1:2005 +A2:2010 /
CB
EN60065:2002 + A1:2006 + A11:2008+A2:2010+A12:2011
If the module displays the same pattern for a long period of time, the phenomenon of image sticking may be occurred.
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11. MECHANICAL CHARACTERISTIC
PRODUCT SPECIFICATION
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PRODUCT SPECIFICATION
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