CHIMEI INNOLUX V460H1-LH5 Specification

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MODEL NO.: V460H1

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PRODUCT SPECIFICATION

ʳ

ϭ Tentative Specificationʳ

Preliminary Specificationʳ

ϭ
Ϯ

Approval Specification

SUFFIX: LH5

Approved By Checked By Prepared By

Chao-Chun Chung

Josh Chi

Lynn Cheng

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CONTENTS

1. GENERAL DESCRIPTION................................................................................................................................................... 5

1.1 OVERVIEW......................................................................................................................................................5

1.2 FEATURES......................................................................................................................................................5

1.3 APPLICATION..................................................................................................................................................5

1.4 GENERAL SPECIFICATIONS ..........................................................................................................................5

1.5 MECHANICAL SPECIFICATIONS....................................................................................................................6

2. ABSOLUTE MAXIMUM RATINGS ....................................................................................................................................7

2.1 ABSOLUTE RATINGS OF ENVIRONMENT .....................................................................................................7

2.2 PACKAGE STORAGE......................................................................................................................................8

2.3 ELECTRICAL ABSOLUTE RATINGS ...............................................................................................................8

2.3.1 TFT LCD MODULE...............................................................................................................................8

2.3.2 BACKLIGHT BALANCE BOARD UNIT .................................................................................................8

3. ELECTRICAL CHARACTERISTICS ................................................................................................................................... 9

3.1 TFT LCD MODULE ..........................................................................................................................................9

3.2 BACKLIGHT CONNECTOR PIN CONFIGURATION.......................................................................................12

3.2.1 LAMP SPECIFICATION......................................................................................................................12

3.2.2 ELECTRICAL SPECIFICATION..........................................................................................................12

4. BLOCK DIAGRAM OF INTERFACE................................................................................................................................ 14

4.1 TFT LCD MODULE ........................................................................................................................................14

5. INPUT TERMINAL PIN ASSIGNMENT .......................................................................................................................... 15

5.1 TFT LCD Module Input ...................................................................................................................................15

5.2 BACKLIGHT UNIT .........................................................................................................................................18

5.3 BALANCE BOARD UNIT................................................................................................................................19

5.4 BLOCK DIAGRAM OF INTERFACE...............................................................................................................20

5.5 LVDS INTERFACE.........................................................................................................................................21

5.6 COLOR DATA INPUT ASSIGNMENT .............................................................................................................22

6. INTERFACE TIMING......................................................................................................................................................... 23

6.1 INPUT SIGNAL TIMING SPECIFICATIONS....................................................................................................23

6.2 POWER ON/OFF SEQUENCE.......................................................................................................................26

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7. OPTICAL CHARACTERISTICS ........................................................................................................................................ 27

7.1 TEST CONDITIONS.......................................................................................................................................27

7.2 OPTICAL SPECIFICATIONS..........................................................................................................................28

8. PRECAUTIONS ..................................................................................................................................................................31

8.1 ASSEMBLY AND HANDLING PRECAUTIONS...............................................................................................31

8.2 SAFETY PRECAUTIONS...............................................................................................................................31

9. DEFINITION OF LABELS.................................................................................................................................................. 32

9.1 CMI MODULE LABEL ....................................................................................................................................32

10. PACKAGING .................................................................................................................................................................... 34

10.1 PACKAGING SPECIFICATIONS ..................................................................................................................34

10.2 PACKAGING METHOD................................................................................................................................34

11. MECHANICAL CHARACTERISTIC .............................................................................................................................. 36

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Version Date Page(New) Section Description

Ver. 2.1 Jan. 21, 2011 All All The Approval Specification was first issued.

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PRODUCT SPECIFICATION

REVISION HISTORY

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1. GENERAL DESCRIPTION

1.1 OVERVIEW

V460H1-LH5 is a 46” TFT Liquid Crystal Display module with 16-CCFL Backlight unit and 4ch-LVDS interface.

This module supports 1920 x 1080 Full HDTV format and can display 1.073G colors (8-bit+FRC). The balance

board module for backlight is built-in.

1.2 FEATURES

Ё

High brightness (500 nits)

Ё

High contrast ratio (5000:1)

Ё

Fast response time (Gray to gray average 4.5 ms)

Ё

High color saturation (NTSC 72%)

Ё

Full HDTV (1920 x 1080 pixels) resolution, true HDTV format

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Ё

DE (Data Enable) only mode

Ё

LVDS (Low Voltage Differential Signaling) interface

Ё

Optimized response time for 120 Hz frame rate

Ё

Ultra wide viewing angle : Super MVA technology

Ё

RoHs compliance

1.3 APPLICATION

Ё

Standard Living Room TVs

Ё

Public Display Application

Ё

Home Theater Application

Ё

MFM Application

1.4 GENERAL SPECIFICATIONS

Item Specification Unit Note

Active Area 1018.08(H) x 572.67 (V) (46” diagonal) mm

Bezel Opening Area 1024.4 (H) x 578.6 (V) mm

(1)

Driver Element a-si TFT active matrix - -

Pixel Number 1920 x R.G.B. x 1080 pixel -

Pixel Pitch(Sub Pixel) 0.17675 (H) x 0.53025 (V) mm -

Pixel Arrangement RGB vertical stripe - -

Display Colors 1.073G color -

Display Operation Mode Transmissive mode / Normally Black - -

Surface Treatment Glare coating (super clear), Hardness (3H) - (2)

Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and back outlines.

Note (2) The spec. of the surface treatment is temporarily for this phase. CMI reserves the rights to change this feature.

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1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal (H) - 1083.0 - mm (1)

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PRODUCT SPECIFICATION

Module Size

Weight - 13213 - g -

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

Note (2) Module Depth is between bezel to balance board cover.

Vertical (V) - 627.0 - mm (1)

Depth (D) - 53.2 - mm (2)

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2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature TST -20 60 ºC (1)

Operating Ambient Temperature TOP 0 50 ºC (1), (2)

Shock (Non-Operating) SNOP - 50.0 G (3), (5)

Vibration (Non-Operating) VNOP - 1.0 G (4), (5)

Note (1) Temperature and relative humidity range is shown in the figure below.

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Value

Unit Note

Min. Max.

(a) 90 %RH Max. (Ta

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The maximum operating temperature is based on the test condition that the surface temperature of

display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.

Thermal management should be considered in final product design to prevent the surface temperature

of display area from being over 65 ºC. The range of operating temperature may degrade in case of

improper thermal management in final product design.

Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.

Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that

the module would not be twisted or bent by the fixture.

Љ

40 ºC).

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2.2 PACKAGE STORAGE

When storing modules as spares for a long time, the following precaution is necessary.

(a) Do not leave the module in high temperature, and high humidity for a long time. It is highly recommended to

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PRODUCT SPECIFICATION

store the module with temperature from 0 to 35

(b) The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent

light.

2.3 ELECTRICAL ABSOLUTE RATINGS

2.3.1 TFT LCD MODULE

Item Symbol

Power Supply Voltage VCC -0.3 13.5 V

Logic Input Voltage VIN -0.3 3.6 V

2.3.2 BACKLIGHT BALANCE BOARD UNIT

Item Symbol

Lamp Voltage V - 3000 VRMS Lamp Voltage

к

at normal humidity without condensation.

Value

Unit Note

Min. Max.

Value

Unit Note

Min. Max.

(1)

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

Note (2) No moisture condensation or freezing.

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3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE

(Ta = 25 ± 2 ºC)

Parameter Symbol

Power Supply Voltage VCC 10.8 12 13.2 V (1)

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PRODUCT SPECIFICATION

Value

Unit Note

Min. Typ. Max.

Rush Current I

- - 4.4 A (2)

RUSH

White Pattern - 1.1 1.45

Power Supply
Current

Differential Input High
Threshold Voltage

Differential Input Low

Threshold Voltage
LVDS
interface

Common Input Voltage VCM 1.0 1.2 1.4 V

Differential input voltage

(single-end)

Terminating Resistor R

Input High Threshold
CMIS
interface

Voltage

Input Low Threshold

Voltage

Black Pattern - 0.95

Horizontal Stripe

- 1.9 2.47

V

LVT H

V

LVTL

| 200 - 600 mV

|V

ID

- 100 - ohm

T

2.7 - 3.3 V

V

IH

0 - 0.7 V

V

IL

+100 - - mV

- - -100 mV

Note (1) The module should be always operated within the above ranges.

Note (2) Measurement Conditions:

A (3)

(4)

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Note (3) The specified power supply current and power consumption is under the conditions at Vcc = 12 V, Ta =

25 ± 2 ºC, f

a. White Pattern

GND

= 60 Hz, whereas a power dissipation check pattern below is displayed.

v

Vcc rising time is 470us

Vcc

0.1Vcc

470us

b. Black Pattern

Active Area

c. Horizontal Pattern

Active Area

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Note (4) The LVDS input characteristics are as follows:

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3.2 BACKLIGHT CONNECTOR PIN CONFIGURATION

3.2.1 LAMP SPECIFICATION (Ta = 25 ± 2 ºC)

PRODUCT SPECIFICATION

Parameter Symbol

Unit Note

Min. Typ. Max.

Value

Lamp Input Voltage VL - 1170 - V

Lamp Current IL 10.2 10.5 10.8 mA

- - 2050 V

Lamp Turn On Voltage VS

- - 1660 V

-

RMS

RMS

(1) , Ta = 0 ºC

RMS

(1) , Ta = 25 ºC

RMS

Operating Frequency FO 30 - 80 KHz (2)

Lamp Life Time LBL 50,000 - - Hrs (3)

3.2.2 ELECTRICAL SPECIFICATION (Ta = 25 ± 2 ºC)

Value

Parameter Symbol

Unit Note

Min. Typ. Max.

Input High Voltage High

Protection Circuit Supply

Voltage

Input Current I

-

Vcc

175 mArms

BL(HV)

10 12 15

1180

-

Vrm s

V

(6)

Oscillating Frequency FW 43 46 49 kHz

Individual Lamp Current IL 10.2 10.5 10.8 mA (5)

Lamp

Detection

High LD

Low LD

5

-

- - V Normal Operation

- 1.5 V Lamp Connector Open

Dimming frequency FB 135 150 165 Hz

Minimum Duty Ratio D

15 % (8)

MIN

Note (1) Lamp current is measured by utilizing AC current probe and its value is average by measuring

master and slave board.:

Note (2) The lamp starting voltage V

should be applied to the lamp for more than 1 second after startup.

S

Otherwise the lamp may not be turned on.

Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the display

input signals, and it may result in line flow on the display. In order to avoid interference, the lamp

frequency should be detached from the horizontal synchronous frequency and its harmonics as far

as possible.

Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and

the effective discharge length is longer than 80% of its original length (Effective discharge length is

defined as an area that has equal to or more than 70% brightness compared to the brightness at

the center point of lamp.) as the time in which it continues to operate under the condition at Ta = 25

2к

and IL = 11~13mArms.

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Note (5) Lamp current is measured master board by utilizing high frequency current meters as shown below:

Note (6) Input voltage Hv based on spec. +-7% tolerance.

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Note (7) Asymmetric ratio must be from 90% to 110% (0.9<Ip/ I

Note (8) The minimum dimming under 7% operation should cause shutdown by protection circuit.

Ip

I-p

rms@T/2XЅ2

<1.1)

T

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4. BLOCK DIAGRAM OF INTERFACE

4.1 TFT LCD MODULE

CH1_0(+/-)
CH1_1(+/-)
CH1_2(+/-)
CH1_3(+/-)
CH1_4(+/-)
CH1_CLK(+/-)

CH2_0(+/-)
CH2_1(+/-)
CH2_2(+/-)
CH2_3(+/-)
CH2_4(+/-)
CH2_CLK(+/-)

JAE FI-RE41S-HF +JAE FI-RE51S-HF or

INPUT CONNECTOR

CH3_0(+/-)
CH3_1(+/-)
CH3_2(+/-)
CH3_3(+/-)
CH3_4(+/-)
CH3_CLK(+/-)

CH4_0(+/-)
CH4_1(+/-)
CH4_2(+/-)
CH4_3(+/-)
CH4_4(+/-)

SELLVDS

equivalent

-

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PRODUCT SPECIFICATION

TIMING

CONTROLLER

DC/DC CONVERTER

SCAN DRIVER

TFT LCD PANEL

(1920x3x1080)

DATA DRIVER

VCC
GND

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5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD Module Input

CNF3 Connector Pin Assignment (FI-RE41S-HF(JAE) or equivalent)

Pin Name Description Note

1 GND Ground
2 N.C. No Connection
3 N.C. No Connection
4 N.C. No Connection
5 N.C. No Connection
6 N.C. No Connection
7 N.C. No Connection
8 N.C. No Connection

9 GND Ground
10 CH3_0N Third Pixel Negative LVDS differential data input. Channel 0
11 CH3_0P Third Pixel Positive LVDS differential data input. Channel 0
12 CH3_1N Third Pixel Negative LVDS differential data input. Channel 1
13 CH3_1P Third Pixel Positive LVDS differential data input. Channel 1
14 CH3_2N Third Pixel Negative LVDS differential data input. Channel 2
15 CH3_2P Third Pixel Positive LVDS differential data input. Channel 2
16 GND Ground
17 CH3_CLKN
18 CH3_CLKP
19 GND Ground
20 CH3_3N Third Pixel Negative LVDS differential data input. Channel 3
21 CH3_3P Third Pixel Positive LVDS differential data input. Channel 3
22 CH3_4N Third Pixel Negative LVDS differential data input. Channel 4
23 CH3_4P Third Pixel Positive LVDS differential data input. Channel 4
24 N.C. No Connection
25 N.C. No Connection
26 CH4_0N Fourth Pixel Negative LVDS differential data input. Channel 0
27 CH4_0P Fourth Pixel Positive LVDS differential data input. Channel 0
28 CH4_1N Fourth Pixel Negative LVDS differential data input. Channel 1
29 CH4_1P Fourth Pixel Positive LVDS differential data input. Channel 1
30 CH4_2N Fourth Pixel Negative LVDS differential data input. Channel 2
31 CH4_2P Fourth Pixel Positive LVDS differential data input. Channel 2
32 GND Ground
33 CH4_CLKN
34 CH4_CLKP
35 GND Ground
36 CH4_3N Fourth Pixel Negative LVDS differential data input. Channel 3
37 CH4_3P Fourth Pixel Positive LVDS differential data input. Channel 3
38 CH4_4N Fourth Pixel Negative LVDS differential data input. Channel 4
39 CH4_4P Fourth Pixel Positive LVDS differential data input. Channel 4
40 N.C. No Connection
41 N.C. No Connection

Third Pixel Negative LVDS differential clock input.
Third Pixel Positive LVDS differential clock input.

Fourth Pixel Negative LVDS differential clock input.
Fourth Pixel Positive LVDS differential clock input.

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(1)

(4)

(4)

(1)

(4)

(4)

(1)

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CNF2 Connector Pin Assignment (FI-RE51S-HF-J(JAE) or equivalent )

Pin Name Description Note

1 N.C. No Connection

2 N.C. No Connection

3 N.C. No Connection

4 N.C. No Connection

5 N.C. No Connection

6 N.C. No Connection

7 SELLVDS LVDS data format Selection (2)

8 N.C. No Connection

9 N.C. No Connection
10 N.C. No Connection
11 GND Ground
12 CH1_0N First Pixel Negative LVDS differential data input. Channel 0
13 CH1_0P First Pixel Positive LVDS differential data input. Channel 0
14 CH1_1N First Pixel Negative LVDS differential data input. Channel 1
15 CH1_1P First Pixel Positive LVDS differential data input. Channel 1
16 CH1_2N First Pixel Negative LVDS differential data input. Channel 2
17 CH1_2P First Pixel Positive LVDS differential data input. Channel 2
18 GND Ground
19 CH1_CLKN
20 CH1_CLKP
21 GND Ground
22 CH1_3N First Pixel Negative LVDS differential data input. Channel 3
23 CH1_3P First Pixel Positive LVDS differential data input. Channel 3
24 CH1_4N First Pixel Negative LVDS differential data input. Channel 4
25 CH1_4P First Pixel Positive LVDS differential data input. Channel 4
26 N.C. No Connection
27 N.C. No Connection
28 CH2_0N Second Pixel Negative LVDS differential data input. Channel 0
29 CH2_0P Second Pixel Positive LVDS differential data input. Channel 0
30 CH2_1N Second Pixel Negative LVDS differential data input. Channel 1
31 CH2_1P Second Pixel Positive LVDS differential data input. Channel 1
32 CH2_2N Second Pixel Negative LVDS differential data input. Channel 2
33 CH2_2P Second Pixel Positive LVDS differential data input. Channel 2
34 GND Ground
35 CH2_CLKN
36 CH2_CLKP Second Pixel Positive LVDS differential clock input.
37 GND Ground
38 CH2_3N Second Pixel Negative LVDS differential data input. Channel 3
39 CH2_3P Second Pixel Positive LVDS differential data input. Channel 3

40 CH2_4N Second Pixel Negative LVDS differential data input. Channel 4

41 CH2_4P Second Pixel Positive LVDS differential data input. Channel 4
42 N.C. No Connection
43 N.C. No Connection
44 GND Ground
45 GND Ground

First Pixel Negative LVDS differential clock input.
First Pixel Positive LVDS differential clock input.

Second Pixel Negative LVDS differential clock input.

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PRODUCT SPECIFICATION

(1)

(1)

(3)

(3)

(1)

(3)

(3)

(1)

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46 GND Ground
47 N.C. No Connection
48 Vin Power input (+12V)
49 Vin Power input (+12V)
50 Vin Power input (+12V)
51 Vin Power input (+12V)

Note (1) Please be reserved to open.

Note (2) Low or Open: VESA Format(default), connect to GND. High: JEIDA Format, connect to+3.3V.

Note (3) LVDS 4-Port Data Mapping

Port CH of LVDS Data Stream

1st Port First pixel 1, 5, 9, ..........., 1913, 1917

2nd Port Second pixel 2, 6, 10, ........., 1914, 1918

3rd Port Third pixel 3, 7, 11, ........., 1915, 1919

4th Port Fourth pixel 4, 8, 12, ........., 1916, 1920

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)

)

)

)

)

)

5.2 BACKLIGHT UNIT

The pin configuration for the housing and the leader wire is shown in the table below.

CN101-CN108: CP042ESFA00 (Cvilux)

Pin Name Description Wire Color

1 HV High Voltage Blue
2 HV High Voltage White

Note (1) The backlight interface housing for high voltage side is a model CP042ESFA00,

manufactured by Cvilux. The mating header on inverter part number is

CP042EP1MFB-LF (Cvilux)

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1.HV (Blue

2.HV(White

HV

1.HV (Blue

2.HV (White

1.HV (Blue

2.HV (White

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5.3 BALANCE BOARD UNIT

CN127 (Header) (Master): 130001WR-02E (YEONHO)

Pin No. Symbol Description

1
2

HV+(-) High Voltage Input
HV+(-) High Voltage Input

CN227 (Header) (Slave): 130001WR-02E (YEONHO)

Pin No. Symbol Description

1
2

HV-(+) High Voltage Input
HV-(+) High Voltage Input

CN101-CN108 (Header) (Master): CP042EP1MFB-LF (CviLux)

Pin No. Symbol Description

1
2

CCFL HOT CCFL High voltage
CCFL HOT CCFL High voltage

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PRODUCT SPECIFICATION

CN125 (Header): KN30-7P-1.25H (Hirose).

Pin No. Symbol Description

1
2
3
4
5
6
7

VCC Power Supply for Protection Circuit

FB1 Lamp Current Feedback 1

FB2 Lamp Current Feedback 2
GND
GND

LD CCFL Connector Open & Non-lighting signal
LD CCFL Connector Open & Non-lighting signal

Signal Ground
Signal Ground

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5.4 BLOCK DIAGRAM OF INTERFACE

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5.5 LVDS INTERFACE

VESA Format: SELLVDS = H or Open

JEIDA Format: SELLVDS = L

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AR0~AR9: First Pixel R Data (9; MSB, 0; LSB)

AG0~AG9: First Pixel G Data (9; MSB, 0; LSB)

AB0~AB9: First Pixel B Data (9; MSB, 0; LSB)

DE : Data enable signal

DCLK : Data clock signal

RSVD : Reserved

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5.6 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 10-bit gray scale data input for the

color. The higher the binary input, the brighter the color. The table below provides the assignment of color

versus data input.

0
0
1
0
1
0
1
1
0
0
0

:

:
0
0
0
0
0
0

:

:
1
1
1

0
0
0

:

:
0
0
0

Data Signal

0

0

0

0

1

1

0

0

1

1

0

0

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

1

1

1

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

1

1

1

0

0

0

1

1

1

1

1

1
0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0
0

0

0

0

0

1

0

1

0

:

:

:

:

:

:

1

0

1

1

1

0

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

0

0

0

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

;

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

1

1

1

1

1

1

1

1

1

0

0

0

0

1

1

1

1

1

1

1

1

1

0

0

0

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0
0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

1

1

1
1

1

1

1

1

1

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

0

0

0

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

:

:

:

:

:

:

1

1

0

1

1

1

1

1

1

Basic
Colors

Gray
Scale
Of
Red

Gray
Scale
Of
Green

Gray
Scale
Of
Blue

Color

Black
Red
Green
Blue
Cyan
Magenta
Yel lo w
White
Red (0) / Dark
Red (1)
Red (2)

:

:
Red (1021)
Red (1022)
Red (1023)
Green (0) / Dark
Green (1)
Green (2)

:

:
Green (1021)
Green (1022)
Green (1023)

Blue (0) / Dark
Blue (1)
Blue (2)

:

:
Blue (1021)
Blue (1022)
Blue (1023)

R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 G9 G8 G7 G6 G5 G4 G3 G2 G1 G0 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0

0

0

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

Red Green Blue

0

0

0

0

0

0

1

1

1
0
0
0
1
1
1
0
0
0

:

:
1
1
1
0
0
0

:

:
0
0
0

0
0
0

:

:
0
0
0

1

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

1

1

1

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

1

:

:

:

:

:

:

1

1

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

Note (1) 0: Low Level Voltage, 1: High Level Voltage

0

0

1

0

0

1

0

0

0

1

1

0

1

1

1

1

0

0

1

0

0

0

:

:

:

:

1

0

0

0

1

0

0

0

0

0

0

0

:

:

:

:

0

1

0

1

0

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0
0
0
1
1
1
0
1
0
0
0

:

:
0
0
0
0
0
0

:

:
0
0
0

0
1
0

:

:
1
0
1

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6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

(Ta = 25 ± 2 ºC)

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

F

(=1/TC)

clkin_mod

F

F

LVDS

Receiver

Clock

Frequency

Input cycle to
cycle jitter
Spread spectrum
modulation range

Spread spectrum
modulation frequency

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PRODUCT SPECIFICATION

clkin

- - 200 ps (3)

T

rcl

- - 200 KHz

SSM

60 74.25 80 MHz

F

-2% - F

clkin

+2% MHz

clkin

(4)

LVDS

Receiver

Data

Setup Time Tlvsu 600 - - ps

(5)

Hold Time Tlvhd 600 - - ps

Fr5 - 100 - Hz

Tv=Tvd+T vb

Vertical

Active

Display

Term

Frame Rate

- 120 - Hz

F

r6

Total Tv 1115 1125 1135 Th

Display Tvd 1080 1080 1080 Th

Blank Tvb 35 45 55 Th

Horizontal

Active

Display

Term

Total Th 540 550 575 Tc

Display Thd 480 480 480 Tc

Blank Thb 60 70 95 Tc

Th=Thd+Thb

Note (1) Please make sure the range of pixel clock has follow the below equationΚ

Fclkin(max)

Fr5

Ѽ

Њ

Fr6 Ѽ Tv Ѽ Th

Tv Ѽ Th Њ Fclkin(min)

Note (2) This module is operated in DE only mode and please follow the input signal timing diagram below

Κ

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PRODUCT SPECIFICATION

INPUT SIGNAL TIMING DIAGRAM

DE

Th

DCLK

T

DE

DATA

Tvd

c

T

hb

Tv

Valid display data (960 clocks)

Tvb

Thd

Note (3) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T

– TI

1

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Note (4) The SSCG (Spread spectrum clock generator) is defined as below figures.

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PRODUCT SPECIFICATION

Note (5) The LVDS timing diagram and setup/hold time is defined and showing as the following figures.

RXCLK+/-

RXn+/-

LVDS RECEIVER INTERFACE TIMING DIAGRAM

Tc

Tlvsu

Tlvhd

1T

14

3T

14

5T

14

7T

14

9T

14

11T

14

13T

14

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6.2 POWER ON/OFF SEQUENCE

(Ta = 25 ± 2 ºC)

To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram

below.

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PRODUCT SPECIFICATION

50ms

50ms

Љ

T4

0V

0.5ЉT1Љ10ms

ЉT2Љ

0

ЉT3Љ

0

500ms

0.1V

CC

T3 T1

2

T

0.1V

T4

cc

LVDS Signals

0V

Power On

VALI D

Power Off

0

ЉЉЉЉ

T

7

ЉЉЉЉ

ЉЉЉЉ

T2

T

8

ЉЉЉЉ

T3

T7

8

T

0

Option Signals

(SELLVDS)

Backlight (Recommended)

Љ

500ms

100ms

T5

Љ

T6

50%

5

T

50%

6

T

Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.

Note (2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD

operation or the LCD turns off before the backlight turns off, the display may momentarily become

abnormal screen.

Note (3) In case of VCC is in off level, please keep the level of input signals on the low or high impedance.

Note (4) T4 should be measured after the module has been fully discharged between power off and on period.

Note (5) Interface signal shall not be kept at high impedance when the power is on.

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Power ON/OFF Sequence

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7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit

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PRODUCT SPECIFICATION

Ambient Temperature Ta

Ambient Humidity Ha

Supply Voltage VCC 12 V

Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"

Lamp Current IL

Oscillating Frequency (Inverter) FW

Vertical Frame Rate Fr 120 Hz

The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature change during

measuring in a windless room.

25±2

50±10

10.5±0.3

46±3

o

C

%RH

mA

KHz

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7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should be

measured under the test conditions described in 7.1 and stable environment shown in 7.1.

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR 4000 5000 - - (2)

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PRODUCT SPECIFICATION

Response Time (VA)

Center Luminance of White LC 400 500 - cd/m

White Variation

Cross Talk CT - - 4 % (5)

Red

Green

Color
Chromaticity

Blue

White

Color Gamut C.G

Gray to

gray

δW

Rx

Ry 0.323 -

Gx

Gy 0.602 -

Bx

By 0.056 -

Wx 0.280

Wy

θx=0°, θy =0°

Viewing angle

at normal direction

- 4.5 8 ms (3)

2

(4)

- - 1.3 - (6)

0.634

0.287

Typ.

-0.03

0.148

Typ.

+0.03

0.290

- 72 - % NTSC

-

-

-

-

-

-

Viewing
Angle

Horizontal

Vertical

θx+

θx-

θY+

θY-

CR≥20

80 88 -

80 88 -

Deg. (1)

80 88 -

80 88 -

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Note (1) Definition of Viewing Angle (θx, θy) :

Viewing angles are measured by Conoscope Cono-80 ( or Eldim EZ-Contrast 160R)

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PRODUCT SPECIFICATION

Normal

θx =θy = 0º

Note (2) Definition of Contrast Ratio (CR) :

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) =

L255: Luminance of gray level 255

L 0: Luminance of gray level 0

θx- = 90º

6 o’clock

y-

θy- = 90º

x-

θy-

θx−

θy+

θx+

12 o’clock direction

θy + = 90º

x

+

θx+ = 90º

L255 of Luminance Surface

L0 of Luminance Surface

CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note

(6).

Note (3) Definition of Gray-to-Gray Switching Time:

The driving signal means the signal of gray level 0, 31, 63, 95, 127, 159, 191, 223 and 255.

Gray to gray average time means the average switching time of gray level 0, 31, 63, 95, 127, 159, 191,

223 and 255 to each other.

100%

90%

Optical

Response

10%

0%

Gray to gray

switching time

Gray to gray

Time

switching time

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T

(

)

(

)

Note (4) Definition of Luminance of White (LC):

Measure the luminance of gray level 255 at center point and 5 points

L

= L (5), where L (X) is corresponding to the luminance of the point X at the figure in Note (6).

C

Note (5) Definition of Cross Talk (CT):

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PRODUCT SPECIFICATION

CT = | Y

– YA | / YA × 100 (%)

B

Where:

Y

= Luminance of measured location without gray level 255 pattern (cd/m2)

A

Y

= Luminance of measured location with gray level 255 pattern (cd/m2)

B

(0, 0)

Active Area

Y

(D/2,W/8)

A, U

Y

(D/2,W/8)

A, U

Gray 0

(D/8,W/2)

Y

A, L

Y

(D/2,7W/8)

Y

A, D

Note (6) Definition of White Variation (δW):

Measure the luminance of gray level 255 at 5 points

(7D/8,W/2)

A, R

(D, W)

0, 0

(D/8,W/2)

Y

B, L

(D/4,W/4)

Active Area

Y

Gray 255

(D/2,W/8)

B, U

Y

(3D/4,3W/4)

(7D/8,W/2)

B, R

D, W

δW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

Horizontal Line

D

D/4 D/2 3D/4

1 2

: Test Point

5

3 4

3

X=1 to 5

W

W/4

W/2

Vertical Line

Active Area

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PRODUCT SPECIFICATION

8. PRECAUTIONS

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

[ 1 ] Do not apply rough force such as bending or twisting to the module during assembly.

[ 2 ] It is recommended to assemble or to install a module into the user’s system in clean working areas. The

dust and oil may cause electrical short or worsen the polarizer.

[ 3 ] Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.

[ 4 ] Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the

damage and latch-up of the CMIS LSI chips.

[ 5 ] Bezel of Set can not press or touch the panel surface. It will make light leakage or scrape.

[ 6 ] Do not plug in or pull out the I/F connector while the module is in operation.

[ 7 ] Do not disassemble the module.

[ 8 ] Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and easily

scratched.

[ 9 ] Moisture can easily penetrate into LCD module and may cause the damage during operation.

[ 10 ] When storing modules as spares for a long time, the following precaution is necessary.

[ 10.1 ] Do not leave the module in high temperature, and high humidity for a long time. It is highly

recommended to store the module with temperature from 0 to 35

condensation.

[ 10.2 ] The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or

fluorescent light.

[ 11 ] When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the

response time will become slow, and the starting voltage of CCFL will be higher than that of room

temperature.

8.2 SAFETY PRECAUTIONS

[ 1 ] The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while

assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit.

[ 2 ] If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of

contact with hands, skin or clothes, it has to be washed away thoroughly with soap.

к

at normal humidity without

[ 3 ] After the module’s end of life, it is not harmful in case of normal operation and storage.

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9. DEFINITION OF LABELS

9.1 CMI MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

CHI MEI

OPTOELECTRONICS

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PRODUCT SPECIFICATION

V460H1 -LH5 Rev. XX

X X X X X X X Y M D L N N N N

GEMN

CM46H15XXXXXLXXLYMDNNNN

CHI MEI

OPTOELECTRONICS

(a) Model Name: V460H1-LH5

(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.

(c) CMO barcode definition:

Serial ID: XX-XX-X-XX-YMD-L-NNNN

Code Meaning Description

XX CMO internal use ­XX Revision Cover all the change

X-XX CMO internal use -

YMD

L Product line # 1Ш Line 1, 2Ш Line 2,…etc.

NNNN Serial number Manufacturing sequence of product

Year, month, day

V460H1 - LH5 Rev. XX

X X X X X X X Y M D L N N N N

CM46H15XXXXXLXXLYMDNNNN

Year: 2001=1, 2002=2, 2003=3, 2004=4…2010=0, 2011=1, 2012=2….
Month: 1~9, A~C for Jan. ~ Dec.
Day: 1~9, A~Y for 1

st

to 31st , exclude I, O, and U

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X

y

(d) Customer’s barcode definition:

Serial ID: CM-46H15-X-X-X-XX-L-XX-L-YMD-NNNN

Code Meaning Description

CM Supplier code CMI=CM

46H11

XX

XX

YMD

NNNN Serial number

Model number
Revision code

Source driver IC code

X

Gate driver IC code

X

Cell location Tainan, Taiwan=TN

L Cell line # 1~12=0~C

Module location Tainan, Taiwan=TN
Module line # 1~12=0~C

L

Year, month, day

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PRODUCT SPECIFICATION

V460H1-LH5=46H15
C1=A, C2=B, …...

Century=1, CLL=2, Demos=3, Epson=4, Fujitsu=5, Himax=6,
Hitachi=7, Hynix=8, LDI=9, Matsushita=A, NEC=B, Novatek=C,
OKI=D, Philips=E, Renasas=F, Samsung=G, Sanyo=H, Sharp=I,
TI=J, Topro=K, Toshiba=L, Windbond=M

Year: 2001=1, 2002=2, 2003=3, 2004=4…2010=0, 2011=1, 2012=2….
Month: 1~9, A~C for Jan. ~ Dec.
Day: 1~9, A~Y for 1

LCD supplier

B

st

to 31st , exclude I, O, and U

Version 2.1 33 Date

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10. PACKAGING

10.1 PACKAGING SPECIFICATIONS

(1) 3 LCD TV modules / 1 Box

(2) Box dimensions : 1190(L)x280(W)x712(H)mm

(3) Weight : Approx. 46Kg (3 modules per carton)

10.2 PACKAGING METHOD

Figures 10-1 and 10-2 are the packing method

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PRODUCT SPECIFICATION

Figure 10-1 packing method

Version 2.1 34 Date

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PRODUCT SPECIFICATION

Figure 10-2 packing method

Version 2.1 35 Date

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11. MECHANICAL CHARACTERISTIC

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PRODUCT SPECIFICATION

Version 2.1 36 Date

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PRODUCT SPECIFICATION

Version 2.1 37 Date

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One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

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21 Jan.2011

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Global LCD Panel Exchange Center

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PRODUCT SPECIFICATION

Version 2.1 38 Date

The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

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21 Jan.2011

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