CHIMEI INNOLUX V460H1-L09 Specification

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MODEL NO.: V460H1 - L09
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
TV Product Marketing & Management Div
Approved By
Chao-Chun Chung
QA Dept. Product Development Div.
Reviewed By
Hsin-Nan Chen
WT Lin
LCD TV Marketing and Product Management Div.
Prepared By
Josh Chi Steven Tu
CONTENTS -
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
REVISION HISTORY
1. GENERAL DESCRIPTION
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
2.2.2 BACKLIGHT INVERTER UNIT
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
3.2.1 CCFL(Cold Cathode Fluorescent Lamp) CHARACTERISTICS
3.2.2 INVERTER CHARACTERISTICS
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
5. INTERFACE PIN CONNECTION
5.1 TFT LCD MODULE
5.2 BACKLIGHT UNIT
5.3 INVERTER UNIT
5.4 BLOCK DIAGRAM OF INTERFACE
5.5 LVDS INTERFACE
5.6 COLOR DATA INPUT ASSIGNMENT
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3
4
5
7
12
13
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
6.2 POWER ON/OFF SEQUENCE
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
7.2 OPTICAL SPECIFICATIONS
8. DEFINITION OF LABELS
9. PACKAGING
9.1 PACKING SPECIFICATIONS
9.2 PACKING METHOD
10. PRECAUTIONS
10.1 ASSEMBLY AND HANDLING PRECAUTIONS
10.2 SAFETY PRECAUTIONS
10.3 SAFETY STANDARDS
11. MECHANICAL CHARACTERISTICS
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27
31
33
36
37
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
REVISION HISTORY
Version Date
Ver 1.0 Dec. 25,’09 All All Preliminary Specification was first issued.
Page
(New)
Section Description
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
V460H1-L09 is a 46” TFT Liquid Crystal Display module with 14-CCFL Backlight unit and 2ch-LVDS
interface. This module supports 1920 x 1080 HDTV format and can display true 16.7M colors (8-bit/color).
The inverter for backlight is built-in.
1.2 FEATURES
- High brightness (450nits)
- High contrast ratio (6000:1)
- Fast response time (Gray to Gray average 6.5 ms)
- High color saturation (72% NTSC)
- Full HDTV (1920 x 1080 pixels) resolution, true HDTV format
- DE (Data Enable) only mode
- LVDS (Low Voltage Differential Signaling) interface
- Optimized response time for 60 Hz frame rate
- Ultra wide viewing angle: Super MVA technology
1.3 APPLICATION
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Model No.: V460H1 - L09
Preliminary
- Standard Living Room TVs.
- Public Display Application.
- Home Theater Application.
- MFM Application.
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note Active Area 1018.08(H) x 572.67(V) (46” diagonal) mm Bezel Opening Area 1024.4(H) x 578.6(V) mm Driver Element a-si TFT active matrix - ­Pixel Number 1920x R.G.B. x 1080 pixel ­Pixel Pitch(Sub Pixel) 0.17675(H) x 0.53025(V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 16.7M color ­Display Operation Mode Transmissive mode / Normally black - -
Surface Treatment
Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and
back outlines.
Note (2) The spec of the surface treatment is temporarily for this phase. CMO reserves the rights to
change this feature.
Anti-Glare coating (Haze 11%)
Hardness (3H)
- (2)
(1)
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal (H) - 1083 - mm
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Note (2) Module Depth does not include connectors.
Vertical (V) - 627 - mm
Depth (D) - 53.8 - mm
Weight - 13080 - g -
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2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
Item Symbol
Storage Temperature T
Operating Ambient Temperature T
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in your product design to prevent the surface temperature
of display area from being over 65 ºC. The range of operating temperature may degrade in case of
improper thermal management in your product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, and ± Z.
ST
OP
X, Y axis - 50 G (3), (5)
NOP
Z axis - 35 G (3), (5)
NOP
Min. Max.
Value
Unit Note
-20 +60 ºC (1)
0 50 ºC (1), (2)
- 1.0 G (4), (5)
Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that
the module would not be twisted or bent by the fixture. The module would not be twisted or bent by the
fixture.
Relative Humidity (%RH)
100
90
80
60
Operating Range
40
20
10
Storage Range
2.2 ELECTRICAL ABSOLUTE RATINGS Temperature (ºC)
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80 60 -20 40 0 20 -40
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2.2.1 TFT LCD MODULE
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
Item Symbol
Min. Max.
Power Supply Voltage VCC -0.3 13.5 V
Logic Input Voltage VIN -0.3 3.6 V
Value
Unit Note
(1)
2.2.2 BACKLIGHT INVERTER UNIT
Item Symbol
Lamp Voltage V
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
W
Value
Min. Max.
Ё
3000 V
Unit Note
RMS
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3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
Ta = 25 ± 2 ºC)
(
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
Parameter Symbol
Unit Note
Min. Typ. Max.
Power Supply Voltage VCC 10.8 12 13.2 V (1)
Value
Rush Current I
White Pattern
Power Supply Current
Black Pattern
Horizontal Stripe
Differential Input High Threshold Voltage
LVDS Interface
Differential Input Low Threshold Voltage
Common Input Voltage V
Differential input voltage |VID| 200 Terminating Resistor R
CMOS interface
Input High Threshold Voltage VIH 2.7
Input Low Threshold Voltage V
RUSH
I
CC
V
+100
LVTH
V
LVTL
1.0 1.2 1.4 V
CM
- 100 -
T
0
IL
ЁЁ
Ё
Ё
Ё
0.58
0.5
1.2 1.5 A
ЁЁ
ЁЁ
Ё
Ё
Ё
4.7 A (2)
Ё
Ё
A
A
(3)
mV
-100 mV (4)
600 ohm
3.3 V
0.7 V
Note (1) The module should be always operated within the above ranges.
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Note (2) Measurement condition:
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
GND
Vcc rising time is 470us
Vcc
0.9Vcc
0.1Vcc
470us
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Note (3) The specified power supply current is under the conditions at Vcc = 12V, Ta = 25 ± 2 ºC, fv = 60 Hz,
whereas a power dissipation check pattern below is displayed.
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Model No.: V460H1 - L09
Preliminary
a. White Pattern
Active Area
C. Horizontal Pattern
b. Black Pattern
Active Area
Note (4) The LVDS input characteristics are as follows:
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y
3.2 BACKLIGHT UNIT
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
3.2.1 CCFL (Cold Cathode Fluorescent Lamp) CHARACTERISTICS (
Parameter Symbol
Min. Typ. Max. Lamp Input Voltage VL - 1100 - V Lamp Current IL 10.1 10.6 11.1 mA
Lamp Turn On Voltage V
S
- - 1820 V
- - 1650 V
Value
Ta = 25 ± 2 ºC)
Unit Note
-
RMS
RMS
(2), Ta = 0 ºC
RMS
(2), Ta = 25 ºC
RMS
(1)
Operating Frequency FL 30 - 80 KHz (3) Lamp Life Time LBL 50,000 - - Hrs (4)
3.2.2 INVERTER CHARACTERISTICS (
Parameter
Total Power Consumption P
Power Supply Voltage VBL 22.8 24 25.2
Power Supply Current IBL - 6.5 6.8
Input Ripple Noise - - - 912
Symbo
l
255
Ta = 25 ± 2 ºC)
Value
Unit Note
Min. Typ. Max.
- 156 163
V (6)
V
mArms No Dimming
kHz
Oscillating Frequency FW 37 40 43 mA H.V (5)
Dimming frequency Minimum Dut
Parameter
FB 150 160 170
D
MIN
-
Symbo
20
- 1.5 V Lamp Connector Open
Value Unit Note
Min. Typ. Max.
V Normal Operation
Hz
%
Note (1) Lamp current is measured by utilizing AC current probe and its value is average by measuring
master and slave board.
Note (2) The lamp starting voltage V
should be applied to the lamp for more than 1 second after startup.
S
Otherwise the lamp may not be turned on.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the
display input signals, and it may result in line flow on the display. In order to avoid interference, the
lamp frequency should be detached from the horizontal synchronous frequency and its harmonics
as far as possible.
Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and
the effective discharge length is longer than 80% of its original length (Effective discharge length is
defined as an area that has equal to or more than 70% brightness compared to the brightness at
the center point of lamp.) as the time in which it continues to operate under the condition at Ta = 25
2к and I
Note (5) The power supply capacity should be higher than the total inverter power consumption P
= 10.1~ 11.1mArms.
L
. Since
BL
the pulse width modulation (PWM) mode was applied for backlight dimming, the driving current
changed as PWM duty on and off. The transient response of power supply should be considered
for the changing loading when inverter dimming.
Note (6) The measurement condition of Max. value is based on 46" backlight unit under input voltage 24V,
average lamp current 10.9 mA and lighting 30 minutes later.
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1
A
2
A
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
HV (Blue +(-) ) HV (White +(-) )
Inverter
A A
A A
HV (Blue -(+) )
1
HV (White -(+) )
2
HV (Blue +(-) )
1
HV (White +(-) )
2
LCD Module
HV (Blue -(+) )
1
A A
A A
A A
A A
HV (White -(+) )
2
HV (Blue +(-) )
1
HV (White +(-) )
2
HV (Blue -(+) )
1
HV (White -(+) )
2
HV (Blue +(-) )
1
HV (White +(-) )
2
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4.
BLOCK DIAGRAM OF INTERFACE
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
4.1 TFT LCD MODULE
STARCONN 107C51-0000RA-G4 or P-TWO 187059-51221
ERX0(+/-)
ERX1(+/-)
ERX2(+/-)
ERX3(+/-)
ECLK(+/-)
or equivalent
ORX0(+/-)
ORX1(+/-)
ORX2(+/-)
ORX3(+/-)
OCLK(+/-)
SELLVDS
ODSEL
Vcc
GND
INPUT CONNECTOR
TIMING
CONTROLLER
DC/DC CONVERTER
SCAN DRIVER
TFT LCD PANEL
(1920x3x1080)
DATA DRIVER
VBL
GND
Status
A_DIM
I_PWM
BLON
INVERTER
CONNECTOR
CN1:
Cvilux
CI0114M1ER0-LA!
or equivalent
CN2-CN8: CP042EP1MFB-LF (Cvilux)
BACKLIGHT
UNIT
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5 .INPUT TERMINAL PIN ASSIGNMENT
5.1
TFT LCD Module
Pin Name Description
GND Ground
1 2 N.C. 3 N.C.
N.C. No Connection
4
N.C. No Connection
5
N.C. No Connection
6 7 SELLVDS LVDS data format Selection 8 N.C. No Connection 9 ODSEL Overdrive Lookup Table Selection (4)(6)
10 N.C. No Connection (2)
GND Ground
11 12 ERX0- Even pixel Negative LVDS differential data input. Channel 0 13 ERX0+ Even pixel Positive LVDS differential data input. Channel 0 14 ERX1- Even pixel Negative LVDS differential data input. Channel 1 15 ERX1+ Even pixel Positive LVDS differential data input. Channel 1 16 ERX2- Even pixel Negative LVDS differential data input. Channel 2 17 ERX2+ Even pixel Positive LVDS differential data input. Channel 2 18 GND Ground 19 ECLK­20 ECLK+ Even pixel Positive LVDS differential clock input. 21 GND Ground 22 ERX3­23 ERX3+ Even pixel Positive LVDS differential data input. Channel 3
N.C. No Connection (2)
24
N.C. No Connection (2)
25
GND Ground
26
GND Ground
27 28 ORX0­29 ORX0+ 30 ORX1­31 ORX1+ 32 ORX2­33 ORX2+ Odd pixel Positive LVDS differential data input. Channel 2 34 GND Ground 35 OCLK­36 OCLK+ Odd pixel Positive LVDS differential clock input 37 GND Ground 38 ORX3- Odd pixel Negative LVDS differential data input. Channel 3 39 ORX3+ Odd pixel Positive LVDS differential data input. Channel 3 40 N.C.
N.C. No Connection (2)
41
GND Ground
42
GND Ground
43
GND Ground
44
GND Ground
45
GND Ground
46
N.C. No Connection (2)
47 48 VCC Power input (+12V) 49 VCC Power input (+12V) 50 VCC Power input (+12V)
No Connection No Connection
Even pixel Negative LVDS differential clock input.
Even pixel Negative LVDS differential data input. Channel 3
Odd pixel Negative LVDS differential data input. Channel 0
Odd pixel Positive LVDS differential data input. Channel 0
Odd pixel Negative LVDS differential data input. Channel 1
Odd pixel Positive LVDS differential data input. Channel 1
Odd pixel Negative LVDS differential data input. Channel 2
Odd pixel Negative LVDS differential clock input
No Connection (2)
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Model No.: V460H1 - L09
Preliminary
Note
(2)
(3)(5)
(2)
(7) (7) (7) (7) (7) (7)
(7) (7)
(7) (7)
(7) (7) (7) (7) (7) (7)
(7) (7)
(7) (7)
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51 VCC Power input (+12V)
Note (1) LVDS connector pin order defined as follows
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Model No.: V460H1 - L09
Preliminary
Note (2) Reserved for internal use. Please leave it open.
Note (3) Low = Open or connect to GND: VESA Format, High = Connect to +3.3V: JEIDA Format.
Note (4) Overdrive lookup table selection. The overdrive lookup table should be selected in accordance with
the frame rate to optimize image quality.
Low = Open or connect to GND, High = Connect to +3.3V
ODSEL Note
L or open Lookup table was optimized for 60 Hz frame rate.
H Lookup table was optimized for 50 Hz frame rate.
Note (5) LVDS signal pin connected to the LCM side has the following diagram.
R1 in the system side should be less than 1K Ohm. (R1 < 1K Ohm)
TCON
TCON
R2
R2
R3
R3
Setting
Setting
Selector (pin7)
R1
R1
LCM sideSystem side
LCM sideSystem side
Note (6) ODSEL signal pin connected to the LCM side has the following diagram.
R1 in the system side should be less than 1K Ohm. (R1 < 1K Ohm)
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Selector (pin9)
Selector (pin9)
System side
System side
Notes (7) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and
the second pixel is even pixel.
R1
R1
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R2
R2
R3
R3
Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
TCON
TCON
Setting
Setting
LCM side
LCM side
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)
)
)
)
)
)
5.2 BACKLIGHT UNIT
The pin configuration for the housing and the leader wire is shown in the table below.
CN101-CN107: CP042ESFA00 (Cvilux)
Pin Name Description Wire Color
1 HV High Voltage Blue
2 HV High Voltage White
Note (1) The backlight interface housing for high voltage side is a model CP042ESFA00,
manufactured by Cvilux. The mating header on inverter part number is
CP042EP1MFB-LF (Cvilux)
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Model No.: V460H1 - L09
Preliminary
1.HV (Blue
HV
2.HV(White
1.HV (Blue
2.HV (White
1.HV (Blue
2.HV (White
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5.3 INVERTER UNIT
CN1: CI0114M1ER0-LA (Cvilux) or equivalent
Pin Symbol Feature
1
2
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Model No.: V460H1 - L09
Preliminary
3
4
5
6
7
8
9
10
11
12
13
14
Note (1) Pin 12: External PWM control (use pin 12): Pin 13 must open.
VBL +24V
GND GND
STATUS
Normal (3.3V) Abnormal(GND)
E_PWM External PWM Control Signal
I_PWM Internal PWM Control Signal
BLON BL ON/OFF
Note (2) Pin 13: Internal PWM control (use pin 13): Pin 12 must open.
Note (3) Pin 12 and Pin 13 can’t open in the same period.
CN2~CN8: CP042EP1MFB-LF (Cvilux)
Pin Symbol Description
1
2
CCFL HOT CCFL high voltage
CCFL HOT CCFL high voltage
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7
G
G7
7
r
O
p
OG0-OG7
O
7
K
OG0-OG7
K
5.4 BLOCK DIAGRAM OF INTERFACE
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
CNF1
ER0-ER7
EG0-EG7
EB0-EB
DE
OR0-OR7
B0-OB
DCL
Host
Graphics
Controller
TxIN
PLL
ERx0+
ERx0-
ERx1+
ERx1-
ERx2+
ERx2-
ERx3+
ERx3-
ECLK+
ORx0+
ORx0-
ORx1+
ORx1-
-
100Ө
100Ө
100pF
100Ө
100Ө
100pF
100Ө 100Ө
100pF
100Ө
100Ө
100pF
100Ө
100Ө
100pF
100Ө
100Ө
100
ER0-ER7
E
0-E
EB0-EB
DE
OR0-OR7
OB0-OB7
PLL
DCL
Timing
Controlle
F
ORx2+
ORx3+
ORx3-
OCLK+
PLL
LVDS Transmitter
Rx2-
100Ө
100Ө 100Ө
100Ө
100Ө
-
100Ө
LVDS Receiver
100pF
100pF
100pF
PLL
THC63LVDM83A
(LVDF83A)
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ER0~ER7 : Even pixel R data
EG0~EG7 : Even pixel G data
EB0~EB7 : Even pixel B data
OR0~OR7 : Odd pixel R data
OG0~OG7: Odd pixel G data
OB0~OB7 : Odd pixel B data
DE : Data enable signal
DCLK : Data clock signal
Notes (1) The system must have the transmitter to drive the module.
Notes (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when
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Model No.: V460H1 - L09
Preliminary
it is used differentially.
Notes (3) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel
and the second pixel is even pixel.
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5.5 LVDS INTERFACE
VESA LVDS formatΚ(SELLVDS pin=L or OPEN)
RXCLK
RXCLK
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Current F\FOH
Current F\FOH
Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
ORX0
ORX0
ORX1
ORX1
ORX2
ORX2
ORX3
ORX3
ERX0
ERX0
ERX1
ERX1
ERX2
ERX2
ERX3
ERX3
JEDIA LVDS formatΚ(SELLVDS pin=H)
R5G0 R4 R3 R2 R1
R5G0 R4 R3 R2 R1
B0 G5B1
B0 G5B1
R5G0 R4 R3 R2 R1
R5G0 R4 R3 R2 R1
B0 G5B1
B0 G5B1
G3 G2G4
G3 G2G4
G3 G2G4
G3 G2G4
R0
R0
G1
G1
B2B4 B3B5VS HSDE
B2B4 B3B5VS HSDE
R6G6 R7G7B7 B6RSVD
R6G6 R7G7B7 B6RSVD
R0
R0
G1
G1
B2B4 B3B5VS HSDE
B2B4 B3B5VS HSDE
R6G6 R7G7B7 B6RSVD
R6G6 R7G7B7 B6RSVD
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RXCLK
RXCLK
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Current F\FOH
Current F\FOH
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Model No.: V460H1 - L09
Preliminary
ORX0
ORX0
ORX1
ORX1
ORX2
ORX2
ORX3
ORX3
ERX0
ERX0
ERX1
ERX1
ERX2
ERX2
ERX3
ERX3
R0~R7: Pixel R Data (7; MSB, 0; LSB)
G0~G7: Pixel G Data (7; MSB, 0; LSB)
B0~B7: Pixel B Data (7; MSB, 0; LSB)
DE : Data enable signal
R7G2 R6 R5 R4 R3
R7G2 R6 R5 R4 R3
B2 G7B3
B2 G7B3
R7G2 R6 R5 R4 R3
R7G2 R6 R5 R4 R3
B2 G7B3
B2 G7B3
G5 G4G6
G5 G4G6
G5 G4G6
G5 G4G6
R2
R2
G3
G3
B4B6 B5B7VS HSDE
B4B6 B5B7VS HSDE
R0G0 R1G1B1 B0RSVD
R0G0 R1G1B1 B0RSVD
R2
R2
G3
G3
B4B6 B5B7VS HSDE
B4B6 B5B7VS HSDE
R0G0 R1G1B1 B0RSVD
R0G0 R1G1B1 B0RSVD
DCLK : Data clock signal
Notes: (1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.
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5.6 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the
color. The higher the binary input, the brighter the color. The table below provides the assignment of the
color versus data input.
Color
R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0
0
0
Black Red
Green Basic Colors
Gray Scale Of Red
Gray Scale Of Green
Gray Scale Of Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Yel lo w
White
Red (0) / Dark
Red (1)
Red (2)
:
: Red (253) Red (254) Red (255) Green (0) / Dark Green (1) Green (2)
:
: Green (253) Green (254) Green (255) Blue (0) / Dark Blue (1) Blue (2)
:
: Blue (253) Blue (254) Blue (255)
0
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
Data Signal
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
1
0
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 : :
0
0
0
0
0
0
0
0
0
1
0
0
: :
0
1
0
0
0
1 0
0
0
0
0
0 : :
1
0
1
0
1
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
: :
:
0
0
0
0
0
0 0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
1
1
1 0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
:
:
:
:
:
:
1
0
1
0
1
1
1
1
1
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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
(Ta = 25 ± 2 ºC)
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
Frequency
LVDS
Receiver
Clock
Input cycle to cycle jitter Spread spectrum modulation range
Spread spectrum modulation frequency
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
F
clkin
(=1/Tc)
T
-200
rcl
clkin_mod
F
F
200 KHz
SSM
60 74.25 80 MHz
Ё
F
-2%
clkin
Ё
200 ps (3)
F
+2% MHz
clkin
Preliminary
(4)
LVDS
Receiver
Data
Setup Time Tlvsu 600
Hold Time Tlvhd 600
ЁЁ
ЁЁ
ps
(5)
ps
Fr5 47 50 53 Hz
(6)
Tv=Tvd+Tvb
Ё
Ё
Th=Thd+Thb
Ё
Ё
Ver t ical
Active
Display
Term
Horizontal
Active
Display
Term
Frame Rate
57 60 63 Hz
F
r6
Total Tv 1115 1125 1135 Th
Display Tvd 1080 1080 1080 Th
Blank Tvb 35 45 55 Th
Total Th 1050 1100 1150 Tc
Display Thd 960 960 960 Tc
Blank Thb 90 140 190 Tc
Note (1) ˣ˿˸˴˸ʳ˴˾˸ʳ˸ʳ˻˸ʳ˴˺˸ʳ˹ʳ˼˸˿ʳ˶˿˶˾ʳ˻˴ʳ˹˿˿ʳ˻˸ʳ˵˸˿ʳ˸˴˼Κʳ ʳ ʳ
˙
˶˿˾˼ʻ˴ʼ
˙
ˈ
ʳЊʳ˙
ˉ
ʳѼʳ˧ʳѼʳ˧˻
ʳѼʳ˧ʳѼʳ˧˻ʳЊʳ˙
ʳ
˶˿˾˼ʻ˼ʼʳ
Note (2) ˧˻˼ʳmodule is operated in DE only mode and please follow the input signal timing diagram beloΚʳ
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DE
T
h
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INPUT SIGNAL TIMING DIAGRAM
T
v
T
vd
Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
T
vb
DCLK
T
c
T
T
hb
hd
DE
DAT
Note (3) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T1 – TI
Valid display data ( 960 clocks)
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Note (4) The SSCG (Spread spectrum clock generator) is defined as below figures.
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
Note (5) The LVDS timing diagram and setup/hold time is defined and showing as the following figures.
LVDS RECEIVER INTERFACE TIMING DIAGRAM
Tc
RX
CLK
+/-
RXn+/-
Tlvsu
Tlvhd
1T
3T
5T
7T
9T
11T
13T
14
Note (6) (ODSEL) = H/L or open for 50/60Hz frame rate. Please refer to 5.1 for detail information
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14
14
14
25
14
14
14
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6.2 POWER ON/OFF SEQUENCE
(Ta = 25 ± 2 ºC)
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should follow the
diagram below.
0V
0.5ЉЉЉЉT1ЉЉЉЉ10ms
0ЉЉЉЉT
0ЉЉЉЉT
500ms ЉЉЉЉT
2
ЉЉЉЉ50ms
3
ЉЉЉЉ50ms
4
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0.1V
CC
T
1
T
2
Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
0.1V
cc
T
3
T
4
LVDS Signals
0ЉЉЉЉT7ЉЉЉЉT2
0ЉЉЉЉT
8
ЉЉЉЉT3
0V
Option Signals
(SELLVDS, ODSEL)
Backlight (Recommended)
500msЉЉЉЉT
100ms
ЉЉЉЉ
5
T6
Power On
T
7
T
5
Power ON/OFF Sequence
VA L I D
50%
50%
Power Off
T
8
6
T
Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.
Note (2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD
operation or the LCD turns off before the backlight turns off, the display may momentarily become
abnormal screen.
Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance. If
T2<0,that maybe cause electrical overstress failure.
Note (4) T4 should be measured after the module has been fully discharged between power off and on period.
Note (5) Interface signal shall not be kept at high impedance when the power is on.
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit Ambient Temperature Ta Ambient Humidity Ha Supply Voltage V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" Lamp Current I Oscillating Frequency (Inverter) F Vertical Frame Rate Fr 60 Hz
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should be
measured under the test conditions described in 7.1 and stable environment shown in Note (6).
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR 4000 6000 - - Note (2)
Response Time
Center Luminance of White L
White Variation Cross Talk CT - - 4 % Note (5)
Red
Color Chromaticity
Viewing Angle
Green
Blue
White
Color Gamut
Horizontal
Ver t ical
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
o
25±2
50±10
CC
L
W
Gray to
gray
C
δW
=0°, θY =0°
θ
Rx 0.633 -
Ry
x
Viewing angle at
normal direction
12V V
10.6±0.5 40±3
- 6.5 12 ms Note (3)
360 450 -
- - 1.3 - Note (7)
0.324 Gx 0.289 ­Gy Bx 0.147 -
Typ.-
0.03
By
0.603
0.050
Typ.+
0.03
Wx 0.285 ­Wy
0.293
72 - % NTSC
θx+
θ
x
θY+
θ
Y
­CR20
-
80 88 ­80 88 ­80 88 ­80 88 -
C
%RH
mA
KHz
cd/
Note (4)
2
m
-
-
Note (6)
-
-
Deg. Note (1)
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T
Note (1) Definition of Viewing Angle (θx, θy):
Viewing angles are measured by Autronic Conoscope Cono-80
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
Normal
θx = θy = 0º
θy- θy+
θX- = 90º
x-
θx
6 o’clock
θ
y-
= 90º
y-
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L255 / L0
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note
(7)
Note (3) Definition of Gray to Gray Switching Time :
θx+
y+
12 o’clock direction
θ
y+
= 90º
x+
θX+ = 90º
100%
90%
Optical
Response
10%
0%
Gray to gray switching time
Gray to gray switching time
The driving signal means the signal of gray level 0, 63, 127, 191, and 255.
Gray to gray average time means the average switching time of gray level 0 ,63,127,191,255 to each
other .
28
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A
A
(
)
A
A
(
)
Note (4) Definition of Luminance of White (LC):
Measure the luminance of gray level 255 at center point.
L
= L (5), where L (x) is corresponding to the luminance of the point X at the figure in Note (7).
C
Note (5) Definition of Cross Talk (CT):
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
CT = | Y
Where:
(0, 0)
Y
(D/8,W/2)
A, L
Y
(D/2,7W/8)
A, D
(b)
– YA | / YA× 100 (%)
B
Y
= Luminance of measured location without gray level 255 pattern (cd/m2)
A
Y
= Luminance of measured location with gray level 255 pattern (cd/m2)
B
ctive Area
Y
(D/2,W/8)
A, U
Y
Gray 51
= Luminance of measured location without gray level 255 pattern (cd/m2)
Y
A
Y
= Luminance of measured location with gray level 255 pattern (cd/m2)
B
Y
A, R
(D, W)
(7D/8,W/2)
B, L
Y
B, D
(0, 0)
(D/4,W/4)
(D/8,W/2)
(D/2,7W/8)
ctive Area
Gray 0
Gray 255
Gray 51
Y
(D/2,W/8)
B, U
Y
(7D/8,W/2)
B, R
(3D/4,3W/4)
D, W
ctive Area
Gray 0
Y
(D/8,W/2)
A, L
Y
(D/2,7W/8)
A, D
(0, 0)
Note (6) Measurement Setup:
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt
Y
Y
A, R
(D, W)
(D/2,W/8)
A, U
(7D/8,W/2)
Y
(D/8,W/2)
B, L
Y
(D/2,7W/8)
B, D
(0, 0)
(D/4,W/4)
ctive Area
Gray 255
Gray 0
Y
(D/2,W/8)
B, U
Y
B, R
(3D/4,3W/4)
D, W
(7D/8,W/2)
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temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting backlight for 1 hour in a windless room.
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
Note (7) Definition of White Variation (δW):
Measure the luminance of gray level 255 at 5 points
δW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
W/4
W/2
W
Vertical Line
3W/4
Horizontal Line
D
D/4 D/2 3D/4
1 2
: Test Point
5
3 4
X
X=1 to 5
Active Area
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8. DEFINITION OF LABELS
8.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
CHI MEI
OPTOELECTRONICS
CHI MEI
OPTOELECTRONICS
(a) Model Name: V460H-L09
(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.
V460H1 -L09 Rev. XX
X X X X X X X Y M D L N N N N
V460H1 - L09 Rev. XX
X X X X X X X Y M D L N N N N
CM46H19XXXXXLXXLYMDNNNN
GEMN
(c) Serial ID: X X
(d) Production Location:XXXX, for example:TAIWAN or CHINA .
Serial ID includes the information as below:
(a) Manufactured Date: Year: 0~9, for 2000~2009
X X X X X Y M D L N N N N
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1
Serial No.
Product Line
Year, Month, Date
CMO Internal Use
CMO Internal Use
Revision
CMO Internal Use
st
to 31st, exclude I ,O, and U.
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(b) Revision Code: Cover all the change
(c) Serial No.: Manufacturing sequence of product
Product Line: 1 -> Line1, 2 -> Line 2, …etc
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
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9. PACKAGING
9.1 PACKING SPECIFICATIONS
(1) 3 LCD TV modules / 1 Box
(2) Box dimensions: 1175(L)x 282(W)x 725(H)mm
(3) Weight: approximately 45Kg (3 modules per box)
9.2 PACKING METHOD
Figures 9-1 and 9-2 are the packing method
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
LCD TV Module
Cushion(Bottom)
Anti-static Bag
PP Belt
Carton Label
Figure.9-1 packing method
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Air Transportation &
Sea / Land Transportation (40ft Container)
(L1130*50*50mm)
Film
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
(L1150*W1190*H140mm)
(L1400*50*50mm)
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Sea / Land Transportation (40ft HQ Container)
(L1000*50*50mm)
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
(L625*50*50mm)
(L1150*W1080*H140mm)
Figure.9-2 packing method
Film
(L700*50*50mm)
(L1050*50*50mm)
(L1130*50*50mm)
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Global LCD Panel Exchange Center
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
10. PRECAUTIONS
10.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) It is recommended to assemble or to install a module into the user’s system in clean working areas. The
dust and oil may cause electrical short or worsen the polarizer.
(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and backlight.
(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMOS LSI chips.
(5) Do not plug in or pull out the I/F connector while the module is in operation.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.
(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD
modules in the specified storage conditions.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of CCFL will be higher than that of room
temperature.
10.2 SAFETY PRECAUTIONS
(1) The startup voltage of a backlight is over 1000 Volts. It may cause an electrical shock while assembling
with the inverter. Do not disassemble the module or insert anything into the backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
10.3 SAFETY STANDARDS
The LCD module should be certified with safety regulations as follows:
Regulatory Item Standard
UL UL 60950-1: 2003
Information Technology equipment
Audio/Video Apparatus
If the module displays the same pattern for a long period of time, the phenomenon of image sticking may be
occurred.
cUL CAN/CSA C22.2 No.60950-1-03
CB IEC 60950-1:2001
UL UL 60065: 2003
cUL CAN/CSA C22.2 No.60065-03
CB IEC 60065:2001
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11. MECHANICAL CHARACTERISTIC
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Issued Date: Dec. 25, 2009
Model No.: V460H1 - L09
Preliminary
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